Preparation method and structure of metal-semiconductor structure, top gate field effect transistor

Abstract

The application discloses a preparation method and structure of a metal-semiconductor structure, and a top gate field effect tube, comprising the following steps: sequentially depositing a sacrificial layer and a second bearing layer on a first bearing layer, evaporating electrode metal on the second bearing layer by an electron beam to form a first metal layer, and etching the first metal layer and the second bearing layer by an ion beam to obtain a first structure; evaporating electrode metal on the first structure by an electron beam to form a second metal layer, etching the second metal layer by an ion beam to form an electrode on the sacrificial layer, spin-coating a support layer on the etched first structure to obtain a second structure; placing the second structure into a first dissolving solution to dissolve the sacrificial layer and obtain a third structure; and transferring the third structure to a substrate to dissolve the support layer and obtain a metal-semiconductor structure; and the application evaporates and etches the metal electrode on the sacrificial layer, avoids the direct contact between high-energy particles and the semiconductor, and solves the technical problem of poor contact performance between the metal electrode and the semiconductor.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor structure preparation, and more specifically, to a preparation method and structure of a metal-semiconductor structure, and a top-gate field-effect transistor. Background Art

[0002] As the amount of information processed increases, the integration of circuits continues to increase, driving the development of devices towards miniaturization. With the increasing development of semiconductor device micromachining technology, the parameter requirements for semiconductor devices will also increase. Metal-semiconductor structure is a key component of all semiconductor devices.

[0003] Improving the contact performance between metal electrodes and semiconductors is a key process in semiconductor device research. However, due to the high energy of metal particles deposited by electron beam evaporation, this high energy can alter the energy level structure of the semiconductor material, thereby changing the Fermi level of the semiconductor material and, in turn, altering the barrier height between the metal and semiconductor. This change in barrier height can lead to unfavorable electron transport conditions between the electron beam-deposited metal and the semiconductor, affecting the electrical properties of the material and the performance of the device. Summary of the Invention

[0004] The embodiments of the present application provide a preparation method and structure of a metal-semiconductor structure and a top-gate field-effect transistor, which prevent high-energy particles from directly contacting the semiconductor material.

[0005] In a first aspect, an embodiment of the present application provides a method for preparing a metal-semiconductor structure, comprising:

[0006] Depositing a sacrificial layer and a second carrier layer in sequence on the first carrier layer, and forming a first metal layer by electron beam evaporation of an electrode metal on the second carrier layer, and etching the first metal layer and the second carrier layer by ion beam etching to obtain a first structure;

[0007] On the first structure, an electrode metal is deposited by electron beam evaporation to form a second metal layer, the second metal layer is ion beam etched to form an electrode on the sacrificial layer, and a support layer is spin-coated on the etched first structure to obtain a second structure;

[0008] placing the second structure into a first dissolving solution to dissolve the sacrificial layer to obtain a third structure;

[0009] transferring the third structure to a substrate, dissolving the support layer, and obtaining the metal-semiconductor structure;

[0010] Among them, the first structure is respectively the first metal layer, the second bearing layer, the sacrificial layer and the first bearing layer from top to bottom; the second structure is respectively the supporting layer, the electrode, the sacrificial layer and the first bearing layer from top to bottom; the third structure is respectively the supporting layer and the electrode from top to bottom.

[0011] In some embodiments, the step of sequentially depositing a sacrificial layer and a second carrier layer on the first carrier layer, and forming a first metal layer by electron beam evaporation of an electrode metal on the second carrier layer includes:

[0012] Depositing the sacrificial layer material onto the surface of the first bearing layer to form a thin film structure of the sacrificial layer;

[0013] Depositing the second bearing layer material onto the surface of the sacrificial layer to form a thin film structure of the second bearing layer;

[0014] A layer of electrode metal is deposited on the second carrier layer by electron beam evaporation to form the first metal layer.

[0015] In some embodiments, the step of etching the first metal layer and the second carrier layer by ion beam to obtain the first structure includes:

[0016] The first metal layer and the second carrier layer are bombarded by ion beams, and the metal in the non-electrode area of ​​the first metal layer and the second carrier layer are etched according to the pattern of the photoresist to form the first structure.

[0017] In some embodiments, before etching the first metal layer and the second carrier layer by ion beam, the preparation method further includes:

[0018] The photoresist is evenly spin-coated on the first metal layer and cured, and the photoresist is exposed to form a desired metal electrode pattern using a photolithography machine.

[0019] In some embodiments, the second metal layer is formed on the first structure by electron beam evaporation of an electrode metal, the second metal layer is ion beam etched to form an electrode on the sacrificial layer, and a support layer is spin-coated on the etched first structure to obtain the second structure, including:

[0020] Depositing a layer of electrode metal on the first structure by electron beam evaporation to form the second metal layer;

[0021] Bombarding the second metal layer with an ion beam, etching the metal in the non-electrode area of ​​the second metal layer according to the pattern of the photoresist, and forming the electrode on the sacrificial layer by the etched first metal layer, the second metal layer, and the second carrier layer;

[0022] A flexible material is spin-coated on the etched first structure to form the support layer, thereby obtaining the second structure.

[0023] In some embodiments, before etching the second metal layer by ion beam, the preparation method further includes:

[0024] The photoresist is evenly spin-coated on the second metal layer and cured, and the photoresist is exposed to form a desired metal electrode pattern using a photolithography machine.

[0025] In some embodiments, placing the second structure in a first dissolving solution and dissolving the sacrificial layer to obtain a third structure includes:

[0026] placing the second structure into the first dissolving solution to dissolve the sacrificial layer;

[0027] The electrode and the first supporting layer are separated to obtain the third structure.

[0028] In some embodiments, transferring the third structure to a substrate and dissolving the supporting layer to obtain the metal-semiconductor structure includes:

[0029] After obtaining the third structure from the first dissolving solution, the third structure is supported by a glass slide and a tape formed by a high molecular polymer;

[0030] Transferring the third structure to the substrate via a two-dimensional transfer platform, fixing the electrode on the substrate, and removing the glass slide and the high molecular polymer;

[0031] The support layer is dissolved by a second dissolving solution to obtain the metal-semiconductor structure.

[0032] In a second aspect, an embodiment of the present application provides a metal-semiconductor structure obtained by the method for preparing the metal-semiconductor structure according to the first aspect, wherein the metal-semiconductor structure comprises:

[0033] The electrode comprises a gate electrode, a source electrode, a drain electrode and a second carrier layer, wherein the gate electrode is evaporated on the second carrier layer;

[0034] A substrate, wherein the substrate is a two-dimensional material and a semiconductor material from top to bottom, the second supporting layer is fixed on the two-dimensional material, and the source and the drain are fixed on the semiconductor material.

[0035] In a third aspect, an embodiment of the present application provides a metal-semiconductor structure, comprising:

[0036] substrate;

[0037] An electrode is located above the substrate, and the electrode comprises a first metal electrode layer, a second bearing layer and a second metal electrode layer, and the first metal electrode layer is located above the second bearing layer.

[0038] In a fourth aspect, the embodiments of the present application provide a top-gate field effect transistor comprising the metal-semiconductor structure according to the second aspect or the third aspect.

[0039] The metal-semiconductor structure preparation method and structure, and the top-gate field effect transistor provided by the embodiments of the present application have at least the following beneficial effects: according to the embodiments of the present application, a sacrificial layer and a second bearing layer are sequentially deposited on a first bearing layer, an electrode metal layer is formed on the second bearing layer by electron beam evaporation, a first metal layer is etched from the first metal layer according to a required metal electrode pattern by ion beam etching, a second metal layer is formed by evaporating an electrode metal layer again after etching, the second metal layer is etched, the first metal layer, the second bearing layer and the second metal layer form an electrode on the sacrificial layer after etching is completed, a support layer is spin-coated on the electrode, the electrode is placed into a first dissolving solution, the electrode and the first bearing layer are separated by dissolving the sacrificial layer, and finally the electrode is transferred to a substrate and the support layer is dissolved to obtain a metal-semiconductor structure; according to the embodiments of the present application, the metal electrode is evaporated and etched on the sacrificial layer to avoid direct contact between high-energy particles and the semiconductor material, the sacrificial layer is dissolved by the first dissolving solution to separate the metal electrode from the bearing layer, and the metal electrode is transferred to the substrate to achieve the effects of an atomically flat metal surface and an atomically flat contact interface, better metal-semiconductor interface electrical performance is obtained, the technical problem of poor contact performance between the metal electrode and the semiconductor is solved, and a top-gate field effect transistor with low contact resistance is formed by the metal-semiconductor structure.

[0040] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent from the description, or can be learned by practice of the present application. The objects and other advantages of the present application will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings. BRIEF DESCRIPTION OF DRAWINGS

[0041] Figure 1 FIG. 1 is a flowchart of a metal-semiconductor structure preparation method according to an embodiment of the present application;

[0042] Figure 2 FIG. 2 is a flowchart of a first metal layer preparation method according to an embodiment of the present application;

[0043] Figure 3 FIG. 3 is a flowchart of a first structure preparation method according to an embodiment of the present application;

[0044] Figure 4is a schematic diagram of a first structure provided by an embodiment of the present application;

[0045] Figure 5 is a flowchart of a preparation method of a second structure provided by an embodiment of the present application;

[0046] Figure 6 is a schematic diagram of a second structure provided by an embodiment of the present application;

[0047] Figure 7 is a flowchart of a preparation method of a photoresist pattern provided by an embodiment of the present application;

[0048] Figure 8 is a flowchart of another preparation method of a photoresist pattern provided by an embodiment of the present application;

[0049] Figure 9 is a flowchart of a preparation method of a third structure provided by an embodiment of the present application;

[0050] Figure 10 is a schematic diagram of a third structure provided by an embodiment of the present application;

[0051] Figure 11 is a flowchart of a method for preparing a metal-semiconductor structure by a third structure provided by an embodiment of the present application;

[0052] Figure 12 is a flowchart of a method for transferring a metal electrode provided by an embodiment of the present application;

[0053] Figure 13 is a schematic diagram of a metal-semiconductor structure provided by an embodiment of the present application;

[0054] Figure 14 is a flowchart of a preparation method of a metal-semiconductor structure provided by an embodiment of the present application;

[0055] Figure 15 is a flowchart of another preparation method of a metal-semiconductor structure provided by an embodiment of the present application;

[0056] Figure 16 is a flowchart of another method for transferring a metal electrode provided by an embodiment of the present application. DETAILED DESCRIPTION

[0057] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. In addition, the features, operations or characteristics described in the specification can be combined in any appropriate manner to form various implementation methods. At the same time, the steps or actions in the method description can also be swapped or adjusted in order in a manner that is obvious to those skilled in the art. Therefore, the various orders in the specification and the drawings are only for the purpose of clearly describing a certain embodiment and are not meant to be a necessary order, unless otherwise specified that a certain order must be followed.

[0058] In the description of this application, "several" means one or more, "many" means more than two, "greater than," "less than," and "exceed" are understood to exclude the number itself, while "above," "below," and "within" are understood to include the number itself. The terms "first" and "second" are used solely to distinguish technical features and are not to be construed as indicating or implying relative importance, or as implicitly specifying the number or order of the technical features indicated.

[0059] The serial numbers assigned to components herein, such as "first," "second," etc., are used solely to distinguish the objects being described and do not convey any sequential or technical meaning. References to "connection" and "coupling" herein, unless otherwise specified, include both direct and indirect connections (couplings).

[0060] As the amount of information processed increases, the integration of circuits continues to increase, driving the development of devices towards miniaturization. With the increasing development of semiconductor device micromachining technology, the parameter requirements for semiconductor devices will also increase. Metal-semiconductor structure is a key component of all semiconductor devices.

[0061] A key process in semiconductor device research is improving the contact performance between metal electrodes and semiconductors. The most important parameter in metal-semiconductor structures is the Schottky barrier height, which represents the energy required for electrons or holes to cross the metal-semiconductor junction and is a key parameter in the equation that defines device performance. Because the metal particles deposited by electron beam evaporation have high energy, this high energy can alter the energy level structure of the semiconductor material, thereby changing the Fermi level and, in turn, the barrier height between the metal and semiconductor. This change in barrier height can lead to unfavorable electron transport conditions between the electron beam-deposited metal and the semiconductor, affecting the electrical properties of the material and the performance of the device.

[0062] Currently, existing technologies include two approaches for fabricating metal-semiconductor structures by transferring metal electrodes: the direct electrode exfoliation method and the interlayer-assisted method. However, both approaches have drawbacks. The direct electrode exfoliation method is only suitable for materials with weak adhesion to silicon, such as Au, Ag, and Cu, and the exfoliation process can damage the contact surface. The interlayer-assisted method, on the other hand, requires the preparation of large-scale, high-quality graphene, which currently presents many challenges.

[0063] The embodiments of the present application provide a method for preparing a metal-semiconductor structure and a structure, as well as a top-gate field-effect transistor, which utilize a novel metal electrode transfer method to prepare a non-destructive metal-semiconductor structure, thereby avoiding direct contact between high-energy particles and semiconductor materials.

[0064] The following describes a preparation method and structure of a metal-semiconductor structure and a top-gate field-effect transistor provided by the present application in conjunction with the accompanying drawings:

[0065] Reference Figure 1 As shown, Figure 1 : This is a flow chart of a method for preparing a metal-semiconductor structure provided in an embodiment of the present application. The method may include but is not limited to the following steps:

[0066] Step S110, depositing a sacrificial layer and a second carrier layer in sequence on the first carrier layer, and performing electron beam evaporation of an electrode metal on the second carrier layer to form a first metal layer, and performing ion beam etching on the first metal layer and the second carrier layer to obtain a first structure;

[0067] Step S120, forming a second metal layer on the first structure by electron beam evaporation of an electrode metal, forming an electrode on the sacrificial layer by ion beam etching the second metal layer, and spin-coating a support layer on the etched first structure to obtain a second structure;

[0068] Step S130 , placing the second structure into the first dissolving solution to dissolve the sacrificial layer to obtain a third structure;

[0069] Step S140 , transferring the third structure to a substrate, dissolving the support layer, and obtaining a metal-semiconductor structure.

[0070] It should be noted that the first structure is, from top to bottom, the first metal layer, the second bearing layer, the sacrificial layer and the first bearing layer; the second structure is, from top to bottom, the supporting layer, the electrode, the sacrificial layer and the first bearing layer; the third structure is, from top to bottom, the supporting layer and the electrode.

[0071] In some embodiments of the present application, a sacrificial layer and a second bearing layer are sequentially deposited on a first bearing layer. The first bearing layer and the second bearing layer can be strontium titanate STO (SrTiO3) or other suitable materials. The sacrificial layer can be strontium aluminate SAO (Sr3Al2O6) or other suitable materials. A laser beam is bombarded onto an SAO target to cause it to evaporate. The evaporated material is deposited on the surface of the first STO bearing layer, thereby forming an SAO thin film as a sacrificial layer. The sacrificial layer serves as a temporary load material in the subsequent preparation process. A laser beam is bombarded onto an STO target to cause it to evaporate. The evaporated material is deposited on the surface of the SAO sacrificial layer, thereby forming an SAO thin film as a second STO bearing layer. Electron beam evaporation of electrode metal is performed on the second STO carrier layer to form a first metal layer. The first metal layer and the second STO carrier layer can be precisely processed by ion beam etching technology to remove unnecessary parts and form a desired pattern, thereby obtaining a desired electrode pattern or morphology to form a first structure. Subsequently, electrode metal is again evaporated on the first structure by electron beam evaporation to form a second metal layer. The second metal layer is again overetched by ion beam etching technology to etch away the metal in the non-electrode area. The first metal layer, the second metal layer and the second STO carrier layer after etching are formed into electrodes on the sacrificial layer. A layer of flexible substrate is spin-coated on the etched first structure by spin coating. The material serves as a support layer, which can be polymethyl methacrylate (PMMA) or other suitable materials. The function of the support layer is to provide temporary support and protection in subsequent steps, thereby obtaining a second structure; the second structure is placed in a dissolving solution that can dissolve the sacrificial layer, wherein the second structure can be placed in water to dissolve the SAO sacrificial layer, thereby separating the electrode and the first STO supporting layer. At the same time, due to the presence of the PMMA support layer, the electrode is able to maintain its shape and position, and the metal electrode is extracted to obtain a third structure; after extracting the third structure, it is transferred to a substrate and fixed. In the transistor, the substrate is used to support the electrode, and finally the PMMA support layer is dissolved to obtain a metal-semiconductor structure.

[0072] Reference Figure 2 As shown, Figure 2 : is a flow chart of a method for preparing a first metal layer provided in an embodiment of the present application. The method may include but is not limited to the following steps:

[0073] Step S210 , depositing a sacrificial layer material onto the surface of the first carrier layer to form a sacrificial layer thin film structure;

[0074] Step S220 , depositing a second carrier layer material onto the surface of the sacrificial layer to form a thin film structure of the second carrier layer;

[0075] Step S230 , depositing a layer of electrode metal on the second carrier layer by electron beam evaporation to form a first metal layer.

[0076] In some embodiments of the present application, an SAO sacrificial layer is deposited on a first STO carrier layer by PLD, the first STO carrier layer is placed in a PLD deposition chamber, the parameters of the PLD deposition chamber are set, and 2000 pulses of the SAO sacrificial layer are grown to form a uniform and continuous SAO sacrificial layer thin film structure; a second STO carrier layer is deposited on the SAO sacrificial layer thin film by PLD to prepare for subsequent evaporation, the parameters of the PLD deposition chamber are set, and 1000 pulses of the STO thin film are grown to form the second STO carrier layer, which serves as a dielectric layer; after the deposition of the SAO sacrificial layer and the second STO carrier layer is completed, the electrode metal is evaporated on the second STO carrier layer using electron beam evaporation technology. In this process, parameters such as the energy, current density, and evaporation time of the electron beam are controlled.

[0077] It should be noted that the PLD deposition chamber parameters can be set as follows: the backing vacuum is evacuated to below 1E-7 Torr, the substrate is heated to 800°C, and the oxygen pressure is adjusted to 1E-6 Torr. The laser energy is set to 1.3 J / cm², the laser pulse frequency is 2 Hz, and the target-substrate distance is 70 cm. A 2000-pulse SAO sacrificial layer is grown to form a uniform and continuous SAO sacrificial layer film structure. After the SAO sacrificial layer film is deposited, the substrate is heated to 730°C, the oxygen pressure is adjusted to 15 mTorr, the laser energy is set to 1.3 J / cm², the laser pulse frequency is 2 Hz, and the target-substrate distance is 70 cm. A 1000-pulse STO film is grown. These various parameter settings are freely selectable by technicians based on actual conditions and needs, and are not limited here.

[0078] Reference Figure 3 and Figure 4 As shown, Figure 3 is a flow chart of a method for preparing a first structure provided in an embodiment of the present application, Figure 4 This is a schematic diagram of a first structure provided in an embodiment of the present application. The method may include but is not limited to the following steps:

[0079] Step S310, bombarding the first metal layer with an ion beam to etch the metal in the non-electrode area of ​​the first metal layer according to the pattern of the photoresist;

[0080] Step S320 , etching the exposed portion of the second carrier layer by ion beam to form a first structure.

[0081] In some embodiments of the present application, ion beam etching technology is used to etch the non-electrode area in the first metal layer according to a predefined or patterned photoresist pattern, thereby forming a desired electrode pattern or structure. After the non-electrode area in the first metal layer is etched away by the ion beam, part of the STO supporting layer that supports the non-electrode area of ​​the first metal layer in the second STO supporting layer will be exposed, and the exposed part will continue to be etched by the ion beam to form a first structure.

[0082] It should be noted that the first structure comprises, from top to bottom, a first metal layer 400 , a second STO bearing layer 300 , a SAO sacrificial layer 200 and a first STO bearing layer 100 .

[0083] In some embodiments of the present application, the pattern of the photoresist is developed by an alkaline developer. It should be noted that the alkaline developer develops the pattern of the photoresist, and the first metal layer is etched by an ion beam according to the pattern of the photoresist.

[0084] It should be noted that the embodiment of the present application uses an ion beam to bombard the metal surface of the non-electrode area in the first metal layer and the exposed portion in the second STO bearing layer to remove the metal in the non-electrode area and the exposed portion in the second STO bearing layer. Those skilled in the art can use chemical etching and physical etching. Chemical etching mainly uses chemical reactions in chemical solutions to remove part of the material surface. Commonly used chemical etching methods include wet etching and dry etching, wherein wet etching is carried out in a liquid solution, while dry etching is carried out in the gas phase. In addition to the use of high-energy particles (such as ion beams) in this application, physical etching can also use high-energy light beams (such as lasers) for etching. The various methods mentioned above can be selected by technicians according to actual conditions and needs, and no limitation is made here.

[0085] Reference Figure 5 and Figure 6 As shown, Figure 5 is a flow chart of a method for preparing a second structure provided in an embodiment of the present application, Figure 6 A schematic diagram of a second structure provided in an embodiment of the present application, wherein the method may include but is not limited to the following steps:

[0086] Step S510, depositing a layer of electrode metal on the first structure by electron beam evaporation to form a second metal layer;

[0087] Step S520, bombarding the second metal layer with an ion beam to etch the metal in the non-electrode area of ​​the second metal layer according to the pattern of the photoresist, and forming an electrode on the sacrificial layer by the etched first metal layer, the second metal layer, and the second carrier layer;

[0088] Step S530 , spin-coating a flexible material on the etched first structure to form a support layer, thereby obtaining a second structure.

[0089] In some embodiments of the present application, electrode metal is evaporated on the SAO sacrificial layer and the first metal layer after etching by electron beam evaporation technology to form a second metal layer; the second metal layer is overetched by ion beam etching technology, and the non-electrode area in the second metal layer is etched according to a predefined or patterned photoresist pattern, thereby forming a desired electrode pattern or structure, wherein part of the metal evaporated on the first metal layer after etching and part of the metal evaporated in the electrode area in the SAO sacrificial layer are retained. After the etching process is completed, the first metal layer, the second metal layer and the second carrier layer located on the SAO sacrificial layer form an electrode; a flexible material is spin-coated on the surface of the first structure after etching to form a PMMA support layer on the first structure after etching, wherein the function of the PMMA support layer is to provide temporary support and protection. The structure formed in this step is the second structure.

[0090] It should be noted that the second structure comprises, from top to bottom, a PMMA support layer 600 , an electrode 500 , a SAO sacrificial layer 200 and a first STO bearing layer 100 .

[0091] Reference Figure 7 As shown, Figure 7 1 is a flow chart of a method for preparing a photoresist pattern provided in an embodiment of the present application, which method may include but is not limited to the following steps:

[0092] Step S710, evenly spin-coating photoresist on the first metal layer and curing it;

[0093] Step S720: Expose the photoresist to form a desired metal electrode pattern using a photolithography machine.

[0094] Reference Figure 8 As shown, Figure 8 : is a flow chart of another method for preparing a photoresist pattern provided in an embodiment of the present application, which method may include but is not limited to the following steps:

[0095] Step S810, evenly spin-coating photoresist on the second metal layer and curing it;

[0096] Step S820: Expose the photoresist to form a desired metal electrode pattern using a photolithography machine.

[0097] In some embodiments of the present application, photoresist is uniformly coated onto the first metal layer or the second metal layer. During the spin coating process, the spin coating speed and the concentration of the photoresist are controlled to ensure the uniformity and thickness of the photoresist. Through the curing process of the photoresist, it is stabilized and has sufficient adhesion to form a uniform and stable photoresist layer. The curing of the photoresist is usually achieved by light or other chemical treatments. After the spin coating and curing of the photoresist are completed, the photoresist on the first metal layer or the second metal layer is exposed to the required metal electrode pattern by using a specific light source and mask of the photolithography machine. During the exposure process, parameters such as the wavelength, energy and exposure time of the light source are controlled to obtain a clear and accurate required metal electrode pattern.

[0098] It should be noted that in some embodiments, AZ5214 is used as the photoresist (PR) for photolithography. AZ5214 is first spin-coated uniformly on the first metal layer or the second metal layer at 5000 rpm, and then baked at 100° C. for 60 seconds for fixation.

[0099] Reference Figure 9 and Figure 10 As shown, Figure 9 is a schematic flow chart of a preparation method of a third structure provided in an embodiment of the present application, Figure 10 A schematic diagram of a third structure provided in an embodiment of the present application, wherein the method may include but is not limited to the following steps:

[0100] Step S910, placing the second structure into the first dissolving solution to dissolve the sacrificial layer;

[0101] Step S920: Separate the electrode and the first carrier layer to obtain a third structure.

[0102] In some embodiments of the present application, the second structure is placed in a first dissolving liquid, which can be water, to dissolve the SAO sacrificial layer. During the dissolution process, the SAO sacrificial layer is gradually dissolved, while the electrode and the first STO carrier layer remain in place. As the SAO sacrificial layer dissolves, the electrode and the first STO carrier layer are gradually separated. The sacrificial layer serves as a temporary load material in the subsequent preparation process and can be removed in a controlled manner when needed. The surface of the SAO sacrificial layer film grown by PLD is an epitaxial film with atomic-level steps. Therefore, the metal electrode deposited on the SAO sacrificial layer film can still maintain the atomic-level metal electrode surface when transferred from the SAO sacrificial layer. After the dissolution of the SAO sacrificial layer is completed, the metal electrode is extracted. During this process, the PMMA support layer can serve as a protective layer to prevent the metal electrode from being damaged or deformed during the extraction process. After the extraction is completed, the third structure is obtained.

[0103] It should be noted that the third structure comprises a PMMA support layer 600 and an electrode 500 from top to bottom.

[0104] It can be understood that the solution of the present application adopts SAO as a sacrificial layer and uses water to dissolve the sacrificial layer, which has multiple advantages such as environmental protection, safety, cost-effectiveness and physical compatibility, and is conducive to the sustainable development of micro-nano processing technology and the optimization of the production and manufacturing process.

[0105] Reference Figure 11 As shown, Figure 11 : is a flow chart of a method for preparing a metal-semiconductor structure through a third structure provided in an embodiment of the present application. The method may include but is not limited to the following steps:

[0106] Step S1110, after obtaining the third structure from the first dissolving solution, transferring it to the substrate via a two-dimensional transfer platform;

[0107] Step S1120 , dissolving the support layer with a second dissolving solution to obtain a metal-semiconductor structure.

[0108] In some embodiments of the present application, after the third structure is prepared, it is removed from the water and then placed on a two-dimensional transfer table. The third structure is precisely transferred to the substrate under the control of a control console. During this process, the accuracy of the position and angle between the third structure and the substrate must be ensured to ensure the accuracy and quality of the subsequently prepared metal-semiconductor structure. The support layer is dissolved by a second dissolving solution and removed from the third structure to obtain a metal-semiconductor structure. The dissolution of the support layer generally requires the selection of a specific solvent or chemical solution to ensure that the physical properties of the semiconductor and metal materials are not affected.

[0109] refer to Figure 12 As shown, Figure 12 : is a flow chart of a method for transferring a metal electrode provided in an embodiment of the present application. The method may include but is not limited to the following steps:

[0110] Step S1210 , supporting the third structure by using an adhesive tape formed by a glass slide and a high molecular polymer;

[0111] Step S1220 , transferring the third structure onto a substrate via a two-dimensional transfer platform, fixing the electrodes on the substrate, and removing the glass slide and the high molecular polymer.

[0112] In some embodiments of the present application, the tertiary structure is placed on a tape formed from a glass slide and a polymer to facilitate transfer of the tertiary structure. The tape, from top to bottom, consists of PC, PDMS, and a glass slide. The PMMA support layer of the tertiary structure is affixed to the PC layer of the tape for transfer. A two-dimensional transfer table is used to precisely transfer the tape carrying the tertiary structure to the desired substrate. A series of operations are performed to secure the metal electrode to the substrate, and finally, the glass slide, PC, and PDMS polymers are removed, completing the transfer of the metal electrode.

[0113] It should be noted that polydimethylsiloxane (PDMS), as a high molecular polymer, plays the roles of adhesion, support, compatibility and degradation in the metal electrode transfer process, which helps to ensure the smooth progress of the transfer process and ensure the high-quality transfer and fixation of the metal electrode.

[0114] It should be noted that the surface of polycarbonate (PC) material is usually relatively flat, which can provide a relatively flat substrate for the transfer of metal electrodes, which is conducive to the fixation and stability of the metal electrodes. Moreover, as a strong and elastic material, polycarbonate can provide support when serving as a load-bearing structure during the transfer process to avoid deformation and damage of the structure.

[0115] Reference Figure 13 As shown, Figure 13 This is a schematic diagram of a metal-semiconductor structure provided in an embodiment of the present application.

[0116] The present invention provides a metal-semiconductor structure, which is prepared by the technical solution of the present invention and includes:

[0117] The electrode 500 includes a gate 501, a source 502, a drain 503 and a second carrier layer 300, wherein the gate 501 is evaporated on the second STO carrier layer 300;

[0118] The substrate 700 comprises a two-dimensional material 701 and a semiconductor material 702 from top to bottom. The second STO carrier layer is fixed on the two-dimensional material 701 , and the source and drain are fixed on the semiconductor material 702 .

[0119] It should be noted that the electrode 500 includes a gate 501, a source 502, a drain 503 and a second carrier layer 300, wherein the electrode metal evaporated on the second STO carrier layer 300 serves as the gate 501, the second STO carrier layer 300 serves as the dielectric layer, and the electrode metal evaporated on the SAO sacrificial layer 200 through the above technical solution serves as the source 502 and the drain 503. The substrate is a two-dimensional material 701 and a semiconductor material 702 from top to bottom. The two-dimensional material 701 can be molybdenum disulfide (MoS2), and the semiconductor material 702 can be silicon dioxide 7021 and silicon 7022.

[0120] In one embodiment, the metal-semiconductor structure comprises, from top to bottom, an electrode 500 , a two-dimensional material molybdenum disulfide 701 , a semiconductor material silicon dioxide 7021 , and a semiconductor material silicon 7022 .

[0121] An embodiment of the present application provides a top-gate field-effect transistor, comprising the metal-semiconductor structure as described above.

[0122] Reference Figure 14 、 Figure 15 and Figure 16 As shown, Figure 14 This is a schematic diagram of the overall process of a method for preparing a metal-semiconductor structure provided in an embodiment of the present application. Figure 15 This is a schematic diagram of the overall process of another method for preparing a metal-semiconductor structure provided in an embodiment of the present application. Figure 16 : is a flow chart of another method for transferring a metal electrode provided in an embodiment of the present application, which method may include but is not limited to the following steps:

[0123] Step S1401, depositing a sacrificial layer material onto the surface of the first carrier layer to form a sacrificial layer thin film structure;

[0124] Step S1402 , depositing a second carrier layer material onto the surface of the sacrificial layer to form a thin film structure of the second carrier layer;

[0125] Step S1403 , depositing a layer of electrode metal on the second carrier layer by electron beam evaporation to form a first metal layer;

[0126] Step S1404: evenly spin-coating photoresist on the first metal layer and curing it, and exposing the photoresist to a desired metal electrode pattern using a photolithography machine;

[0127] Step S1405, bombarding the first metal layer with an ion beam to etch the metal in the non-electrode area of ​​the first metal layer according to the pattern of the photoresist;

[0128] Step S1406, etching the exposed portion of the second carrier layer by ion beam to form a first structure;

[0129] Step S1407 , depositing a layer of electrode metal on the first structure by electron beam evaporation to form a second metal layer;

[0130] Step S1408, evenly spin-coating photoresist on the second metal layer and curing it, and exposing the photoresist to a desired metal electrode pattern using a photolithography machine;

[0131] Step S1409, bombarding the second metal layer with an ion beam to etch the metal in the non-electrode area of ​​the second metal layer according to the pattern of the photoresist, and forming an electrode on the sacrificial layer by the etched first metal layer, the second metal layer, and the second carrier layer;

[0132] Step S1410, spin-coating a flexible material on the etched first structure to form a support layer to obtain a second structure;

[0133] Step S1411 , placing the second structure into the first dissolving solution, dissolving the sacrificial layer, separating the electrode and the first carrier layer, and obtaining a third structure;

[0134] Step S1412: The third structure is carried on a tape formed by a glass slide and a polymer, and the third structure is transferred to a substrate via a two-dimensional transfer table. The electrodes are fixed to the substrate, and the glass slide and the polymer are removed.

[0135] Step S1413 , dissolving the support layer with a second dissolving solution to obtain a metal-semiconductor structure.

[0136] In a certain embodiment of the present application, first, an SAO sacrificial layer material is deposited on the surface of the first STO bearing layer to form a thin film structure of the SAO sacrificial layer, so that a specific structure can be formed during the preparation process. Then, a second STO bearing layer material is deposited on the surface of the SAO sacrificial layer to form a thin film structure of the second STO bearing layer as a dielectric layer. After the deposition of the second STO bearing layer is completed, the second STO bearing layer is subjected to electrode metal evaporation by electron beam evaporation technology. In this process, by controlling parameters such as the energy, current density and evaporation time of the electron beam, a layer of metal electrode is evaporated on the second STO bearing layer to form a first metal layer, and the photoresist is evenly coated on the second STO bearing layer. The photoresist is coated on the first metal layer. During the spin coating process, the spin coating speed and the concentration of the photoresist must be controlled to ensure the uniformity and thickness of the photoresist. Through the curing process of the photoresist, it is stabilized and has sufficient adhesion to form a uniform and stable photoresist layer. The curing of the photoresist is usually achieved by light or other chemical treatments. After the spin coating and curing of the photoresist are completed, the photoresist on the first metal layer is exposed to the required metal electrode pattern by using a specific light source of the photolithography machine. During the exposure process, the wavelength, energy and exposure time of the light source must be controlled to obtain a clear and accurate required metal electrode pattern. Using ion beam etching technology, it can be processed according to the predetermined The non-electrode area of ​​the first metal layer is etched by ion beam etching to form the desired electrode pattern or structure. After the non-electrode area of ​​the first metal layer is etched away by the ion beam, part of the STO bearing layer in the non-electrode area of ​​the second STO bearing layer that bears the first metal layer is exposed. At the same time, the exposed part is further etched by ion beam etching to form the first structure; the electrode metal is evaporated on the SAO sacrificial layer and the etched first metal layer by electron beam evaporation technology to form the second metal layer, the photoresist is evenly coated on the second metal layer, the photoresist on the second metal layer is exposed to the desired metal electrode pattern, and the ion beam etching technology is used to remove the non-electrode area of ​​the first metal layer. The second metal layer is overetched using a photoresist technique, and the non-electrode area of ​​the second metal layer is etched according to a predefined or patterned photoresist pattern to form a desired electrode pattern or structure, wherein a portion of the metal vapor-deposited on the etched first metal layer and a portion of the metal vapor-deposited in the electrode area of ​​the SAO sacrificial layer are retained. After the etching process is completed, the first metal layer, the second metal layer, and the second carrier layer located on the SAO sacrificial layer form an electrode; a flexible material is spin-coated on the surface of the etched first structure to form a PMMA support layer on the etched first structure, wherein the PMMA support layer serves to provide temporary support and protection. The structure formed in this step is the second structure;The second structure is placed in a first dissolving liquid, which can be water, and is used to dissolve the SAO sacrificial layer. During the dissolution process, the SAO sacrificial layer is gradually dissolved, while the electrode and the first STO carrier layer remain in place. As the SAO sacrificial layer dissolves, the electrode and the first STO carrier layer will gradually separate. The sacrificial layer serves as a temporary load material in the subsequent preparation process and can be removed in a controlled manner when needed. The surface of the SAO sacrificial layer film grown by PLD is an epitaxial film with atomic-level steps. Therefore, the metal electrode deposited on the SAO sacrificial layer film can still maintain the atomic-level metal electrode surface after being transferred from the SAO sacrificial layer. After the SAO sacrificial layer is dissolved, the metal electrode is extracted. During this process, the PMMA support layer can serve as a protective layer to prevent the metal electrode from being damaged or deformed during the extraction process. After the extraction is completed, the third structure is obtained; the third structure is placed on a tape formed by a glass slide and a polymer to facilitate the transfer of the third structure. The tape is composed of PC, PDMS, and a glass slide from top to bottom. The PMMA support layer in the third structure is fixed on the PC layer of the tape for transfer. The tape carrying the third structure is accurately transferred to the desired substrate using a two-dimensional transfer table. Through a series of operations, the metal electrode is fixed to the substrate, and finally the glass slide and the polymers PC and PDMS are removed to complete the transfer of the metal electrode. Finally, the support layer is dissolved by a second dissolving solution and removed from the third structure to obtain a metal-semiconductor structure.

[0137] The solution of the embodiment of the present application is to deposit a sacrificial layer and a second carrier layer on the first carrier layer in sequence, and use electron beam evaporation to form a layer of electrode metal on the second carrier layer to form a first metal layer. According to the required metal electrode pattern, the metal in the non-electrode area of ​​the first metal layer is ion-etched by ion beam, and after etching, a layer of electrode metal is evaporated again to form a second metal layer, and the second metal layer is overetched. After the overetching is completed, the first metal layer, the second carrier layer and the second metal layer form an electrode on the sacrificial layer, spin-coat a support layer on the electrode, place the electrode in a first dissolving solution, separate the electrode and the first carrier layer by dissolving the sacrificial layer, and finally The electrode is transferred to the substrate and the supporting layer is dissolved to obtain a metal-semiconductor structure. This solution prevents high-energy particles from directly contacting the semiconductor material by evaporating and overlaying the metal electrode on the sacrificial layer. The sacrificial layer is then dissolved by a first dissolving liquid to separate the metal electrode from the supporting layer, and the metal electrode is transferred to the substrate to achieve an atomically flat metal surface and an atomically flat contact interface, thereby obtaining better electrical properties of the metal-semiconductor interface and solving the technical problem of poor contact performance between the metal electrode and the semiconductor. Through this metal-semiconductor structure, a top-gate field-effect transistor with low contact resistance is formed.

[0138] It should be understood that in this application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0139] It should also be understood that the various implementation methods provided in the embodiments of the present application can be combined arbitrarily to achieve different technical effects.

[0140] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above implementation mode. Technical personnel familiar with the field can also make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A method for preparing a metal-semiconductor structure, characterized in that: include: Depositing a sacrificial layer and a second carrier layer in sequence on the first carrier layer, and forming a first metal layer by electron beam evaporation of an electrode metal on the second carrier layer, and etching the first metal layer and the second carrier layer by ion beam etching to obtain a first structure; On the first structure, an electrode metal is deposited by electron beam evaporation to form a second metal layer, the second metal layer is ion beam etched to form an electrode on the sacrificial layer, and a support layer is spin-coated on the etched first structure to obtain a second structure; placing the second structure into a first dissolving solution to dissolve the sacrificial layer to obtain a third structure; transferring the third structure to a substrate, dissolving the support layer, and obtaining the metal-semiconductor structure; Among them, the first structure includes the first metal layer, the second bearing layer, the sacrificial layer and the first bearing layer from top to bottom; the second structure includes the supporting layer, the electrode, the sacrificial layer and the first bearing layer from top to bottom; the third structure includes the supporting layer and the electrode from top to bottom, wherein the electrode includes a first metal electrode layer, a second bearing layer and a second metal electrode layer, and the first metal electrode layer is located above the second bearing layer.

2. The method for preparing a metal-semiconductor structure according to claim 1, wherein: The method of sequentially depositing a sacrificial layer and a second carrier layer on the first carrier layer, and forming a first metal layer by electron beam evaporation of an electrode metal on the second carrier layer comprises: Depositing the sacrificial layer material onto the surface of the first bearing layer to form a thin film structure of the sacrificial layer; Depositing the second bearing layer material onto the surface of the sacrificial layer to form a thin film structure of the second bearing layer; A layer of electrode metal is deposited on the second carrier layer by electron beam evaporation to form the first metal layer.

3. The method for preparing a metal-semiconductor structure according to claim 1, wherein: The first structure is obtained by etching the first metal layer and the second carrier layer by ion beam, comprising: The first metal layer and the second carrier layer are bombarded by ion beams, and the metal in the non-electrode area of ​​the first metal layer and the second carrier layer are etched according to the pattern of the photoresist to form the first structure.

4. The method for preparing a metal-semiconductor structure according to claim 3, wherein: Before etching the first metal layer and the second carrier layer by ion beam, the preparation method further includes: The photoresist is evenly spin-coated on the first metal layer and cured, and the photoresist is exposed to form a desired metal electrode pattern using a photolithography machine.

5. The method for preparing a metal-semiconductor structure according to claim 1, wherein: The second structure is obtained by electron beam evaporating an electrode metal on the first structure to form a second metal layer, etching the second metal layer by ion beam to form an electrode on the sacrificial layer, and spin coating a support layer on the etched first structure to obtain the second structure, including: Depositing a layer of electrode metal on the first structure by electron beam evaporation to form the second metal layer; Bombarding the second metal layer with an ion beam, etching the metal in the non-electrode area of ​​the second metal layer according to the pattern of the photoresist, and forming the electrode on the sacrificial layer by the etched first metal layer, the second metal layer, and the second carrier layer; A flexible material is spin-coated on the etched first structure to form the support layer, thereby obtaining the second structure.

6. The method for preparing a metal-semiconductor structure according to claim 5, wherein: Before etching the second metal layer by ion beam, the preparation method further includes: The photoresist is evenly spin-coated on the second metal layer and cured, and the photoresist is exposed to form a desired metal electrode pattern using a photolithography machine.

7. The method for preparing a metal-semiconductor structure according to claim 1, wherein: Placing the second structure into the first dissolving solution and dissolving the sacrificial layer to obtain the third structure comprises: placing the second structure into the first dissolving solution to dissolve the sacrificial layer; The electrode and the first supporting layer are separated to obtain the third structure.

8. The method for preparing a metal-semiconductor structure according to claim 1, wherein: The step of transferring the third structure to a substrate and dissolving the supporting layer to obtain the metal-semiconductor structure comprises: After obtaining the third structure from the first dissolving solution, the third structure is supported by a glass slide and a tape formed by a high molecular polymer; Transferring the third structure to the substrate via a two-dimensional transfer platform, fixing the electrode on the substrate, and removing the glass slide and the high molecular polymer; The support layer is dissolved by a second dissolving solution to obtain the metal-semiconductor structure.

9. A metal-semiconductor structure, characterized in that: The metal-semiconductor structure is obtained by the preparation method of any one of claims 1 to 8, wherein the metal-semiconductor structure comprises: The electrode comprises a gate electrode, a source electrode, a drain electrode and a second carrier layer, wherein the gate electrode is evaporated on the second carrier layer; A substrate, wherein the substrate is a two-dimensional material and a semiconductor material from top to bottom, the second supporting layer is fixed on the two-dimensional material, and the source and the drain are fixed on the semiconductor material.

10. A metal-semiconductor structure, characterized in that: The metal-semiconductor structure is obtained by the preparation method of any one of claims 1 to 8, wherein the metal-semiconductor structure comprises: substrate; An electrode is located on the substrate.

11. A top-gate field-effect transistor, characterized in that: Comprising the metal-semiconductor structure according to claim 9 or 10.

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