Negative current signal detection circuit and detection system

Abstract

The present application relates to a negative current signal detection circuit, including a current receiving circuit, a reference current logarithmic amplifier circuit and a differential amplifier voltage compensation circuit, wherein the differential amplifier voltage compensation circuit includes a first input terminal and a second input terminal, the current receiving circuit is connected to the first input terminal, and the reference current logarithmic amplifier circuit is connected to the second input terminal, wherein the current receiving circuit is used to receive a negative current, and commutate and logarithmically compress the negative current; the reference current logarithmic amplifier circuit is used to provide a reference current, and logarithmically amplify the reference current; the differential amplifier voltage compensation circuit is used to output a differential amplifier voltage, and temperature compensate the differential amplifier voltage, and the differential amplifier voltage is used to calculate the current value of the negative current. The negative current signal detection circuit of the present application can complete the detection of negative current, and can also detect current signals of nanoampere level and large dynamic range. The negative current signal detection circuit is comprehensive in function and has high detection accuracy.

Description

Technical Field

[0001] The present application relates to the field of photoelectric detector detection technology, and in particular to a negative current signal detection circuit and detection system. Background Art

[0002] Photomultiplier tubes are used to receive extremely weak optical signals emitted by the detection target, convert the optical signals into space electron beam signals, and amplify the electron beam signals. Photomultiplier tubes are suitable for low noise, wide dynamic range and detection of light intensity due to their advantages of wide detection spectrum range, large dynamic range, high electronic gain, low dark noise and fast response speed. They are widely used in various fields including life sciences, nuclear physics technology, nuclear medicine, biochemistry, precision analysis, information science, environmental monitoring, industrial automatic control, optomechanical integration, etc.

[0003] Photomultiplier tubes can be divided into two categories according to the output type, namely voltage type and current type. Among them, the current type photomultiplier tube can directly output the original current signal, with a larger dynamic range. The connection method of the current type photomultiplier tube is to ground the anode and add negative high voltage to the cathode, which can output negative current.

[0004] In traditional technology, the signal detection methods for current-type photomultiplier tubes include: detection using a transimpedance amplifier; detection using segmented amplification; detection using a switch switching range amplification and detection using an integrated logarithmic amplifier. Among them, the detection using a transimpedance amplifier has the problem of being unable to detect current signals with a large dynamic range. There is noise in both segmented amplification and detection using a switch switching range amplification, and the detection errors of the two are large and the stability is poor. The integrated logarithmic amplifier has the problem of being unable to detect negative current signals.

[0005] Therefore, providing a negative current signal detection circuit with comprehensive functions, high detection accuracy and good stability has become an urgent problem to be solved. Summary of the invention

[0006] Based on this, it is necessary to provide a negative current signal detection circuit and detection system to solve the problems of single signal detection function, low detection accuracy and poor stability in traditional technology.

[0007] In order to achieve the above-mentioned purpose, the present application provides a negative current signal detection circuit, including a current receiving circuit, a reference current logarithmic amplifier circuit and a differential amplifier voltage compensation circuit, wherein the differential amplifier voltage compensation circuit includes a first input terminal and a second input terminal, the current receiving circuit is connected to the first input terminal, and the reference current logarithmic amplifier circuit is connected to the second input terminal, wherein:

[0008] The current receiving circuit is used for receiving a negative current, and commutating and logarithmically compressing the negative current;

[0009] The reference current logarithmic amplifier circuit is used to provide a reference current and perform logarithmic amplification on the reference current;

[0010] The differential amplification voltage compensation circuit is used to output a differential amplification voltage and perform temperature compensation on the differential amplification voltage, and the differential amplification voltage is used to calculate the current value of the negative current.

[0011] In one embodiment, the current receiving circuit includes:

[0012] A first operational amplifier, comprising a first non-inverting input terminal, wherein the first non-inverting input terminal is used to receive a negative current;

[0013] A second operational amplifier including a second inverting input terminal;

[0014] A first channel transistor, comprising a first emitter, a first collector and a first base, wherein the first emitter is connected to the first in-phase input terminal, and the first base is connected to the first collector;

[0015] A second channel transistor, comprising a second emitter, a second collector and a second base, wherein the second emitter is connected to the second inverting input terminal, the second collector is connected to the first collector, and the second base is connected to the second collector;

[0016] The third channel transistor comprises a third emitter, a third collector and a third base, wherein the third emitter is connected to the first input terminal, the third collector is connected to the second inverting input terminal, and the third base is connected to the ground terminal.

[0017] In one embodiment, the reference current logarithmic amplifier circuit includes:

[0018] A reference current unit, used for providing a reference current;

[0019] A third operational amplifier, comprising a third inverting input terminal, wherein the third inverting input terminal is connected to the reference current unit;

[0020] The fourth channel transistor comprises a fourth emitter, a fourth collector and a fourth base, wherein the fourth emitter is connected to the second input terminal, the fourth collector is connected to the third inverting input terminal, and the fourth base is connected to the ground terminal.

[0021] In one embodiment, the reference current unit includes:

[0022] Reference voltage source;

[0023] A potentiometer, comprising a first end, a second end and a third end, wherein the first end is connected to a reference voltage source, and the second end is connected to the third end;

[0024] A first resistor connected between the third terminal and the ground terminal;

[0025] The second resistor is connected between the second end and the third operational amplifier.

[0026] In one embodiment, the differential amplifier voltage compensation circuit includes:

[0027] The fourth operational amplifier comprises a fourth non-inverting input terminal and a fourth inverting input terminal, wherein the fourth inverting input terminal is connected to the current receiving circuit, and the fourth non-inverting input terminal is connected to the reference current logarithmic amplifier circuit.

[0028] In one embodiment, the fourth operational amplifier further includes a fourth output terminal, and the differential amplifier voltage compensation circuit further includes:

[0029] A first resistance branch, connected between the current receiving circuit and the fourth inverting input terminal;

[0030] A second resistance branch, connected between the reference current logarithmic amplifier circuit and the fourth in-phase input terminal;

[0031] A third resistance branch, connected between the fourth inverting input terminal and the fourth output terminal;

[0032] The fourth resistance branch is connected between the fourth in-phase input terminal and the ground terminal.

[0033] In one embodiment, the negative current signal detection circuit further includes:

[0034] The analog-to-digital conversion circuit is connected to the differential amplifier voltage compensation circuit and is used to convert the differential amplifier voltage output by the differential amplifier voltage compensation circuit from an analog value to a digital value.

[0035] In one embodiment, the negative current signal detection circuit further includes:

[0036] The filter circuit is connected between the differential amplifier voltage compensation circuit and the analog-to-digital conversion circuit.

[0037] In one embodiment, the negative current signal detection circuit further includes:

[0038] A microcontroller circuit is connected to the analog-to-digital conversion circuit.

[0039] The present application also provides a negative current signal detection system, comprising:

[0040] A device under test, wherein the device under test comprises a current-type photomultiplier tube;

[0041] The negative current signal detection circuit in any of the above embodiments is connected to the device under test.

[0042] In the above-mentioned negative current signal detection circuit, the negative current is commutated and logarithmically compressed in the current receiving circuit, and is converted into a voltage signal and then input into the differential amplifier voltage compensation circuit. The reference current is converted into a voltage signal in the reference current logarithmic amplifier circuit and input into the differential amplifier voltage compensation circuit. The differential amplifier voltage compensation circuit outputs a differential amplifier voltage according to the above-mentioned two voltage signals. There is a preset relationship between the differential amplifier voltage and the negative current, and the current value of the negative current can be accurately calculated by the differential amplifier voltage. The negative current signal detection circuit of this embodiment can complete the detection of negative current, and at the same time, it can also detect current signals of nanoampere level and large dynamic range. The above-mentioned negative current signal detection circuit is comprehensive in function, high in detection accuracy and good in stability.

[0043] In addition, the negative current signal detection circuit in the present application is implemented using discrete devices, and the correlation between the various circuits is relatively small, making the cost controllable and having application promotion value. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0045] FIG1 is a schematic diagram of a module of a negative current signal detection circuit provided in an embodiment;

[0046] FIG2 is a schematic diagram of the structure of a current receiving circuit provided in an embodiment;

[0047] FIG3 is a schematic diagram of the structure of a reference current logarithmic amplifier circuit provided in an embodiment;

[0048] FIG4 is a schematic diagram of the structure of a differential amplifier voltage compensation circuit provided in an embodiment;

[0049] FIG. 5 is a module diagram of a negative current signal detection circuit provided in yet another embodiment.

[0050] Explanation of the accompanying drawings: 100-current receiving circuit, 200-reference current logarithmic amplifier circuit, 210-reference current unit, 300-differential amplifier voltage compensation circuit, 310-first resistance branch, 320-second resistance branch, 330-third resistance branch, 340-fourth resistance branch, 400-filtering circuit, 500-analog-to-digital conversion circuit, 600-microcontroller circuit. DETAILED DESCRIPTION

[0051] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0053] It is understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0054] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0055] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" etc. specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof.

[0056] In one embodiment, referring to FIG. 1 , a negative current signal detection circuit is provided, including a current receiving circuit 100 , a reference current logarithmic amplifier circuit 200 , and a differential amplifier voltage compensation circuit 300 .

[0057] The current receiving circuit 100 is used to receive a negative current, and to commutate and logarithmically compress the negative current. The negative current corresponds to the positive current, the positive current is an inflow current, and the negative current is an outflow current. As an example, the magnitude of the negative current can reach the nanoampere to milliampere level. In the current receiving circuit 100, the negative current is converted into a positive current, and the positive current is logarithmically compressed and converted into a voltage signal.

[0058] The reference current logarithmic amplifier circuit 200 is used to provide a reference current and perform logarithmic amplification on the reference current. In the reference current logarithmic amplifier circuit 200, the reference current can be converted from a current signal into a voltage signal.

[0059] The differential amplifier voltage compensation circuit 300 includes a first input terminal and a second input terminal, the current receiving circuit 100 is connected to the first input terminal, and the reference current logarithmic amplifier circuit 200 is connected to the second input terminal. As an example, the differential amplifier voltage compensation circuit 300 can be a compensation type differential amplifier circuit.

[0060] The differential amplifier voltage compensation circuit 300 can be used to perform temperature compensation on the differential amplifier voltage, and can also be used for differential amplifier output. The differential amplifier voltage can be used to calculate the current value of the negative current. The first input terminal of the differential amplifier voltage compensation circuit 300 receives a voltage signal from the current receiving circuit 100, and the second input terminal receives a voltage signal from the reference current logarithmic amplifier circuit 200. According to the above two voltage signals, the differential amplifier voltage compensation circuit 300 performs temperature compensation on the differential amplifier voltage and outputs it.

[0061] In this embodiment, the negative current is commutated and logarithmically compressed in the current receiving circuit 100, and is converted into a voltage signal and then input into the differential amplifier voltage compensation circuit 300. The reference current is converted into a voltage signal in the reference current logarithmic amplifier circuit 200 and input into the differential amplifier voltage compensation circuit 300. The differential amplifier voltage compensation circuit 300 outputs a differential amplifier voltage according to the above two voltage signals. There is a preset relationship between the differential amplifier voltage and the negative current, and the current value of the negative current can be accurately calculated through the differential amplifier voltage. The negative current signal detection circuit of this embodiment can complete the detection of negative current, and at the same time, it can also detect current signals of nanoampere level and large dynamic range. The negative current signal detection circuit of this embodiment is comprehensive in function, high in detection accuracy and good in stability.

[0062] In addition, the negative current signal detection circuit in this embodiment is implemented using discrete devices, and the correlation between various circuits is relatively small, so that the cost is controllable and has application and promotion value.

[0063] In one embodiment, referring to FIG. 2 , the current receiving circuit 100 includes a first operational amplifier U1 , a second operational amplifier U2 , a first channel transistor Q1 , a second channel transistor Q2 , and a third channel transistor Q3 .

[0064] The first operational amplifier U1 includes a first non-inverting input terminal, and the first non-inverting input terminal is used to receive a negative current. For example, the first operational amplifier U1 may also include a first inverting input terminal and a first output terminal. The first inverting input terminal may be connected to a third resistor R3, and then to a ground terminal. In addition, a first capacitor C1 may be connected between the first inverting input terminal and the first output terminal. The negative current may first flow through the fourth resistor R4, and then flow to the first non-inverting input terminal. By selecting the third resistor R3 with different resistance values ​​and the first capacitor C1 with different capacitance values, the dynamic response speed of the negative current collection may be met.

[0065] The second operational amplifier U2 includes a second inverting input terminal. For example, the second operational amplifier U2 also includes a second non-inverting input terminal and a second output terminal. The second non-inverting input terminal can be connected to the ground terminal.

[0066] The first operational amplifier U1 and the second operational amplifier U2 can be dual low-voltage, low-noise rail-to-rail operational amplifiers.

[0067] The first channel transistor Q1 includes a first emitter, a first collector and a first base. The first emitter can be connected to the first in-phase input terminal, and the first base is connected to the first collector. It can be understood that the first emitter can also receive negative current. In addition, a second capacitor C2 can be connected between the first emitter and the first collector.

[0068] The second channel transistor Q2 includes a second emitter, a second collector and a second base. The second emitter is connected to the second inverting input terminal, the second collector is connected to the first collector, and the second base is connected to the second collector. In addition, for example, the second collector can also be connected to the second output terminal of the second operational amplifier U2.

[0069] The third channel transistor Q3 includes a third emitter, a third collector and a third base. The third emitter is connected to the first input terminal. The third collector is connected to the second inverting input terminal, and the third base is connected to the base terminal. In addition, for example, the third emitter can be connected to the first output terminal of the first operational amplifier U1. At the same time, a third capacitor C3 can also be connected between the third emitter and the third collector.

[0070] When the first operational amplifier U1 is in an ideal working state, according to its virtual short characteristic, a negative current can be obtained. The collector voltage U of the first channel transistor A The relationship between them is as follows:

[0071]

[0072] Among them, U T represents the temperature voltage equivalent, represents the reverse saturation current of the first pass transistor Q1.

[0073] When the second operational amplifier U2 is in an ideal working state, according to its virtual short characteristic, the voltage at the second output terminal of the second operational amplifier U2 can be obtained as:

[0074]

[0075] in, represents the current flowing into the second channel transistor, Represents the reverse saturation current of the second channel transistor.

[0076] At the same time, the emitter voltage of the third channel transistor Q3 can also be obtained. for:

[0077]

[0078] in, represents the reverse saturation current of the third channel transistor Q3.

[0079] According to the voltage node method: ,therefore , thus we can deduce:

[0080]

[0081] According to the consistency of the first channel transistor Q1, the second channel transistor Q2 and the third channel transistor Q3, it can be known that: ,therefore .

[0082] The output voltage of the current receiving circuit 100 is:

[0083]

[0084] From formula (5), we can see that the negative current It is logarithmically compressed and converted into a voltage signal.

[0085] In this embodiment, through the configuration of each operational amplifier and the channel transistor, the negative current is commutated and logarithmically compressed in the current receiving circuit 100 .

[0086] In one embodiment, referring to FIG. 3 , the reference current logarithmic amplifier circuit 200 includes a reference current unit 210 , a third operational amplifier U3 , and a fourth channel transistor Q4 .

[0087] The reference current unit 210 is used to provide a reference current I ref As an example, the reference current unit 210 may include a reference voltage source, a potentiometer VR1, a first resistor R1, and a second resistor R2. The potentiometer VR1 includes a first end, a second end, and a third end. The first end of the potentiometer VR1 is connected to the reference voltage source, and the second end is connected in parallel with the third end. The first resistor R1 is connected between the third end and the ground end. The second resistor R2 is connected between the second end and the third operational amplifier.

[0088] From the above connection relationship, the reference current can be obtained The expression is as follows:

[0089]

[0090] in, Represents the voltage value provided by the reference voltage source, Represents the resistance value provided by the potentiometer, represents the resistance value of the first resistor, represents the resistance value of the second resistor.

[0091] The third operational amplifier U3 includes a third inverting input terminal, which is connected to the reference current unit 210 to receive the reference current I ref For example, the third operational amplifier U3 further includes a third in-phase input terminal and a third output terminal, and the third in-phase input terminal can be connected to the ground terminal.

[0092] The fourth channel transistor Q4 includes a fourth emitter, a fourth collector and a fourth base. The fourth emitter is connected to the second input terminal of the differential amplifier voltage compensation circuit 300. The fourth collector is connected to the third inverting input terminal and receives the reference current Iref. The fourth base is connected to the ground terminal. For example, the fourth emitter can also be connected to the third output terminal of the third operational amplifier U3.

[0093] The first channel transistor Q1, the second channel transistor Q2, the third channel transistor Q3 and the fourth channel transistor Q4 can form a matching single-chip four-channel transistor. The first channel transistor Q1, the second channel transistor Q2, the third channel transistor Q3 and the fourth channel transistor Q4 can all adopt NPN-type transistors, and the above four can also include four diodes, the positive electrode of the diode is connected to the emitter of the transistor, and the negative electrode of the diode is connected to the base of the transistor. The diode has a clamping effect to prevent the misconduction of the transistor. The four-channel transistor has the characteristics of high gain and logarithmic consistency.

[0094] When the third operational amplifier U3 is in an ideal working state, according to its virtual ground characteristic and the logarithmic amplification characteristic of the fourth channel transistor Q4, the output voltage of the reference current logarithmic amplifier circuit 200 can be obtained as:

[0095]

[0096] in, Represents the reverse saturation current of the fourth channel transistor.

[0097] In one embodiment, referring to FIG. 4 , the differential amplifier voltage compensation circuit 300 includes a fourth operational amplifier U4 .

[0098] The fourth operational amplifier U4 includes a fourth non-inverting input terminal and a fourth inverting input terminal. The fourth inverting input terminal is connected to the current receiving circuit 100, and the fourth non-inverting input terminal is connected to the reference current logarithmic amplifier circuit 200.

[0099] As an example, the fourth operational amplifier U4 further includes a fourth output terminal, and the differential amplifier voltage compensation circuit 300 further includes a first resistor branch 310 , a second resistor branch 320 , a third resistor branch 330 and a fourth resistor branch 340 .

[0100] The first resistor branch 310 is connected between the current receiving circuit 100 and the fourth inverting input terminal. For example, the first resistor branch 310 may include a fifth resistor R5 and a first thermistor R5 connected in series. T1 .

[0101] The second resistor branch 320 is connected between the reference current logarithmic amplifier circuit 200 and the fourth in-phase input terminal. For example, the second resistor branch 320 may include a seventh resistor R7 and a second thermistor R T2 .

[0102] The third resistance branch 330 is connected between the fourth inverting input terminal and the fourth output terminal. For example, the third resistance branch 330 may include an eighth resistor R8.

[0103] The fourth resistance branch 340 is connected between the fourth in-phase input terminal and the ground terminal. For example, the fourth resistance branch 340 may include a sixth resistor R6.

[0104] When the resistance values ​​of the fifth resistor R5 and the seventh resistor R7 are equal, the first thermistor R T1 With the second thermistor R T2 When the resistance values ​​of the sixth resistor R6 and the eighth resistor R8 are equal, the differential amplified voltage output by the differential amplified voltage compensation circuit 300 can be obtained as follows:

[0105]

[0106] From formula (8), we can see that in the differential amplifier voltage When the negative current is constant With reference current Therefore, by adjusting the reference current Adjustment can make the negative current With reference current The difference between them will not be too large, and the differential amplifier voltage Negative current can be calculated more accurately The current value can meet the detection of nanoampere-level weak current signals.

[0107] In this example, the first thermistor R T1 With the second thermistor R T2 Can offset the temperature voltage equivalent , thereby achieving temperature compensation and further improving the accuracy and stability of logarithmic compression.

[0108] In one embodiment, referring to FIG. 5 , the negative current signal detection circuit further includes an analog-to-digital conversion circuit 500 .

[0109] The analog-to-digital conversion circuit 500 is connected to the differential amplifier voltage compensation circuit 300 , and is used to convert the differential amplifier voltage output by the differential amplifier voltage compensation circuit 300 from an analog value to a digital value.

[0110] As an example, the negative current signal detection circuit further includes a filter circuit 400. The filter circuit 400 is connected between the differential amplification voltage compensation circuit 300 and the analog-to-digital conversion circuit 500. The filter circuit 400 can perform low-pass filtering on the differential amplification voltage.

[0111] In this embodiment, the differential amplified voltage is converted from an analog value to a digital value, which can be observed and obtained more conveniently, thereby facilitating subsequent related operations.

[0112] In one embodiment, referring to FIG. 5 , the negative current signal detection circuit further includes a micro-control circuit 600 .

[0113] The microcontroller circuit 600 is connected to the analog-to-digital conversion circuit 500. For example, the microcontroller circuit 600 includes a microcontroller unit (MCU). The microcontroller circuit 600 performs a conversion operation on the digital voltage signal converted by the analog-to-digital conversion circuit 500.

[0114] In one embodiment, a negative current signal detection system is provided. The negative current signal detection system includes a device under test and a negative current signal detection circuit provided in any one or more embodiments and combinations thereof of the present disclosure.

[0115] The device under test includes a current-type photomultiplier tube.

[0116] The negative current signal detection circuit is connected to the device under test and is used to receive the signal of the device under test. For example, when the device under test is a current-type photomultiplier tube, the negative current signal detection circuit receives the current signal output by the photomultiplier tube. Specifically, the current receiving circuit 100 of the negative current signal detection circuit receives the negative current.

[0117] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

[0118] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0119] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A negative current signal detection circuit, characterized in that: The invention comprises a current receiving circuit, a reference current logarithmic amplifier circuit and a differential amplifier voltage compensation circuit, wherein the differential amplifier voltage compensation circuit comprises a first input terminal and a second input terminal, the current receiving circuit is connected to the first input terminal, and the reference current logarithmic amplifier circuit is connected to the second input terminal, wherein: The current receiving circuit is used for receiving a negative current, and commutating and logarithmically compressing the negative current; The reference current logarithmic amplifier circuit is used to provide a reference current and perform logarithmic amplification on the reference current; The differential amplifier voltage compensation circuit is used to perform differential amplification on the electrical signals at the two input ends after temperature compensation to obtain a differential amplified voltage, and the differential amplified voltage is used to calculate the current value of the negative current.

2. The negative current signal detection circuit according to claim 1, characterized in that: The current receiving circuit comprises: A first operational amplifier comprises a first non-inverting input terminal, the first non-inverting input terminal is used to receive a negative current, a first inverting input terminal of the first operational amplifier is connected to a ground terminal, and an output terminal of the first operational amplifier is connected to the first inverting input terminal; A second operational amplifier comprises a second inverting input terminal, wherein a non-inverting input terminal of the second operational amplifier is connected to a ground terminal; A first channel transistor, comprising a first emitter, a first collector and a first base, wherein the first emitter is connected to the first in-phase input terminal, and the first base is connected to the first collector; a second channel transistor, comprising a second emitter, a second collector and a second base, wherein the second emitter is connected to the second inverting input terminal, the second collector is connected to the first collector, the second base is connected to the second collector, and the second collector is connected to the output terminal of the second operational amplifier; The third channel transistor comprises a third emitter, a third collector and a third base, wherein the third emitter is connected to the first input terminal, the third collector is connected to the second inverting input terminal, and the third base is connected to the ground terminal.

3. The negative current signal detection circuit according to claim 1, characterized in that: The reference current logarithmic amplifier circuit comprises: A reference current unit, used for providing a reference current; A third operational amplifier, comprising a third inverting input terminal, the third inverting input terminal is connected to the reference current unit, and a third non-inverting input terminal of the third operational amplifier is connected to the ground terminal; The fourth channel transistor includes a fourth emitter, a fourth collector and a fourth base, wherein the fourth emitter is connected to the second input terminal, the fourth collector is connected to the third inverting input terminal, the fourth base is connected to the ground terminal, and the fourth emitter is connected to the output terminal of the third operational amplifier.

4. The negative current signal detection circuit according to claim 3, characterized in that: The reference current unit comprises: Reference voltage source; A potentiometer, comprising a first end, a second end and a third end, wherein the first end is connected to a reference voltage source, and the second end is connected to the third end; A first resistor connected between the third terminal and the ground terminal; The second resistor is connected between the second end and the third operational amplifier.

5. The negative current signal detection circuit according to claim 1, characterized in that: The differential amplifier voltage compensation circuit comprises: The fourth operational amplifier comprises a fourth non-inverting input terminal and a fourth inverting input terminal, wherein the fourth inverting input terminal is connected to the current receiving circuit, and the fourth non-inverting input terminal is connected to the reference current logarithmic amplifier circuit.

6. The negative current signal detection circuit according to claim 5, characterized in that: The fourth operational amplifier further includes a fourth output terminal, and the differential amplifier voltage compensation circuit further includes: A first resistance branch, connected between the current receiving circuit and the fourth inverting input terminal, the first resistance branch comprising a fifth resistor and a first thermistor connected in series; A second resistance branch, connected between the reference current logarithmic amplifier circuit and the fourth in-phase input terminal, the second resistance branch comprising a seventh resistor and a second thermistor connected in series; A third resistance branch, connected between the fourth inverting input terminal and the fourth output terminal; The fourth resistance branch is connected between the fourth in-phase input terminal and the ground terminal.

7. The negative current signal detection circuit according to claim 1, characterized in that: The negative current signal detection circuit also includes: The analog-to-digital conversion circuit is connected to the differential amplifier voltage compensation circuit and is used to convert the differential amplifier voltage output by the differential amplifier voltage compensation circuit from an analog value to a digital value.

8. The negative current signal detection circuit according to claim 7, characterized in that: The negative current signal detection circuit also includes: The filter circuit is connected between the differential amplifier voltage compensation circuit and the analog-to-digital conversion circuit.

9. The negative current signal detection circuit according to claim 7, characterized in that: The negative current signal detection circuit also includes: A microcontroller circuit is connected to the analog-to-digital conversion circuit.

10. A negative current signal detection system, characterized in that: include: A device under test, wherein the device under test comprises a current-type photomultiplier tube; The negative current signal detection circuit according to any one of claims 1 to 9, wherein the negative current signal detection circuit is connected to the device under test.

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