A multi-channel measurement system using a feed-forward gain control circuit and a method thereof
The multi-channel measurement system with feedforward gain control circuit can quickly detect the signal range and automatically configure the gain, solving the problem of inflexible gain configuration in the existing technology. It achieves high-precision and high-speed measurement results and is adaptable to multi-channel expansion and wide signal swing.
Patent Information
- Application Number
- CN202410483264.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-22
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2044-04-22
AI Technical Summary
In the existing technology, the gain configuration of multi-channel measurement systems is inflexible, resulting in limited signal input range, low measurement accuracy and speed, and high consumption of register and code resources.
By employing a feedforward gain control circuit, and combining a multiplexer module, a PGA module, a SAR ADC module, a digital module, and a timing control module, the signal range can be quickly detected and the amplifier gain can be automatically configured. This eliminates the need for registers and code resources, thereby improving measurement accuracy and sampling rate.
It achieves flexible gain control, improves the compatibility and measurement rate of the measurement system, reduces resource consumption, adapts to multiple channel expansion, has a wider range of applications, and has a simple and easy-to-implement structure.
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Figure CN118337210B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of integrated circuit technology, in particular to a multi-channel measurement system using a feed-forward gain control circuit and a method using the same. BACKGROUND
[0002] Currently, in the field of measurement, the gain configuration of different channels is directly set by software writing into the register to set the amplification multiple of each channel or the measurement system performs digital post-processing on the input signal, and then controls the gain of the front-stage analog amplification circuit after the processing. The existing technology has the following disadvantages:
[0003] 1. The main disadvantage of setting the amplification multiple of each channel by software writing into the register is that the amplification multiple of the channel is fixed during the measurement process, thereby limiting the input range and measurement accuracy of the channel signal and limiting the application scenarios. Especially for scenarios where the signal input range and amplitude are uncertain, the software is difficult to determine the appropriate gain position, and setting the gain too large will have the risk of output overflow, and setting the gain too small will result in insufficient measurement accuracy and inflexible control; for a multi-channel measurement system, each channel needs to be configured with a gain position, which consumes a large number of register and code resources;
[0004] 2. The main disadvantage of the method of analyzing the first few measurement data by digital circuit post-processing and then controlling the gain of the front-stage analog amplifier is that at least two sampling conversions are required to obtain accurate data, which reduces the sampling rate; at the same time, for signals exceeding the threshold, multiple feedback adjustments are required to obtain the appropriate gain, which greatly reduces the measurement rate.
[0005] In the field of general MCU (Micro Controller Unit) measurement, due to complex application environments and rich measurement requirements, higher requirements are put forward for the compatibility and robustness of the measurement system. In a general measurement system, in order to adapt to rich measurement requirements, there are as many as ten or dozens of signal channels sharing an ADC (Analog Digital Converter). In order to meet the compatibility and versatility requirements, each channel needs to have the ability to collect signals of different amplitudes, different driving capabilities, and different speeds. In order to adapt to the measurement of signals of different amplitudes, different channels will configure different amplification multiples through operational amplifiers to achieve high measurement accuracy and adapt to a larger measurement range. For weak signals, a larger amplification multiple is often configured to achieve accurate measurement, and large signals are often configured to attenuate to ensure the normal operation of the operational amplifier and the subsequent ADC. The configuration of amplification or attenuation and the selection of the position require a good strategy to ensure that a wide range of applications can obtain accurate results.
[0006] The existing technical solutions have two: one is to save the gain level of different channels in the register module, and directly configure the amplification multiple of each channel through software. The control of this scheme is not flexible, and the appropriate gain level can be set only after the signal category and size of each channel are understood, otherwise the signal may not be collected or overflow may occur. In addition, the fixed amplification multiple limits the range of input signals, thereby limiting the application scenarios.
[0007] Another scheme is to use digital post-processing AGC (Auto Gain Control) technology. As shown in Figure 1 , this scheme first presets the gain level of PGA (Programmable Gain Amplifier), then collects signals, and obtains the output code value through SAR (Successive Approximation Register) ADC conversion. By comparing the size relationship between the output code value and the preset threshold value, the gain is adjusted according to the feedback result of the PGA, and then measurement or further judgment is performed. Therefore, each time the signal exceeding the threshold value is collected, it needs to be sampled and judged once, and the data sampled for the second time after adjusting the gain is the effective data. This scheme reduces the sampling rate by half, affecting the measurement efficiency and reducing the performance index. In addition, for very small signals, the digital post-processing method also needs to judge whether the amplification multiple is overflowed after being increased, and if overflowed, it needs to be adjusted again, thereby resulting in a lower sampling rate. The flow chart of the traditional scheme is shown in Figure 2 . SUMMARY
[0008] To solve the above problems in the prior art, the purpose of the present application is to provide a multi-channel measurement system using a feedforward gain control circuit and a method thereof, which has the advantages of low cost, flexible application, faster detection and adjustment speed, and higher sampling rate.
[0009] The present application achieves the above-mentioned purpose through the following technical solutions:
[0010] A multi-channel measurement system using a feedforward gain control circuit, comprising:
[0011] The output end of the multiplexing module is connected with the PGA module and the feedforward gain control module, and is used for selecting a signal of one channel in a plurality of signal channels to output; the output end of the PGA module is connected with the SAR ADC module, and is used for scaling the output signal of the multiplexing module and outputting an analog signal to the SAR ADC module; the SAR ADC module is used for sampling and holding the input analog signal, then comparing the signal with each weight value of the reference voltage from high bit to low bit in sequence, and outputting a converted digital signal to the digital module; and the digital module is used for performing digital post-processing on the digital signal output by the SAR ADC module.
[0012] The output end of the feedforward gain control module is connected with the PGA module and the digital module, and is used for detecting the range of the channel input signal of the multiplexing module, encoding the detection result to obtain a corresponding gain gear, and controlling the amplification multiple of the PGA module, and transmitting the gain gear information to the digital module for calculation.
[0013] The timing control module is connected with the SAR ADC module, the digital module and the feedforward gain control module, and is used for adjusting the timing of the feedforward gain control module and the sampling and conversion phase of the SAR ADC module, and providing a conversion end pulse signal to the digital module.
[0014] The multi-channel measurement system adopting the feedforward gain control circuit comprises an input signal detection module and an encoding module.
[0015] The input signal detection module comprises a resistor string voltage division module, a comparator module and a flip-flop array. The resistor string voltage division module is used for providing reference voltages of different intervals to divide the amplitude of the input signal. The output end of the resistor string voltage division module is connected with the positive input end of the comparator module. The negative input end of the comparator module is the input signal vin of the multi-channel measurement system. The comparator module compares the input signal with the binary weight reference voltage to detect the input signal amplitude range, so as to output a reasonable amplification multiple. The output end of the comparator module is connected with the flip-flop array, and is used for storing the comparison result.
[0016] The application provides a multi-channel measurement system adopting a feedforward gain control circuit.
[0017] The application provides a multi-channel measurement system adopting a feedforward gain control circuit.
[0018] The application provides an application method of a multi-channel measurement system adopting a feedforward gain control circuit.
[0019] The application provides an application method of a multi-channel measurement system adopting a feedforward gain control circuit.
[0020] After the conversion is completed, the code value saved in the SAR ADC module register is received by the digital module, the gain gear information of the feedforward gain control module and the flag bit signal of the end of the ADC conversion in the timing control module are received, digital post-processing is performed, and finally the accurate output is obtained.
[0021] According to the application method of the multi-channel measurement system using the feedforward gain control circuit, when the feedforward gain control is performed, the switch s3 is closed, the switches s0-s2 are disconnected, the size of the input signal vin and 1 / 2*VREF is compared, if the input signal vin is greater than 1 / 2*VREF, the final amplification multiple is configured as 1 times.
[0022] If the input signal vin is less than 1 / 2*VREF, the judgment is continued, the switches s3, s1 and s0 are disconnected, the switch s2 is closed, the size of the input signal vin and 1 / 4*VREF is compared, if the input signal vin is greater than 1 / 4*VREF, the final amplification multiple is configured as 2 times.
[0023] According to the application method of the multi-channel measurement system using the feedforward gain control circuit, if the input signal vin is less than 1 / 4*VREF, the judgment is continued, the switches s3, s2 and s0 are disconnected, the switch s1 is closed, the size of the input signal vin and 1 / 8*VREF is compared, if the input signal vin is greater than 1 / 8*VREF, the final amplification multiple is configured as 4 times.
[0024] If the input signal vin is less than 1 / 8*VREF, the judgment is continued, the switches s3, s2 and s1 are disconnected, the switch s0 is closed, the size of the input signal vin and 1 / 16*VREF is compared, if the input signal vin is greater than 1 / 16*VREF, the final amplification multiple is configured as 8 times.
[0025] If the input signal vin is less than 1 / 16*VREF, the final amplification multiple is configured as 16 times.
[0026] According to the application method of the multi-channel measurement system using the feedforward gain control circuit, the following is also performed:
[0027] The clk_adc is set as the working clock of the adc, used for synchronizing the signals; the start_adc is set as the enable signal of starting the conversion, and is high when the conversion starts; the switches s0-s3 are the control timing of the switches of the feedforward gain control module, used for controlling the order of opening the switches, and are high when the switches are closed; the feedforward gain control module starts detecting when the start_adc is high; the clk_gain is set as the storage clock of the comparison result of the feedforward gain control module, and is triggered at the falling edge; and the gain[k:0] is set as the gain gear output by the encoding module of the feedforward gain control module.
[0028] According to the application method of the multi-channel measurement system with the feedforward gain control circuit, the clk_samp is set as the sampling phase of the SAR ADC module, is high when the sampling starts, and is low when the sampling ends; the sampling starts after the feedforward gain control module outputs the gain gear; the clk_conv is set as the comparison conversion phase of the SAR ADC module, and is compared after the sampling ends; the eoc_adc is set as the conversion end flag signal of the SAR ADC module to the digital module, is high when the conversion is completed, and can extract the data; and the data_out is set as the final output data of the SAR ADC module.
[0029] Therefore, compared with the prior art, the pre-gain control technology is adopted, the range of the signal can be quickly detected, the gain of the amplifier is automatically configured, the measurement precision and the acquisition speed are ensured, the wide signal swing can be adapted, the characteristics of not increasing the register consumption for expanding multiple channels are possessed, the application is more flexible. Compared with the software configuration mode, the register and code resources are omitted, the application range is wider, and the compatibility is stronger. Compared with the automatic gain control technology of the digital post-processing, the detection and adjustment speed is faster, the structure is simpler, and the sampling rate is higher. Compared with the traditional architecture, the feedforward gain control module architecture is simple, the control is simple, and the implementation is easy.
[0030] The application will be further described in detail below with reference to the drawings and specific embodiments. BRIEF DESCRIPTION OF DRAWINGS
[0031] Figure 1 It is a schematic diagram of the multi-channel measurement system of the prior art.
[0032] Figure 2 It is a control flow chart of the multi-channel measurement system of the prior art.
[0033] Figure 3 It is a circuit principle diagram of the multi-channel measurement system with the feedforward gain control circuit according to the embodiment of the application.
[0034] Figure 4 is a circuit schematic of a feedforward gain control module in an embodiment of a multi-channel measurement system using a feedforward gain control circuit.
[0035] Figure 5 is a flow chart of an embodiment of an application method of a multi-channel measurement system using a feedforward gain control circuit.
[0036] Figure 6 is a timing schematic of a timing control module in an embodiment of an application method of a multi-channel measurement system using a feedforward gain control circuit. DETAILED DESCRIPTION
[0037] So that the objectives, technical solutions and superiorities of the embodiments of the present application are more apparent, the technical solutions of the embodiments of the present application will be described clearly and completely below with reference to the drawings of the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, but not all the embodiments of the present application. Based on the described embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort belong to the scope of protection of the present application.
[0038] An embodiment of a multi-channel measurement system using a feedforward gain control circuit
[0039] Referring to Figures 3 to 6 , the embodiment provides a multi-channel measurement system using a feedforward gain control circuit, which comprises a multiplexing module 10, a PGA module 20, a SAR ADC module 30, a digital module 40, a feedforward gain control module 50, and a timing control module 60. The output ends of the multiplexing module 10 are connected with the PGA module 20 and the feedforward gain control module 50, respectively, for selecting a signal in one channel from multiple signal channels and outputting the signal. The output end of the PGA module 20 is connected with the SAR ADC module 30, for scaling the output signal of the multiplexing module 10 and outputting an analog signal to the SAR ADC module 30. The SAR ADC module 30 is used for sampling and holding the input analog signal, then comparing the signal with each weight value of a reference voltage from high bit to low bit in sequence, and outputting a converted digital signal to the digital module 40. The digital module 40 is used for performing digital post-processing on the digital signal output by the SAR ADC module 30.
[0040] The output end of the feedforward gain control module 50 is connected with the multi-path selection module 10, the PGA module 20 and the digital module 40 respectively, for detecting the range of the channel input signal of the multi-path selection module 10, and encoding the detection result to obtain the corresponding gain gear, for controlling the amplification multiple of the PGA module 20, and transmitting the corresponding gain gear information to the digital module 40 for calculation.
[0041] The timing control module 60 is connected with the SAR ADC module 30, the digital module 40 and the feedforward gain control module 50 respectively, for adjusting the timing of the feedforward gain control module 50 and the sampling and conversion phase of the SAR ADC module 30, and providing a conversion end pulse signal to the digital module 40. It can be seen that the timing control module 60 sets and synchronizes the time interval and timing relationship of different signals, ensures that each circuit module works in the correct time sequence, and realizes the required function. The timing control module 60 of the embodiment can be a hardware device such as a clock generator, a counter, a flip-flop, etc., or a software program such as a firmware in a timing controller chip. It generates, distributes and synchronizes clock signals, controls the input and output of data, the transmission and reception of signals and the execution of other operations, so as to ensure the stability and normal operation of the whole system.
[0042] Specifically, the multi-channel measurement system provided by the embodiment comprises:
[0043] The multi-path selection module 10 is used for selecting the signal of a channel for analog-to-digital conversion in a multi-channel application.
[0044] The PGA module 20 is used for accurately amplifying and reducing the signal, and providing strong driving capability for the subsequent ADC. The PGA is an important module for adapting to different signal amplitudes. The small signal is amplified to improve the measurement accuracy of the small signal, and the large signal is reduced to avoid output overflow, so as to obtain an accurate measurement result. The PGA module 20 of the embodiment mainly comprises an operational amplifier module, a decoder module and a resistance switch array module. The operational amplifier module provides high gain and low input offset voltage, the decoder module controls the voltage division ratio of the resistance in the resistance switch array module according to the gain gear, and finally realizes the programmable gain of the amplifier.
[0045] SAR ADC module 30, for converting analog signals into digital signals, S AR type ADC is a commonly used analog-to-digital converter type in measurement applications, with the advantages of simple structure, low power consumption, etc. The SAR ADC first samples and holds the input signal, then compares each weight value of the reference voltage from high to low, and stores the result of each comparison in the register, while adjusting the weight size of the next bit. The whole SAR ADC process consists of signal acquisition process and conversion process, and the conversion period of the whole measurement system is the time spent from channel switching to the final output of the accurate code value. Shortening the whole process can improve the measurement speed of the system. For example, the SAR ADC module 30 of the embodiment includes input sampling: the analog signal first passes through the input sampling circuit, which acquires and holds the voltage value of the input signal; comparator: SAR ADC usually contains one or more comparators, which are used to compare the input signal with the reference voltage generated by the DAC. The comparator will output the comparison result, indicating whether the input signal is higher or lower than the reference voltage; DAC adjustment: SAR ADC adjusts the value of the reference voltage through DAC. It adjusts the voltage output by the DAC to the voltage value closest to the input signal through the process of successive approximation according to the comparison result; SAR approximation: in each approximation, SAR ADC compares the voltage output by the DAC with the input signal. According to the comparison result, the SAR approximation logic circuit will decide whether the current bit is 1 or 0. After each approximation is completed, the comparison result of the bit will be saved; approximation end: when all bits have completed the approximation, the SAR ADC will output the approximation result as a digital signal.
[0046] Digital module 40, for digital post-processing of the code value converted by the SAR ADC. Among them, the digital post-processing of the embodiment includes signal synchronization, error correction, data storage and data calculation, etc., in order to improve the quality of the digital signal or meet the specific application requirements. The calculation results can also be further optimized, such as data compression, encryption, etc., to meet the specific application requirements.
[0047] Feedforward gain control module 50, for quickly detecting the range of the channel input signal, encoding the detection result to get the corresponding gain gear, and using it to control the amplification multiple of the PGA, while transmitting the corresponding gain information to the digital module 40 for calculation. As can be seen, the embodiment can predict and adjust the signal gain in advance, thereby avoiding the delay and oscillation problems that may be caused by feedback control. This makes it have a significant advantage in processing rapidly changing signals or situations that require high precision control. In addition, the feedforward gain control module 50 can also reduce steady-state error, improve the stability and anti-interference performance of the system.
[0048] The timing control module 60 is configured to adjust the timing of the feedforward gain control module 50 and the phase of the sampling and conversion of the SAR ADC, and provide a conversion end pulse signal to the digital module 40.
[0049] As shown in Figure 4 The feedforward gain control module 50 includes an input signal detection module 501 and an encoding module 502, the input signal detection module 501 is configured to output a detection result of the detected multi-channel input signal to the encoding module 502, and the encoding module 502 is configured to encode and convert the gain level of the PGA module 20.
[0050] In the embodiment, the input signal detection module 501 includes a resistor string voltage division module, a comparator module and a flip-flop array, the resistor string voltage division module is configured to provide reference voltages of different intervals to divide the amplitude of the input signal, the output end of the resistor string voltage division module is connected to the positive input end of the comparator module, the negative input end of the comparator module is the input signal vin of the multi-channel measurement system, the input signal and the binary weight reference voltage are compared by the comparator module to detect the input signal amplitude range, so as to output a reasonable amplification multiple, the output end of the comparator module is connected to the flip-flop array, and the flip-flop array is configured to store the comparison result.
[0051] In the embodiment, the resistor string voltage division module includes a resistor string array and a switch array, the resistor string array is arranged according to binary weights, the resistor string array includes a plurality of resistors connected in series, and the switch array includes a plurality of switches, which are respectively switches s0-s3, the first end of each switch is connected between two series resistors, and the second end of each switch is connected to the positive input end of the comparator module in sequence, that is, the reference voltage is connected to the positive input end of the comparator module through the switch.
[0052] In the embodiment, the flip-flop array includes a four-stage flip-flop array, which is respectively a first flip-flop, a second flip-flop, a third flip-flop and a fourth flip-flop, the D end of the first flip-flop is connected to the output end of the comparator module, the Clk end of the first flip-flop, the second flip-flop, the third flip-flop and the fourth flip-flop is connected to the output end of the NOT gate, the input end of the NOT gate is connected to the clk_gain signal, the Q end of the first flip-flop is connected to the D end of the second flip-flop and then connected to the encoding module 502, the Q end of the second flip-flop is connected to the D end of the third flip-flop and then connected to the encoding module 502, the Q end of the third flip-flop is connected to the D end of the fourth flip-flop and then connected to the encoding module 502, the Q end of the fourth flip-flop is connected to the encoding module 502, and the encoding module 502 outputs the corresponding gain level gain[k:0].
[0053] An application method embodiment of a multi-channel measurement system using a feedforward gain control circuit
[0054] As Figure 5 shown in the figure, the application method of the multi-channel measurement system using the feedforward gain control circuit provided by the embodiment, applied to the multi-channel measurement system using the feedforward gain control circuit, comprises the following steps:
[0055] The input signal of a certain channel is selected by the multiplexing module 10, and the input signal is detected and encoded by the feedforward gain control module 50 to obtain a suitable gain position, the PGA module 20 is configured to the obtained gain position, the analog-to-digital conversion process is performed by the PGA module 20, and then the sampling process of the SAR ADC module 30 is performed, wherein the input signal is amplified or reduced by the PGA module 20, the amplified or reduced signal is sampled by the SAR ADC module 30, then the sampled signal is compared with each weight value of the reference voltage from high to low in turn, and the comparison result of each time is stored in the register, and the weight size of the next bit is adjusted at the same time; wherein the whole detection, sampling and conversion process is controlled by the timing control module 60.
[0056] After the conversion is completed, the code value saved in the register of the SAR ADC module 30 is received by the digital module 40, the gain position information of the feedforward gain control module 50 and the flag bit signal of the ADC conversion end in the timing control module 60 are received at the same time, digital post-processing is performed, and finally accurate output is obtained. As Figure 5 shown in the figure, Figure 5 the flow chart of the measurement system using the feedforward gain control circuit provided by the embodiment, after the signal input, the detection and encoding of the feedforward gain control circuit are performed to obtain a suitable gain position, the PGA is configured to the obtained gain position, then the analog-to-digital conversion process is performed, and finally accurate output is obtained. Compared with the traditional process, the whole process does not have the feedback mechanism from the digital module 40 to the analog PGA, is faster, and has a simpler architecture.
[0057] As Figure 4 shown in the figure, Figure 4 an embodiment of the feedforward gain control module 50 provided by the embodiment, the input signal detection module 501 is composed of a resistor string voltage division module, a comparator module and a flip-flop array, the resistor string voltage division module is used to provide different interval references for dividing the amplitude of the input signal, the resistor string array is arranged according to binary weight, the reference voltage is connected to the positive input end of the comparator module through four switches s0-s3, the negative input end of the comparator is the input signal vin of the measurement system, the input signal and the binary weight reference voltage are compared to detect the amplitude range of the input signal, so as to give a reasonable amplification multiple. The output of the comparator is connected to a four-stage flip-flop array to store the comparison result, the result is encoded by the encoding module 502 to convert into the gain position of the PGA.
[0058] In this embodiment, when performing feedforward gain control, switch s3 is closed first, and switches s0 to s2 are opened. The magnitudes of the input signal vin and 1 / 2*VREF are compared. If the input signal vin is greater than 1 / 2*VREF, the final amplification factor is configured to be 1.
[0059] If the input signal vin is less than 1 / 2*VREF, continue the judgment; disconnect switches s3, s1, and s0, close switch s2, compare the input signal vin with the magnitude of 1 / 4*VREF, if the input signal vin is greater than 1 / 4*VREF, then configure the final amplification factor to be 2 times.
[0060] If the input signal vin is less than 1 / 4*VREF, continue the judgment; disconnect switches s3, s2, and s0, close switch s1, compare the input signal vin with the magnitude of 1 / 8*VREF, if the input signal vin is greater than 1 / 8*VREF, then configure the final amplification factor to 4 times.
[0061] If the input signal vin is less than 1 / 8*VREF, continue the judgment; disconnect switches s3, s2, and s1, close switch s0, compare the input signal vin with the magnitude of 1 / 16*VREF, if the input signal vin is greater than 1 / 16*VREF, then configure the final amplification factor to 8 times.
[0062] If the input signal vin is less than 1 / 16*VREF, then the final amplification factor is configured to be 16 times. Of course, the VREF voltage value, the storage method of the comparison result, and the final encoding method can all be adjusted according to the actual application, and are not limited here. Any changes or modifications made by those skilled in the art based on the above content shall fall within the scope of protection claimed by this invention.
[0063] In this embodiment, as Figure 6 As shown, Figure 6 A timing diagram for one embodiment of the timing control module 60 proposed in this invention includes:
[0064] clk_adc is set as the working clock of the ADC to synchronize various signals; start_adc is set as the enable signal to start the conversion, and a high value indicates the start of the conversion; switches s0 to s3 are the control timing sequence of the feedforward gain control module 50, used to control the order in which the switches are turned on, and a high level indicates that the switch is closed. The feedforward gain control module 50 starts detection when start_adc is high. clk_gain is set as the clock for storing the comparison result of the feedforward gain control module 50, and storage is triggered by the falling edge; gain[k:0] is set as the gain level output by the encoding module 502 of the feedforward gain control module 50.
[0065] clk_samp is set as the sampling phase of the SAR ADC module 30, which is high when the sampling starts and low when the sampling ends, and the sampling starts after the gain stage is output by the feedforward gain control module 50; clk_conv is set as the comparison conversion phase of the SAR ADC module 30, which is performed after the sampling ends; eoc_adc is set as the conversion end flag signal sent by the SAR ADC module 30 to the digital module 40, which is high when the conversion is completed and the data can be extracted; data_out is set as the final output data of the SAR ADC module 30. From Figure 6 It can be seen that the total time spent from the start of analog-digital conversion when start_adc is high to the output of valid data is t DETECT +t SAMPLE +t CONVETER which is shorter than the 2*(t SAMPLE +t CONVETER ) time of the traditional architecture, and is faster.
[0066] In summary, the pre-gain control technology adopted in the embodiment can quickly detect the range of the signal, automatically configure the gain of the amplifier, ensure the measurement accuracy and acquisition speed, and adapt to a wide signal swing, has the characteristics of adapting to multiple channel expansion without increasing the consumption of registers, and is more flexible in application. Compared with the software configuration method, the embodiment omits the register and code resources, has a wider application range, and has stronger compatibility. Compared with the automatic gain control technology of digital post-processing, the embodiment has faster detection and adjustment speed, simpler structure, and higher sampling rate. Compared with the traditional architecture, the feedforward gain control module 50 proposed in the embodiment has a simple structure, simple control, and is easy to implement. The multi-channel measurement system and circuit provided in the embodiment are easy to implement in hardware, can be used in all fields of integrated circuits, such as ASIC (Application Specific Integrated Circuit) and FPGA (Field Programmable Gate Array) implementation, has small area occupation, and has strong portability and other advantages, can be widely applied to various hardware platforms and system architectures, and improves the practicality and adaptability.
[0067] It should be understood that the foregoing description is only illustrative of the embodiments. Embodiments described herein can be realized in hardware, software, firmware, middleware, microcode or any combination thereof. For a hardware implementation, the processing units can be implemented within one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, micro-controllers, microprocessors and / or other electronic units designed to perform the functions described herein and / or combinations thereof.
[0068] The above embodiments are only the preferred embodiments of the present application, and cannot be used to limit the scope of protection of the present application. Any non-essential changes and replacements made by those skilled in the art based on the present application shall fall within the scope of protection of the present application.
Claims
1. A multi-channel measurement system employing a feedforward gain control circuit, characterized in that, include: The system includes a multiplexer module, a PGA module, a SAR ADC module, a digital module, a feedforward gain control module, and a timing control module. The output of the multiplexer module is connected to the PGA module and the feedforward gain control module, respectively, to select one signal from multiple signal channels for output. The output of the PGA module is connected to the SAR ADC module to scale the output signal of the multiplexer module and output an analog signal to the SAR ADC module. The SAR ADC module samples and holds the input analog signal, then compares the signal with the weight values of the reference voltage from the most significant bit to the least significant bit, and outputs a converted digital signal to the digital module. The digital module performs digital post-processing on the digital signal output by the SAR ADC module. The output of the feedforward gain control module is connected to the multiplexer module, the PGA module, and the digital module, respectively. It is used to detect the range of the channel input signal of the multiplexer module and encode the detection result to obtain the corresponding gain level, which is used to control the amplification factor of the PGA module. At the same time, the corresponding gain level information is transmitted to the digital module for calculation. The timing control module is connected to the SAR ADC module, the digital module, and the feedforward gain control module, respectively. It is used to adjust the timing of the feedforward gain control module and the phase of sampling and conversion of the SAR ADC module, and to provide a pulse signal indicating the end of conversion to the digital module.
2. The multi-channel measurement system according to claim 1, characterized in that: The feedforward gain control module includes an input signal detection module and an encoding module. The input signal detection module is used to generate detection results from the detected multi-channel input signals and output them to the encoding module, which then encodes and converts them into the gain level of the PGA module.
3. The multi-channel measurement system according to claim 2, characterized in that: The input signal detection module includes a resistor series voltage divider module, a comparator module, and a flip-flop array. The resistor series voltage divider module provides reference voltages in different ranges to divide the amplitude of the input signal. The output of the resistor series voltage divider module is connected to the positive input of the comparator module, and the negative input of the comparator module is the input signal vin of the multi-channel measurement system. The comparator module compares the input signal with the binary weighted reference voltage to detect the amplitude range of the input signal, thereby outputting a reasonable amplification factor. The output of the comparator module is connected to the flip-flop array to store the comparison result.
4. The multi-channel measurement system according to claim 3, characterized in that: The resistor string voltage divider module includes a resistor string array and a switch array. The resistor string array is arranged according to binary weights. The resistor string array includes multiple resistors connected in series. The switch array includes multiple switches, namely switches s0 to s3. The first end of each switch is connected between two series resistors. The second end of each switch is connected in series to the positive input terminal of the comparator module. That is, the reference voltage is connected to the positive input terminal of the comparator module through the switches.
5. The multi-channel measurement system according to claim 3, characterized in that: The trigger array includes a four-stage trigger array, namely a first trigger, a second trigger, a third trigger, and a fourth trigger. The D terminal of the first trigger is connected to the output terminal of the comparator module. The Clk terminals of the first, second, third, and fourth triggers are connected to the output terminal of the NOT gate. The input terminal of the NOT gate is connected to the clk_gain signal. The Q terminal of the first trigger is connected to the D terminal of the second trigger and then to the encoding module. The Q terminal of the second trigger is connected to the D terminal of the third trigger and then to the encoding module. The Q terminal of the third trigger is connected to the D terminal of the fourth trigger and then to the encoding module. The Q terminal of the fourth trigger is connected to the encoding module. The encoding module outputs the corresponding gain level gain[k:0].
6. An application method for a multi-channel measurement system employing a feedforward gain control circuit, characterized in that, This method is applied to a multi-channel measurement system employing a feedforward gain control circuit as described in any one of claims 1 to 5, and includes the following steps: The input signal of a certain path is selected by the multiplexing module. The input signal is then detected and encoded by the feedforward gain control module to obtain a suitable gain level. The PGA module is configured with the obtained gain level, and the analog-to-digital conversion process is performed by the PGA module. Then, the SAR ADC module performs the sampling process. The PGA module amplifies or reduces the input signal, and the SAR ADC module samples the amplified or reduced signal. The sampled signal is then compared with the weight values of the reference voltage from the high bit to the low bit, and the comparison result is stored in the register. At the same time, the weight value of the next bit is adjusted. The entire detection, sampling, and conversion process is controlled by the timing control module. After the conversion is completed, the digital module receives the code value stored in the SAR ADC module register, and at the same time receives the gain level information from the feedforward gain control module and the ADC conversion completion flag signal from the timing control module. Digital post-processing is then performed to obtain an accurate output.
7. The method according to claim 6, characterized in that: When performing feedforward gain control, first close switch s3 and open switches s0~s2. Compare the input signal vin with the magnitude of 1 / 2*VREF. If the input signal vin is greater than 1 / 2*VREF, then configure the final amplification factor to be 1. If the input signal vin is less than 1 / 2*VREF, continue the judgment; disconnect switches s3, s1, and s0, close switch s2, compare the input signal vin with the magnitude of 1 / 4*VREF, if the input signal vin is greater than 1 / 4*VREF, then configure the final amplification factor to be 2 times.
8. The method according to claim 7, characterized in that: If the input signal vin is less than 1 / 4*VREF, continue the judgment; disconnect switches s3, s2, and s0, close switch s1, compare the input signal vin with the magnitude of 1 / 8*VREF, if the input signal vin is greater than 1 / 8*VREF, then configure the final amplification factor to 4 times; If the input signal vin is less than 1 / 8*VREF, continue the judgment; disconnect switches s3, s2, and s1, close switch s0, compare the input signal vin with the magnitude of 1 / 16*VREF, if the input signal vin is greater than 1 / 16*VREF, then configure the final amplification factor to 8 times; If the input signal vin is less than 1 / 16*VREF, then the final amplification factor is configured to be 16 times.
9. The method according to claim 6, characterized in that, Also execute: clk_adc is set as the working clock of the ADC to synchronize various signals; start_adc is set as the enable signal to start the conversion, and a high level indicates the start of the conversion; switches s0~s3 are the control timing sequence of the feedforward gain control module, used to control the order in which the switches are turned on, and a high level indicates that the switches are closed. The feedforward gain control module starts detection when start_adc is high. clk_gain is set as the clock for storing the comparison result of the feedforward gain control module, and storage is triggered by the falling edge; gain[k:0] is set as the gain level output by the encoding module of the feedforward gain control module.
10. The method according to claim 9, characterized in that: The clk_samp is set as the sampling phase of the SAR ADC module. A high level indicates the start of sampling, and a low level indicates the end of sampling. Sampling begins after the feedforward gain control module outputs the gain level. The clk_conv is set as the comparison conversion phase of the SAR ADC module. Comparison is performed after sampling ends. The eoc_adc is set as the conversion end flag signal sent by the SAR ADC module to the digital module. A high level indicates that the conversion is complete and data can be extracted. The data_out is set as the final output data of the SAR ADC module.
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