Semiconductor device and method for manufacturing the same, and electronic device

Abstract

The present invention provides a semiconductor device and a manufacturing method thereof and an electronic device, the manufacturing method comprising: providing a device substrate and a cap substrate; forming a protrusion with an alignment mark on the first surface of the device substrate; forming a groove corresponding to the protrusion on the first surface of the cap substrate; bonding the first surface of the device substrate with the first surface of the cap substrate, the protrusion being located in the groove after bonding; thinning the second surface of the cap substrate to expose the alignment mark. The present application can solve the problems of alignment, measurement and sword shadow caused by the alignment mark being formed at the bottom of a deep cavity by transferring the alignment mark to the top of the semiconductor device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor device and a manufacturing method thereof and an electronic device. Background Art

[0002] After thinning, the inertial sensor made by surface micromachining process opens the upper layer by clearing the window to expose the alignment mark. Since the alignment mark is formed at the bottom of the deep cavity, there will be alignment problems in the subsequent process.

[0003] In view of the above technical problems, the present invention provides a new semiconductor device and a manufacturing method thereof and an electronic device. Summary of the invention

[0004] A series of simplified concepts are introduced in the Summary of the Invention, which will be further described in detail in the Detailed Description of the Invention. The Summary of the Invention does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0005] In view of the existing problems, the present invention provides a method for manufacturing a semiconductor device, comprising:

[0006] Providing a device substrate and a cap substrate;

[0007] forming a protrusion having an alignment mark on the first surface of the device substrate;

[0008] forming a groove corresponding to the protrusion on the first surface of the cap base;

[0009] Joining the first surface of the device substrate with the first surface of the cap substrate, wherein the protrusion is located in the groove after joining;

[0010] The second surface of the cap substrate is thinned to expose the alignment mark.

[0011] Exemplarily, forming a protrusion having an alignment mark on the first surface of the device substrate includes:

[0012] forming an alignment mark on a first surface of the device substrate;

[0013] Conformally forming a first mask layer covering the alignment mark, wherein the first mask layer defines a pattern of the protrusion to be formed;

[0014] The device substrate is etched based on the first mask layer to form a protrusion with an alignment mark on the first surface of the device substrate.

[0015] Exemplarily, forming a groove corresponding to the protrusion on the first surface of the cap base includes:

[0016] forming a second mask layer on the first surface of the cap substrate, wherein the second mask layer defines a pattern of the groove to be formed;

[0017] The first surface of the capping substrate is etched based on the second mask layer to form the groove on the first surface of the capping substrate.

[0018] Exemplarily, bonding the first surface of the device substrate to the first surface of the cap substrate includes:

[0019] forming a first bonding layer on the first surface of the device substrate outside the protrusion;

[0020] forming a second bonding layer on the first surface of the cap substrate outside the groove;

[0021] The first bonding layer is bonded to the second bonding layer to join the device substrate to the cap substrate.

[0022] Exemplarily, a first bonding mark is formed on the first surface of the device substrate outside the protrusion, and a second bonding mark is formed on the first surface of the cap substrate outside the groove. When the device substrate and the cap substrate are joined, the device substrate and the cap substrate are aligned based on the first bonding mark and the second bonding mark.

[0023] Exemplarily, an oxide layer is formed in the cap substrate, the oxide layer has a first surface and a second surface opposite to each other, the groove is formed in the cap substrate on one side of the first surface of the oxide layer, and the bottom of the groove is flush with the first surface of the oxide layer.

[0024] Exemplarily, the thinning the second surface of the cap substrate to expose the alignment mark includes:

[0025] The cap substrate and the oxide layer on one side of the second surface of the oxide layer are removed in sequence to expose the alignment mark.

[0026] Exemplarily, a micro-electromechanical system is formed on the device substrate.

[0027] Another aspect of the present invention provides a semiconductor device manufactured by any one of the aforementioned methods for manufacturing a semiconductor device.

[0028] Another aspect of the present invention provides an electronic device, comprising the aforementioned semiconductor device.

[0029] The manufacturing method of the semiconductor device of the present invention forms a protrusion with an alignment mark on the device substrate. After the cap substrate is thinned, the alignment mark is transferred to the top of the semiconductor device, thereby solving the alignment, measurement and sword shadow problems caused by the alignment mark being formed at the bottom of a deep cavity, so that there is no problem of difficulty in focusing in the subsequent alignment process, thereby achieving high-precision alignment; and OVL measurement can be achieved to monitor the alignment status; and since there is no deep cavity, the formation of sword shadows in the subsequent process to cause defects in the semiconductor device can be avoided, thereby improving the yield of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The following drawings of the present invention are used as part of the present invention for understanding the present invention. The drawings show embodiments of the present invention and their descriptions to explain the principles of the present invention. In the drawings:

[0031] Figure 1 A schematic diagram showing a related art in which an upper layer of an inertial sensor is opened by a clear window after thinning to expose an alignment mark;

[0032] Figure 2 A flowchart showing a method for manufacturing a semiconductor device according to a specific embodiment of the present invention is shown;

[0033] FIG. 3A to FIG. 3F A schematic cross-sectional view of a device substrate obtained by sequentially implementing a method for manufacturing a semiconductor device according to a specific embodiment of the present invention is shown;

[0034] FIG. 4A to FIG. 4E A cross-sectional schematic diagram showing a cap substrate obtained by sequentially implementing a method for manufacturing a semiconductor device according to a specific embodiment of the present invention;

[0035] FIG. 5A to FIG. 5C A schematic cross-sectional view of a structure obtained by sequentially implementing a method for manufacturing a semiconductor device according to a specific embodiment of the present invention is shown;

[0036] Figure 6 A schematic diagram of an electronic device according to a specific embodiment of the present invention is shown. DETAILED DESCRIPTION

[0037] In the following description, a large number of specific details are provided to provide a more thorough understanding of the present invention. However, it is apparent to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features well known in the art are not described.

[0038] It should be understood that the present invention can be implemented in different forms and should not be construed as being limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0039] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there may be no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as a second element, component, region, layer or part.

[0040] Spatial relationship terms such as "under", "below", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0041] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0042] In order to fully understand the present invention, detailed steps and structures will be presented in the following description to illustrate the technical solution proposed by the present invention. The preferred embodiments of the present invention are described in detail below, but in addition to these detailed descriptions, the present invention may also have other implementations.

[0043] In related technologies, such as Figure 1 As shown in FIG. 1 , after thinning, the inertial sensor made by the surface micromachining process opens the upper layer by clearing the window to expose the alignment mark. Since the alignment mark is formed at the bottom of the deep cavity, the subsequent process has at least the following problems:

[0044] 1. Alignment problem: since the alignment mark is formed at the bottom of the deep cavity, it is difficult to focus during the subsequent alignment process, resulting in alignment abnormality;

[0045] 2. Measurement problem: since the alignment mark is formed at the bottom of the deep cavity, OVL (overlay, which refers to the alignment of each layer of graphics during chip manufacturing) measurement cannot be achieved, which makes it impossible to monitor the alignment;

[0046] 3. Sword shadow problem: Sword shadows are easily generated around the deep cavity during the subsequent process, causing defects in semiconductor devices and resulting in a decrease in yield.

[0047] Therefore, in view of the existence of the above-mentioned technical problems, the present invention proposes a method for manufacturing a semiconductor device, such as Figure 2 As shown, including:

[0048] Step S1, providing a device substrate and a cap substrate;

[0049] Step S2, forming a protrusion with an alignment mark on the first surface of the device substrate;

[0050] Step S3, forming a groove corresponding to the protrusion on the first surface of the cap base;

[0051] Step S4, bonding the first surface of the device substrate with the first surface of the cap substrate, wherein the protrusion is located in the groove after bonding;

[0052] Step S5, thinning the second surface of the cap substrate to expose the alignment mark.

[0053] The manufacturing method of the semiconductor device of the present invention forms a protrusion with an alignment mark on the device substrate. After the cap substrate is thinned, the alignment mark is transferred to the top of the semiconductor device, thereby solving the alignment, measurement and sword shadow problems caused by the alignment mark being formed at the bottom of a deep cavity, so that there is no problem of difficulty in focusing in the subsequent alignment process, thereby achieving high-precision alignment; and OVL measurement can be achieved to monitor the alignment status; and since there is no deep cavity, the formation of sword shadows in the subsequent process to cause defects in the semiconductor device can be avoided, thereby improving the yield of the semiconductor device.

[0054] Example 1

[0055] Below, reference FIG. 3A to FIG. 3F The method for manufacturing a semiconductor device of the present invention is described in detail, wherein: FIG. 3A to FIG. 3F A cross-sectional schematic diagram of a semiconductor device obtained by sequentially implementing a manufacturing method according to a specific embodiment of the present invention is shown.

[0056] Exemplarily, the method for manufacturing a semiconductor device of the present invention comprises the following steps:

[0057] First, step 1 is performed to provide a device substrate 111 and a cap substrate 121 .

[0058] The device substrate 111 and the cap substrate 121 can be any suitable semiconductor substrate, such as a bulk silicon substrate, and can also be at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III / V compound semiconductors, including multilayer structures composed of these semiconductors, or silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), or can also be double-sided polished silicon wafers (Double Side Polished Wafers, DSP), or can also be ceramic substrates such as alumina, quartz or glass substrates, etc.

[0059] like Figure 3A, a device substrate 111 is provided. A micro-electro-mechanical system (MEMS) may be formed on the device substrate 111. The device substrate 111 may have a first surface and a second surface opposite to each other, the first surface may be the upper surface of the device substrate 111, and the second surface may be the lower surface of the device substrate 111.

[0060] like Figure 4A As shown, a capping substrate 121 is provided. An oxide layer 122 may be formed in the capping substrate 121. Similarly, the capping substrate 121 may have a first surface and a second surface opposite to each other, the first surface may be the upper surface of the capping substrate 121, and the second surface may be the lower surface of the capping substrate 121.

[0061] Next, step two is performed to form a protrusion 114 having an alignment mark 112 on the first surface of the device substrate 111 , and to form a groove 125 on the cap substrate 121 .

[0062] In some embodiments, Figure 3B~Figure 3D As shown, forming a protrusion 114 having an alignment mark 112 on the first surface of the device substrate 111 may include the following steps S211 to S213:

[0063] Step S211, as Figure 3B As shown, an alignment mark 112 is formed on a first surface of a device substrate 111 .

[0064] In actual preparation, this step can be achieved by a photolithography process. Specifically, a photoresist mask layer can be formed on the first surface of the device substrate 111, and the photoresist mask layer can be patterned through exposure, development and other processes to form a patterned mask layer for defining the alignment mark 112 to be formed; then, the device substrate 111 is etched with the patterned mask layer to form the alignment mark 112.

[0065] Step S212, as Figure 3C As shown, a first mask layer 113 is conformally formed to cover the alignment mark 112 , and the first mask layer 113 defines a pattern of a protrusion 114 to be formed.

[0066] Specifically, a photoresist mask layer can be formed on the device substrate 111 obtained after step S211, and the photoresist mask layer is patterned through exposure, development and other processes to form a first mask layer 113 defining a pattern of the protrusion 114 to be formed, and the formed first mask layer 113 covers the alignment mark 112.

[0067] Step S213, as Figure 3DAs shown, the device substrate 111 is etched based on the first mask layer 113 to form a protrusion 114 with an alignment mark 112 on the first surface of the device substrate 111 .

[0068] In actual preparation, the first surface of the device substrate 111 can be etched by dry etching or wet etching. Taking wet etching as an example, the device substrate 111 with the first mask layer 113 formed on the first surface can be placed in an etchant solution, and the etchant reacts chemically with the device substrate 111 to remove the portion of the device substrate 111 not blocked by the first mask layer 113, and the portion of the device substrate 111 blocked by the first mask layer 113 is protected to form a protrusion 114 with an alignment mark 112. Afterwards, the first mask layer 113 on the protrusion 114 can be removed by a developer.

[0069] Next, step three is performed to form a groove 125 corresponding to the protrusion 114 on the first surface of the cap base 121 .

[0070] In some embodiments, Figure 4C~Figure 4D As shown, forming the groove 125 corresponding to the protrusion 114 on the first surface of the cap base 121 may include the following steps S321-S322:

[0071] Step S321, as Figure 4C As shown, a second mask layer 124 is formed on the first surface of the cap substrate 121 , and the second mask layer 124 defines a pattern of a groove 125 to be formed.

[0072] Specifically, a photoresist mask layer may be formed on the first surface of the cap substrate 121 , and the photoresist mask layer may be patterned through processes such as exposure and development to form a second mask layer 124 defining a pattern of the groove 125 to be formed.

[0073] Step S322, as Figure 4D As shown, the capping substrate 121 is etched based on the second mask layer 124 to form a groove 125 on the first surface of the capping substrate 121 .

[0074] The size (ie, shape and size) of the formed groove 125 is larger than that of the protrusion 114 , so that after the device substrate 111 and the cap substrate 121 are combined, the protrusion 114 can be located in the groove 125 .

[0075] In actual preparation, the first surface of the cap substrate 121 can be etched by dry etching or wet etching. Taking wet etching as an example, the cap substrate 121 with the second mask layer 124 formed on the first surface can be placed in an etchant solution, and the etchant and the cap substrate 121 can react chemically to remove a portion of the device substrate 111 that is not blocked by the second mask layer 124, so as to form a groove 125 on the cap substrate 121. Afterwards, the second mask layer 124 on the cap substrate 121 can be removed by a developer.

[0076] It is worth noting that there is no order of precedence between step 2 and step 3, and the actual execution order of the two is not limited.

[0077] Next, step four is performed to bond the first surface of the device substrate 111 to the first surface of the cap substrate 121 , and after bonding, the protrusion 114 is located in the groove 125 .

[0078] In some embodiments, bonding the first surface of the device substrate 111 to the first surface of the cap substrate 121 may include the following steps S411 to S413:

[0079] Step S411, as Figure 3F As shown, a first bonding layer 116 is formed on the first surface of the device substrate 111 outside the protrusion 114 .

[0080] Specifically, after step S213 above, that is, after the protrusion 114 having the alignment mark 112 is formed on the device substrate 111, any suitable method may be used to form the first bonding layer 116 on the first surface of the device substrate 111 outside the protrusion 114. For example, a bonding material layer may be first formed to cover the first surface of the device substrate 111 outside the protrusion 114, and then the bonding material layer may be patterned using a photolithography process and an etching process to form the first bonding layer 116. Alternatively, the first bonding layer 116 may also be formed by a deposition method including but not limited to a physical vapor deposition method, a chemical vapor deposition method, or a magnetron sputtering method.

[0081] The material of the first bonding layer 116 may include any suitable metal material, including but not limited to at least one of Ag, Au, Cu, Pd, Cr, Mo, Ti, Ta, Sn, W and Al. Preferably, the material of the first bonding layer 116 includes Al or gold.

[0082] Step S412, as Figure 4E As shown, a second bonding layer 126 is formed on the first surface of the cap substrate 121 outside the groove 125 .

[0083] Specifically, after step S322 above, that is, after the groove 125 is formed on the cap substrate 121, any suitable method may be used to form the second bonding layer 126 on the first surface of the cap substrate 121 outside the groove 125. For example, a bonding material layer may be first formed to cover the first surface of the cap substrate 121 outside the groove 125, and then the bonding material layer may be patterned using a photolithography process and an etching process to form the second bonding layer 126. Alternatively, the second bonding layer 126 may also be formed by a deposition method including but not limited to a physical vapor deposition method, a chemical vapor deposition method, or a magnetron sputtering method.

[0084] The material of the second bonding layer 126 may include any suitable metal material, including but not limited to at least one of Ag, Au, Cu, Pd, Cr, Mo, Ti, Ta, Sn, W and Al. Preferably, the material of the second bonding layer 126 includes Al or gold.

[0085] Step S413, as Figure 5A As shown, the first bonding layer 116 and the second bonding layer 126 are bonded to each other so that the side of the device substrate 111 formed with the protrusion 114 is joined to the side of the cap substrate 121 formed with the groove 125. By bonding the device substrate 111 and the cap substrate 121, the protrusion 114 on the device substrate 111 is located in the groove 125 on the cap substrate 121.

[0086] It is worth noting that there is no order of precedence between step S411 and step S412, and the actual execution order of the two is not limited.

[0087] In some embodiments, a first bonding mark 115 is also formed on the first surface of the device substrate 111 outside the protrusion 114, and a second bonding mark 123 is also formed on the first surface of the cap substrate 121 outside the groove 125. When the device substrate 111 and the cap substrate 121 are joined, the device substrate 111 and the cap substrate 121 are aligned based on the first bonding mark 115 and the second bonding mark 123.

[0088] Specifically, after the above step S213, that is, after the protrusion 114 with the alignment mark 112 is formed on the device substrate 111, as shown in FIG. Figure 3E As shown, a first bonding mark 115 may be formed on the surface of the device substrate 111 outside the protrusion 114, and then a first bonding layer 116 may be formed on the surface of the device substrate 111 outside the protrusion 114. The first bonding mark 115 may be implemented by a photolithography process, and the implementation process of the alignment mark 112 may be referred to above, which will not be described in detail here.

[0089] Before step S321 above, Figure 4B As shown, before forming the second mask layer 124 on the cap substrate 121, the second bonding mark 123 can be formed on the cap substrate 121, and then the groove 125 can be formed on the cap substrate 121 through the second mask layer 124. The second bonding mark 123 can be implemented by a photolithography process, and the implementation process of the alignment mark 112 can be referred to above, which will not be repeated here.

[0090] By forming the first bonding mark 115 and the second bonding mark 123, in the process of bonding the device substrate 111 and the cap substrate 121 through the first bonding layer 116 and the second bonding layer 126, the device substrate 111 and the cap substrate 121 can be aligned by aligning the first bonding mark 115 and the second bonding mark 123 (after the device substrate 111 and the cap substrate 121 are bonded, the first bonding mark 115 and the second bonding mark 123 are also bonded, so that a small cavity can be formed. Figure 5A to Figure 5C ), in order to avoid bonding misalignment and ensure that the protrusion 114 on the device substrate 111 can accurately extend into the groove 125 on the cap substrate 121.

[0091] In some embodiments, a sealed cavity is formed between the device substrate 111 and the cap substrate 121 .

[0092] Specifically, if Figure 4E As shown, after the above step S322, that is, after the groove 125 is formed on the cap substrate 121, a cavity 127 can be first formed on the first surface of the cap substrate 121, and then a second bonding layer 126 can be formed on the first surface of the cap substrate 121 outside the groove 125. After the device substrate 111 and the cap substrate 121 are bonded, the cavity 127 formed on the cap substrate 121 is transformed into a sealed cavity. Among them, the method of forming the cavity 127 on the cap substrate 121 can refer to the method of forming the groove 125 on the cap substrate 121 in the above steps S321~S322, which will not be repeated here.

[0093] Next, step five is performed to thin the second surface of the cap substrate 121 to expose the alignment mark 112 .

[0094] As described above, an oxide layer 122 may be formed in the cap substrate 121. The oxide layer 122 may have a first surface and a second surface opposite to each other, the groove 125, the second bonding mark 123 and the cavity 127 may be formed in the cap substrate 121 on one side of the first surface of the oxide layer 122, and the bottom of the groove 125 may be flush with the first surface of the oxide layer 122.

[0095] In some embodiments, Figure 5B~Figure 5CAs shown, the cap substrate 121 and the oxide layer 122 on the second surface side of the oxide layer 122 can be removed in sequence to expose the alignment mark 112. The cap substrate 121 and the oxide layer 122 on the second surface side of the oxide layer 122 can be removed by dry etching, wet etching, etc., which is not limited.

[0096] It is worth mentioning that the order of the above steps is only an example. Under the premise of no conflict, the order of the above steps can also be swapped or performed alternately.

[0097] So far, the introduction of the key manufacturing method of the semiconductor device of the present invention has been completed. For the production of a complete device, other preceding steps, intermediate steps or subsequent steps are required, which will not be described in detail here.

[0098] In summary, the method for manufacturing a semiconductor device of the present invention forms a protrusion 114 with an alignment mark 112 on a device substrate 111, and after thinning the cap substrate 121, the alignment mark 112 is transferred to the top of the semiconductor device, thereby solving the alignment, measurement and sword shadow problems caused by the alignment mark 112 being formed at the bottom of a deep cavity, so that there is no problem of difficulty in focusing in the subsequent alignment process, thereby achieving high-precision alignment; and OVL measurement can be achieved to monitor the alignment status; and since there is no deep cavity, the formation of sword shadows in the subsequent process to cause defects in the semiconductor device can be avoided, thereby improving the yield of the semiconductor device.

[0099] Example 2

[0100] The present invention also provides a semiconductor device, which can be prepared by the method in the above-mentioned embodiment 1.

[0101] Below, reference Figure 5C The semiconductor device of the present invention is introduced and described in detail. It is worth mentioning that in order to avoid repetition, only a brief description is given for the same components and structures as in the aforementioned embodiment 1. For specific explanations and descriptions, reference can be made to the description in embodiment 1.

[0102] Specifically, Figure 5C As shown, the semiconductor device of the present invention includes a device substrate 111 and a cap substrate 121, a protrusion 114 with an alignment mark 112 is formed on the first surface of the device substrate 111, a groove 125 is formed on the first surface of the cap substrate 121, the first surface of the device substrate 111 and the first surface of the cap substrate 121 are bonded through a first bonding layer 116 and a second bonding layer 126, so that the protrusion 114 extends into the groove 125 and is exposed from the bottom of the groove 125, and the alignment mark 112 on the protrusion 114 is located at the top of the semiconductor device.

[0103] In some examples, a sealed cavity is formed between the device substrate 111 and the cap substrate 121 .

[0104] According to the semiconductor device of the present invention, the method of embodiment 1 is adopted to prepare the semiconductor device. By transferring the alignment mark 112 to the top of the semiconductor device, the problems of alignment, measurement and sword shadow caused by the formation of the alignment mark 112 at the bottom of the deep cavity can be solved, so that there is no problem of difficulty in focusing in the subsequent alignment process, thereby achieving high-precision alignment; and OVL measurement can be achieved to monitor the alignment status; and since there is no deep cavity, the formation of sword shadows in the subsequent process to cause defects in the semiconductor device can be avoided, thereby improving the yield of the semiconductor device.

[0105] Example (III)

[0106] Another embodiment of the present invention provides an electronic device, comprising the aforementioned semiconductor device, wherein the semiconductor device is manufactured according to the aforementioned method.

[0107] The electronic device of this embodiment can be any electronic product or device such as a mobile phone, a tablet computer, a laptop computer, a netbook, a game console, a television, a VCD, a DVD, a navigator, a digital photo frame, a camera, a video camera, a voice recorder, an MP3, an MP4, a PSP, etc., or any intermediate product including a circuit. The electronic device of the embodiment of the present invention has better performance because the above-mentioned semiconductor device is used.

[0108] in, Figure 6 An example of a mobile phone handset is shown. The mobile phone handset 400 is provided with a display portion 402 included in a housing 401, operation buttons 403, an external connection port 404, a speaker 405, a microphone 406, and the like.

[0109] The mobile phone comprises the semiconductor device described in the second embodiment. For the introduction of the semiconductor device, reference can be made to the description in the second embodiment, which will not be repeated here.

[0110] The present invention has been described by the above embodiments, but it should be understood that the above embodiments are only for the purpose of example and description, and are not intended to limit the present invention to the scope of the described embodiments. In addition, it can be understood by those skilled in the art that the present invention is not limited to the above embodiments, and more variations and modifications can be made according to the teachings of the present invention, and these variations and modifications all fall within the scope of the protection claimed by the present invention. The protection scope of the present invention is defined by the attached claims and their equivalents.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: include: Providing a device substrate and a cap substrate; Etching the first surface of the device substrate to form a protrusion with an alignment mark; forming a groove corresponding to the protrusion on the first surface of the cap base; Joining a side of the device substrate having the protrusion formed thereon with a side of the cap substrate having the groove formed thereon, wherein the protrusion is located in the groove after the joining; Thinning the second surface of the cap substrate to expose the alignment mark; Wherein, a micro-electromechanical system is formed on the device substrate.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: Etching the first surface of the device substrate to form a protrusion with an alignment mark, comprising: forming an alignment mark on a first surface of the device substrate; Conformally forming a first mask layer covering the alignment mark, wherein the first mask layer defines a pattern of the protrusion to be formed; The device substrate is etched based on the first mask layer to form a protrusion with an alignment mark on the first surface of the device substrate.

3. The method for manufacturing a semiconductor device according to claim 1, wherein: A groove corresponding to the protrusion is formed on the first surface of the cap base, comprising: forming a second mask layer on the first surface of the cap substrate, wherein the second mask layer defines a pattern of the groove to be formed; The first surface of the capping substrate is etched based on the second mask layer to form the groove on the first surface of the capping substrate.

4. The method for manufacturing a semiconductor device according to claim 1, wherein: Bonding the first surface of the device substrate to the first surface of the cap substrate includes: forming a first bonding layer on the first surface of the device substrate outside the protrusion; forming a second bonding layer on the first surface of the cap substrate outside the groove; The first bonding layer is bonded to the second bonding layer to join the device substrate to the cap substrate.

5. The method for manufacturing a semiconductor device according to claim 1 or 4, wherein: A first bonding mark is also formed on the first surface of the device substrate outside the protrusion, and a second bonding mark is also formed on the first surface of the cap substrate outside the groove. When the device substrate and the cap substrate are joined, the device substrate and the cap substrate are aligned based on the first bonding mark and the second bonding mark.

6. The method for manufacturing a semiconductor device according to claim 1, wherein: An oxide layer is formed in the cap substrate, the oxide layer has a first surface and a second surface opposite to each other, the groove is formed in the cap substrate on one side of the first surface of the oxide layer, and the bottom of the groove is flush with the first surface of the oxide layer.

7. The method for manufacturing a semiconductor device according to claim 6, wherein: The step of thinning the second surface of the cap substrate to expose the alignment mark comprises: The cap substrate and the oxide layer on one side of the second surface of the oxide layer are removed in sequence to expose the alignment mark.

8. A semiconductor device, characterized in that: The semiconductor device is prepared by the method for manufacturing a semiconductor device according to any one of claims 1 to 7.

9. An electronic device, characterized in that: The electronic apparatus includes the semiconductor device according to claim 8.

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