Method, device, storage medium, computer program product and bit stream transmission method for video encoding

Abstract

Methods, devices, storage media, computer program products, and bitstream transmission methods for video encoding are provided. In one method, a decoder receives a sequence parameter set (SPS) Rice extension flag indicating whether to enable extension of Rice parameter derivation for binarization abs_remainder and dec_abs_level. In a second method, a decoder may receive a sequence parameter set (SPS) Rice adaptation enable flag indicating whether to initialize Rice parameter derivation for binarization abs_remainder and dec_abs_level at the beginning of each transform unit (TU) using statistics accumulated from previous TUs.

Description

[0001] This application is a divisional application of the invention application with application number 202280037417.8, application date May 26, 2022, and title “Residual and coefficient encoding and decoding for video encoding and decoding”. Technical Field

[0002] The present disclosure relates to video coding and compression. More specifically, the present disclosure relates to improvements and simplifications of residual and coefficient coding for video coding. Background Art

[0003] Various video codec technologies can be used to compress video data. Video coding is performed according to one or more video codec standards. For example, video codec standards include Versatile Video Codec (VVC), Joint Exploration Test Model (JEM), High Efficiency Video Codec (H.265 / HEVC), Advanced Video Codec (H.264 / AVC), Moving Picture Experts Group (MPEG) codec, etc. Video codecs typically use prediction methods (e.g., inter-frame prediction, intra-frame prediction, etc.), which utilize the redundancy present in video images or sequences. An important goal of video coding technology is to compress video data into a form that uses a lower bit rate while avoiding or minimizing the degradation of video quality. Summary of the invention

[0004] Examples of the present disclosure provide methods and apparatus for video encoding and decoding.

[0005] According to a first aspect of the present disclosure, a method for video decoding is provided. The method may include: receiving a sequence parameter set (SPS) Rice extension flag by a decoder, the SPS Rice extension flag indicating whether to enable an extension of Rice parameter derivation for binarization abs_remainder and dec_abs_level. The parameter abs_remainder indicates a first syntax element, which is the remainder of the level information of the coefficient encoded in the second channel using the Golomb-Rice code and the bypass-encoded binary bits when the remaining number of the context-encoded binary bits is greater than or equal to 4 when encoded in the first channel. The parameter dec_abs_level indicates a second syntax element, which is the current coefficient directly encoded in the second channel using the Golomb-Rice code and the bypass-encoded binary bits when the remaining number of the context-encoded binary bits is less than 4 when encoded in the first channel.

[0006] According to a second aspect of the present disclosure, a method for video decoding is provided. The method may include: receiving a sequence parameter set (SPS) Rice adaptive enable flag by a decoder, the SPS Rice adaptive enable flag indicating whether to initialize the Rice parameter derivation for binarization abs_remainder and dec_abs_level using the statistical data accumulated from the previous TU at the beginning of each transform unit (TU). The parameter abs_remainder indicates a first syntax element, which is the remainder of the level information of the coefficient encoded by the Golomb-Rice code and the bypass-encoded binary bit in the second channel when the remaining number of the context-encoded binary bits is greater than or equal to 4 when encoded in the first channel. The parameter dec_abs_level indicates a second syntax element, which is the current coefficient directly encoded in the second channel using the Golomb-Rice code and the bypass-encoded binary bit when the remaining number of the context-encoded binary bits is less than 4 when encoded in the first channel.

[0007] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not intended to restrict the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate examples consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0009] Figure 1 is a block diagram of an encoder according to an example of the present disclosure.

[0010] Figure 2 is a block diagram of a decoder according to an example of the present disclosure.

[0011] Figure 3A is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.

[0012] Figure 3B is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.

[0013] Figure 3C is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.

[0014] Figure 3D is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.

[0015] Figure 3E is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.

[0016] Figure 4 is a diagram of a residual coding structure for a transform block according to an example of the present disclosure.

[0017] Figure 5 is a diagram of a residual codec structure for transforming a skip block according to an example of the present disclosure.

[0018] Figure 6 A method for encoding a video signal according to an example of the present disclosure.

[0019] Figure 7 A method for encoding a video signal according to an example of the present disclosure.

[0020] Figure 8 is a diagram illustrating a computing environment coupled to a user interface according to an example of the present disclosure.

[0021] Fig. 9 A method for video encoding and decoding according to an example of the present disclosure is shown.

[0022] Fig.10 A method for video encoding and decoding according to an example of the present disclosure is shown.

[0023] Fig.11 A method for video encoding and decoding according to an example of the present disclosure is shown.

[0024] Fig.12 A method for video encoding and decoding according to an example of the present disclosure is shown.

[0025] Fig.13 is a block diagram illustrating an exemplary system for encoding and decoding video blocks according to examples of the present disclosure.

[0026] Fig.14 is a block diagram illustrating an exemplary video encoder according to examples of the present disclosure.

[0027] Fig.15 is a block diagram illustrating an exemplary video decoder according to examples of the present disclosure.

[0028] Fig.16 A low-delay transform skip residual coding (TSRC) method according to an example of the present disclosure is shown.

[0029] Fig.17 A method for video decoding according to an example of the present disclosure is shown.

[0030] Fig.18 A method for video decoding according to an example of the present disclosure is shown. DETAILED DESCRIPTION

[0031] Reference will now be made in detail to example embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, in which the same reference numerals in different drawings represent the same or similar elements, unless otherwise indicated. The implementations set forth in the following description of the example embodiments do not represent all implementations consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with aspects related to the present disclosure as described in the appended claims.

[0032] The terms used in this disclosure are only used for the purpose of describing specific embodiments and are not intended to limit the disclosure. As used in this disclosure and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein is intended to represent and include any or all possible combinations of one or more of the associated listed items.

[0033] It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various information, the information should not be limited by these terms. These terms are only used to distinguish one type of information from another type of information. For example, without departing from the scope of the present disclosure, the first information may be referred to as the second information; and similarly, the second information may also be referred to as the first information. As used herein, the term "if" may be understood to mean "when..." or "upon..." or "in response to a judgment", depending on the context.

[0034] Figure 1 A general diagram of a block-based video encoder for VVC is shown. Specifically, Figure 1 A typical encoder 100 is shown. The encoder 100 has a video input 110, motion compensation 112, motion estimation 114, intra / inter mode decision 116, block predictor 140, adder 128, transform 130, quantization 132, prediction related information 142, intra prediction 118, picture buffer 120, inverse quantization 134, inverse transform 136, adder 126, memory 124, loop filter 122, entropy coding 138, and bitstream 144.

[0035] In encoder 100, a video frame is partitioned into a plurality of video blocks for processing. For each given video block, a prediction is formed based on an inter-prediction method or an intra-prediction method.

[0036] The prediction residual, representing the difference between the current video block (part of the video input 110) and its predictor (part of the block predictor 140), is sent from the adder 128 to the transform 130. The transform coefficients are then sent from the transform 130 to the quantization 132 for entropy reduction. The quantized coefficients are then fed to the entropy coding 138 to generate a compressed video bitstream. Figure 1 As shown, prediction related information 142 (such as video block segmentation information, motion vectors (MVs), reference picture indexes, and intra prediction modes) from the intra / inter mode decision 116 is also fed through entropy coding 138 and saved into a compressed bitstream 144. The compressed bitstream 144 comprises a video bitstream.

[0037] In encoder 100, decoder related circuitry is also required to reconstruct pixels for prediction purposes. First, the prediction residual is reconstructed by inverse quantization 134 and inverse transformation 136. The reconstructed prediction residual is combined with block prediction factors 140 to generate unfiltered reconstructed pixels for the current video block.

[0038] Spatial prediction (or "intra-prediction") uses pixels from samples of already encoded neighboring blocks in the same video frame as the current video block (called reference samples) to predict the current video block.

[0039] Temporal prediction (also known as "inter prediction") uses reconstructed pixels from already coded video pictures to predict the current video block. Temporal prediction reduces temporal redundancy inherent in video signals. The temporal prediction signal for a given coding unit (CU) or coding block is typically signaled by one or more MVs that indicate the amount and direction of motion between the current CU and its temporal reference. In addition, if multiple reference pictures are supported, a reference picture index is additionally sent that identifies which reference picture in the reference picture repository the temporal prediction signal comes from.

[0040] The motion estimation 114 receives the video input 110 and the signal from the picture buffer 120, and outputs the motion estimation signal to the motion compensation 112. The motion compensation 112 receives the video input 110, the signal from the picture buffer 120, and the motion estimation signal from the motion estimation 114, and outputs the motion compensation signal to the intra / inter mode decision 116.

[0041] After performing spatial and / or temporal prediction, the intra / inter mode decision 116 in the encoder 100 selects the best prediction mode, for example based on a rate-distortion optimization method. The block prediction factor 140 is then subtracted from the current video block, and the resulting prediction residual is decorrelated using transformation 130 and quantization 132. The resulting quantized residual coefficients are dequantized by dequantization 134 and inversely transformed by inverse transformation 136 to form a reconstructed residual, which is then added back to the prediction block to form a reconstructed signal for the CU. Before the reconstructed CU is placed in the reference picture storage of the picture buffer 120 and used to encode and decode future video blocks, loop filtering 122, such as a deblocking filter, sample adaptive offset (SAO), and / or adaptive loop filter (ALF), may be further applied to the reconstructed CU. In order to form an output video bitstream 144, the coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to the entropy coding unit 138 to be further compressed and packaged to form a bitstream.

[0042] Figure 1 A block diagram of a general block-based hybrid video coding system is given. The input video signal is processed block by block (called CU). In VTM-1.0, a CU can be up to 128×128 pixels. However, unlike HEVC, which partitions blocks based on quadtree only, in VVC, a coding tree unit (CTU) is split into multiple CUs based on quadtree / binary tree / ternary tree to adapt to changing local characteristics. By definition, a coding tree block (CTB) is an N×N sample block for a certain N value, so that the division of components into CTBs is a partition. The CTU includes a CTB of luma samples of a picture with three sample arrays, two corresponding CTBs of chroma samples, or a CTB of samples of a monochrome picture or a CTB of samples of a picture encoded using three separate color planes and a syntax structure for encoding samples. In addition, the concept of multiple partition unit types in HEVC is removed, that is, CU, prediction unit (PU) and transform unit (TU) are no longer distinguished in VVC; instead, each CU is always used as a basic unit for both prediction and transformation without further partitioning. In the multi-type tree structure, a CTU is first split by a quadtree structure. Then, each quadtree leaf node can be further split by a binary and ternary tree structure. Figure 3A , Figure 3B , Figure 3C , Figure 3D and Figure 3E As shown, there are five types of splits, quaternary split, horizontal binary split, vertical binary split, horizontal ternary split, and vertical ternary split.

[0043] Figure 3AA diagram illustrating block quad partitioning in a multi-type tree structure according to the present disclosure is shown.

[0044] Figure 3B A diagram illustrating vertical binary partitioning of blocks in a multi-type tree structure according to the present disclosure is shown.

[0045] Figure 3C A diagram illustrating block-level binary partitioning in a multi-type tree structure according to the present disclosure is shown.

[0046] Figure 3D A diagram illustrating vertical ternary partitioning of blocks in a multi-type tree structure according to the present disclosure is shown.

[0047] Figure 3E A diagram illustrating block-level ternary partitioning in a multi-type tree structure according to the present disclosure is shown.

[0048] exist Figure 1 In the video code, spatial prediction and / or temporal prediction can be performed. Spatial prediction (or "intra-frame prediction") uses pixels from samples of already encoded adjacent blocks in the same video picture / strip (which are called reference samples) to predict the current video block. Spatial prediction reduces the spatial redundancy inherent in the video signal. Temporal prediction (also known as "inter-frame prediction" or "motion-compensated prediction") uses reconstructed pixels from already encoded video pictures to predict the current video block. Temporal prediction reduces the temporal redundancy inherent in the video signal. The temporal prediction signal for a given CU is usually signaled by one or more motion vectors (MVs) that indicate the amount and direction of motion between the current CU and its temporal reference. In addition, if multiple reference pictures are supported, an additional reference picture index is sent, which is used to identify which reference picture in the reference picture repository the temporal prediction signal comes from. After spatial and / or temporal prediction, the mode decision block in the encoder selects the best prediction mode, for example, based on a rate-distortion optimization method. The prediction block is then subtracted from the current video block, and the prediction residual is decorrelated and quantized using a transform. The quantized residual coefficients are dequantized and inverse transformed to form a reconstructed residual, which is then added back to the prediction block to form the reconstructed signal of the CU. In addition, loop filtering, such as a deblocking filter, sample adaptive offset (SAO), and adaptive loop filter (ALF), may be applied to the reconstructed CU before it is placed in a reference picture repository and used to encode and decode future video blocks. In order to form an output video bitstream, the coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to the entropy coding unit to be further compressed and packaged to form a bitstream.

[0049] Figure 2A general block diagram of a video decoder for VVC is shown. Specifically, Figure 2 A block diagram of a typical decoder 200 is shown. The decoder 200 has a bitstream 210, entropy decoding 212, inverse quantization 214, inverse transform 216, adder 218, intra / inter mode selection 220, intra prediction 222, memory 230, loop filter 228, motion compensation 224, picture buffer 226, prediction related information 234 and video output 232.

[0050] Decoder 200 is similar to Figure 1 The decoder 200 first decodes the incoming video bitstream 210 by entropy decoding 212 to derive the quantized coefficient levels and prediction related information. The quantized coefficient levels are then processed by inverse quantization 214 and inverse transform 216 to obtain reconstructed prediction residuals. The block predictor mechanism implemented in the intra / inter mode selector 220 is configured to perform intra prediction 222 or motion compensation 224 based on the decoded prediction information. The reconstructed prediction residual from the inverse transform 216 and the prediction output generated by the block predictor mechanism are summed using an adder 218 to obtain a set of unfiltered reconstructed pixels.

[0051] The reconstructed blocks may be further passed through a loop filter 228 before being stored in a picture buffer 226 used as a reference picture repository. The reconstructed video in the picture buffer 226 may be sent to drive a display device, as well as used to predict future video blocks. With the loop filter 228 turned on, filtering operations are performed on these reconstructed pixels to derive the final reconstructed video output 232.

[0052] Figure 2 A general block diagram of a block-based video decoder is given. The video bitstream is first entropy decoded at the entropy decoding unit. The coding mode and prediction information are sent to the spatial prediction unit (if intra-coded) or the temporal prediction unit (if inter-coded) to form a prediction block. The residual transform coefficients are sent to the dequantization unit and the inverse transform unit to reconstruct the residual block. The prediction block and the residual block are then added together. The reconstructed block can be further passed through loop filtering before it is stored in the reference picture repository. The reconstructed video in the reference picture repository is then sent out to drive the display device and used to predict future video blocks.

[0053] Transform coefficient encoding and decoding in VVC

[0054] In the transform coefficient coding and decoding in VVC, the variable remBinsPass1 is first set to the maximum number of context-coded bits allowed (MCCB). During the encoding process, the variable is reduced by one each time a context-coded bit is signaled. When remBinsPass1 is greater than or equal to 4, the coefficient is first signaled by the syntax sig_coeff_flag, abs_level_gt1_flag, par_level_flag, and abs_level_gt3_flag, all of which use context-coded bits in the first pass. The remainder of the level information of the coefficient is encoded using the syntax element abs_remainder using Golombreth coding and bypass-coded bits in the second pass. When remBinsPass1 becomes less than 4 when encoding in the first pass, the current coefficient is not encoded in the first pass, but is directly encoded using the syntax element dec_abs_level in the second pass using Golombreth coding and bypass-coded bits. The Rice parameter derivation process for dec_abs_level[] is derived as specified in Table 1A. After all the above level coding, the sign (sign_flag) for all scan positions where sig_coeff_flag is equal to 1 is finally coded as a bypass binary bit. Figure 4 Such a process is depicted in . remBinsPass1 is reset for each TB. The transition from using context coded bits for sig_coeff_flag, abs_level_gt1_flag, par_level_flag, and abs_level_gt3_flag to using bypass coded bits for the remaining coefficients occurs only at most once per TB. For a coefficient subblock, if remBinsPass1 is less than 4 before encoding its first coefficient, the entire coefficient subblock is encoded using bypass coded bits.

[0055] Figure 4 A diagram showing a residual codec structure for a transform block is shown.

[0056] Table 1A Derivation process of Rice parameters for abs_remainder[] and dec_abs_level[]

[0057]

[0058] Table 1B Specification of cRiceParam based on locSumAbs

[0059] locSumAbs 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 cRiceParam 0 0 0 0 0 0 0 1 1 1 1 1 1 1 2 2 locSumAbs 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 cRiceParam 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3

[0060] Residual Coding and Decoding for Transform Skip Mode in VVC

[0061] In transform skip mode, the statistical properties of the residual signal are different from those of the transform coefficients and no energy compression around low frequency components is observed.The residual codec is modified to take into account the different signal properties of the (spatial) transform skip residual.

[0062] Figure 5 A diagram showing a residual codec structure for transform skip blocks.

[0063] General Constraint Information

[0064] The GCI structure contains several types of constraint syntax elements, including: flags for general bitstream restrictions, such as indicating that only intra codecs are used, all layers are coded independently, or the bitstream contains only one AU; fields that constrain the bit depth and chroma format of coded pictures; flags that indicate that specific NAL unit types are not allowed to be present in the bitstream; flags that constrain the way in which pictures can be partitioned into slices, tiles, and sub-pictures within the bitstream; flags that constrain CTU size and partition tree size and type; flags that constrain the use of specific intra codec tools; flags that constrain the use of specific inter codec tools; flags that constrain transform, quantization, and residual codec tools; and flags that constrain aspects of the loop filter.

[0065] The purpose of the GCI syntax structure is to enable simple discovery of configuration information about the features required for decoding a bitstream and to allow signaling of interoperability points that impose restrictions beyond those specified by profiles, layers (Tiers), and levels (PTLs), with finer granularity than allowed by previous video codec standards. Similar to sub-profiles, the use of the GCI syntax structure can allow interoperability to be defined for decoder implementations that do not support all features of the VVC profile but meet specific application requirements. Decoder implementations can check the GCI syntax elements to check whether the bitstream avoids the use of specific features in order to determine how to configure the decoding process and identify whether the bitstream can be decodable by the decoder. Decoder implementations that support all features of the VVC profile can ignore the GCI syntax element values, as such decoders will be able to decode any bitstream that conforms to the indicated PTL.

[0066] Residual codec for transform skipping

[0067] According to the twenty-seventh aspect of the present disclosure, a set of variables of binary codewords is used to encode and decode a specific syntax element (such as abs_remainder) in transform skip residue encoding and decoding, and a selection is determined according to the specific coding information of the current block (such as the quantization parameter or coding bit depth associated with TB / CB and / or stripe / profile) and / or according to a new flag associated with TB / CB / stripe / picture / sequence level (such as extended_precision_processing_flag). Different methods can be used to derive the set of variables of binary codewords, and some exemplary methods are listed as follows.

[0068] First, use the same process as that used in the current VVC to determine the codeword for abs_remainder, but always select a fixed Rice parameter (such as 2, 3, 4, 5, 6, 7, or 8). The fixed value can be different under different conditions according to the specific coding information of the current block (such as the quantization parameter associated with TB / CB and / or stripe / profile, frame type (such as I, P, or B), component ID (such as luminance or chrominance), color format (such as 420, 422, or 444), or coding bit depth) and / or according to the syntax element associated with TB / CB / stripe / picture / sequence level (such as rice_parameter_value). A specific example is that TH1 to TH4 are predefined thresholds satisfying (TH1 < TH2 < TH3 < TH4), and K0 to K4 are predefined Rice parameters. It should be noted that the same logic can be implemented differently in practice. For example, certain equations or look-up tables can also be used to derive the same Rice parameter according to the bit depth value of the current CU / sequence.

[0069] Second, fixed-length binarization.

[0070] Third, truncated Rice binarization.

[0071] Fourth, truncated binary (TB) binarization process.

[0072] Fifth, k-th order exponential Golomb binarization process (EGK).

[0073] Sixth, finite k-th order exponential Golomb binarization.

[0074] An example of the corresponding decoding process based on the VVC draft is shown as follows. The changes to the VVC draft are shown in bold and italic fonts in Table 1, and the deleted content is shown in italic font. It should be noted that the same logic can be implemented differently in practice. For example, certain equations or look-up tables can also be used to derive the same Rice parameter.

[0075] Table 1 Rice parameter derivation process

[0076]

[0077]

[0078] In another example, when the new flag (e.g., extended_precision_processing_flag) is equal to 1, only one fixed value is used for the Rice parameter when encoding and decoding the syntax element of abs_remainder. The corresponding decoding process based on the VVC draft is shown as follows, where the changed content is shown in bold and italic fonts, and the deleted content is shown in italic fonts. Changes to the VVC draft are shown in bold and italic fonts in Table 2.

[0079] Table 2 Rice parameter derivation process

[0080]

[0081] In another example, when the new flag (e.g., extended_precision_processing_flag) is equal to 1, the Rice parameter cRiceParam is fixed to n, where n is a positive number (e.g., 2, 3, 4, 5, 6, 7, or 8). The fixed value may be different under different conditions. The corresponding decoding process based on the VVC draft is shown as follows, with changes shown in bold and italic fonts, and deleted content shown in italic fonts. Changes to the VVC draft are shown in bold and italics in Table 3.

[0082] Table 3 Rice parameter derivation process

[0083]

[0084]

[0085] In another example, when BitDepth is greater than or equal to a predefined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16), the Rice parameter cRiceParam is fixed to n, where n is a positive number, such as 4, 5, 6, 7, or 8. The fixed value may be different under different conditions. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16), and changes are shown in bold and italic fonts, and deleted content is shown in italic fonts. Changes to the VVC draft are shown in bold and italic fonts in Table 4.

[0086] Table 4 Rice parameter derivation process

[0087]

[0088] In another example, a control flag is signaled in the slice header to indicate whether to enable or disable the signaling of the Rice parameter for the transform skip block. When the control flag is signaled as enabled, a syntax element for indicating the Rice parameter of the slice is further signaled for each transform skip strip. When the control flag is signaled as disabled (e.g., set to equal "0"), the syntax element for indicating the Rice parameter for the transform skip strip is not further signaled at a lower level, and the default Rice parameter (e.g., 1) is used for all transform skip strips. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2), and the changed content is shown in bold and italic fonts, and the deleted content is shown in italic fonts. Changes to the VVC draft are shown in bold and italic fonts in Table 5. It is worth noting that sh_ts_residual_coding_rice_index can be encoded and decoded in different ways and / or can have a maximum value. For example, u(n) (using an unsigned integer of n bits) or f(n) (using a fixed pattern bit string of n bits written starting from the left bit (from left to right)) can also be used to encode / decode the same syntax element.

[0089] Strip Header Syntax

[0090] Table 5 Syntax of residual codec

[0091]

[0092] sh_ts_residual_coding_rice_flag equal to 1 specifies that sh_ts_residual_coding_rice_index may be present in the current slice. sh_ts_residual_coding_rice_flag equal to 0 specifies that sh_ts_residual_coding_rice_index is not present in the current slice. When sh_ts_residual_coding_rice_flag is not present, the value of sh_ts_residual_coding_rice_flag is inferred to be equal to 0.

[0093] sh_ts_residual_coding_rice_index specifies the Rice parameters used for the residual_ts_coding() syntax structure.

[0094] Table 6 Rice parameter derivation process

[0095]

[0096] In another example, a control flag is signaled in a sequence parameter set (or in a sequence parameter set range extension syntax) to indicate whether to enable or disable the signaling of Rice parameters for a transform skip block. When the control flag is signaled as enabled, a syntax element for indicating the Rice parameters of the strip is further signaled for each transform skip strip. When the control flag is signaled as disabled (e.g., set to equal "0"), no syntax element for indicating the Rice parameters for the transform skip strip is further signaled at a lower level, and a default Rice parameter (e.g., 1) is used for all transform skip strips. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold and italic fonts in Table 7, and deleted content is shown in strikethrough fonts. It is worth noting that sh_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have a maximum value. For example, u(n) (using an unsigned integer of n bits) or f(n) (using a fixed pattern bit string of n bits written starting from the left bit (from left to right)) can also be used to encode / decode the same syntax element.

[0097] Sequence Parameter Set RBSP Syntax

[0098] Table 7 Syntax of residual codec

[0099]

[0100] sps_ts_residual_coding_rice_present_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx may be present in the SH syntax structure referencing the SPS. sps_ts_residual_coding_rice_present_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx is not present in the SH syntax structure referencing the SPS. When sps_ts_residual_coding_rice_present_in_sh_flag is not present, the value of sps_ts_residual_coding_rice_present_in_sh_flag is inferred to be equal to 0.

[0101] Strip Header Syntax

[0102] Table 8 Syntax of residual codec

[0103]

[0104] sh_ts_residual_coding_rice_idx specifies the Rice parameters used for the residual_ts_coding() syntax structure.

[0105] Table 9 Rice parameter derivation process

[0106]

[0107] In one or more examples of the present disclosure, it is proposed to disable the presence of Rice parameters for transform skip residual coding and decoding when transform skip is disabled. In a specific example, in order to achieve such a design purpose, it is proposed to use sps_transform_skip_enabled_flag to control the presence of sps_ts_residual_coding_rice_preset_in_sh_flag. For example, when the flag sps_transform_skip_enabled_flag is equal to 0 (i.e., transform skip is disabled at the current picture), sps_ts_residual_coding_rice_preset_in_sh_flag is not signaled, but inferred to be 0. When the flag sps_transform_skip_enabled_flag is equal to 1, sps_ts_residual_coding_rice_present_in_sh_flag is further signaled. Changes to the current VVC working draft are shown in italics as follows.

[0108] if(sps_transform_skip_enabled_flag) sps_ts_residual_coding_rice_present_in_sh_flag u(1)

[0109] In another specific example, in order to achieve this design goal, it is proposed to add a bitstream consistency requirement related to sps_transform_skip_enabled_flag for sps_ts_residual_coding_rice_present_in_sh_flag. For example, the bitstream consistency requirement is that when sps_transform_skip_enabled_flag is equal to 0, the value of sps_ts_residual_coding_rice_present_in_sh_flag should be equal to 0. Changes to the current VVC working draft are shown in italics as follows.

[0110] Sequence parameter set range extension semantics

[0111] sps_ts_residual_coding_rice_preset_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx_minus1 may be present in the slice_header() syntax structure referencing the SPS. sps_ts_residual_coding_rice_present_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx_minus1 is not present in the slice_header() syntax structure referencing the SPS. When sps_ts_residual_coding_rice_preset_in_sh_flag is not present, the value of sps_ts_residual_coding_rice_preset_in_sh_flag is inferred to be equal to 0.

[0112] A bitstream conformance requirement is that when sps_transform_skip_enabled_flag is equal to 0, the value of sps_ts_residual_coding_rice_present_in_sh_flag shall be equal to 0.

[0113] In yet another example, when the flag for transform skip (sps_transform_skip_enabled_flag) is signaled as enabled, a control flag is further signaled in the sequence parameter set (or in the sequence parameter set range extension syntax) to indicate whether the signaling of the Rice parameters for the transform skip block is enabled or disabled. When the control flag is signaled as enabled, a syntax element for indicating the Rice parameters for the stripe is further signaled for each transform skip stripe. When the control flag is signaled as disabled (e.g., set to equal "0"), no syntax element for indicating the Rice parameters for the transform skip stripe is further signaled at a lower level, and a default Rice parameter (e.g., 1) is used for all transform skip stripes. An example of a corresponding decoding process based on the VVC draft is shown below. Changes to the VVC draft are shown in italics.

[0114] Sequence Parameter Set RBSP Syntax

[0115]

[0116] sps_ts_residual_coding_rice_preset_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx may be present in the SH syntax structure referencing the SPS. sps_ts_residual_coding_rice_preset_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx_minus1 is not present in the SH syntax structure referencing the SPS. When sps_ts_residual_coding_rice_preset_in_sh_flag is not present, the value of sps_ts_residual_coding_rice_preset_in_sh_flag is inferred to be equal to 0.

[0117] Strip Header Syntax

[0118]

[0119] sh_ts_residual_coding_rice_idx_minus1 plus 1 specifies the Rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_idx_minus1 does not exist, the value of sh_ts_residual_coding_rice_ids_minus1 is inferred to be equal to 0.

[0120] 9.3.3.11 Binarization process for abs_remainder[]

[0121] The inputs to this process are a request for the binarization syntax element abs_remainder[n], the color component index cIdx, the current sub-block index i, the luma position (x0, y0) specifying the upper left sample of the current luma transform block relative to the upper left luma sample of the picture, the current coefficient scan position (xC, yC), the binary logarithm of the transform block width log2TbWidth, and the binary logarithm of the transform block height log2TbHeight.

[0122] The output of this process is the binarization of the syntax elements.

[0123] The variables lastAbsRemainder and lastRiceParam are derived as follows:

[0124] – If this procedure is called for the first time for the current sub-block index i, lastAbsRemainder and lastRiceParam are both set to 0.

[0125] – Otherwise (this process is not called for the first time for the current sub-block index i), lastAbsRemainder and lastRiceParam are set equal to the values ​​of abs_remainder[n] and cRiceParams, respectively, which are derived during the last call of the binarization process for the syntax element abs_remainder[n] as specified in this clause.

[0126] The Rice parameter cRiceParam is derived as follows:

[0127] – If transform_skip_flag[x0][y0][cIdx] is equal to 1 and sh_ts_residual_coding_disabled_flag is equal to 0, the Rice parameter cRiceParam is set equal to sh_ts_residual_coding_rice_idx_minus1+1.

[0128] – Otherwise, the Rice parameter cRiceParam is derived by calling the Rice parameter derivation procedure for abs_remainder[] as specified in clause 9.3.3.2, with the variable baseLevel set equal to 4, the color component index cIdx, the luma position (x0, y0), the current coefficient scan position (xC, yC), the binary logarithm of the transform block width log2TbWidth, and the binary logarithm of the transform block height log2TbHeight as input.

[0129] In another example, a syntax element is signaled for each transform skipped slice to indicate the Rice parameters for the slice. An example of a corresponding decoding process based on the VVC draft is shown below. Changes to the VVC draft are shown in bold and italics in Table 10. It is worth noting that sh_ts_residual_coding_rice_idx can be encoded and decoded in different ways, and / or can have a maximum value. For example, u(n) (using an unsigned integer of n bits) or f(n) (using a fixed pattern bit string of n bits written starting from the left bit (from left to right)) can also be used to encode / decode the same syntax element.

[0130] Strip Header Syntax

[0131] Table 10 Syntax of residual codec

[0132]

[0133] sh_ts_residual_coding_rice_idx specifies the Rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_idx does not exist, the value of sh_ts_residual_coding_rice_idx is inferred to be equal to 0.

[0134] Table 11 Rice parameter derivation process

[0135]

[0136]

[0137] In another example, a control flag is signaled in the picture parameter set range extension syntax to indicate whether to enable or disable the signaling of Rice parameters for the transform skip block. When the control flag is signaled as enabled, a syntax element for indicating the Rice parameters of the picture is further signaled. When the control flag is signaled as disabled (e.g., set to equal "0"), no syntax element for indicating the Rice parameters for the transform skip strip is further signaled at a lower level, and a default Rice parameter (e.g., 1) is used for all transform skip strips. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold and italic fonts in Table 12. It is worth noting that pps_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have a maximum value. For example, u(n) (using an unsigned integer of n bits) or f(n) (using a fixed pattern bit string of n bits written starting from the left bit (from left to right)) can also be used to encode / decode the same syntax element.

[0138] Picture Parameter Set Range Extension Syntax

[0139] Table 12 Syntax of residual codec

[0140]

[0141] pps_ts_residual_coding_rice_flag equal to 1 specifies that pps_ts_residual_coding_rice_index may be present in the current picture. pps_ts_residual_coding_rice_flag equal to 0 specifies that pps_ts_residual_coding_rice_idx is not present in the current picture. When pps_ts_residual_coding_rice_flag is not present, the value of pps_ts_residual_coding_rice_flag is inferred to be equal to 0.

[0142] pps_ts_residual_coding_rice_idx specifies the Rice parameters used for the residual_ts_coding() syntax structure.

[0143] Table 13 Rice parameter derivation process

[0144]

[0145] In another example, it is proposed to encode and decode the syntax element abs_remainder using only variable Rice parameters. The value of the applied Rice parameter can be determined according to the specific coding information of the current block (e.g., block size, quantization parameter, bit depth, transform type, etc.). In a specific embodiment, it is proposed to adjust the Rice parameter based on the coding bit depth and the quantization parameter applied to a CU. The corresponding decoding process based on the VVC draft is shown as follows, and the changes to the VVC draft are shown in bold and italic fonts in Table 14, and the deleted content is shown in italic fonts. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0146] Table 14 Rice parameter derivation process

[0147]

[0148]

[0149] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH is a predefined threshold (e.g., 33 or 34). Changes to the VVC draft are shown in bold and italic fonts in Table 15, and deleted content is shown in italic fonts. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0150] Table 15 Rice parameter derivation process

[0151]

[0152] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH A and TH B is a predefined threshold (e.g., TH A =8,TH B =33 or 34). Changes to the VVC draft are shown in bold and italic fonts in Table 16, and deleted content is shown in italic fonts. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0153] Table 16 Rice parameter derivation process

[0154]

[0155] In another example, it is proposed to encode and decode the syntax elements of abs_remainder using only variable Rice parameters when a new flag (e.g., extended_precision_processing_flag) is equal to 1. The variable value can be determined based on the specific coding information of the current block (e.g., block size, quantization parameter, bit depth, transform type, etc.). In a specific embodiment, it is proposed to adjust the Rice parameters based on the coding bit depth and the quantization parameter applied to a CU. The corresponding decoding process based on the VVC draft is shown as follows. The changes to the VVC draft are shown in bold and italics in Table 17. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0156] Table 17 Rice parameter derivation process

[0157]

[0158]

[0159] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH is a predefined threshold (e.g., 18, 19). The changes to the VVC draft are shown in bold and italics in Table 18. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0160] Table 18 Rice parameter derivation process

[0161]

[0162] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH A and TH B For a predefined threshold (e.g., TH A =8, TH B =18 or 19). The changes to the VVC draft are shown in bold and italics in Table 19. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0163] Table 19 Rice parameter derivation process

[0164]

[0165] Figure 6 A method for video encoding is shown. The method can be applied to an encoder, for example. In step 1610, the encoder can receive a video input. For example, the video input can be a live stream. In step 1612, the encoder can obtain a quantization parameter based on the video input. For example, the quantization parameter can be calculated by a quantization unit in the encoder. In step 1614, the encoder can derive Rice parameters based on at least one predefined threshold, the coding bit depth, and the quantization parameter. For example, the Rice parameters are used to signal the syntax of abs_remainder and dec_abs_level. In step 1616, the encoder can entropy encode the video bitstream based on the Rice parameters. For example, the video bitstream can be entropy encoded to generate a compressed video bitstream.

[0166] In another example, it is proposed that when BitDepth is greater than 10, only fixed values ​​(e.g., 2, 3, 4, 5, 6, 7, or 8) for Rice parameters are used when encoding and decoding the syntax elements of abs_remainder. The fixed value can be different under different conditions according to the specific coding information of the current block (e.g., quantization parameter). The corresponding decoding process based on the VVC draft is shown as follows, where TH is a predefined threshold (e.g., 18, 19). The changes to the VVC draft are shown in bold and italics in Table 20. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0167] Table 20 Rice parameter derivation process

[0168]

[0169] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH A and TH B For a predefined threshold (e.g., TH A=8, TH B =18 or 19). The changes to the VVC draft are shown in bold and italics in Table 21. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0170] Table 21 Rice parameter derivation process

[0171]

[0172] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH is a predefined threshold (e.g., 33 or 34). The changes to the VVC draft are shown in bold and italics in Table 22. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0173] Table 22 Rice parameter derivation process

[0174]

[0175] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH A and TH B For a predefined threshold (e.g., TH A =8, TH B =33 or 34). The changes to the VVC draft are shown in bold and italics in Table 23. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0176] Table 23 Rice parameter derivation process

[0177]

[0178] It is worth mentioning that in the above description, the equations for calculating specific Rice parameters are used only as examples to illustrate the proposed ideas. For technicians of contemporary video coding technology, other mapping functions (or equivalent mapping equations) have been applied to the proposed ideas (i.e., determining the Rice parameters of the transform skip mode based on the coded bits and the applied quantization parameters). At the same time, it should also be mentioned that in the current VVC design, the value of the applied quantization parameter is allowed to change at the coding block group level. Therefore, the proposed Rice parameter adjustment scheme can provide flexible adaptation of the Rice parameters of the transform skip mode at the coding block group level.

[0179] Signaling information for normal residual codec and transform skip residual codec

[0180] According to the twenty-eighth aspect of the present disclosure, it is proposed to use a signal to send Rice parameters of binary codewords for encoding and decoding specific syntax elements (e.g., abs_remainder) in transform skip residual coding and decoding, and shift and offset parameters of Rice parameters for deriving abs_remainder / dec_abs_level in conventional residual coding and decoding, and determine whether to use a signal based on specific coding information of the current block (e.g., quantization parameter or coding bit depth associated with TB / CB and / or slice / profile) and / or based on a new flag associated with TB / CB / slice / picture / sequence level (e.g., sps_residual_coding_info_present_in_sh_flag).

[0181] In one example, a control flag is signaled in the slice header to indicate whether to enable or disable the signaling of Rice parameters for the transform skip block and the signaling of shift and / or offset parameters for deriving the Rice parameters in the transform block. When the control flag is signaled as enabled, a syntax element for indicating the Rice parameters of the slice is further signaled for each transform skip slice, and two syntax elements for indicating the shift and / or offset parameters for deriving the Rice parameters of the slice are further signaled for each transform slice. When the control flag is signaled as disabled (e.g., set to equal "0"), the syntax element for indicating the Rice parameters for the transform skip slice is not further signaled at a lower level, and the default Rice parameters (e.g., 1) are used for all transform skip slices, and the syntax element for indicating the shift and offset parameters for deriving the Rice parameters for the transform slice is not further signaled at a lower level, and the default shift and / or offset parameters (e.g., 0) are used for all transform slices. An example of the corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold and italic fonts in Table 24. It is worth noting that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_index can be encoded and decoded in different ways and / or can have a maximum value. For example, u(n) (using an unsigned integer of n bits) or f(n) (using a fixed pattern bit string of n bits written starting from the left bit (from left to right)) can also be used to encode / decode the same syntax element.

[0182] Figure 7A method for video encoding is shown. The method can be applied, for example, to an encoder. In step 1710, the encoder can receive a video input. In step 1712, the encoder can signal Rice parameters for binary codewords of coding syntax elements. The coding syntax elements can include abs_remainder in a transform skip residual codec. In step 1714, the encoder can entropy encode a video bitstream based on the Rice parameters and the video input.

[0183] Strip Header Syntax

[0184] Table 24 Syntax of residual codec

[0185]

[0186]

[0187] sh_residual_coding_rice_flag equal to 1 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_residual_coding_rice_index may be present in the current slice. sh_residual_coding_rice_flag equal to 0 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_residual_coding_rice_index do not exist in the current slice.

[0188] sh_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_shift does not exist, the value of sh_residual_coding_rice_shift is inferred to be equal to 0.

[0189] sh_residual_coding_rice_offset specifies the offset parameter used for the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_offset does not exist, the value of sh_residual_coding_rice_offset is inferred to be equal to 0.

[0190] sh_ts_residual_coding_rice_index specifies the Rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_index does not exist, the value of sh_ts_residual_coding_rice_index is inferred to be equal to 0.

[0191] Table 25 Rice parameter derivation process

[0192]

[0193] Table 26 Rice parameter derivation process

[0194]

[0195]

[0196] In yet another example, a control flag is signaled in a sequence parameter set (or in a sequence parameter set range extension syntax) to indicate whether to enable or disable signaling of Rice parameters for a transform skip block and signaling of shift and / or offset parameters for deriving Rice parameters in the transform block. When the control flag is signaled as enabled, one syntax element for indicating the Rice parameters of the slice is further signaled for each transform skip stripe, and two syntax elements for indicating the shift and / or offset parameters for deriving Rice parameters of the slice are further signaled for each transform stripe. When the control flag is signaled as disabled (e.g., set to equal "0"), no syntax element for indicating the Rice parameters for the transform skip stripe is further signaled at a lower level, and default Rice parameters (e.g., 1) are used for all transform skip stripes, and no syntax element for indicating the shift and / or offset parameters for deriving Rice parameters for the transform stripe is further signaled at a lower level, and default shift and / or offset parameters (e.g., 0) are used for all transform stripes. An example of the corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold and italic fonts in Table 27. It is worth noting that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have a maximum value. For example, u(n) (using an unsigned integer of n bits) or f(n) (using a fixed pattern bit string of n bits written starting from the left bit (from left to right)) can also be used to encode / decode the same syntax element.

[0197] Sequence Parameter Set RBSP Syntax

[0198] Table 27 Syntax of residual codec

[0199]

[0200] sps_residual_coding_info_present_in_sh_flag equal to 1 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx may be present in the SH syntax structure referencing the SPS. sps_residual_coding_info_present_in_sh_flag equal to 0 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx are not present in the SH syntax structure referencing the SPS. When sps_residual_coding_info_present_in_sh_flag is not present, the value of sps_residual_coding_info_present_in_sh_flag is inferred to be equal to 0.

[0201] Strip Header Syntax

[0202] Table 28 Syntax of residual codec

[0203]

[0204] sh_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_shift is not present, the value of sh_residual_coding_rice_shift is inferred to be equal to 0.

[0205] sh_residual_coding_rice_offset specifies the offset parameter used for the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_offset does not exist, the value of sh_residual_coding_rice_offset is inferred to be equal to 0.

[0206] sh_ts_residual_coding_rice_idx specifies the Rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_index does not exist, the value of sh_ts_residual_coding_rice_index is inferred to be equal to 0.

[0207] Table 29 Rice parameter derivation process

[0208]

[0209] Table 30 Rice parameter derivation process

[0210]

[0211] In another example, one syntax element for indicating the Rice parameters of the stripe is signaled for each transform skipped stripe, and two syntax elements for indicating the shift and / or offset parameters for deriving the Rice parameters of the stripe are signaled for each transform stripe. An example of a corresponding decoding process based on the VVC draft is shown below. Changes to the VVC draft are shown in bold and italics in Table 31. It is worth noting that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have a maximum value. For example, u(n) (using an unsigned integer of n bits) or f(n) (using a fixed pattern bit string of n bits written starting from the left bit (from left to right)) can also be used to encode / decode the same syntax element.

[0212] Strip Header Syntax

[0213] Table 31 Syntax of residual codec

[0214]

[0215]

[0216] sh_ts_residual_coding_rice_idx specifies the Rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_idx does not exist, the value of sh_ts_residual_coding_rice_idx is inferred to be equal to 0.

[0217] sh_residual_coding_rice_offset specifies the offset parameter used for the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_offset does not exist, the value of sh_residual_coding_rice_offset is inferred to be equal to 0.

[0218] sh_ts_residual_coding_rice_idx specifies the Rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_index does not exist, the value of sh_ts_residual_coding_rice_index is inferred to be equal to 0.

[0219] Table 32 Rice parameter derivation process

[0220]

[0221] Table 33 Rice parameter derivation process

[0222]

[0223]

[0224] In yet another example, a control flag is signaled in the picture parameter set range extension syntax to indicate whether to enable or disable the signaling of Rice parameters for transform skip blocks and the signaling of shift and / or offset parameters for deriving Rice parameters in transform blocks. When the control flag is signaled as enabled, a syntax element for indicating Rice parameters for transform skip residual codec for the picture is further signaled, and two syntax elements for indicating shift and / or offset parameters for deriving Rice parameters for conventional residual codec for the picture are further signaled. When the control flag is signaled as disabled (e.g., set to equal "0"), the syntax element for indicating Rice parameters for transform skip residual codec is not further signaled at a lower level, and the default Rice parameters (e.g., 1) are used for all transform skip residual codecs, and the syntax element for indicating shift and / or offset parameters for deriving Rice parameters for conventional residual codec is not further signaled at a lower level, and the default shift and / or offset parameters (e.g., 0) are used for all conventional residual codecs. An example of the corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold and italics in Table 34. It is worth noting that pps_residual_coding_rice_shift, pps_residual_coding_rice_offset, and pps_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have a maximum value. For example, u(n) (using an unsigned integer of n bits) or f(n) (using a fixed pattern bit string of n bits written starting from the left bit (from left to right)) can also be used to encode / decode the same syntax element.

[0225] Picture Parameter Set Range Extension Syntax

[0226] Table 34 Syntax of residual coding and decoding

[0227]

[0228] pps_residual_coding_info_flag equal to 1 specifies that pps_residual_coding_rice_shift, pps_residual_coding_rice_offset, and pps_ts_residual_coding_rice_index may be present in the current picture. pps_residual_coding_info_flag equal to 0 specifies that pps_residual_coding_rice_shift, pps_residual_coding_rice_offset, and pps_ts_residual_coding_rice_idx are not present in the current picture. When pps_residual_coding_info_flag is not present, the value of pps_residual_coding_info_flag is inferred to be equal to 0.

[0229] pps_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When pps_residual_coding_rice_shift is not present, the value of pps_residual_coding_rice_shift is inferred to be equal to 0.

[0230] pps_residual_coding_rice_offset specifies the offset parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When pps_residual_coding_rice_offset does not exist, the value of pps_residual_coding_rice_offset is inferred to be equal to 0.

[0231] pps_ts_residual_coding_rice_idx specifies the Rice parameter used for the residual_ts_coding() syntax structure. When pps_ts_residual_coding_rice_index does not exist, the value of pps_ts_residual_coding_rice_index is inferred to be equal to 0.

[0232] Table 35 Rice parameter derivation process

[0233]

[0234] Table 36 Rice parameter derivation process

[0235]

[0236]

[0237] According to the twenty-ninth aspect of the present disclosure, it is proposed to use different Rice parameters to encode and decode specific syntax elements (e.g., abs_remainder) in transform skip residual coding and decoding, and shift and offset parameters of Rice parameters used to derive abs_remainder / dec_abs_level used for conventional residual coding and decoding, and determine which syntax element to use based on specific coding information of the current block (e.g., quantization parameter or coding bit depth associated with TB / CB and / or slice / profile) and / or based on a new flag associated with TB / CB / slice / picture / sequence level (e.g., sps_residual_coding_info_present_in_sh_flag).

[0238] In one example, a control flag is signaled in a slice header to indicate whether to enable or disable the derivation process of Rice parameters for transform skip blocks and the derivation process of shift and / or offset parameters for Rice parameters in transform blocks. When the control flag is signaled as enabled, the Rice parameters may be different under different conditions according to the specific coding information of the current block (e.g., quantization parameter and bit depth). And the shift and / or offset parameters used to derive Rice parameters in conventional residual coding may be different under different conditions according to the specific coding information of the current block (e.g., quantization parameter and bit depth). When the control flag is signaled as disabled (e.g., set to equal "0"), default Rice parameters (e.g., 1) are used for all transform skip slices, and default shift and / or offset parameters (e.g., 0) are used for all transform slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH A and TH B is a predefined threshold (e.g., TH A =8, TH B =18 or 19). The changes to the VVC draft are shown in bold and italics in Table 37. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0239] Strip Header Syntax

[0240] Table 37 Syntax of residual codec

[0241]

[0242] sh_residual_coding_rice_flag equal to 1 specifies that the bit-depth dependent Rice parameter derivation process is used in the current slice. sh_residual_coding_rice_flag equal to 0 specifies that the bit-depth dependent Rice parameter derivation process is not used in the current slice.

[0243] Table 38 Rice parameter derivation process

[0244]

[0245]

[0246] Table 39 Rice parameter derivation process

[0247]

[0248] In yet another example, the corresponding decoding process based on the VVC draft is as follows, where TH is a predefined threshold (e.g., 18, 19). The changes to the VVC draft are shown in bold and italics in Table 40. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same Rice parameters.

[0249] Table 40 Rice parameter derivation process

[0250]

[0251]

[0252] According to another aspect of the present disclosure, it is proposed to add constraints on the values ​​of the above-mentioned codec tool flags to provide the same general constraint control as other general constraint controls in the general constraint information.

[0253] For example, sps_ts_residual_coding_rice_present_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx may be present in the SH syntax structure of the reference SPS. sps_ts_residual_coding_rice_present_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx does not exist in the SH syntax structure of the reference SPS. According to the present disclosure, it is proposed to add a syntax element gci_no_ts_residual_coding_rice_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.

[0254]

[0255]

[0256] In another example, pps_ts_residual_coding_rice_flag equal to 1 specifies that pps_ts_residual_coding_rice_index may be present in the current picture. pps_ts_residual_coding_rice_flag equal to 0 specifies that pps_ts_residual_coding_rice_idx does not exist in the current picture. According to the present disclosure, it is proposed to add a syntax element gci_no_ts_residual_coding_rice_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.

[0257]

[0258]

[0259] In yet another example, sps_rice_adaptation_enabled_flag equal to 1 indicates that the Rice parameters used for binarizing abs_remainder[ ] and dec_abs_level can be derived by a formula.

[0260] The formula may include: RiceParam = RiceParam + ShiftVal, and ShiftVal = (localSumAbs < Tx[0])? Rx[0] : ((localSumAbs < Tx[1])? Rx[1] : ((localSumAbs < Tx[2])? Rx[2] : ((localSumAbs < Tx[3])? Rx[3] : Rx[4]))), where the lists Tx[] and Rx[] are specified as follows: Tx[] = {32, 128, 512, 2048}>>(1523) Rx[] = {0, 2, 4, 6, 8}.

[0261] According to the present disclosure, it is proposed to add a syntax element gci_no_rice_adaptation_constraint_flag to the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process of the VVC draft is shown below. The changes to the VVC draft are highlighted. The added parts are highlighted in italic font.

[0262]

[0263]

[0264]

[0265] Since the proposed Rice parameter adaptation scheme is only used for transform skip residual coding and decoding (TSRC), the proposed method is only effective when TSRC is enabled. Therefore, in one or more embodiments of the present disclosure, it is proposed to add a bitstream constraint when the transform skip mode is disabled according to the general constraint information level (for example, when the value of gci_no_transform_skip_constraint_flag is set to 1), and this bitstream constraint requires the value of gci_no_rice_adaptation_constraint_flag to be 1.

[0266] In yet another example, sps_range_extension_flag equal to 1 specifies that the sps_range_extension() syntax structure is present in the SPS RBSP syntax structure. sps_range_extension_flag equal to 0 specifies that this syntax structure is not present. According to the present disclosure, it is proposed to add a syntax element gci_no_range_extension_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.

[0267]

[0268]

[0269] Fig. 9 A method for video coding and decoding according to an example of the present disclosure is shown. The method may be applied, for example, to a decoder. In step 1902, the decoder may receive a sequence parameter set (SPS) range extension flag, the SPS range extension flag indicating whether a syntax structure sps_range_extension exists in a slice header (SH) raw byte sequence payload (RBSP) syntax structure based on a value of the SPS range extension flag.

[0270] In step 1904 , in response to determining that the value of the SPS range extension flag is equal to 1, the decoder may determine that sps_range_extension is present in the SH RBSP syntax structure.

[0271] In step 1906 , in response to determining that the value of the SPS range extension flag is equal to 0, the decoder may determine that sps_range_extension is not present in the SH RBSP syntax structure.

[0272] In yet another example, sps_cabac_bypass_alignment_enabled_flag equal to 1 specifies that the value of ivlCurrRange may be aligned before bypass encoding of the syntax elements sb_coded_flag[][], abs_remaind[], dec_abs_level[n], and coeff_sign_flag[]. sps_cabac_bypass_alignment_enabled_flag equal to 0 specifies that the value of ivlCurrRange is not aligned before bypass encoding. According to the present disclosure, it is proposed to add a syntax element gci_no_cabac_bypass_alignment_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process in the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.

[0273]

[0274]

[0275]

[0276] Fig.10 A method for video coding and decoding according to an example of the present disclosure is shown. The method may be applied, for example, to a decoder. In step 2002, the decoder may receive a sequence parameter set (SPS) alignment enable flag, the SPS alignment enable flag indicating whether to align the index ivlCurrRange before bypass decoding the syntax elements sb_coded_flag, abs_remainder, dec_abs_level, and coeff_sign_flagn based on the value of the SPS alignment enable flag.

[0277] In step 2004, in response to determining that the value of the SPS alignment enable flag is equal to 1, the decoder may determine to align the ivlCurrRange before bypass decoding.

[0278] In step 2006, in response to determining that the value of the SPS alignment enable flag is equal to 0, the decoder may determine not to align ivlCurrRange prior to bypass decoding.

[0279] In yet another example, extended_precision_processing_flag equal to 1 specifies that extended dynamic range can be used for transform coefficients and transform processing. extended_precision_processing_flag equal to 0 specifies that extended dynamic range is not used. According to the present disclosure, it is proposed to add a syntax element gci_no_extended_precision_processing_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process in the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.

[0280]

[0281]

[0282] Fig.11 A method for video encoding and decoding according to an example of the present disclosure is shown. The method may be applied, for example, to a decoder. In step 2102, the decoder may receive an extended precision processing flag, the extended precision processing flag indicating whether an extended dynamic range is used for a transform coefficient and during a transform process based on a value of the extended precision processing flag.

[0283] In step 2104 , in response to determining that the value of the extended precision processing flag is equal to 1, the decoder may determine to employ an extended dynamic range for the transform coefficients and during the transform process.

[0284] In step 2106 , in response to determining that the value of the extended precision processing flag is 0, the decoder may determine not to employ extended dynamic range for transform coefficients or during transform processing.

[0285] In another example, persistent_rice_adaptation_enabled_flag is equal to 1 to specify that the Rice parameter derivation for binarization abs_remainder[] and dec_abs_level can be initialized at the beginning of each sub-block using the pattern-related statistics accumulated from the previous sub-block. persistent_rice_adaptation_enabled_flag is equal to 0 to specify that the previous sub-block state is not used in the Rice parameter derivation. According to the present disclosure, it is proposed to add a syntax element gci_no_persistent_rice_adaptation_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process in the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.

[0286]

[0287]

[0288] Fig.12 A method for video encoding and decoding according to an example of the present disclosure is shown. The method can be applied, for example, to a decoder. In step 2202, the decoder can receive a continuous Rice adaptive enable flag, which indicates whether the Rice parameter derivation for binarization abs_remainder and dec_abs_level is initialized at the beginning of each sub-block using the mode-related statistics accumulated from the previous sub-block based on the value of the continuous Rice adaptive enable flag.

[0289] In step 2204, in response to determining that the value of the continuous Rice adaptation enable flag is equal to 1, the decoder can determine to initialize the Rice parameter derivation for binarization using the pattern-related statistics accumulated from the previous sub-block at the beginning of each sub-block.

[0290] In step 2206, in response to determining that the value of the continuous Rice adaptation enable flag is 0, the decoder can determine not to adopt the previous sub-block state in Rice parameter derivation.

[0291] In another example, sps_rrc_rice_extension_flag equal to 1 specifies that the extension of Rice parameter derivation for binarization abs_remainder[] and dec_abs_level[] is enabled. sps_rrc_rice_extension_flag equal to 0 specifies that the extension of Rice parameter derivation for binarization abs_remainder[] and dec_abs_level[] is disabled. According to the present disclosure, it is proposed to add a syntax element gci_no_rrc_rice_extension_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are shown in italics below.

[0292]

[0293]

[0294] Fig.17 A method for video decoding according to an example of the present disclosure is shown. The method can be applied to a decoder, for example. In step 2702, the decoder can receive an SPS Rice extension flag indicating whether to enable an extension of Rice parameter derivation for binarization abs_remainder and dec_abs_level.

[0295] In step 2704, in response to determining that the value of the SPS Rice extension flag is equal to 1, the decoder may determine to enable an extension for Rice parameter derivation for binarization.

[0296] In step 2706, in response to determining that the value of the SPS Rice extension flag is equal to 0, the decoder may determine to disable the extension for derivation of Rice parameters for binarization.

[0297] In another example, sps_persistent_rice_adaptation_enabled_flag equal to 1 specifies that the Rice parameter derivation for binarization abs_remainder[] and dec_abs_level[] is initialized at the beginning of each TU using the statistical data accumulated from the previous TU. sps_persistent_rice_adaptation_enabled_flag equal to 0 specifies that the previous TU state is not used in the Rice parameter derivation. According to the present disclosure, it is proposed to add a syntax element gci_no_persistent_rice_adaptation_enabled_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are shown in italics below.

[0298]

[0299]

[0300] Fig.18 A method for video decoding according to an example of the present disclosure is shown. The method can be applied to a decoder, for example. In step 2802, the decoder can receive an SPS Rice adaptive enable flag indicating whether to initialize the Rice parameter derivation for binarization abs_remainder and dec_abs_level using the statistics accumulated from the previous TU at the beginning of each transform unit.

[0301] In step 2804, in response to determining that the value of the SPS Rice adaptation enable flag is equal to 1, the decoder may determine to initialize Rice parameter derivation for binarization at the beginning of each TU using statistics accumulated from previous TUs.

[0302] In step 2806, in response to determining that the value of the SPS Rice adaptation enable flag is equal to 0, the decoder can determine that the previous TU state is not used in Rice parameter derivation.

[0303] The above method can be implemented using an apparatus including one or more circuits, including an application specific integrated circuit (ASIC), a digital signal processor (DSP), a digital signal processing device (DSPD), a programmable logic device (PLD), a field programmable gate array (FPGA), a controller, a microcontroller, a microprocessor or other electronic components. The apparatus can use circuits combined with other hardware or software components to perform the above method. Each module, submodule, unit or subunit disclosed above can be implemented at least in part using one or more circuits.

[0304] Rice parameter decision

[0305] On the encoder side, TSRC encoding may require multiple encoding channels to derive optimal Rice parameters. This multi-channel encoding may not be suitable for actual hardware encoder design. In order to solve this problem, a low-latency TSRC encoding method is also proposed. According to the thirtieth aspect of the present disclosure, it is proposed to derive Rice parameters based on specific encoding information of the current strip (for example, quantization parameters and / or encoding bit depth associated with the strip / picture / sequence) and / or based on the hash rate associated with the strip / picture / sequence level. Different methods can be used to derive Rice parameters, some of which are listed below. It should be noted that the following methods can be applied independently or jointly.

[0306] 1. The Rice parameters mentioned in the above embodiments may additionally depend on the video resolution, including both the temporal resolution (e.g., frame rate) and spatial resolution (e.g., picture width and height) of the video.

[0307] 2. Rice parameters can vary at the sequence level, picture level, slice level and / or any predefined area. In a specific example, different Rice values ​​are used for pictures with different temporal layer IDs (which are related to nuh_temporal_id_plus1 specified in the VVC specification). Optionally, Rice parameters may include values ​​determined based on the QP values ​​used at the sequence level, picture level, slice level and / or any predefined area. For example, Rice parameter = Clip3 (1, 8, (TH-QP) / 6), where TH is a predefined threshold (e.g., 18, 19).

[0308] 3. The Rice parameter can be set to a default value, such as 1, according to the change in coding information between the current slice and the previous slice. In a specific example, when the temporal layer ID of a picture changes compared to the previous picture, a default Rice value is used for the picture. Optionally, when ΔQ is greater than TH, a default Rice value is used for the picture, where ΔQ is calculated as abs(QPcurrent-QPprevious) and TH is a predefined threshold. Rice parameter (e.g., 0.5). For example, when the hash rate of the intra-block copy mode in the current slice is greater than TH, the Rice parameter = 1, where TH is a predefined threshold, such as Max(41×(number of CTUs), 4200).

[0309] 4. Determine the Rice parameter for each stripe based on the value of abs_remainder encoded in the previous stripe of each stripe according to the coding order. In a specific example, after encoding a stripe, the number of binary bits used to binarize abs_remainder using different Rice parameters is calculated, and the number of binary bits is then used to determine the Rice parameter of the subsequent stripe. For example, the Rice parameter that achieves the minimum number of binary bits in the previous stripe will be selected for the current segment. For another example, if the current stripe and its previous stripe use the same QP, the Rice parameter that achieves the minimum number of binary bits in the previous stripe will be selected for the current stripe; otherwise, before comparing with other Rice parameters, the number of binary bits generated using the default Rice parameter (i.e., 1) in the previous stripe will be scaled by TH, and the Rice parameter that results in the minimum number of binary bits will be selected for the current stripe, where TH is a predefined threshold, such as 0.9.

[0310] 5. The Rice parameter for each stripe is determined based on the value of abs_remainder encoded in the previous stripe of each stripe according to the coding order, and the Rice parameter can be adjusted according to the change of the coding information between the current stripe and the previous stripe. In a specific example, the Rice parameter that achieves the minimum number of binary bits in the previous stripe will be selected for the current stripe. And when ΔQ is greater than TH, the Rice value can be adjusted, where ΔQ is calculated as abs(QPcurrent-QPprevious), and TH is a predefined threshold. Rice parameter (e.g., 0.5). The adjustment can be to add a predefined offset (e.g., +1, -1) or to scale by a predefined value.

[0311] Fig.16 A flowchart of a low-delay transform skip residual coding (TSRC) method according to an example of the present disclosure is shown. The method can be applied to an encoder, for example. In step 2602, the encoder can derive Rice parameters based on encoding information of a current strip of the video. The encoding information may include one or more of the following parameters: a quantization parameter or encoding bit depth associated with a strip, picture, or sequence of the video in step S2604; or a hash rate associated with a strip, picture, or sequence of the video in step S2606.

[0312] It should be noted that the above encoder method can be applied to the decoder side. In a specific example, the Rice parameters do not need to be sent to the decoder with a signal, and the encoder / decoder uses the same method to derive the Rice parameters.

[0313] Figure 8A computing environment 1810 coupled to a user interface 1860 is shown. The computing environment 1810 may be part of a data processing server. The computing environment 1810 includes a processor 1820, a memory 1840, and an I / O interface 1850.

[0314] The processor 1820 generally controls the overall operation of the computing environment 1810, such as operations associated with display, data acquisition, data communication, and image processing. The processor 1820 may include one or more processors to execute instructions to perform all or some steps in the method described above. In addition, the processor 1820 may include one or more modules that facilitate the interaction between the processor 1820 and other components. The processor may be a central processing unit (CPU), a microprocessor, a single-chip microcomputer, a GPU, etc.

[0315] The memory 1840 is configured to store various types of data to support the operation of the computing environment 1810. The memory 1840 may include predetermined software 1842. Examples of such data include instructions for any application or method operating on the computing environment 1810, video data sets, image data, etc. The memory 1840 may be implemented by using any type of volatile or non-volatile memory device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0316] The I / O interface 1850 provides an interface between the processor 1820 and peripheral interface modules such as a keyboard, a click wheel, buttons, etc. The buttons may include, but are not limited to, a home button, a start scan button, and a stop scan button. The I / O interface 1850 may be coupled to an encoder and a decoder.

[0317] In some embodiments, a non-transitory computer-readable storage medium is also provided, which includes a plurality of programs, such as included in the memory 1840, executable by the processor 1820 in the computing environment 1810, for performing the method described above. For example, the non-transitory computer-readable storage medium may be a ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.

[0318] A non-transitory computer-readable storage medium stores a plurality of programs, which are executed by a computing device having one or more processors, wherein the plurality of programs, when executed by the one or more processors, causes the computing device to perform the method for motion prediction described above.

[0319] In some embodiments, the computing environment 1810 can be implemented using one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), graphics processing units (GPUs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above methods.

[0320] Fig.13 is a block diagram illustrating an exemplary system 10 for encoding and decoding video blocks in parallel according to some embodiments of the present disclosure. Fig.13 As shown in , system 10 includes a source device 12 that generates and encodes video data to be later decoded by a destination device 14. Source device 12 and destination device 14 may include any of a wide variety of electronic devices, including desktop or laptop computers, tablet computers, smart phones, set-top boxes, digital televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some implementations, source device 12 and destination device 14 are equipped with wireless communication capabilities.

[0321] In some embodiments, the target device 14 may receive the encoded video data to be decoded via the link 16. The link 16 may include any type of communication medium or device capable of moving the encoded video data from the source device 12 to the target device 14. In one example, the link 16 may include a communication medium that enables the source device 12 to directly send the encoded video data to the target device 14 in real time. The encoded video data may be modulated according to a communication standard (such as a wireless communication protocol) and sent to the target device 14. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form a portion of a packet-based network (such as a local area network, a wide area network, or a global network, such as the Internet). The communication medium may include a router, a switch, a base station, or any other equipment that may be beneficial to facilitate communication from the source device 12 to the target device 14.

[0322] In some other embodiments, the encoded video data may be sent from the output interface 22 to the storage device 32. Subsequently, the encoded video data in the storage device 32 may be accessed by the target device 14 via the input interface 28. The storage device 32 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, a Blu-ray disc, a digital versatile disc (DVD), a compact disc read-only memory (CD-ROM), a flash memory, a volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data. In a further example, the storage device 32 may correspond to a file server or another intermediate storage device that may retain the encoded video data generated by the source device 12. The target device 14 may access the stored video data from the storage device 32 via streaming or downloading. The file server may be any type of computer capable of storing encoded video data and sending the encoded video data to the target device 14. Exemplary file servers include a web server (e.g., for a website), a file transfer protocol (FTP) server, a network attached storage (NAS) device, or a local disk drive. Target device 14 may access the encoded video data through any standard data connection suitable for accessing encoded video data stored on a file server, including a wireless channel (e.g., a Wireless Fidelity (Wi-Fi) connection), a wired connection (e.g., a Digital Subscriber Line (DSL), a cable modem, etc.), or a combination of both. The transmission of the encoded video data from storage device 32 may be a streaming transmission, a download transmission, or a combination of both.

[0323] like Fig.13 As shown in , source device 12 includes video source 18, video encoder 20 and output interface 22. Video source 18 may include sources such as or a combination of such sources: a video capture device (e.g., a camera), a video archive containing previously captured video, a video feed interface for receiving video from a video content provider, and / or a computer graphics system for generating computer graphics data as source video. As an example, if video source 18 is a camera of a security monitoring system, source device 12 and target device 14 may form a camera phone or a video phone. However, the embodiments described in the present application may be generally applicable to video encoding and decoding, and may be applied to wireless and / or wired applications.

[0324] Captured, pre-captured or computer-generated video may be encoded by video encoder 20. The encoded video data may be sent directly to target device 14 via output interface 22 of source device 12. The encoded video data may also (or alternatively) be stored on storage device 32 for later access by target device 14 or other devices for decoding and / or playback. Output interface 22 may further include a modem and / or a transmitter.

[0325] Target device 14 includes input interface 28, video decoder 30, and display device 34. Input interface 28 may include a receiver and / or a modem and receives encoded video data via link 16. The encoded video data communicated via link 16 or provided on storage device 32 may include various syntax elements generated by video encoder 20 for use by video decoder 30 in decoding the video data. Such syntax elements may be included in the encoded video data sent over a communication medium, stored on a storage medium, or stored on a file server.

[0326] In some implementations, the target device 14 may include a display device 34, which may be an integrated display device and an external display device configured to communicate with the target device 14. The display device 34 displays the decoded video data to a user and may include any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0327] The video encoder 20 and the video decoder 30 can operate according to a proprietary standard or an industry standard (such as VVC, HEVC, MPEG-4, Part 10, AVC) or an extension of such a standard. It should be understood that the present application is not limited to a specific video encoding / decoding standard and can be applied to other video encoding / decoding standards. It is generally believed that the video encoder 20 of the source device 12 can be configured to encode video data according to any standard in these current standards or future standards. Similarly, it is also generally believed that the video decoder 30 of the target device 14 can be configured to decode video data according to any standard in these current standards or future standards.

[0328] The video encoder 20 and the video decoder 30 may be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When partially implemented in software, the electronic device may store instructions for the software in a suitable non-transitory computer-readable medium, and use one or more processors to execute the instructions in the hardware to perform the video encoding / decoding operations disclosed in the present disclosure. Each of the video encoder 20 and the video decoder 30 may be included in one or more encoders or decoders, and either of the encoders or decoders may be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device.

[0329] Fig.14 is a block diagram illustrating an exemplary video encoder 20 according to some embodiments described in the present application. The video encoder 20 can perform intra-frame prediction encoding and inter-frame prediction encoding of video blocks within a video frame. Intra-frame prediction encoding relies on spatial prediction to reduce or remove spatial redundancy in video data within a given video frame or picture. Inter-frame prediction encoding relies on temporal prediction to reduce or remove temporal redundancy in video data within adjacent video frames or pictures of a video sequence. It should be noted that the term "frame" can be used as a synonym for the term "image" or "picture" in the field of video coding and decoding.

[0330] like Fig.14 As shown in , the video encoder 20 includes a video data memory 40, a prediction processing unit 41, a decoded picture buffer (DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy coding unit 56. The prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a segmentation unit 45, an intra-frame prediction processing unit 46, and an intra-frame block copy (BC) unit 48. In some embodiments, the video encoder 20 also includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for video block reconstruction. A loop filter 63 (such as a deblocking filter) can be located between the adder 62 and the DPB 64 to filter the block boundary to remove the block effect from the reconstructed video. In addition to the deblocking filter, another loop filter (such as a sample adaptive offset (SAO) filter and / or an adaptive loop filter (ALF)) can also be used to filter the output of the adder 62. In some examples, the loop filter may be omitted and the decoded video blocks may be provided by summer 62 directly to DPB 64. Video encoder 20 may take the form of a fixed or programmable hardware unit, or may be distributed among one or more of the illustrated fixed or programmable hardware units.

[0331] Video data memory 40 may store video data to be encoded by components of video encoder 20. The video data in video data memory 40 may be obtained, for example, from Fig.13 The video data memory 40 and the DPB 64 are obtained from the video source 18 shown. The DPB 64 is a buffer that stores reference video data (e.g., reference frames or reference pictures) for use by the video encoder 20 (e.g., in intra-frame or inter-frame prediction coding mode) when encoding video data. The video data memory 40 and the DPB 64 can be formed by any of a variety of memory devices. In various examples, the video data memory 40 can be on-chip with other components of the video encoder 20, or off-chip relative to those components.

[0332] like Fig.14As shown in , after receiving the video data, the segmentation unit 45 within the prediction processing unit 41 segments the video data into video blocks. This segmentation may also include segmenting the video frame into strips, tiles (e.g., sets of video blocks), or other larger coding units (CUs) according to a predefined splitting structure associated with the video data, such as a quadtree (QT) structure. A video frame is or may be considered as a two-dimensional array or matrix of samples having sample values. The samples in the array may also be referred to as pixels or pels. The number of samples in the horizontal and vertical directions (or axes) of the array or picture defines the size and / or resolution of the video frame. A video frame may be divided into a plurality of video blocks, for example, by using QT segmentation. Although the size of a video block is smaller than a video frame, a video block is also or may be considered as a two-dimensional array or matrix of samples having sample values. The number of samples in the horizontal and vertical directions (or axes) of a video block defines the size of the video block. The video block may be further partitioned into one or more block partitions or sub-blocks (which may again form blocks) by, for example, iteratively using QT partitioning, binary tree (BT) partitioning or ternary tree (TT) partitioning or any combination thereof. It should be noted that the term "block" or "video block" used herein may be a portion of a frame or picture, in particular a rectangular (square or non-square) portion. For example, with reference to HEVC and VVC, a block or video block may be or correspond to a coding tree unit (CTU), a CU, a prediction unit (PU) or a transform unit (TU), and / or may be or correspond to a corresponding block, for example, a coding tree block (CTB), a coding block (CB), a prediction block (PB) or a transform block (TB) and / or a sub-block.

[0333] The prediction processing unit 41 may select one of a plurality of possible prediction coding modes for the current video block based on the error results (e.g., coding rate and distortion level), such as one of one or more inter-frame prediction coding modes in a plurality of intra-frame prediction coding modes. The prediction processing unit 41 may provide the resulting intra-frame prediction coding block or inter-frame prediction coding block to the adder 50 to generate a residual block, and to the adder 62 to reconstruct the coded block for subsequent use as part of a reference frame. The prediction processing unit 41 also provides syntax elements (such as motion vectors, intra-frame mode indicators, partition information, and other such syntax information) to the entropy coding unit 56.

[0334] To select an appropriate intra-prediction coding mode for the current video block, intra-prediction processing unit 46 within prediction processing unit 41 may perform intra-prediction coding of the current video block relative to one or more neighboring blocks in the same frame as the current block to be encoded to provide spatial prediction. Motion estimation unit 42 and motion compensation unit 44 within prediction processing unit 41 perform inter-prediction coding of the current video block relative to one or more prediction blocks in one or more reference frames to provide temporal prediction. Video encoder 20 may perform multiple encoding passes, for example, to select an appropriate coding mode for each block of video data.

[0335] In some embodiments, the motion estimation unit 42 determines the inter-prediction mode for the current video frame by generating a motion vector according to a predetermined pattern within the sequence of video frames, the motion vector indicating the displacement of a video block within the current video frame relative to a prediction block within a reference video frame. Motion estimation performed by the motion estimation unit 42 is the process of generating motion vectors, which estimate the motion for a video block. The motion vector may, for example, indicate the displacement of a video block within the current video frame or picture relative to a prediction block within a reference frame, the prediction block being relative to a current block being encoded within the current frame. The predetermined pattern may designate the video frames in the sequence as P frames or B frames. The intra BC unit 48 may determine a vector (e.g., a block vector) for intra BC coding in a manner similar to how the motion estimation unit 42 determines motion vectors for inter prediction, or may utilize the motion estimation unit 42 to determine the block vector.

[0336] In terms of pixel differences, the prediction block for the video block may be or may correspond to a block or reference block of a reference frame that is considered to closely match the video block to be encoded, and the pixel differences may be determined by the sum of absolute differences (SAD), the sum of squared differences (SSD), or other difference metrics. In some embodiments, the video encoder 20 may calculate values ​​for sub-integer pixel positions of the reference frame stored in the DPB 64. For example, the video encoder 20 may interpolate values ​​for quarter-pixel positions, eighth-pixel positions, or other fractional pixel positions of the reference frame. Thus, the motion estimation unit 42 may perform a motion search relative to full pixel positions and fractional pixel positions, and output a motion vector with fractional pixel accuracy.

[0337] Motion estimation unit 42 calculates a motion vector for a video block in an inter-prediction encoded frame by comparing the position of the video block to the position of a prediction block of a reference frame selected from a first reference frame list (List 0) or a second reference frame list (List 1), each of which identifies one or more reference frames stored in DPB 64. Motion estimation unit 42 sends the calculated motion vector to motion compensation unit 44 and then to entropy encoding unit 56.

[0338] The motion compensation performed by the motion compensation unit 44 may involve extracting or generating a prediction block based on the motion vector determined by the motion estimation unit 42. Upon receiving the motion vector for the current video block, the motion compensation unit 44 may locate the prediction block pointed to by the motion vector in one of the reference frame lists, retrieve the prediction block from the DPB 64, and forward the prediction block to the adder 50. The adder 50 then forms a residual video block of pixel difference values ​​by subtracting the pixel values ​​of the prediction block provided by the motion compensation unit 44 from the pixel values ​​of the current video block being encoded. The pixel difference values ​​forming the residual video block may include a luminance difference component or a chrominance difference component or both. The motion compensation unit 44 may also generate syntax elements associated with the video block of the video frame for use by the video decoder 30 when decoding the video block of the video frame. The syntax elements may include, for example, syntax elements defining a motion vector for identifying the prediction block, any flag indicating a prediction mode, or any other syntax information described herein. Note that the motion estimation unit 42 and the motion compensation unit 44 may be highly integrated, but are described separately for conceptual purposes.

[0339] In some embodiments, the intra BC unit 48 may generate vectors and extract prediction blocks in a manner similar to that described above in conjunction with the motion estimation unit 42 and the motion compensation unit 44, but these prediction blocks are in the same frame as the current block being encoded, and these vectors are referred to as block vectors rather than motion vectors. Specifically, the intra BC unit 48 may determine the intra prediction mode to be used to encode the current block. In some examples, the intra BC unit 48 may encode the current block using various intra prediction modes, for example, during multiple separate encoding passes, and test their performance through rate-distortion analysis. Next, the intra BC unit 48 may select a suitable intra prediction mode to use among the various tested intra prediction modes, and generate an intra mode indicator accordingly. For example, the intra BC unit 48 may calculate rate-distortion values ​​for various tested intra prediction modes using rate-distortion analysis, and select an intra prediction mode with the best rate-distortion characteristics among the tested modes as a suitable intra prediction mode to use. The rate-distortion analysis typically determines the amount of distortion (or error) between a coded block and the original uncoded block that was coded to produce the coded block, and the bit rate (i.e., the number of bits) used to produce the coded block. The intra BC unit 48 may calculate a ratio from the distortion and rate for the various coded blocks to determine which intra-prediction mode exhibits the best rate-distortion value for the block.

[0340] In other examples, intra BC unit 48 may use, in whole or in part, motion estimation unit 42 and motion compensation unit 44 to perform such functions for intra BC prediction in accordance with embodiments described herein. In either case, for intra block copying, the prediction block may be a block that is considered to closely match the block to be encoded in terms of pixel differences, which may be determined by SAD, SSD, or other difference metrics, and identification of the prediction block may include calculating values ​​for sub-integer pixel positions.

[0341] Regardless of whether the prediction block is from the same frame according to intra-frame prediction or from a different frame according to inter-frame prediction, the video encoder 20 can form a residual video block by subtracting the pixel values ​​of the prediction block from the pixel values ​​of the current video block being encoded. The pixel difference values ​​forming the residual video block may include both luma component differences and chroma component differences.

[0342] As an alternative to the inter-frame prediction performed by the motion estimation unit 42 and the motion compensation unit 44 or the intra-frame block copy prediction performed by the intra BC unit 48 as described above, the intra-frame prediction processing unit 46 can perform intra-frame prediction on the current video block. Specifically, the intra-frame prediction processing unit 46 can determine the intra-frame prediction mode for encoding the current block. To do so, the intra-frame prediction processing unit 46 can encode the current block using various intra-frame prediction modes, for example during multiple separate encoding passes, and the intra-frame prediction processing unit 46 (or in some examples, the mode selection unit) can select a suitable intra-frame prediction mode to use from the tested intra-frame prediction modes. The intra-frame prediction processing unit 46 can provide information indicating the intra-frame prediction mode selected for the block to the entropy coding unit 56. The entropy coding unit 56 can encode the information indicating the selected intra-frame prediction mode in the bitstream.

[0343] After prediction processing unit 41 determines a prediction block for the current video block via inter-prediction or intra-prediction, adder 50 forms a residual video block by subtracting the prediction block from the current video block. The residual video data in the residual block may be included in one or more TUs and provided to transform processing unit 52. Transform processing unit 52 transforms the residual video data into residual transform coefficients using a transform such as a discrete cosine transform (DCT) or a conceptually similar transform.

[0344] Transform processing unit 52 may send the resulting transform coefficients to quantization unit 54. Quantization unit 54 quantizes the transform coefficients to further reduce the bit rate. The quantization process may also reduce the bit depth associated with some or all of the coefficients. The degree of quantization may be modified by adjusting a quantization parameter. In some examples, quantization unit 54 may then perform a scan of the matrix including the quantized transform coefficients. Optionally, entropy encoding unit 56 may perform the scan.

[0345] After quantization, entropy coding unit 56 entropy encodes the quantized transform coefficients into a video bitstream using, for example, context adaptive variable length coding (CAVLC), context adaptive binary arithmetic coding (CABAC), syntax-based context adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding, or another entropy coding method or technique. The encoded bitstream may then be sent to a video bitstream such as Fig.13 The video decoder 30 shown in FIG. Fig.13 The video frame may be stored in storage device 32 as shown for later transmission to or retrieval by video decoder 30. Entropy encoding unit 56 may also entropy encode motion vectors and other syntax elements for the current video frame being encoded.

[0346] Inverse quantization unit 58 and inverse transform processing unit 60 apply inverse quantization and inverse transform, respectively, to reconstruct the residual video block in the pixel domain for use in generating reference blocks for predicting other video blocks. As noted above, motion compensation unit 44 may generate a motion compensated prediction block from one or more reference blocks of a frame stored in DPB 64. Motion compensation unit 44 may also apply one or more interpolation filters to the prediction block to calculate sub-integer pixel values ​​for use in motion estimation.

[0347] Adder 62 adds the reconstructed residual block to the motion compensated prediction block produced by motion compensation unit 44 to produce a reference block for storage in DPB 64. The reference block may then be used as a prediction block by intra BC unit 48, motion estimation unit 42, and motion compensation unit 44 to inter-predict another video block in a subsequent video frame.

[0348] Fig.15 30 is a block diagram showing an exemplary video decoder 30 according to some embodiments of the present application. The video decoder 30 includes a video data memory 79, an entropy decoding unit 80, a prediction processing unit 81, an inverse quantization unit 86, an inverse transform processing unit 88, an adder 90, and a DPB 92. The prediction processing unit 81 further includes a motion compensation unit 82, an intra-frame prediction unit 84, and an intra-frame BC unit 85. The video decoder 30 may perform the above-mentioned Fig.14 The encoding process described with respect to video encoder 20 is generally the inverse of the decoding process. For example, motion compensation unit 82 may generate prediction data based on motion vectors received from entropy decoding unit 80, while intra-prediction unit 84 may generate prediction data based on intra-prediction mode indicators received from entropy decoding unit 80.

[0349] In some examples, units of the video decoder 30 may be tasked to perform embodiments of the present application. In addition, in some examples, embodiments of the present disclosure may be dispersed in one or more of the multiple units of the video decoder 30. For example, the intra BC unit 85 may perform embodiments of the present application alone or in combination with other units of the video decoder 30 (such as the motion compensation unit 82, the intra prediction unit 84, and the entropy decoding unit 80). In some examples, the video decoder 30 may not include the intra BC unit 85, and the functions of the intra BC unit 85 may be performed by other components of the prediction processing unit 81 (such as the motion compensation unit 82).

[0350] The video data memory 79 may store video data, such as an encoded video bitstream, to be decoded by other components of the video decoder 30. The video data stored in the video data memory 79 may be obtained, for example, from the storage device 32, from a local video source (such as a camera), via a wired or wireless network communication of video data, or by accessing a physical data storage medium (e.g., a flash drive or hard disk). The video data memory 79 may include a codec picture buffer (CPB) that stores encoded video data from an encoded video bitstream. The DPB 92 of the video decoder 30 stores reference video data for use by the video decoder 30 when decoding the video data (e.g., in intra-frame or inter-frame prediction coding mode). The video data memory 79 and the DPB 92 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. For illustrative purposes, the video data memory 79 and the DPB 92 are shown in FIG. Fig.15 92 as two different components of the video decoder 30. However, it will be apparent to those skilled in the art that the video data memory 79 and the DPB 92 can be provided by the same memory device or separate memory devices. In some examples, the video data memory 79 can be on-chip with other components of the video decoder 30, or off-chip relative to those components.

[0351] During the decoding process, the video decoder 30 receives an encoded video bitstream, which represents video blocks of the encoded video frames and associated syntax elements. The video decoder 30 may receive syntax elements at the video frame level and / or the video block level. The entropy decoding unit 80 of the video decoder 30 entropy decodes the bitstream to generate quantization coefficients, motion vectors or intra-frame prediction mode indicators, and other syntax elements. The entropy decoding unit 80 then forwards the motion vectors or intra-frame prediction mode indicators and other syntax elements to the prediction processing unit 81.

[0352] When a video frame is encoded as an intra-frame prediction coded (I) frame or for intra-frame coded prediction blocks in other types of frames, the intra-frame prediction unit 84 of the prediction processing unit 81 can generate prediction data for a video block of the current video frame based on the intra-frame prediction mode sent by the signal and reference data from a previously decoded block of the current frame.

[0353] When the video frame is encoded as an inter-frame prediction coded (i.e., B or P) frame, the motion compensation unit 82 of the prediction processing unit 81 generates one or more prediction blocks for the video block of the current video frame based on the motion vector and other syntax elements received from the entropy decoding unit 80. Each of the prediction blocks can be generated from a reference frame in one of the reference frame lists. The video decoder 30 can construct the reference frame lists, List 0 and List 1, using a default construction technique based on the reference frames stored in the DPB 92.

[0354] In some examples, when the video block is encoded according to the intra BC mode described herein, intra BC unit 85 of prediction processing unit 81 generates a prediction block for the current video block based on the block vector and other syntax elements received from entropy decoding unit 80. The prediction block may be within a reconstructed region of the same picture as the current video block defined by video encoder 20.

[0355] The motion compensation unit 82 and / or the intra BC unit 85 determine prediction information for a video block of the current video frame by parsing the motion vector and other syntax elements, and then use the prediction information to generate a prediction block for the current video block being decoded. For example, the motion compensation unit 82 uses some of the received syntax elements to determine a prediction mode (e.g., intra prediction or inter prediction) for encoding a video block of a video frame, an inter prediction frame type (e.g., B or P), construction information for one or more reference frame lists in a reference frame list for a frame, a motion vector for each inter prediction encoded video block of a frame, an inter prediction state for each inter prediction encoded video block of a frame, and other information for decoding a video block in the current video frame.

[0356] Similarly, the intra BC unit 85 may use some of the received syntax elements, such as flags, to determine whether the current video block is predicted using intra BC mode, construction information of which video blocks of the frame are within the reconstruction region and should be stored in the DPB 92, block vectors for each intra BC predicted video block of the frame, intra BC prediction status for each intra BC predicted video block of the frame, and other information for decoding video blocks in the current video frame.

[0357] Motion compensation unit 82 may also perform interpolation using interpolation filters as used by video encoder 20 during encoding of the video blocks to calculate interpolated values ​​for sub-integer pixels of reference blocks. In this case, motion compensation unit 82 may determine the interpolation filters used by video encoder 20 from the received syntax elements and use these interpolation filters to produce the prediction blocks.

[0358] Inverse quantization unit 86 inverse quantizes the quantized transform coefficients provided in the bitstream and entropy decoded by entropy decoding unit 80, using the same quantization parameters calculated by video encoder 20 for each video block in the video frame to determine the degree of quantization. Inverse transform processing unit 88 applies an inverse transform (e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients to reconstruct the residual block in the pixel domain.

[0359] After the motion compensation unit 82 or the intra BC unit 85 generates a prediction block for the current video block based on the vector and other syntax elements, the adder 90 reconstructs the decoded video block for the current video block by adding the residual block from the inverse transform processing unit 88 to the corresponding prediction block generated by the motion compensation unit 82 and the intra BC unit 85. A loop filter 91 (such as a deblocking filter, an SAO filter, and / or an ALF) may be located between the adder 90 and the DPB 92 to further process the decoded video block. In some examples, the loop filter 91 may be omitted, and the decoded video block may be provided directly to the DPB 92 by the adder 90. The decoded video blocks in a given frame are then stored in the DPB 92, which stores reference frames for subsequent motion compensation of the next video block. The DPB 92 or a memory device separate from the DPB 92 may also store the decoded video for later presentation on a display device (such as a Fig.13 on a display device 34).

[0360] The description of the present disclosure has been presented for purposes of illustration and is not intended to be exhaustive or limited to the present disclosure. Many modifications, variations, and alternative embodiments will be apparent to one of ordinary skill in the art having the benefit of the teachings presented in the foregoing description and the associated drawings.

[0361] The examples are chosen and described in order to explain the principles of the present disclosure and to enable other persons skilled in the art to understand the various embodiments of the present disclosure and to best utilize the basic principles and various embodiments with various modifications suitable for the particular use contemplated. Therefore, it will be understood that the scope of the present disclosure is not limited to the specific examples of the disclosed embodiments and that modifications and other embodiments are intended to be included within the scope of the present disclosure.

Claims

1. A method for video encoding, comprising: a sequence parameter set SPS Rice extension flag is signaled by the encoder, the SPS Rice extension flag indicating whether to use an extension of the Rice parameter derivation for binarization abs_remainder and dec_abs_level; and The encoder signals a GCI Rice extension flag in a general constraint information GCI syntax to provide general control of the SPS Rice extension flag, wherein when the remaining number of context-coded bits in the first pass coding is greater than or equal to 4, abs_remainder is coded using a Golomb-Rice code and bypass-coded bits in the second pass; and When the remaining number of context-coded bins is less than 4 in encoding in the first channel, dec_abs_level is directly encoded using Golomb-Rice code and bypass-coded bins in the second channel.

2. The method for video encoding according to claim 1, wherein The value of the SPS Rice extension flag equal to 1 specifies the use of an extension of Rice parameter derivation for binarization; and A value of the SPS Rice extension flag equal to 0 specifies that the extension for Rice parameter derivation for binarization is not used.

3. The method for video encoding according to claim 1, wherein The value of the GCI Rice extension flag equal to 1 specifies that the value of the SPS Rice extension flag is equal to 0.

4. A method for video encoding, comprising: A sequence parameter set SPS Rice adaptation enable flag is signaled by the encoder, the SPS Rice adaptation enable flag indicating whether to initialize the Rice parameter derivation for binarization abs_remainder and dec_abs_level at the beginning of each transform unit TU using statistics accumulated from the previous TU; as well as The encoder signals a GCI Rice adaptation enable flag in a general constraint information GCI syntax to provide general control of the SPS Rice adaptation enable flag, wherein when the remaining number of context-coded bits in the first pass coding is greater than or equal to 4, abs_remainder is coded using a Golomb-Rice code and bypass-coded bits in the second pass; and When the remaining number of context-coded bins is less than 4 in encoding in the first channel, dec_abs_level is directly encoded using Golomb-Rice code and bypass-coded bins in the second channel.

5. The method for video encoding according to claim 4, wherein The value of the SPS Rice adaptation enable flag equal to 1 specifies that the Rice parameter derivation for binarization is initialized at the beginning of each TU using statistics accumulated from the previous TU; and The value of the SPS Rice adaptation enable flag equal to 0 specifies that the previous TU state is not used in the Rice parameter derivation.

6. The method for video encoding according to claim 4, wherein The value of the GCI Rice adaptation enable flag equal to 1 specifies that the value of the SPS Rice adaptation enable flag is equal to 0.

7. A device for video encoding, comprising: one or more processors; as well as A memory configured to store instructions executable by the one or more processors, wherein the one or more processors are configured to perform the method of any one of claims 1 to 6 when executing the instructions.

8. A non-transitory computer-readable storage medium for video encoding and decoding, storing a computer-executable program, wherein when the computer-executable program is executed by one or more computer processors, the one or more computer processors execute the method of any one of claims 1 to 6 to generate a bit stream and store the bit stream in the non-transitory computer-readable storage medium.

9. A computer program product comprising computer instructions, characterized in that When the computer instructions are executed by at least one processor, the method according to any one of claims 1 to 6 is implemented.

10. A bit stream transmission method, wherein: The bitstream is generated by a method for video encoding, the method for video encoding comprising: a sequence parameter set SPS Rice extension flag is signaled by the encoder, the SPS Rice extension flag indicating whether to use an extension of the Rice parameter derivation for binarization abs_remainder and dec_abs_level; and The encoder signals a GCI Rice extension flag in a general constraint information GCI syntax to provide general control of the SPS Rice extension flag, wherein when the remaining number of context-coded bits in the first pass coding is greater than or equal to 4, abs_remainder is coded using a Golomb-Rice code and bypass-coded bits in the second pass; and wherein when the remaining number of context-coded bits in encoding in the first channel is less than 4, dec_abs_level is directly encoded in the second channel using Golomb-Rice codes and bypass-coded bits; or, The method for video encoding comprises: A sequence parameter set SPS Rice adaptation enable flag is signaled by the encoder, the SPS Rice adaptation enable flag indicating whether to initialize the Rice parameter derivation for binarization abs_remainder and dec_abs_level at the beginning of each transform unit TU using statistics accumulated from previous TUs; and The encoder signals a GCI Rice adaptation enable flag in a general constraint information GCI syntax to provide general control of the SPS Rice adaptation enable flag, wherein when the remaining number of context-coded bits in the first pass coding is greater than or equal to 4, abs_remainder is coded using a Golomb-Rice code and bypass-coded bits in the second pass; and When the remaining number of context-coded bins is less than 4 in encoding in the first channel, dec_abs_level is directly encoded using Golomb-Rice code and bypass-coded bins in the second channel.

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