A SiC power module with low parasitic inductance and a manufacturing method thereof

Abstract

The present application relates to the technical field of power module packaging design and manufacturing, and in particular to a low parasitic inductance SiC power module and manufacturing method, comprising a first substrate, a second substrate, a power chip, a bonding wire, a third substrate, a driving terminal and a power terminal, one side of the first substrate being the bottom, the first substrate, the second substrate and the third substrate being stacked in sequence from bottom to top, a plurality of the power chips and a plurality of driving terminals being fixedly mounted on the second substrate, and the plurality of power chips being electrically connected to the second substrate through bonding wires, a power loop being formed between the power chips, the driving terminal and the power terminal being electrically connected to the second substrate, the input end and the output end of the second substrate for electrically connecting the power terminal being arranged between the plurality of power chips, and the input end and the output end of the second substrate for electrically connecting the power terminal being located within the power loop, in order to improve the stability of the SiC power module.

Description

Technical Field

[0001] The present application relates to the technical field of power module packaging design and manufacturing, and in particular to a SiC power module with low parasitic inductance and a manufacturing method. Background Art

[0002] A power module usually refers to an electronic device module used to control and regulate the process of power transmission and conversion. Reducing the parasitic inductance of the power module commutation circuit is one of the key indicators in power module design. As power modules continue to develop towards higher operating frequencies and higher operating temperatures, traditional IGBT power modules are gradually being replaced by SiC power modules. Since SiC MOSFETs have a higher switching speed, SiC power modules have a higher operating frequency, which also makes them more sensitive to parasitic inductance.

[0003] The existing SiC power module commutation loop has a long path, resulting in the introduction of parasitic inductance of tens of nH. When the MOSFET is turned off, the large parasitic inductance and high switching current change rate will cause it to generate a high voltage spike, thereby reducing the controllability of the system, and even causing the chip to fail in severe cases. The above problems need to be solved. In order to avoid the generation of high voltage spikes and to give full play to the higher operating frequency characteristics of SiC MOSFET, it is necessary to optimize the parasitic inductance introduced by the power module packaging structure. Summary of the invention

[0004] In order to reduce the voltage spike generated when the MOSFET is turned off and improve the stability of the SiC power module, the present application provides a SiC power module with low parasitic inductance and a manufacturing method, which adopts the following technical solutions:

[0005] In a first aspect, the present application provides a SiC power module with low parasitic inductance, comprising a first substrate, a second substrate, a power chip, a bonding wire, a third substrate, a driving terminal and a power terminal, wherein one side of the first substrate is the bottom, and the first substrate, the second substrate and the third substrate are stacked in sequence from bottom to top, a plurality of the power chips and a plurality of driving terminals are fixedly mounted on the second substrate, and the plurality of power chips are electrically connected to the second substrate through bonding wires, a power loop is formed between the power chips, the driving terminal and the power terminal are electrically connected to the second substrate, an input end and an output end of the second substrate for electrically connecting the power terminal are both arranged between the plurality of power chips, and an input end and an output end of the second substrate for electrically connecting the power terminal are both located within the power loop.

[0006] Preferably, the third substrate is electrically connected to the second substrate, and the power chip is coupled to the driving terminal through the second substrate and the third substrate.

[0007] Preferably, the second substrate and the third substrate are any one of a copper-clad ceramic substrate, an active metal brazed ceramic substrate, a printed circuit board or a flexible film board.

[0008] Preferably, the first substrate is any one of a copper plate or an aluminum alloy plate.

[0009] Preferably, a portion of the power chips are installed at the upper bridge end of the second substrate, and the power chips located at the upper bridge end are arranged at intervals along the length direction of the second substrate, and are provided in two rows; another portion of the power chips are installed at the lower bridge end of the second substrate, and the power chips located at the lower bridge end are arranged at intervals along the length direction of the second substrate, and are provided in two rows.

[0010] Preferably, the input end of the second substrate for electrically connecting to the power terminal is arranged between the two rows of power chips at the upper bridge end.

[0011] Preferably, the output end of the second substrate for electrically connecting the power terminal is arranged between the two rows of power chips at the lower bridge end.

[0012] Preferably, one end of one of the power terminals is electrically connected to the input end of the second substrate, and the other end of one of the power terminals is arranged above one end of the second substrate.

[0013] Preferably, one end of the other power terminal is electrically connected to the output end of the second substrate, and the other end of the other power terminal is arranged above one end of the second substrate.

[0014] In a second aspect, the present application provides a method for manufacturing a SiC power module, comprising the following steps:

[0015] A first substrate, a second substrate, a power chip and a third substrate are provided, wherein the second substrate is connected to the power chip by printing an interconnection layer with solder paste, the second substrate is soldered to the first substrate with solder paste, and the third substrate is soldered to the second substrate with solder paste. Bonding wires, drive terminals and power terminals are provided, the second substrate is electrically connected to the power chip with the bonding wires, the second substrate is electrically connected to the drive terminals with the bonding wires, and the power terminals are installed on the second substrate by ultrasonic welding to electrically connect the input and output ends of the power terminals.

[0016] In summary, compared with the prior art, the technical solution provided by this application has at least the following beneficial effects:

[0017] The present application increases the area of ​​the main power circuit by stacking and interconnecting the first substrate, the second substrate and the third substrate. At the same time, based on the adjustable stacked substrate interconnection, the signal bonding wire span is controlled, and the overcurrent capacity of the power module is improved. Then, the power chip, the drive terminal and the power terminal are connected according to the second substrate and the bonding wire to form a power circuit. By adjusting the position of the power terminal connected to the second substrate and adjusting the discharge of the power chip, the current path is changed, the main power circuit is shortened, the parasitic inductance is reduced, the voltage spike is reduced, the controllability of the SiC power module is improved, and the stability of the system is further maintained. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of the overall structure of a SiC power module with low parasitic inductance described in an embodiment of the present application.

[0019] Figure 2 It is a schematic diagram of the structure of the power circuit described in the embodiment of the present application.

[0020] Figure 3 It is a schematic diagram of the side structure of the SiC power module described in the embodiment of the present application.

[0021] Figure 4 It is a schematic diagram of the layer structure of the second substrate and the third substrate in the embodiment of the present application.

[0022] Description of reference numerals:

[0023] 1. First substrate; 2. Second substrate; 3. Power chip; 4. Bonding wire; 5. Third substrate; 501. Solder pad interconnection layer; 502. Lower copper layer; 503. Ceramic layer; 504. Upper copper layer; 6. Drive terminal; 7. Power terminal. DETAILED DESCRIPTION

[0024] The following combination Figure 1-Figure 4 The present application is described in further detail. The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments and are not intended to be limiting.

[0025] Reference Figure 1The present application relates to a low parasitic inductance SiC power module, which specifically includes a first substrate 1, a second substrate 2, a power chip 3, a bonding wire 4, a third substrate 5, a drive terminal 6 and a power terminal 7. One side of the first substrate 1 is the bottom, and the first substrate 1, the second substrate 2 and the third substrate 5 are stacked in sequence from bottom to top. A plurality of power chips 3 and a plurality of drive terminals 6 are fixedly mounted on the second substrate 2, and the plurality of power chips 3 are electrically connected to the second substrate 2 through the bonding wire 4. A power loop is formed between the power chips 3. The drive terminal 6 and the power terminal 7 are electrically connected to the second substrate 2. The input end and the output end of the second substrate 2 for electrically connecting the power terminal 7 are both arranged between the plurality of power chips 3, and the input end and the output end of the second substrate 2 for electrically connecting the power terminal 7 are both located within the power loop.

[0026] Specifically, the first substrate 1, the second substrate 2 and the third substrate 5 are interconnected in layers to increase the area of ​​the main power circuit. At the same time, based on the interconnection of the adjustable laminated substrate, the span of the signal bonding lead 4 is controlled, and the overcurrent capacity of the power module is improved. The designed laminated substrate has a Kelvin source loop, which can be used to interconnect the Kelvin source lead corresponding to the corresponding power chip 3, thereby improving the switching characteristics of the SiC power module. At the same time, the designed laminated substrate has an adjustable position function. Compared with the disadvantage that the power chip 3 is too far away from the signal loop in the traditional packaging structure, the span of the signal bonding lead 4 can be shortened by the adjustable laminated substrate, further improving the reliability of the SiC power module. Then, according to the second substrate 2 and the bonding lead 4, the power chip 3, the drive terminal 6 and the power terminal 7 are connected to form a power loop. By adjusting the position of the power terminal 7 connected to the second substrate 2 and adjusting the discharge of the power chip 3, the current path is changed, the main power loop is shortened, the parasitic inductance is reduced, the voltage spike is reduced, the controllability of the SiC power module is improved, and the stability of the system is further maintained.

[0027] As one implementation manner, the first substrate 1 is any one of a copper plate or an aluminum alloy plate.

[0028] Specifically, refer to Figure 1 and Figure 2 , the first substrate 1 is a heat dissipation substrate, which plays a role in dissipating heat for the second substrate 2, power chip 3, bonding wire 4, third substrate 5, drive terminal 6 and power terminal 7. When a copper plate is used as a heat dissipation substrate, the copper plate can provide good thermal conductivity and stable chemical properties, can quickly conduct heat to the external environment, and has a long service life. In contrast, when an aluminum alloy plate is used as a heat dissipation substrate, the aluminum alloy plate has the characteristics of light weight and low cost. Although the thermal conductivity is slightly lower than that of the copper plate, by improving the heat dissipation structure by design, a good heat dissipation effect can also be achieved. Therefore, this application can select a copper plate or an aluminum alloy plate as a heat dissipation substrate according to specific application requirements and important considerations.

[0029] As one embodiment, the second substrate 2 and the third substrate 5 are any one of a copper-clad ceramic substrate, an active metal brazed ceramic substrate, a printed circuit board or a flexible film board.

[0030] Specifically, refer to Figure 3 and Figure 4 The third substrate 5 is interconnected on the second substrate 2 by stacking, which reduces the disadvantage that the traditional SiC power module needs to leave a signal loop on the second substrate 2, thereby increasing the area of ​​the main power loop and greatly increasing the current capacity of the power module. At the same time, the Kelvin source loop designed in the third substrate 5 provides a connection method for the power chip 3 with a Kelvin source, so that the switching characteristics of the SiC power module are further improved.

[0031] Copper-clad ceramic substrates attach copper foil directly to the surface of ceramic substrates and fix them by high-temperature sintering or bonding methods. They have excellent thermal conductivity and stable structure and are often used in the manufacture of high-power electronic devices. Active metal brazed ceramic substrates coat a layer of active metal on the surface of ceramic substrates, and then use a special brazing process to connect the device to the substrate. They have good high temperature resistance and reliable connection quality and are often used in high-frequency, high-power electronic devices. Printed circuit boards are panels that use printing technology to form circuit connection lines on the surface of substrates. They have the advantages of low manufacturing cost and simple manufacturing process. Flexible film boards are circuit boards made of flexible substrates, commonly using materials such as polyimide and polyester. They have the characteristics of good flexibility, light weight, and bendability. They are suitable for scenarios with high requirements on volume and weight.

[0032] As one implementation manner, the third substrate 5 is electrically connected to the second substrate 2 , and the power chip 3 is coupled to the driving terminal 6 through the second substrate 2 and the third substrate 5 .

[0033] Specifically, the power chip 3 is interconnected on the second substrate 2 through a solder paste process or a sintering process, and then electrically connected to the second substrate 2 through a bonding wire 4, and the third substrate 5 is electrically connected to the second substrate 2. The drive terminal 6 is connected to the second substrate 2 through a wire bonding process or an ultrasonic bonding process, and the drive terminal 6 is electrically connected to the third substrate 5, so that the power chip 3 and the drive terminal 6 are coupled. The drive terminal 6 is a wiring terminal in an electronic device, which is used to connect an external control signal or power supply to achieve control and power supply to the device. It can connect various control devices such as motors, lamps, sensors, etc., transmit control signals to these devices, and provide the required power supply. The function of the drive terminal 6 is to transmit control signals. In an automation system or electronic equipment, the control signal usually comes from a controller or other electronic equipment.

[0034] As one of the embodiments, a portion of the power chips 3 are installed at the upper bridge end of the second substrate 2, and the power chips 3 located at the upper bridge end are arranged at intervals along the length direction of the second substrate 2, and two rows are arranged. Another portion of the power chips 3 are installed at the lower bridge end of the second substrate 2, and the power chips 3 located at the lower bridge end are arranged at intervals along the length direction of the second substrate 2, and two rows are arranged.

[0035] Specifically, refer to Figure 2 The second substrate 2 is preset with a circuit that needs to install chips or terminals on the side away from the first substrate 1. The circuit of the second substrate 2 is divided into two parts, including an upper bridge end of the second substrate 2 and a lower bridge end of the second substrate 2. The end of the second substrate 2 used to connect to the positive end of the power supply is the upper bridge end, and the end used to connect to the negative end of the power supply is the lower bridge end. The upper bridge end is located at one end on one side of the second substrate 2, and the lower bridge end is located at the other end on one side of the second substrate 2. The upper bridge end and the lower bridge end of the second substrate 2 are electrically connected through a bonding wire 4 to connect the two.

[0036] The power chip 3 is a semiconductor device that integrates functions such as power amplification, regulation, and protection. It is used to control and regulate the conversion and transmission of electric energy and is usually used in power management applications, such as direct current-direct current (DC-DC) converters, alternating current-direct current (AC-DC) converters, direct current-alternating current (DC-AC) inverters, etc. It can provide a stable power supply, efficiently convert energy, and provide protection functions for the circuit. It usually includes components such as power MOSFET (metal oxide semiconductor field effect transistor), power diode, drive circuit, control logic, and protection circuit. Power MOSFET is one of the core components of the power chip 3, which is responsible for power conversion under high voltage and high current. The drive circuit is used to control the conduction and cutoff of the power MOSFET so that the circuit can work stably. The control logic part adjusts the power output according to the input signal and the set parameters to ensure that the output voltage and current meet the expected requirements. The protection circuit is used to monitor the circuit state. When abnormal conditions such as overload, overheating, and short circuit occur, protective measures are taken in time to prevent circuit damage.

[0037] In this embodiment, there are twelve power chips 3, and the number of power chips 3 is not limited in actual application. Six power chips 3 are installed on the upper bridge end, three of which are electrically connected to the second substrate 2 and arranged at intervals along the length direction of the second substrate 2. The other three are electrically connected to the second substrate 2 and arranged at intervals along the length direction of the second substrate 2. The two rows of spaced power chips 3 are spaced a certain distance apart and connected to form a loop.

[0038] As one embodiment, the input end of the second substrate 2 for electrically connecting the power terminal 7 is arranged between the two rows of power chips 3 at the upper bridge end. The output end of the second substrate 2 for electrically connecting the power terminal 7 is arranged between the two rows of power chips 3 at the lower bridge end.

[0039] Specifically, the SiC power module in this embodiment greatly reduces the current path by using the specially designed power terminal 7, such as Figure 2 The current path is shown in FIG. The current flows directly into the drain of the upper bridge power chip 3 through the positive terminal DC+ of the power supply, and is merged into the AC terminal through the source of the upper bridge power chip 3 by the bonding wire 4. The current at the AC terminal directly flows into the drain of the lower bridge power chip 3, and is merged into the negative terminal DC- of the power supply through the source of the lower bridge power chip 3 by the bonding wire 4. Compared with the SiC power module with a traditional packaging structure, the current path is greatly reduced, thereby reducing the parasitic inductance of the entire commutation circuit, and then reducing the parasitic inductance of the entire SiC power module, so that the voltage spike is reduced and the controllability of the system is improved.

[0040] As one embodiment, one end of one of the power terminals 7 is electrically connected to the input end of the second substrate 2, and the other end of one of the power terminals 7 is disposed above one end of the second substrate 2. One end of another power terminal 7 is electrically connected to the output end of the second substrate 2, and the other end of another power terminal 7 is disposed above one end of the second substrate 2.

[0041] Specifically, the specific power terminal 7 designed in this embodiment constructs a new main power circuit. One end of one of the power terminals 7 is electrically connected to the input end of the second substrate 2, and the other end is higher than the second substrate 2, located above one end of the second substrate 2, and not in direct contact with the second substrate 2. This arrangement can facilitate the power module to connect external devices when in use. Since the input and output ends of the second substrate 2 are usually arranged at the same horizontal position along the length direction, one end and the other end of the power terminal 7 are bent to avoid each other. Two 90° bends are made between the two ends of the power terminal 7 of this embodiment, so that the end of the power terminal 7 connected to the power supply can be set in a suitable position for use. Compared with the traditional packaging structure, the specific power terminal 7 designed changes the current path, shortens the main power circuit, reduces parasitic inductance, reduces voltage spikes, improves the controllability of the SiC power module, and further maintains the stability of the system.

[0042] The present invention provides a method for manufacturing a SiC power module, comprising the following steps:

[0043] A first substrate 1, a second substrate 2, a power chip 3 and a third substrate 5 are provided. The second substrate 2 is connected to the power chip 3 by printing an interconnection layer with solder paste. The second substrate 2 is soldered to the first substrate 1 with solder paste. The third substrate 5 is soldered to the second substrate 2 with solder paste. A bonding wire 4, a drive terminal 6 and a power terminal 7 are provided. The second substrate 2 is electrically connected to the power chip 3 through the bonding wire 4. The second substrate 2 is electrically connected to the drive terminal 6 through the bonding wire 4. The power terminal 7 is installed on the second substrate 2 by ultrasonic welding to electrically connect the input end and the output end of the power terminal 7.

[0044] Specifically, the manufacturing process of the SiC power module is as follows: the second substrate 2 is first coated with an interconnection layer by solder paste printing or silver paste printing, the power chip 3 is installed on the interconnection layer by normal temperature patch process or high temperature patch process, and then the second substrate 2 and the power chip 3 are placed in a reflow furnace equipment and a silver sintering equipment for interconnection. The reflow process conditions are preheating 18 to 20 minutes, reflow 3 to 5 minutes, cooling 10 to 12 minutes, and a reflow temperature range of 265°C to 275°C. The sintering process conditions are 240°C to 260°C, 15 to 18 MPa, and 150s to 200s in a nitrogen environment. Then, the solder paste welding process of the second substrate 2 and the first substrate 1, and the third substrate 5 and the second substrate 2 is carried out simultaneously, and the solder sheet is used as the interconnection layer. The reflow process conditions are preheating 18 to 20 minutes, reflow 3 to 5 minutes, cooling 10 to 12 minutes, and a reflow temperature range of 245°C to 255°C. Secondly, after the shell is installed, a wire bonding process is carried out, and each power chip 3 is interconnected with the second substrate 2, between the second substrate 2, and between the second substrate 2 and the drive terminal 6 through aluminum wire or copper wire, and the power terminal 7 is interconnected with the second substrate 2 through an ultrasonic welding process, thereby realizing the electrical connection of the SiC power module.

[0045] Since the second substrate 2 has a large area, it is easy to cause the substrate to warp after high-temperature patch or solder paste welding process. Therefore, the first substrate 1 needs to be pre-bent to give it a certain degree of arch, which is between 400-900μm. The purpose is to make the second substrate 2 fit the first substrate 1 as closely as possible, increase the contact area, reduce the void rate of the solder paste welding process, and further optimize the reflow curve. The structure of the third substrate 5 is as follows: Figure 4As shown, it includes a solder interconnect layer 501, a lower copper layer 502, a ceramic layer 503 such as Al2O3 or AlN or Si3N4, and an upper copper layer 504. Due to the insulating properties of the ceramic layer, the large current flowing through the second substrate 2 will not flow into the third substrate 5, thereby separating the power circuit and the drive circuit, and at the same time greatly increasing the area of ​​the power circuit, so that the overcurrent capacity of the SiC power module is further improved. At the same time, the position of the third substrate 5 can be adjusted according to the wire diameter of the bonding wire 4 and the corresponding distance from the power chip 3. In the traditional packaging structure, the gate of the power chip 3 and the Kelvin source loop need to leave enough area for the power loop, resulting in the signal loop being too small or too far away from the power chip 3. Through the interconnection of the adjustable third substrate 5 and the second substrate 2, the problem of the signal bonding wire 4 having a large span can be solved.

[0046] The SiC power module is designed with a specific packaging structure. Through the parasitic inductance simulation method, the inductance between the positive end DC+ and the negative end DC- of the power supply is obtained to be 11.5nH. Compared with the 28.9nH of the traditional packaging structure, the parasitic inductance is reduced by about 60%, with a significant effect.

[0047] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the above-described device and product can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0048] In several embodiments provided in this application, it should be understood that the disclosed methods, systems, devices and program products may be implemented in other ways.

[0049] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0050] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A SiC power module with low parasitic inductance, characterized in that: The invention comprises a first substrate (1), a second substrate (2), a power chip (3), a bonding wire (4), a third substrate (5), a driving terminal (6) and a power terminal (7), wherein one side of the first substrate (1) is at the bottom, the first substrate (1), the second substrate (2) and the third substrate (5) are sequentially stacked from bottom to top, a plurality of the power chips (3) and a plurality of the driving terminals (6) are fixedly mounted on the second substrate (2), and the plurality of the power chips (3) are electrically connected to the second substrate (2) through the bonding wire (4), a power loop is formed between the power chips (3), the driving terminal (6) and the power terminal (7) are electrically connected to the second substrate (2), an input end and an output end of the second substrate (2) for electrically connecting to the power terminal (7) are arranged between the plurality of the power chips (3), and an input end and an output end of the second substrate (2) for electrically connecting to the power terminal (7) are located within the power loop; A portion of the power chips (3) is mounted on the upper bridge end of the second substrate (2), the power chips (3) located at the upper bridge end are arranged at intervals along the length direction of the second substrate (2), and two rows are arranged along the width direction of the second substrate (2); another portion of the power chips (3) is mounted on the lower bridge end of the second substrate (2), the power chips (3) located at the lower bridge end are arranged at intervals along the length direction of the second substrate (2), and two rows are arranged along the width direction of the second substrate (2); The input end of the second substrate (2) for electrically connecting to the power terminal (7) is arranged between the two rows of power chips (3) at the upper bridge end; the output end of the second substrate (2) for electrically connecting to the power terminal (7) is arranged between the two rows of power chips (3) at the lower bridge end; One end of one of the power terminals (7) is electrically connected to the input end of the second substrate (2), and the other end of one of the power terminals (7) is arranged above one end of the second substrate (2); one end of another of the power terminals (7) is electrically connected to the output end of the second substrate (2), and the other end of another of the power terminals (7) is also arranged above one end of the second substrate (2); A bend is provided between one end and the other end of the power terminal (7).

2. The low parasitic inductance SiC power module according to claim 1, characterized in that: The third substrate (5) is electrically connected to the second substrate (2), and the power chip (3) is coupled to the driving terminal (6) via the second substrate (2) and the third substrate (5).

3. The low parasitic inductance SiC power module according to claim 1, characterized in that: The second substrate (2) and the third substrate (5) are any one of a copper-clad ceramic substrate, an active metal brazed ceramic substrate, a printed circuit board or a flexible film board.

4. The low parasitic inductance SiC power module according to claim 3, characterized in that: The first substrate (1) is any one of a copper plate and an aluminum alloy plate.

5. A method for manufacturing a SiC power module according to any one of claims 1 to 4, characterized in that: The following steps are involved: A first substrate (1), a second substrate (2), a power chip (3) and a third substrate (5) are provided. The second substrate (2) is connected to the power chip (3) by printing an interconnection layer with solder paste. The second substrate (2) and the first substrate (1) are soldered with solder paste. The third substrate (5) and the second substrate (2) are soldered with solder paste. A bonding wire (4), a drive terminal (6) and a power terminal (7) are provided. The second substrate (2) and the power chip (3) are electrically connected by the bonding wire (4). The second substrate (2) and the drive terminal (6) are electrically connected by the bonding wire (4). The power terminal (7) is mounted on the second substrate (2) by ultrasonic welding to electrically connect the input end and the output end of the power terminal (7).

Images