Solar cell and its preparation method

Abstract

The present application provides a solar cell and a preparation method thereof, including: providing a semiconductor substrate having opposite first and second surfaces; forming a first doped layer on the first surface and a second doped layer on the second surface; removing the first doped layer, and forming a third doped layer on the first surface where the first doped layer has been removed, the doping types of the third doped layer and the second doped layer being opposite; performing patterning etching and surface texturing on the third doped layer to form a metal contact region and a non-metal contact region. The solution of the present application uses post-texturing to prepare a solar cell: first doping the semiconductor substrate to form a double-sided passivated contact structure, and then performing processes such as grooving and texturing according to the structural requirements, which can effectively improve the matching of the wet process with the front and back processes and the stability of the cell preparation process, relieve the recombination effect and semiconductor substrate damage, reduce reflection loss, and improve the photoelectric conversion efficiency.

Description

Technical Field

[0001] This application relates to the technical field of solar cells, and in particular, to a solar cell and a method for manufacturing the same. Background Art

[0002] In the process of manufacturing solar cells, in order to improve the photoelectric conversion efficiency, metal grid lines can be deposited on both sides of the silicon wafer to form metal electrodes for collecting and transmitting charges.

[0003] However, the direct contact between the metal electrode and the silicon wafer surface may cause the following problems: severe metal-semiconductor contact recombination, which affects the improvement of battery performance; causing pressure on the silicon wafer and resulting in silicon wafer damage, which affects the reliability and stability of the battery.

[0004] It should be noted that the above content is not necessarily prior art and does not limit the patent protection scope of this application. Summary of the Invention

[0005] Embodiments of this application provide a solar cell and a method for manufacturing the same to solve or alleviate one or more of the above-mentioned technical problems.

[0006] As an aspect of the embodiments of this application, a method for manufacturing a solar cell is provided, including:

[0007] Providing a semiconductor substrate having opposite first and second surfaces;

[0008] Forming a first doped layer on the first surface and a second doped layer on the second surface;

[0009] Removing the first doped layer and forming a third doped layer on the first surface where the first doped layer has been removed, the doping type of the third doped layer being opposite to that of the second doped layer;

[0010] Performing patterned etching and surface texturing on the third doped layer to form a metal contact area and a non-metal contact area.

[0011] Optionally, the manufacturing method further includes:

[0012] Forming a first antireflection layer on the side of the processed third doped layer away from the semiconductor substrate;

[0013] Processing the second doped layer;

[0014] Forming a second antireflection layer on the side of the processed second doped layer away from the semiconductor substrate.

[0015] Optionally, processing the second doped layer includes:

[0016] Remove the silicon oxide glass on the surface of the second doped layer;

[0017] Etch the second doped layer with a chemical solution to remove edge overplating or the surface polysilicon layer;

[0018] Wherein, the chemical solution includes: an acidic chemical solution or a basic chemical solution; the acidic chemical solution is a hydrofluoric acid / nitric acid mixed solution, and the basic chemical solution is any one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide.

[0019] Optionally, the preparation method further includes:

[0020] Clean the processed third doped layer and the second doped layer with a 2%-10% by mass hydrofluoric acid solution to remove the silicon oxide glass on the surface.

[0021] Optionally, the preparation method further includes:

[0022] According to the doping type of the third doped layer, a first field passivation layer and a first antireflection layer are sequentially formed on the side of the processed third doped layer away from the semiconductor substrate; and / or

[0023] According to the doping type of the second doped layer, a second field passivation layer and a second antireflection layer are sequentially formed on the side of the processed second doped layer away from the semiconductor substrate.

[0024] Optionally, the preparation method further includes:

[0025] Clean the first surface and the second surface of the semiconductor substrate with a chemical solution;

[0026] Wherein, the chemical solution includes an acidic chemical solution and a basic chemical solution, the acidic chemical solution includes one or more of hydrofluoric acid, nitric acid, and hydrogen peroxide, and the basic chemical solution includes one or more of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide.

[0027] Optionally, the cleaning of the first surface and the second surface of the semiconductor substrate with a chemical solution includes:

[0028] At 20-30°C, clean the semiconductor substrate with a 1%-10% by mass hydrofluoric acid solution for 10-180 s until the first surface and the second surface are hydrophobic;

[0029] At 60-80°C, clean the semiconductor substrate with a 0.5%-10% by mass potassium hydroxide solution and a preset auxiliary agent for 60-210 s.

[0030] Optionally, forming a first doped layer on the first surface and a second doped layer on the second surface includes:

[0031] Depositing and doping a first tunneling oxide polysilicon structure on the first surface by LPCVD or PECVD to form the first doped layer;

[0032] Depositing and doping a second tunneling oxide polysilicon structure on the second surface by LPCVD or PECVD to form the second doped layer.

[0033] Optionally, removing the first doped layer includes:

[0034] Removing the silicon oxide glass on the surface of the first doped layer;

[0035] Etching the first doped layer with a chemical solution to remove the first doped layer;

[0036] Wherein, the chemical solution includes: an acidic chemical solution or a basic chemical solution; the acidic chemical solution is a hydrofluoric acid / nitric acid mixed solution, and the basic chemical solution is any one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide.

[0037] Optionally, forming a third doped layer on the first surface from which the first doped layer has been removed includes:

[0038] Depositing and doping a third tunneling oxide polysilicon structure on the first surface from which the first doped layer has been removed by LPCVD or PECVD to form the third doped layer;

[0039] Wherein, the doping includes: doping an element of a doping type opposite to that of the second doped layer into the third tunneling polysilicon structure.

[0040] Optionally, performing patterning etching and surface texturing on the third doped layer includes;

[0041] Determining a first region and a second region in the third doped layer according to a preset metal gate line structure;

[0042] For the second region: removing the silicon oxide glass on the surface and etching with a chemical solution to remove the surface polysilicon layer; in the case where the surface polysilicon layer has been removed, performing surface texturing on the second region to form the non-metal contact region;

[0043] For the first region: printing a protective slurry; cleaning the protective slurry in the case where the silicon oxide glass on the surface of the second region has been removed; in the case where the protective slurry has been cleaned off, removing the surface polysilicon layer with a chemical solution to form the metal contact region.

[0044] Optionally, the surface of the second region is textured, including:

[0045] At 60 - 90 °C, the surface of the second region is textured with a chemical solution and a preset auxiliary agent for 350 - 600 s to form a non-metal contact region with a pyramid and / or inverted pyramid structure;

[0046] Wherein, the chemical solution is any one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide, the alkali concentration of the chemical solution is 0.2% - 5%, and the concentration of the auxiliary agent is 0.2% - 5%; the size of the pyramid base is 0.5 - 6 μm, the height of the pyramid is 0.3 - 5 μm, and the reflectivity of the non-metal contact region in the visible light range is 7 - 15%.

[0047] Optionally, the preparation method further includes:

[0048] Forming a first electrode on the side of the first region away from the semiconductor substrate; and

[0049] Forming a second electrode on the side of the second doped layer away from the semiconductor.

[0050] Optionally, forming a first electrode on the side of the first region away from the semiconductor substrate includes:

[0051] Emitting a laser beam from a laser to a transfer paper, the surface of the transfer paper is pre-coated with a slurry, and the laser beam is used to: cause at least part of the slurry on the surface of the transfer paper to fall off to the first region to form a first electrode;

[0052] Wherein, the particle size of the metal powder particles in the slurry is 0 - 7 μm, and the power of the laser is 200 - 400 W.

[0053] Optionally, the preparation method further includes:

[0054] Drying and curing the first electrode and the second electrode;

[0055] Wherein, the drying temperature is 500 - 850 °C, the drying time is 30 - 300 s, the curing temperature is 150 - 300 °C, and the curing time is 6 - 10 min.

[0056] As another aspect of the embodiments of the present application, the embodiments of the present application further provide a solar cell, including:

[0057] A semiconductor substrate having opposite first and second surfaces, the first surface including alternately arranged first and second regions;

[0058] The first doped layer, the first doped layer is disposed in the first region;

[0059] The second doped layer, the second doped layer is disposed on the second surface;

[0060] Wherein, the doping types of the first doped layer and the second doped layer are opposite, the first region is a metal contact region, and the second region is a non-metal contact region.

[0061] Optionally, the second region is a textured surface, and the textured surface includes a pyramid textured surface and / or an etched pit textured surface.

[0062] Optionally, the first doped layer includes a first tunnel oxide doped polysilicon structure, the second doped layer includes a second tunnel oxide doped polysilicon structure, and the doping types of the first tunnel oxide doped polysilicon structure and the second tunnel oxide doped polysilicon structure are opposite; the doping depth of the first doped layer is 30 - 500 nm, and the surface doping concentration is 1e 18 -1e 21 cm 3 ; the doping depth of the second doped layer is 30 - 500 nm, and the surface doping concentration is 1e 18 -1e 21 cm 3 .

[0063] Optionally, the doping type includes; N-type doping; or P-type doping.

[0064] Optionally, the solar cell further includes:

[0065] The first electrode, the first electrode is disposed in the first region;

[0066] The second electrode, the second electrode is disposed on at least a part of the surface of the second doped layer away from the semiconductor substrate.

[0067] Optionally, the semiconductor substrate includes: an N-type single-crystalline silicon substrate; or a P-type single-crystalline silicon substrate.

[0068] Optionally, the solar cell further includes:

[0069] The first field passivation layer, the first field passivation layer is disposed on a side of the first doped layer away from the semiconductor substrate; and / or

[0070] The second field passivation layer, the second field passivation layer is disposed on a side of the second doped layer away from the semiconductor substrate.

[0071] Optionally, the first field passivation layer includes alumina, the thickness of the first field passivation layer is 4 - 20 nm, the refractive index is 1.4 - 1.8, and the transmittance in the visible light range is ≥80%;

[0072] The second field passivation layer includes aluminum oxide; the thickness of the second field passivation layer is 4 - 20 nm, the refractive index is 1.4 - 1.8, and the transmittance in the visible light range is ≥ 80%.

[0073] Optionally, the solar cell further includes:

[0074] A first antireflection layer, which is provided on the side of the first doping layer away from the semiconductor substrate or on the side of the first field passivation layer away from the semiconductor substrate;

[0075] A second antireflection layer, which is provided on the side of the second doping layer away from the semiconductor substrate or on the side of the second field passivation layer away from the semiconductor substrate.

[0076] Optionally, the first antireflection layer includes one or more of silicon nitride, silicon dioxide, and silicon oxynitride. The second antireflection layer includes: a single-layer structure or a multi-layer structure; the second antireflection layer includes one or more of silicon nitride, silicon dioxide, and silicon oxynitride. The second antireflection layer includes: a single-layer structure or a multi-layer structure; wherein, the multi-layer structure includes silicon nitride films with different refractive indices and thicknesses.

[0077] The embodiments of the present application adopting the above technical solutions may include the following advantages:

[0078] The embodiments of the present application use a post-texturing process route to prepare solar cells: first dope the semiconductor substrate, and then perform processes such as grooving and texturing according to the structural requirements, which can effectively improve the preparation flexibility and cell stability. During the preparation process, doping layers are formed on both sides first, then the first doping layer on the first side is completely removed, and a third doping layer is re-formed on this side. Thus, doping layers with different doping types can be formed on both sides of the semiconductor substrate to form a double-sided passivated contact structure. Pattern etching (grooving) and surface texturing treatment (texturing) are performed on the third doping layer to form a metal contact area and a non-metal contact area on the front surface of the solar cell. The metal contact area can be used to connect metal electrodes. Due to the existence of the passivated contact structure, the contact between the semiconductor substrate and the metal electrode can be improved, effectively alleviating the recombination effect and damage to the semiconductor substrate. The non-metal contact area has a textured surface, which can reduce reflection loss and improve the photoelectric conversion efficiency. Description of the Drawings

[0079] In the drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar components or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments disclosed according to the present application and should not be regarded as limiting the scope of the present application.

[0080] Figure 1 Schematically shows a flowchart of a method for manufacturing a solar cell according to Embodiment 1 of the present application;

[0081] Figure 2 Schematically shows Figure 1 a sub - step flowchart of step S106 in

[0082] Figure 3 Schematically shows a structural diagram of a solar cell according to Embodiment 2 of the present application.

[0083] Explanation of reference numerals:

[0084] 1 Semiconductor substrate

[0085] 2 First tunneling oxide layer

[0086] 3 First doped polysilicon layer

[0087] 4 First field passivation layer

[0088] 5 First antireflection layer

[0089] 6 Second doped polysilicon layer

[0090] 7 Second electrode Detailed implementation manners

[0091] In order to make the objectives, technical solutions and advantages of the present application clearer and more understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The present application will be described in detail below with reference to the drawings and embodiments.

[0092] It should be noted that the terms "first", "second", etc. in the description and claims of the present application and the above - mentioned drawings are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that such terms can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non - exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0093] The following provides an explanation of the terms of the present application.

[0094] wt (weight percentage): mass percentage.

[0095] LCPVD (Low-Pressure Chemical Vapor Deposition): A low-pressure chemical vapor deposition technique that can be used to prepare thin films in the semiconductor industry, such as depositing silicon compounds, nitrogen compounds, etc.

[0096] PECVD (Plasma Enhanced Chemical Vapor Deposition): A plasma-enhanced chemical vapor deposition technique that uses plasma effects to prepare thin films in the semiconductor industry.

[0097] CVD (Chemical Vapor Deposition): Chemical vapor deposition.

[0098] To facilitate the understanding of the technical solutions provided by the embodiments of the present application by those skilled in the art, the related technologies are described below:

[0099] During the preparation process of solar cells, in order to improve the photoelectric conversion efficiency, metal grid lines can be deposited on both sides of the silicon wafer to form metal electrodes for collecting and transmitting charges.

[0100] However, the applicant has found that the direct contact between the metal electrode and the silicon wafer surface may cause the following problems: severe metal-semiconductor contact recombination, affecting the improvement of battery performance; causing pressure on the silicon wafer and resulting in silicon wafer damage, affecting the reliability and stability of the battery.

[0101] Therefore, the embodiments of the present application provide a solar cell and its preparation method, which have the following advantages: (1) A double-sided poly passivation contact structure is formed, which can improve the metal contact on both sides and reduce recombination. The front metal area is a polished surface, which can reduce the damage of the paste, and the non-metal contact area is a textured surface, reducing the reflection loss; (2) The battery preparation process is a post-texturing route, that is, after the silicon wafer is cleaned to remove mechanical damage, doping is first performed, and then processes such as grooving and texturing are carried out according to the structural requirements, which can improve the process window matching, preparation flexibility, and battery reliability;

[0102] (3) The metal electrode is deposited by laser transfer printing technology, which can minimize the line width and ensure the alignment accuracy of the front patterning. See the following for details.

[0103] Next, the exemplary embodiments according to the present application will be described in more detail with reference to the accompanying drawings. It should be noted that these exemplary embodiments can be implemented in many different forms and should not be construed as being limited only to the embodiments described herein.

[0104] Embodiment 1

[0105] Figure 1A flowchart of a method for manufacturing a solar cell according to Embodiment 1 of the present application is schematically shown.

[0106] As Figure 1 shown, the method for manufacturing a solar cell may include steps S100 - S106, where:

[0107] Step S100: Provide a semiconductor substrate having opposite first and second surfaces.

[0108] Step S102: Form a first doped layer on the first surface and a second doped layer on the second surface.

[0109] Step S104: Remove the first doped layer and form a third doped layer on the first surface from which the first doped layer has been removed, the doping type of the third doped layer being opposite to that of the second doped layer.

[0110] Step S106: Perform patterned etching and surface texturing on the third doped layer to form a metal contact region and a non - metal contact region.

[0111] The method for manufacturing a solar cell provided in this embodiment adopts a post - texturing route: doping the semiconductor substrate first and then performing processes such as grooving and texturing according to structural requirements, which can effectively improve the preparation flexibility and cell stability. During the preparation process, doped layers are first formed on both sides, then the first doped layer on the first surface is completely removed, and a third doped layer is re - formed on this surface. Thus, doped layers with different doping types can be formed on both sides of the semiconductor substrate to form a double - sided passivated contact structure. Patterned etching (grooving) and surface texturing (texturing) are performed on the third doped layer to form a metal contact region and a non - metal contact region on the front surface of the solar cell. The metal contact region can be used to connect metal electrodes. Due to the existence of the passivated contact structure, the contact between the semiconductor substrate and the metal electrode can be improved, effectively alleviating the recombination effect and damage to the semiconductor substrate. The non - metal contact region has a textured surface, which can reduce reflection loss and improve the photoelectric conversion efficiency.

[0112] Next, in combination with Figure 1 , each step in steps S100 - S106 and optional other steps will be elaborated in detail.

[0113] Step S100: Provide a semiconductor substrate having opposite first and second surfaces.

[0114] The semiconductor substrate can be single - crystal silicon, poly - crystal silicon, or other semiconductor materials. By appropriate doping, the conductivity of the semiconductor substrate can be adjusted to form an N - type semiconductor substrate or a P - type semiconductor substrate. In an optional embodiment, the semiconductor substrate can be an N - type single - crystal silicon substrate or a P - type single - crystal silicon substrate.

[0115] The semiconductor substrate includes opposite first and second surfaces. Depending on the actual application, it can also be divided into a front side (light-receiving surface) and a back side (backlight surface). Hereinafter, taking the first surface as the front side and the second surface as the back side, each embodiment will be elaborated in detail.

[0116] In practical applications, various contaminants may adhere to the surface of the semiconductor substrate, such as dust, grease, moisture, etc. These contaminants will reduce the light absorption efficiency and increase the resistance, thus affecting the performance of the solar cell. Therefore, it is necessary to pre-treat the semiconductor substrate, such as removing oxides, removing surface coatings, texturing, etc., to improve the preparation yield. An exemplary solution will be provided below.

[0117] In an alternative embodiment, the first and second surfaces of the semiconductor substrate can be cleaned with chemical solutions. Among them, the chemical solutions include acidic chemical solutions and alkaline chemical solutions. The acidic chemical solutions include one or more of hydrofluoric acid, nitric acid, and hydrogen peroxide, and the alkaline chemical solutions include one or more of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide.

[0118] In this embodiment, mechanical damage on the surface of the semiconductor substrate is removed by chemical cleaning. Among them, the chemical cleaning solution can be used in sequence with one or more of HF (hydrofluoric acid), HNO3 (nitric acid), KOH (potassium hydroxide), NaOH (sodium hydroxide), TMAH (tetramethylammonium hydroxide), and H2O2 (hydrogen peroxide). By cleaning the semiconductor substrate with the above chemical solutions, their characteristics can be comprehensively utilized to remove oxides, organic substances, etc. on the semiconductor surface, achieving comprehensive cleaning and repair of the semiconductor substrate surface, and improving the quality of the semiconductor substrate. The cleaned surface is suitable for receiving the deposition and treatment of various materials, which helps the subsequent preparation process.

[0119] It should be noted that different chemical solutions and combinations can be selected according to the actual situation to meet different application requirements. An exemplary embodiment will be provided below.

[0120] In an alternative embodiment, the steps of cleaning the first and second surfaces of the semiconductor substrate with chemical solutions can include: at 20 - 30 °C, cleaning the semiconductor substrate with a hydrofluoric acid solution with a mass percentage of 1% - 10% for 10 - 180 s until the first and second surfaces are hydrophobic. At 60 - 80 °C, cleaning the semiconductor substrate with a potassium hydroxide solution with a mass percentage of 0.5% - 10% and a preset auxiliary agent for 60 - 210 s.

[0121] In practical applications, HF liquid can be used to clean and remove oxides on the surface of a semiconductor substrate at room temperature. Continuous cleaning can make the surface of the semiconductor substrate hydrophobic to achieve better coating or deposition effects in subsequent processes. Using KOH liquid at a higher temperature can further remove surface organic substances and metal oxides, improving the cleaning efficiency. Using a preset auxiliary agent (such as a surfactant, a stabilizer, a buffer, etc.) in the KOH liquid can further optimize the cleaning effect.

[0122] In this embodiment, through reasonable combination of chemical liquids and setting conditions, comprehensive cleaning of the surface of the semiconductor substrate can be achieved in a short time, improving the quality of the semiconductor substrate.

[0123] The above-mentioned multiple embodiments introduce the pretreatment of the surface of the semiconductor substrate to optimize the preparation yield. The following will further introduce the preparation process.

[0124] Step S102, forming a first doping layer on the first surface and a second doping layer on the second surface.

[0125] To improve the battery efficiency, other structural layers can be added to the surface of the semiconductor substrate to improve the carrier recombination problem caused by the direct contact between the semiconductor substrate and the metal electrode. For example, a SiO2 / poly silicon structure (tunneling oxide / poly silicon structure) can be deposited and doped on both sides of the semiconductor substrate to form a first doping layer on the first surface and a second doping layer on the second surface. An exemplary preparation scheme is as follows: A tunneling oxide layer and a poly silicon layer can be sequentially prepared on one side (such as the first side) of the semiconductor substrate by using CVD, LPCVD, PECVD or other methods, and the poly silicon layer is doped (group III element or group V element) to form a doped poly silicon layer. The tunneling oxide layer and the doped poly silicon layer together constitute a doping layer (such as the first doping layer), jointly forming a passivation contact structure of the battery, which can provide excellent passivation performance. Among them, the tunneling oxide layer can provide a physical passivation effect, making the surface of the semiconductor substrate not in direct contact with the metal electrode, effectively reducing the probability of carrier recombination, and improving the open circuit voltage and fill factor of the battery. The doped poly silicon layer can provide a chemical passivation effect. During the high-temperature annealing process, the doped atoms are activated and diffuse from the poly silicon layer into the semiconductor substrate, forming a shallow junction distribution at the interface, triggering strong band bending at the interface, and forming a potential barrier. The existence of this potential barrier allows majority carriers to pass through and prevents minority carriers from moving towards the interface, reducing the recombination probability of carriers at the interface, thereby achieving the purpose of passivating the interface. The doping depth of the first doping layer can be 30 - 500 nm, and the surface doping concentration can be 1e 18 -1e 21 cm 3 ; The doping depth of the second doping layer can be 30 - 500 nm, and the surface doping concentration can be 1e 18 -1e21 cm 3 Next, an exemplary solution is provided below.

[0126] In an alternative embodiment, step S102 may include: depositing and doping a first tunneling oxide polysilicon structure on the first surface by LPCVD or PECVD to form the first doped layer; depositing and doping a second tunneling oxide polysilicon structure on the second surface by LPCVD or PECVD to form the second doped layer.

[0127] In this embodiment, LPCVD or PECVD is used to introduce a passivation contact structure (the first doped layer, the second doped layer) on both sides of the semiconductor substrate. However, since depositions such as LPCVD do not have directionality, the SiO 2 / poly silicon structure (poly layer) may be deposited on the front, side, and back of the semiconductor substrate, forming a wrap, that is, the phenomenon of overplating occurs. In this case, doping will cause the doping types of the two poly layers on both sides to be the same, so that the photoelectric conversion (P-N structure) cannot be achieved. Therefore, it is necessary to prepare poly layers with different doping types step by step to ensure the performance of the solar cell. How to prepare poly layers with different doping types will be further introduced below.

[0128] Step S104, removing the first doped layer, and forming a third doped layer on the first surface where the first doped layer has been removed, the doping type of the third doped layer being opposite to that of the second doped layer.

[0129] For example, the first doped layer can be treated by a chain cleaner, a corrosive slurry, an acidic or alkaline chemical solution to completely remove the first doped layer. In the case where the first doped layer has been removed, a SiO2 / poly silicon structure (poly layer) is redeposited on the first surface, and an element with a doping type opposite to that of the second doped layer is incorporated. At this time, since the surface of the second doped layer has been oxidized to form silicon oxide glass, the newly incorporated element cannot be incorporated into the second doped layer, thereby ensuring that poly layers with opposite doping types can be formed on both sides of the semiconductor substrate, so that a P-N structure can be formed and photoelectric conversion can be achieved. Multiple exemplary solutions will be provided below.

[0130] In an alternative embodiment, step S104 may include: removing the silicon oxide glass on the surface of the first doped layer; etching the first doped layer by a chemical solution to remove the first doped layer. Wherein, the chemical solution includes: an acidic chemical solution, or an alkaline chemical solution; the acidic chemical solution is a hydrofluoric acid / nitric acid mixed solution, and the alkaline chemical solution is any one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide.

[0131] Taking an N-type monocrystalline silicon substrate as an example, first deposit a poly layer (SiO2 / poly silicon structure) on both sides and dope with boron to form a first doped layer (boron poly layer) on the first side (upper surface) and a second doped layer (boron poly layer) on the second side (lower surface). Remove the silicon oxide glass (boron element, corresponding to borosilicate glass; if it is phosphorus element, it corresponds to phosphosilicate glass) on the surface of the first doped layer through a chain cleaner or a printed corrosive slurry line, and then etch the first doped layer with an acidic or alkaline chemical solution to remove the entire first doped layer. Among them, the chemical solution can be KOH or NaOH or TMAH or HF / HNOS (hydrofluoric acid mixed with nitric acid) solution.

[0132] In this embodiment, first remove the BSG on the upper surface, and then perform alkali polishing or acid polishing to remove the entire poly layer (the first doped layer), which is convenient for subsequent deposition of the third doped layer (phosphorus poly layer).

[0133] It should be noted that the doping types of the poly layers on both sides of the semiconductor substrate can be determined according to the specific design requirements of the solar cell (the doping type of the semiconductor substrate, front junction or back junction, etc.). For example: for an N-type back junction solar cell, the upper surface of its N-type substrate is a phosphorus-doped layer, and the lower surface is a boron-doped layer. For an N-type front junction solar cell, the upper surface of its N-type substrate is a boron-doped layer, and the lower surface is a phosphorus-doped layer.

[0134] The following introduces an exemplary preparation scheme for the third doped layer.

[0135] In an alternative embodiment, step S104 may further include: depositing and doping a third tunneling oxidation polysilicon structure on the first side where the first doped layer has been removed through LPCVD or PECVD to form the third doped layer; wherein, the doping includes: doping an element with a doping type opposite to that of the second doped layer in the third tunneling polysilicon structure.

[0136] Continuing with the above example, in the case of removing the first doped layer (boron poly layer) on the upper surface of the N-type monocrystalline silicon substrate, redeposit the SiO2 / poly layer on the first side through LPCVD, PECVD, etc. and dope with phosphorus to form a third doped layer (phosphorus poly layer) on the first side. Since the silicon oxide glass on the surface of the second doped layer is not removed, phosphorus cannot be doped into the second doped layer, and thus a double-sided poly passivation contact structure with opposite doping types can be prepared to achieve photoelectric conversion.

[0137] In this embodiment, the poly layers on both sides of the semiconductor substrate are prepared step by step, so that the doping types of the poly layers on both sides are different, effectively ensuring photoelectric conversion and improving the metal contact on both sides and reducing recombination.

[0138] During the process of phosphorus doping, since the silicon oxide glass (borosilicate glass) on the surface of the second doping layer is not removed, phosphorus cannot enter the second doping layer and may form phosphosilicate glass (PSG) on the surface of the second doping layer after oxidation. To improve the battery performance, impurities on the surface of the second doping layer can be removed by etching, corrosion, etc. An exemplary solution will be provided below.

[0139] In an alternative embodiment, the method for manufacturing the solar cell further includes processing the second doping layer, and the steps may include: removing the silicon oxide glass on the surface of the second doping layer; etching the second doping layer with a chemical solution to remove edge plating or the polysilicon layer on the surface. Among them, the chemical solution includes: an acidic chemical solution or a basic chemical solution; the acidic chemical solution is a hydrofluoric acid / nitric acid mixed solution, and the basic chemical solution is any one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide.

[0140] Continuing with the above example, the silicon oxide glass (phosphorus element, corresponding to phosphosilicate glass; if it is a boron element, it corresponds to borosilicate glass) on the surface of the second doping layer (boron poly layer) can be removed by a chain cleaning machine or printing a corrosive slurry. Then, etching is performed with an acidic or basic chemical solution to remove edge plating or the polysilicon layer on the surface. Among them, the chemical solution can be a KOH or NaOH or TMAH or HF / HNOS (hydrofluoric acid mixed with nitric acid) solution.

[0141] In this embodiment, the PSG on the surface of the second doping layer is removed and polished, so that after the deposition process, there is only a phosphorus poly layer on the front side of the solar cell and only a boron poly layer on the back side. That is, the doping types of the double-sided poly passivation contact structure are opposite, further ensuring the photoelectric conversion effect.

[0142] The above-mentioned multiple embodiments introduce the solutions for manufacturing the double-sided poly passivation contact structure. Next, how to further optimize the solar cell structure will be introduced.

[0143] S106, perform patterned etching and surface texturing on the third doping layer to form a metal contact area and a non-metal contact area.

[0144] In practical applications, the structure of the third doping layer on the front side of the solar cell can be optimized or new material layers can be added to further improve the photoelectric conversion efficiency. For example, patterned etching is performed on at least part of the surface of the third doping layer through processes such as laser transfer printing and screen printing to form a metal contact area for connecting a metal electrode. At least part of the surface of the third doping layer can also be subjected to surface texturing to form a non-metal contact area with a pyramid texture or a corrosion pit texture, reducing the reflection of light on the material surface, improving the light absorption efficiency, and thus enhancing the photoelectric conversion efficiency.

[0145] Multiple exemplary solutions will be provided below.

[0146] In an alternative embodiment, as Figure 2 shown, step S106 may include:

[0147] Step S200, determine a first region and a second region in the third doped layer according to a preset metal gate line structure.

[0148] Step S202, for the second region: remove the silicon oxide glass on the surface and etch it with a chemical solution to remove the polysilicon layer on the surface; in the case where the polysilicon layer on the surface has been removed, perform surface texturing on the second region to form the non-metal contact region.

[0149] Step S204, for the first region: print a protective paste; in the case where the silicon oxide glass on the surface of the second region has been removed, clean the protective paste; in the case where the protective paste has been cleaned off, remove the polysilicon layer on the surface with a chemical solution to form the metal contact region.

[0150] For example, a first region and a second region can be determined in the third doped layer according to the required metal gate line (electrode) structure. Among them, the first region corresponds to the metal contact region for connecting the metal electrode.

[0151] The second region corresponds to the non-metal contact region. The first region and the second region can be arranged alternately and adjacent to each other. For the second region, the silicon oxide glass on the surface can be removed by laser film opening or printing a corrosive paste, and etched with an acidic or alkaline chemical solution to remove the polysilicon layer on the surface. Then, surface texturing can be performed on the second region to form a velvet-like non-metal contact region. For the first region, a protective paste resistant to acid or alkali can be printed first. After the silicon oxide glass of the second region has been removed by chemical solution cleaning, the protective paste can be washed off. Then, it is etched with an acidic or alkaline chemical solution to remove the polysilicon layer on the surface, that is, polished, to form the metal contact region. Since the metal contact region is a polished surface, slurry damage can be reduced. The chemical solutions used in the foregoing process can be KOH or NaOH or TMAH or HF / HNO 3 chemical solution.

[0152] In this embodiment, by dividing the third doped layer into a first region and a second region and adopting different treatment schemes, a metal contact region and a velvet-like non-metal contact region can be formed, while improving the metal contact on both sides and enhancing the photoelectric conversion efficiency.

[0153] In an alternative embodiment, the surface texturing process for the second region may include: at 60 - 90 °C, performing a surface texturing process on the second region for 350 - 600 s using a chemical solution and a preset auxiliary agent; wherein the chemical solution is any one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide, the alkali concentration of the chemical solution is 0.2% - 5%, and the concentration of the auxiliary agent is 0.2% - 5%.

[0154] For example, a chemical solution supplemented with a preset auxiliary agent can be used to perform a surface texturing process on the second region. Among them, the chemical solution used can be KOH, NaOH, or TMAH, and the alkali concentration can be 0.5% - 5%. The concentration of the auxiliary agent can be 0.2% - 5%. The reaction temperature can be 60 - 90 °C, and the reaction time can be 350 - 600 s. The surface texturing process can specifically be to form pyramid and / or inverted pyramid structures on the surface. The base size of the pyramid formed by the surface texturing process is 0.5 - 6 μm, the height of the pyramid is 0.3 - 5 μm, and the reflectivity of the non-metal contact area in the visible light range is 7 - 15%.

[0155] In this embodiment, by performing a surface texturing process on the second region, a non-metal contact area with a pyramid matte surface or a corrosion pit matte surface can be obtained, which can reduce the reflection of light, improve the light absorption efficiency of the solar cell, and thus enhance the photoelectric conversion efficiency.

[0156] In an alternative embodiment, the method for manufacturing the solar cell may further include: forming a first anti-reflection layer on a side of the processed third doping layer away from the semiconductor substrate; processing the second doping layer; and forming a second anti-reflection layer on a side of the processed second doping layer away from the semiconductor substrate.

[0157] The processing of the second doping layer in this embodiment can be the aforementioned process of removing the silicon oxide glass on the surface of the second doping layer and performing chemical polishing. Depositing one or more materials of SiNx (silicon nitride), SiO 2 (silicon oxide), and silicon oxynitride (SiONx) on a side of the processed third doping layer away from the semiconductor substrate to form a first anti-reflection layer. Depositing one or more materials of SiNx (silicon nitride), SiO 2 (silicon oxide), and silicon oxynitride (SiONx) on a side of the processed second doping layer away from the semiconductor substrate to form a second anti-reflection layer.

[0158] In this embodiment, depositing anti-reflection layers on both sides of the semiconductor substrate can further reduce the reflection of light and increase the absorption rate of light in the semiconductor material, thereby significantly enhancing the photoelectric conversion efficiency of the battery.

[0159] In an alternative embodiment, the method for preparing the solar cell may further include: cleaning the third doped layer and the second doped layer after treatment with a hydrofluoric acid solution with a mass percentage of 2%-10% to remove the silicon oxide glass on the surface.

[0160] In this embodiment, the third doped layer and the second doped layer after treatment can be cleaned with a wt2%-10% HF solution to completely remove the silicon oxide glass on both sides of the silicon wafer.

[0161] To enhance the passivation effect at the interface, the solar cell structure can be further optimized. An exemplary solution is provided below.

[0162] In an alternative embodiment, the method for preparing the solar cell may further include: sequentially forming a first field passivation layer and a first antireflection layer on the side of the treated third doped layer away from the semiconductor substrate according to the doping type of the third doped layer; and / or sequentially forming a second field passivation layer and a second antireflection layer on the side of the treated second doped layer away from the semiconductor substrate according to the doping type of the second doped layer.

[0163] In practical applications, it is possible to determine whether to prepare a field passivation layer according to the doping type (N-type or P-type) of each doped layer. For example, if the doping type of the third doped layer is P-type, AlOx is deposited on the third doped layer to form a first field passivation layer, and then a corresponding material can be deposited on the first field passivation layer to form a first antireflection layer. Similarly, if the doping type of the second doped layer is P-type, AlOx is deposited on the third doped layer to form a second field passivation layer, and then a corresponding material can be deposited on the second field passivation layer to form a second antireflection layer. Of course, if the doping type is N-type, a field passivation layer can also be prepared, which is not limited here.

[0164] In this embodiment, adding a field passivation layer to the solar cell structure can further enhance the interface passivation effect.

[0165] In an alternative embodiment, the method for preparing the solar cell may further include: forming a first electrode on the side of the first region away from the semiconductor substrate; and forming a second electrode on the side of the second doped layer away from the semiconductor.

[0166] In practical applications, methods such as electroplating, screen printing, and laser transfer printing can be used to deposit metal grid lines in the first region to form a first electrode, and to form a second electrode on the side of the second doped layer away from the semiconductor substrate. In the case where there are a field passivation layer and an antireflection layer, sintering can make the metal paste penetrate through the long passivation layer and the antireflection layer and contact the double-sided poly passivation contact structure to form a metal electrode.

[0167] In this embodiment, by preparing the electrodes, the photocurrent can be better collected, and the photoelectric conversion efficiency can be improved.

[0168] In an alternative embodiment, the method for manufacturing the solar cell may further include: drying and curing the first electrode and the second electrode; wherein, the drying temperature is 500 - 850 °C, the drying time is 30 - 300 s, the curing temperature is 150 - 300 °C, and the curing time is 6 - 10 min.

[0169] In this embodiment, by drying and curing the coating on the silicon wafer, the adhesion of the electrode can be improved, thereby improving the reliability and efficiency of the battery.

[0170] In an alternative embodiment, forming the first electrode on a side of the first region away from the semiconductor substrate may include: emitting a laser beam from a laser to a transfer paper, wherein a slurry is pre-coated on a surface of the transfer paper, and the laser beam is configured to: cause at least a part of the slurry on the surface of the transfer paper to fall off to the first region to form the first electrode; wherein, a particle size of metal powder particles of the slurry is 0 - 7 μm, and a power of the laser is 200 - 400 W.

[0171] For example, laser transfer technology can be used for grid line deposition. A laser beam is emitted from a laser through a transfer paper pre-coated with a slurry on its surface. Part of the slurry on the transfer paper falls off the transfer paper to the first region due to the energy emitted by the laser beam to form an electrode and an electric field. To ensure the printing yield and speed, the particle size of metal powder particles of the slurry can be 0 - 7 μm, and the power of the laser can be 200 - 400 W.

[0172] In this embodiment, the laser transfer technology is used to prepare the battery electrodes, which can obtain a narrower grid line width (≤15 μm) and a higher grid line height (≥20 μm). While ensuring that the grid lines have good sheet resistance, it can greatly reduce the recombination in the metal contact area and the amount of metal paste used. For the front electrode of the battery, the line width can be reduced and the grid line height can be increased, reducing the blockage of the light absorption surface by the grid lines, increasing the light absorption amount, and the laser technology has higher precision and is easier to align graphically compared to screen printing. For the back electrode of the battery, the line width can be reduced and the grid line height can be increased. Reducing the line width can reduce the contact area between the metal and the battery surface, reduce the damage of the metal to the silicon wafer, and increasing the grid line height can enable the metal grid lines to have good sheet resistance and ensure the extraction and transmission efficiency of charges. Laser transfer does not require plate making or contacting the silicon wafer, and will not cause pressure on the silicon wafer, so the silicon wafer is not easily broken. And the printing process is simple and easy to operate, thus avoiding a series of problems caused by reasons such as screen printing equipment, and then improving the production speed and yield. In addition, the laser transfer equipment occupies a small area and has low equipment cost, and laser transfer can meet the development of thinner wafers for future solar cells, reduce the raw material cost, improve the battery efficiency, is suitable for application and promotion, and is conducive to the rapid development and large-scale application of the battery.

[0173] Embodiment 2

[0174] This embodiment provides a solar cell, which can be obtained by any of the methods in Embodiment 1 above. The following will describe in more detail the exemplary embodiments according to the present application with reference to the accompanying drawings.

[0175] As Figure 3 shown, the solar cell may include: a semiconductor substrate 1, a first doping layer, a second doping layer, a first field passivation layer 4, a second field passivation layer, a first antireflection layer 5, a second antireflection layer, a first electrode, and a second electrode 7.

[0176] The following will introduce the structures and cooperation relationships of the semiconductor substrate 1, the first doping layer, and the second doping layer respectively.

[0177] The semiconductor substrate 1 may have opposite first and second surfaces, and the first surface includes alternately arranged first and second regions. Among them, the first region is a metal contact region, and the second region is a non-metal contact region. In an alternative embodiment, the semiconductor substrate 1 may be N-type doped or P-type doped. For example, an N-type single crystal silicon substrate or a P-type single crystal silicon substrate.

[0178] The first doping layer may be provided in the first region. In an alternative embodiment, the first doping layer may include a first tunneling oxide layer 2 and a first doped polysilicon layer 3 (SiO 2 / poly silicon structure, that is, the first tunneling oxide / doped polysilicon layer). Figure 3For example, the first doped polysilicon layer can be a P+ layer (heavily doped layer). It should be noted that in different types of (N-type, P-type; front junction, back junction) solar cells, the doping elements of the first doped layer are different. The doping element can be a Group III element (such as boron) or a Group V element (such as phosphorus). The first doped layer can be a polished surface obtained through polishing treatment and can be used to connect metal electrodes.

[0179] A second doped layer, the second doped layer is provided on the second surface. The second doped layer can include a second tunneling oxide layer and a second doped polysilicon layer 6 (SiO 2 / poly silicon structure, that is, a second tunneling oxide / doped polysilicon layer). For Figure 3 example, the second doped polysilicon layer 6 can be an N+ layer (heavily doped layer). Among them, the doping types of the first doped layer and the second doped layer are opposite. In an alternative embodiment, the doping types include: N-type doping, or P-type doping.

[0180] It can be seen that the solar cell of the embodiment of the present application has a double-sided poly passivation contact structure with opposite doping types, which can improve the contact between the semiconductor substrate and the metal electrode, effectively alleviate the recombination effect and damage to the semiconductor substrate, and ensure the photoelectric conversion efficiency. And the metal contact area is a polished surface, which can reduce the damage of the paste.

[0181] In an alternative embodiment, the second region is a textured surface, and the textured surface includes a pyramid textured surface and / or an etched pit textured surface.

[0182] In this embodiment, the second region can be a non-metal contact area with a pyramid textured surface and / or an etched pit textured surface formed by chemical agent surface texturing treatment or other treatment methods. By setting the non-metal contact area in a textured surface shape, the reflection of light can be reduced, and the light absorption efficiency and photoelectric conversion efficiency can be improved.

[0183] In an alternative embodiment, the solar cell may further include: a first electrode provided in the first region; a second electrode 7 provided on at least a part of the surface of the second doped layer away from the semiconductor substrate.

[0184] In this embodiment, setting the first electrode in the metal contact area can greatly reduce the carrier recombination and the amount of metal paste used. Setting the first electrode and the second electrode on the front and back of the solar cell can better collect the photocurrent and improve the photoelectric conversion efficiency.

[0185] In an alternative embodiment, the solar cell may further include: a first field passivation layer disposed on a side of the first doped layer away from the semiconductor substrate; and / or a second field passivation layer disposed on a side of the second doped layer away from the semiconductor substrate. The first field passivation layer may have a thickness of 4-20 nm, a refractive index of 1.4-1.8, and a transmittance of ≥80% in the visible light range; the second field passivation layer may have a thickness of 4-20 nm, a refractive index of 1.4-1.8, and a transmittance of ≥80% in the visible light range;

[0186] In this embodiment, by providing field passivation layers on the front and back sides of the silicon wafer, the interface passivation effect can be further enhanced, the metal contact degree on both sides can be improved, recombination can be reduced, and the cell performance can be enhanced. Among them, the field passivation layer may include AlOx (aluminum oxide).

[0187] In an alternative embodiment, the solar cell may further include: a first antireflection layer disposed on a side of the first doped layer away from the semiconductor substrate or on a side of the first field passivation layer away from the semiconductor substrate; a second antireflection layer disposed on a side of the second doped layer away from the semiconductor substrate or on a side of the second field passivation layer away from the semiconductor substrate.

[0188] In this embodiment, by providing antireflection layers on the front and back sides of the silicon wafer, the reflection of light can be further reduced and the absorption rate of light in the semiconductor material can be increased, thereby significantly enhancing the photoelectric conversion efficiency of the cell. Among them, the antireflection layer includes one or more of SiNx (silicon nitride), SiO 2 silicon dioxide, and SiONx (silicon oxynitride), and the antireflection layer may be a single-layer film structure or a combination of several silicon nitride films with different refractive indices and thicknesses.

[0189] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0190] For ease of description, the orientation or positional relationship indicated by orientation terms such as "front, rear, top, bottom, left, right", "horizontal, vertical, perpendicular, horizontal" and "top, bottom", etc. is usually based on the orientation or positional relationship shown in the drawings. This is only for the convenience of describing the present application and simplifying the description. Without contrary explanation, these orientation terms do not indicate or imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation on the protection scope of the present application; the orientation terms "inside, outside" refer to the inside and outside relative to the contour of each component itself. For example, if the device in the drawing is inverted, the device described as "above other devices or structures" or "on top of other devices or structures" will then be positioned as "below other devices or structures" or "beneath other devices or structures". Thus, the exemplary term "above" can include both the orientation of "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and corresponding interpretations should be made for the relative spatial descriptions used here.

[0191] Unless otherwise clearly specified and defined, terms such as "mounted", "connected", "connected to", "fixed" and other terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection, an electrical connection, or a communication connection; it can be directly connected, or indirectly connected through an intermediate medium, and can be the internal connection or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0192] Unless otherwise clearly specified and defined, the first feature being "above" or "below" the second feature can include the direct contact between the first and second features, or can also include the situation where the first and second features are not in direct contact but are in contact through other features between them. Moreover, the first feature being "above", "over" and "on top of" the second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the horizontal height of the first feature is higher than that of the second feature. The first feature being "below", "beneath" and "under" the second feature includes the first feature being directly below and obliquely below the second feature, or simply indicating that the horizontal height of the first feature is lower than that of the second feature.

[0193] Unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the drawings are not drawn in actual proportional relationships. Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such technologies, methods, and devices should be regarded as part of the authorization specification. In all the examples shown and discussed here, any specific value should be construed as merely exemplary and not as a limitation. Therefore, other examples of the exemplary embodiments may have different values. It should be noted that like reference numerals and letters denote like items in the following drawings, and thus, once an item is defined in one drawing, it does not require further discussion in subsequent drawings.

[0194] It should also be noted that the "one embodiment", "another embodiment", "embodiment", etc. mentioned in this specification refer to the specific features, structures, or characteristics described in connection with that embodiment being included in at least one embodiment generally described in the present application. The same expression appearing in multiple places in the specification does not necessarily refer to the same embodiment. Further, when describing a specific feature, structure, or characteristic in connection with any one embodiment, it is intended that the implementation of such feature, structure, or characteristic in combination with other embodiments also fall within the scope of the present application.

[0195] In the above embodiments, the descriptions of the various embodiments each have their own emphasis. For parts not detailed in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

[0196] It should also be noted that the above are only the preferred embodiments of the present application, and do not limit the scope of patent protection of the present application. Any equivalent structural or equivalent process transformation made using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall similarly be included in the scope of patent protection of the present application.

Claims

1. A method for preparing a solar cell, characterized in that: include: Providing a semiconductor substrate having a first side and a second side opposite to each other; forming a first doped layer on the first surface and forming a second doped layer on the second surface; removing the first doping layer, and forming a third doping layer on the first surface from which the first doping layer has been removed, wherein the third doping layer and the second doping layer have opposite doping types; Performing patterning etching and surface texturing on the third doped layer to form a metal contact area and a non-metal contact area; The third doped layer is subjected to patterning etching and surface texturing treatment, comprising: According to a preset metal gate line structure, determining a first region and a second region in the third doping layer; For the second region: removing the silicon-oxygen glass on the surface, and etching with a chemical solution to remove the surface polysilicon layer; in the case where the surface polysilicon layer has been removed, performing surface texturing treatment on the second region to form the non-metallic contact region; The second region is subjected to a surface texturing treatment, comprising: At 60-90° C., the second region is subjected to surface texturing treatment for 350-600 seconds using a chemical solution and a preset auxiliary agent to form a non-metallic contact region having a pyramid and / or inverted pyramid structure; The chemical liquid is any one of potassium hydroxide liquid, sodium hydroxide liquid and tetramethylammonium hydroxide liquid, the alkali concentration of the chemical liquid is 0.2%-5%, and the concentration of the auxiliary agent is 0.2%-5%; the size of the pyramid base is 0.5-6 μm, the height of the pyramid is 0.3-5 μm, and the reflectivity of the non-metallic contact area in the visible light range is 7-15%; For the first area: printing protective paste; cleaning the protective paste after removing the silicon-oxygen glass on the surface of the second area; removing the surface polysilicon layer by chemical solution after cleaning the protective paste to form the metal contact area.

2. The method according to claim 1, characterized in that Also includes: forming a first anti-reflection layer on a side of the processed third doped layer away from the semiconductor substrate; processing the second doping layer; A second anti-reflection layer is formed on a side of the processed second doped layer away from the semiconductor substrate.

3. The method according to claim 2, characterized in that The second doping layer is processed, comprising: removing the silicon-oxygen glass on the surface of the second doping layer; Etching the second doped layer by chemical solution to remove edge plating or surface polysilicon layer; Wherein, the chemical liquid includes: an acidic chemical liquid, or an alkaline chemical liquid; the acidic chemical liquid is a hydrofluoric acid / nitric acid mixed liquid, and the alkaline chemical liquid is any one of a potassium hydroxide liquid, a sodium hydroxide liquid, and a tetramethylammonium hydroxide liquid.

4. The method according to claim 2, characterized in that: Also includes: The third doped layer and the second doped layer are cleaned with a hydrofluoric acid solution having a mass percentage of 2% to 10% to remove the silicon oxide glass on the surface.

5. The method according to claim 2, characterized in that Also includes: According to the doping type of the third doping layer, a first field passivation layer and a first anti-reflection layer are sequentially formed on a side of the processed third doping layer away from the semiconductor substrate; and / or According to the doping type of the second doping layer, a second field passivation layer and a second anti-reflection layer are sequentially formed on a side of the processed second doping layer away from the semiconductor substrate.

6. The method according to claim 1, characterized in that Also includes: Cleaning the first and second surfaces of the semiconductor substrate by chemical solution; Among them, the chemical liquid includes acidic chemical liquid and alkaline chemical liquid, the acidic chemical liquid includes one or more of hydrofluoric acid liquid, nitric acid liquid, and hydrogen peroxide liquid, and the alkaline chemical liquid includes one or more of potassium hydroxide liquid, sodium hydroxide liquid, and tetramethylammonium hydroxide liquid.

7. The method according to claim 6, characterized in that The step of cleaning the first surface and the second surface of the semiconductor substrate by using a chemical solution comprises: Cleaning the semiconductor substrate with a 1%-10% by mass hydrofluoric acid solution at 20-30° C. for 10-180 seconds until the first surface and the second surface become hydrophobic; The semiconductor substrate is cleaned at 60-80° C. for 60-210 seconds by using a potassium hydroxide solution containing 0.5%-10% by mass and a preset auxiliary agent.

8. The method according to claim 1, characterized in that Forming a first doping layer on the first surface and forming a second doping layer on the second surface, comprising: Depositing a first tunneling oxide polysilicon structure on the first surface by LPCVD or PECVD and doping to form the first doped layer; A second tunneling oxide polysilicon structure is deposited on the second surface by LPCVD or PECVD and doped to form the second doped layer.

9. The method according to claim 1, characterized in that: Removing the first doping layer includes: removing the silicon-oxygen glass on the surface of the first doping layer; Etching the first doped layer by using a chemical solution to remove the first doped layer; Wherein, the chemical liquid includes: an acidic chemical liquid, or an alkaline chemical liquid; the acidic chemical liquid is a hydrofluoric acid / nitric acid mixed liquid, and the alkaline chemical liquid is any one of a potassium hydroxide liquid, a sodium hydroxide liquid, and a tetramethylammonium hydroxide liquid.

10. The method according to claim 1, characterized in that Forming a third doping layer on the first surface from which the first doping layer has been removed, comprising: Depositing a third tunneling oxide polysilicon structure on the first surface from which the first doped layer has been removed by LPCVD or PECVD and doping the structure to form the third doped layer; The doping includes: doping an element of an opposite doping type to that of the second doping layer into the third tunneling polysilicon structure.

11. The method according to any one of claims 1 to 10, characterized in that Also includes: forming a first electrode on a side of the first region away from the semiconductor substrate; and A second electrode is formed on a side of the second doped layer away from the semiconductor.

12. The method according to claim 11, characterized in that Forming a first electrode on a side of the first region away from the semiconductor substrate, comprising: The laser beam is emitted to the transfer paper by a laser, wherein the surface of the transfer paper is pre-coated with slurry, and the laser beam is used to: cause at least part of the slurry on the surface of the transfer paper to fall off to the first area to form a first electrode; Wherein, the particle size of the metal powder particles in the slurry is 0-7 μm, and the power of the laser is 200-400W.

13. The method according to claim 11, characterized in that Also includes: Drying and curing the first electrode and the second electrode; Among them, the drying temperature is 500-850°C, the drying time is 30-300s, the curing temperature is 150-300°C, and the curing time is 6-10min.

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