Data storage and data reading method, device, electronic device and storage medium

Abstract

The embodiment of the present invention provides a data storage method, device, equipment and medium. The method includes: storing and rearranging n groups of data with a bit width of m to obtain a data group; wherein n is equal to the storage length of a storage unit in a memory, and the data group includes m data subgroups, and one subdata of the n data is arranged in sequence in each data subgroup, and the bit order of the subdata of the same data in different data subgroups is the same; the subdata in the data group is stored in sequence in the m storage units in the memory, so that the data is compactly stored in a "vertical" manner, and n data with a bit width of m are used as the basic access unit, thereby effectively reusing the traditional byte-aligned data access method, realizing data types applicable to any bit width, consistent addressing rules for memory access, and no waste of storage space.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a data storage method, a data reading method, a data storage device, a data reading device, an electronic device and a readable storage medium. Background Art

[0002] Byte is the basic unit of computer data storage. It consists of 8 bits, each bit represents a 0 or 1 (binary). Bit is the smallest unit of information. Figure 1 shown.

[0003] In common programming languages, different data types occupy different numbers of bytes, that is, different amounts of storage space. For example, 8-bit fixed-point (int8) occupies one byte; 16-bit fixed-point (int8) or half-precision floating point (float16) occupies 2 bytes; 32-bit fixed-point (int32) or single-precision floating point (float32) occupies 4 bytes, etc. Figure 2 The number of bits corresponding to different data types is called "bit width". The bit width of traditional data types is a power of 2, that is, bitwidth = 2 n .

[0004] In recent years, with the rapid explosion of artificial intelligence applications and the development of deep learning quantization technology, some new data types have emerged, such as 7-bit floating point (fp7), 4-bit fixed point (int4), 3-bit fixed point (int3), 2-bit fixed point (int2), etc.; among them, fp7 and int3 do not meet the above-mentioned characteristics of bit width being a power of 2. Figure 2 The bit widths of several typical data types are shown.

[0005] A memory address is a concept used to represent the location of data storage. Data in the memory can be accessed through the memory address, and its basic unit is byte. Figure 3 It shows the correspondence between the address and data of a multi-byte memory.

[0006] For data types, if the bit width satisfies bitwidth = 2 n , then its storage and addressing methods are simpler. Figure 4The example of int4 data is shown, and it can be seen that two 4-bit data can be compactly stored as one byte. If you need to find the k-th int4 data, the access to the data can be achieved as follows: first calculate addr = k / 2, sel = k%2 (% represents modulo operation), take out the byte data at the addr position, and select the target data as the high 4 bits or low 4 bits of the byte 8-bit data according to the sel value. The same is true for int2 and other data formats.

[0007] However, for data types with arbitrary bit widths, such as non-power-of-2 data bit widths, the storage and addressing methods are more complicated. For example, for int3 data, Figure 5 As shown, it cannot be compactly stored as one byte, which leads to a contradiction between storage efficiency and addressing difficulty.

[0008] Figure 6 (a) and (b) respectively show two traditional storage methods for non-power-of-2 data bit widths (taking int3 data as an example). Figure 6 (a) The solution stores two int3 data per byte, which means that 2 bits of storage space are wasted for every 8 bits. However, the advantage is that the addressing method is simple, which is similar to the addressing method of the int4 data mentioned above. Figure 6 (b) Int3 data is compactly stored. Eight int3 data can occupy exactly three bytes, without wasting space. However, the addressing mechanism is complex. For example, part of the third int3 data is stored in the first byte, and part of it is stored in the second byte. The address and bit storage rules are complex. In addition, when the data bit width is different, for example, the data type is int5, its bit storage rule is completely different from int3. Summary of the invention

[0009] The technical problem to be solved by the embodiments of the present invention is to provide a data storage method, a data reading method, an apparatus, an electronic device and a readable storage medium, so as to solve the contradiction between the storage efficiency and the addressing difficulty of data types with non-power-of-2 data bit widths.

[0010] In order to solve the above problem, the present invention provides a data storage method, the method comprising:

[0011] Rearrange storage of n groups of data with a bit width of m to obtain a data group; wherein n is equal to the storage length of a storage unit in the memory, and the data group includes m data subgroups, and each data subgroup has a sub-data of n data arranged in sequence, and the sub-data of the same data in different data subgroups have the same bit sequence;

[0012] The sub-data in the data group are sequentially stored in m storage units in the memory.

[0013] Optionally, the storing and rearranging n groups of data with a bit width of m to obtain data groups includes:

[0014] Starting from x being equal to 1, the x-th sub-data among the n data are arranged in sequence until x is equal to m, thereby obtaining the data group.

[0015] Optionally, before storing and rearranging n groups of data with a bit width of m to obtain data groups, the method further includes:

[0016] Receive a series of data with a bit width of m generated by a general-purpose processor or a dedicated accelerator.

[0017] Optionally, after sequentially storing the sub-data in the data group into the m storage units in the memory, the method further comprises:

[0018] Reading sub-data in the data group from m storage units in the memory;

[0019] The sub-data in the read data group are read and rearranged to obtain the n groups of data with a bit width of m.

[0020] Optionally, before reading the sub-data in the data group from the m storage units in the memory, the method further comprises:

[0021] For the k-th target data with a bit width of m to be read, determining the first address of the data group to which the target data belongs in the memory according to k, n and m;

[0022] The reading of the sub-data in the data group from the m storage units in the memory comprises:

[0023] According to the first address, sub-data in the data group are read from m storage units in the memory.

[0024] Optionally, after reading and rearranging the sub-data in the data group to obtain the n groups of data with a bit width of m, the method further includes:

[0025] According to the k and the n, the k-th target data with a bit width of m is extracted from the n groups of data with a bit width of m.

[0026] The present invention also provides a data reading method, the method comprising:

[0027] Reading sub-data in a data group from m storage units in a memory; wherein the data group includes m data sub-groups, each data sub-group includes n groups of sub-data of data with a bit width of m, and the bit sequence of sub-data of the same data in different data sub-groups is the same, and n is equal to the storage length of the storage unit;

[0028] The sub-data in the read data group are read and rearranged to obtain the n groups of data with a bit width of m.

[0029] The present invention also provides a data storage device, the device comprising:

[0030] A storage rearrangement module, used for performing storage rearrangement on n groups of data with a bit width of m to obtain a data group; wherein n is equal to the storage length of a storage unit in the memory, and the data group includes m data subgroups, and in each data subgroup, one subdata of the n data is sequentially arranged, and the bit sequence of the subdata of the same data in different data subgroups is the same;

[0031] The storage module is used to store the sub-data in the data group in the m storage units in the memory in sequence.

[0032] Optionally, the storage rearrangement module includes:

[0033] The arrangement submodule is used to arrange the x-th sub-data in the n data in sequence starting from x equals 1 until x equals m, thereby obtaining the data group.

[0034] Optionally, the device further comprises:

[0035] The data receiving module is used to receive a series of data with a bit width of m generated by a general processor or a dedicated accelerator before storing and rearranging n groups of data with a bit width of m to obtain data groups.

[0036] Optionally, the device further comprises:

[0037] a reading module, configured to read the sub-data in the data group from the m storage units in the memory after sequentially storing the sub-data in the data group in the m storage units in the memory;

[0038] The reading and rearranging module is used to read and rearrange the sub-data in the read data group to obtain the n groups of data with a bit width of m.

[0039] Optionally, the device further comprises:

[0040] a first address determination module, used for determining, before reading the sub-data in the data group from the m storage units in the memory, for the kth target data with a bit width of m to be read, according to k, n and m, the first address of the data group to which the target data belongs in the memory;

[0041] The reading module comprises:

[0042] The reading submodule is used to read the sub-data in the data group from the m storage units in the memory according to the first address.

[0043] Optionally, the device further comprises:

[0044] A data extraction module is used to read and rearrange the sub-data in the data group to obtain the n groups of data with a bit width of m, and then extract the kth target data with a bit width of m from the n groups of data with a bit width of m according to k and n.

[0045] The present invention also provides a data reading device, the device comprising:

[0046] A reading module, used for reading sub-data in a data group from m storage units in a memory; wherein the data group includes m data sub-groups, each data sub-group includes n groups of sub-data of data with a bit width of m, and the bit sequence of sub-data of the same data in different data sub-groups is the same, and n is equal to the storage length of the storage unit;

[0047] The reading and rearranging module is used to read and rearrange the sub-data in the read data group to obtain the n groups of data with a bit width of m.

[0048] The embodiment of the present invention further discloses an electronic device, characterized in that it includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus;

[0049] Memory, used to store computer programs;

[0050] The processor is used to implement any of the method steps described above when executing the program stored in the memory.

[0051] An embodiment of the present invention further discloses a readable storage medium. When instructions in the storage medium are executed by a processor of an electronic device, the electronic device can execute any method step described in the embodiment of the present invention.

[0052] According to an embodiment of the present invention, a data group is obtained by rearranging storage of n groups of data with a bit width of m; wherein n is equal to the storage length of a storage unit in a memory, and the data group includes m data subgroups, and in each data subgroup, a sub-data of the n data is arranged in sequence, and the bit sequence of the sub-data of the same data in different data subgroups is the same; the sub-data in the data group is stored in sequence in m storage units in the memory, so that the data is compactly stored in a "vertical" manner, and n data with a bit width of m are used as the basic access unit, thereby effectively reusing the traditional byte-aligned data access method, and realizing data types applicable to arbitrary bit widths, consistent addressing rules for memory access, and no waste of storage space.

[0053] On the other hand, by reading sub-data in a data group from m storage units in a memory; wherein the data group includes m data sub-groups, and in each data sub-group, n groups of sub-data of data with a bit width of m are arranged in sequence, and the bit sequence of sub-data of the same data in different data sub-groups is the same, and n is equal to the storage length of the storage unit, the sub-data in the read data group are read and rearranged to obtain the n groups of data with a bit width of m, so that data is compactly stored in a "vertical" manner, and n data with a bit width of m are used as the basic access unit, thereby effectively reusing the traditional byte-aligned data access method, and realizing data types applicable to arbitrary bit widths, consistent addressing rules for memory access, and no waste of storage space. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Figure 1 A schematic diagram of a byte is shown;

[0055] Figure 2 A schematic diagram showing the bit widths of several typical data types;

[0056] Figure 3 A schematic diagram showing the correspondence between addresses and data of a multi-byte memory;

[0057] Figure 4 A schematic diagram showing how int4 data can be compactly stored;

[0058] Figure 5 A schematic diagram showing that int3 data cannot be stored compactly;

[0059] Figure 6 Schematic diagrams showing two conventional storage methods for non-power-of-2 data bit widths;

[0060] Figure 7 A flowchart of a data storage method provided by an embodiment of the present invention is shown;

[0061] Figure 8A schematic diagram showing a "vertical" compact storage method for non-power-of-2 data bit widths;

[0062] Fig. 9 A schematic diagram showing the access process of "vertical" compact storage;

[0063] Fig.10 A flowchart of a data reading method according to an embodiment of the present invention is shown;

[0064] Fig.11 A structural block diagram of a data storage device embodiment provided by an embodiment of the present invention is shown;

[0065] Fig.12 A structural block diagram of a data reading device embodiment provided by an embodiment of the present invention is shown;

[0066] Fig.13 A structural block diagram of an electronic device for data storage and data reading according to an exemplary embodiment is shown. DETAILED DESCRIPTION

[0067] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0068] Reference Figure 7 , shows a flowchart of a data storage method provided by an embodiment of the present invention, which may specifically include the following steps:

[0069] Step 101, re-arrange storage of n groups of data with a bit width of m to obtain a data group; wherein, n is equal to the storage length of a storage unit in a memory, and the data group includes m data sub-groups, and in each data sub-group, a sub-data of the n data is arranged in sequence, and the bit sequence of the sub-data of the same data in different data sub-groups is the same.

[0070] In the embodiment of the present invention, for data with a bit width of m, the data is first grouped and rearranged before being stored in the memory. Since the memory is composed of storage units, one storage unit corresponds to one access address, and the storage length of one storage unit is n, for example, the storage length of the storage unit in the memory is 8, so n groups of data with a bit width of m are taken as one group, so for any m, n groups of data with a bit width of m can just be written into m storage units with a storage length of n.

[0071] In the embodiment of the present invention, storage rearrangement refers to the process of rearranging n data into desired data before storing the data. The storage rearrangement is performed on n groups of data with a bit width of m, and the result obtained is called a data group.

[0072] In the embodiment of the present invention, a data with a bit width of m is composed of m sub-data. A sub-data of n data is arranged in sequence, and the rearrangement result is called a data sub-group. Therefore, the data group includes m data sub-groups. After storage rearrangement, a sub-data of n data is arranged in sequence in each data sub-group. The bit sequence of each data in different data sub-groups is the same, that is, the bit sequence of the sub-data of the same data in different data sub-groups is the same.

[0073] For example, Figure 8 The schematic diagram of the "vertical" compact storage method for non-power-of-2 data bit width is shown. Figure 8 (a) Taking int3 data as an example, 8 int3 data are stored as a group, occupying 3 bytes in total, and each byte stores 1 bit of the int3 data. Similarly, for data types with an arbitrary bit width of m (m-bit), 8 data are stored as a group, occupying m bytes in total, and each byte stores 1 bit of the data type, such as Figure 8 (b) is shown. Figure 8 It can be seen that by adopting this storage scheme, any m-bit data type can be stored compactly without wasting space.

[0074] In the embodiment of the present invention, the specific implementation method of storing and rearranging n groups of data with a bit width of m to obtain a data group may include multiple methods, which are not limited in the embodiment of the present invention. The rules and methods of storage and rearrangement can be found in Figure 8 The scheme shown.

[0075] For example, n groups of data with a bit width of m can be regarded as n×m data. To obtain an m×n data group, it is only necessary to arrange the sub-data in the n groups of data with a bit width of m in corresponding positions in the m×n data group.

[0076] In an optional embodiment of the present invention, a specific implementation method of storing and rearranging n groups of data with a bit width of m to obtain a data group may include: starting from x equals 1, arranging the x-th sub-data of the n data in sequence until x equals m, thereby obtaining the data group.

[0077] Arrange the first sub-data of the n data in sequence, then arrange the second sub-data of the n data in sequence, then arrange the third sub-data of the n data in sequence, and so on, until the mth sub-data of the n data is arranged in sequence, thereby obtaining a data group.

[0078] In the embodiment of the present invention, the step of storing and rearranging n groups of data with a bit width of m to obtain data groups can be implemented by software or dedicated hardware circuits, and the embodiment of the present invention does not limit this.

[0079] In an optional embodiment of the present invention, before storing and rearranging n groups of data with a bit width of m to obtain data groups, the method may further include: receiving a series of data with a bit width of m generated by a general-purpose processor or a dedicated accelerator.

[0080] A general-purpose processor is a general-purpose chip that interprets instructions and processes data. A dedicated accelerator is a dedicated chip developed to speed up processing. A general-purpose processor or a dedicated accelerator generates a series of data with a bit width of m, and then stores and rearranges each n groups of data with a bit width of m. A dedicated hardware circuit that stores and rearranges n groups of data with a bit width of m can be integrated into a general-purpose processor or a dedicated accelerator.

[0081] Step 102: Store the sub-data in the data group into m storage units in the memory in sequence.

[0082] In the embodiment of the present invention, for storing the rearranged data group, the data group can be stored in the memory. In specific implementation, the sub-data in the data group can be stored in the memory in sequence, and one data group is written into m storage units.

[0083] For example, Fig. 9 As shown, for the original m-bit data group, that is, n data with a bit width of m, the data is rearranged, that is, the above-mentioned storage rearrangement, to obtain a data group of m bytes, and the data group is written into the memory through the data bus.

[0084] According to an embodiment of the present invention, a data group is obtained by rearranging storage of n groups of data with a bit width of m; wherein n is equal to the storage length of a storage unit in a memory, and the data group includes m data subgroups, and in each data subgroup, a sub-data of the n data is arranged in sequence, and the bit sequence of the sub-data of the same data in different data subgroups is the same; the sub-data in the data group is stored in sequence in m storage units in the memory, so that the data is compactly stored in a "vertical" manner, and n data with a bit width of m are used as the basic access unit, thereby effectively reusing the traditional byte-aligned data access method, and realizing data types applicable to arbitrary bit widths, consistent addressing rules for memory access, and no waste of storage space.

[0085] In an optional embodiment of the present invention, after storing the sub-data in the data group in sequence into the m storage units in the memory, it may also include: reading the sub-data in the data group from the m storage units in the memory; reading and rearranging the sub-data in the data group to obtain the n groups of data with a bit width of m.

[0086] When reading data, each time the sub-data in the data group is read from the m storage units in the memory. Then the sub-data in the read data group is read and rearranged. Reading and rearranging refers to the process of rearranging the data group into the original data with a bit width of m after reading the data group. Reading and rearranging is the restoration of the above-mentioned storage rearrangement, which is the reverse operation of storage rearrangement. After reading and rearranging, exactly n groups of data with a bit width of m are obtained.

[0087] In the embodiment of the present invention, there may be multiple specific implementations of reading and rearranging the sub-data in the data group to obtain the n groups of data with a bit width of m, which are not limited in the embodiment of the present invention.

[0088] For example, for an m×n data group, to obtain n groups of data with a bit width of m, it is only necessary to arrange the sub-data in the m×n data group in the corresponding positions in the n groups of data with a bit width of m.

[0089] In an optional embodiment of the present invention, a specific implementation method of reading and rearranging the sub-data in the data group to obtain the n groups of data with a bit width of m may include: starting from y equals 1, arranging the y, y+n, ..., y+(m-1)n sub-data in the data group in sequence to obtain the yth data with a bit width of m, until y equals n, thereby obtaining n groups of data with a bit width of m.

[0090] Arrange the 1st, 1+n, ..., 1+(m-1)nth sub-data in the data group in sequence to obtain the first data with a bit width of m. Then arrange the 2nd, 2+n, ..., 2+(m-1)nth sub-data in the data group in sequence to obtain the second data with a bit width of m. And so on, until the nth group of data with a bit width of m is obtained. Among them, y, y+n, ..., y+(m-1)n is exactly an arithmetic progression with the first term y, the common difference n, and the number of terms m.

[0091] In the embodiment of the present invention, the step of reading and rearranging the sub-data in the data group to obtain the n groups of data with a bit width of m can be implemented by software or a dedicated hardware circuit, which is not limited in the embodiment of the present invention. The dedicated hardware circuit can be integrated in a general-purpose processor or a dedicated accelerator.

[0092] For example, Fig. 9 As shown, the data group is read from the memory through the data bus, and the data is rearranged, that is, the above-mentioned read rearrangement, to restore it to n data with a bit width of m, that is, the original m-bit data group.

[0093] In an optional embodiment of the present invention, before reading the sub-data in the data group from the m storage units in the memory, it may also include: for the target data with a bit width of m to be read, determining the starting address of the data group to which the target data belongs in the memory according to the k, the n and the m; in a specific implementation method of reading the sub-data in the data group from the m storage units in the memory, it may include: reading the sub-data in the data group from the m storage units in the memory according to the starting address.

[0094] For some data with a column width of m, when reading the kth target data with a bit width of m, it is necessary to first determine the first address of the data group to which the target data belongs in the memory, where the first address is the memory address, such as the memory address. Specifically, the offset can be determined according to the k, the n and the m, and then the first address can be determined according to the offset.

[0095] After the first address is determined, the corresponding storage unit in the memory can be determined according to the first address, and then starting from the storage unit, the sub-data in the data group can be read from the m storage units.

[0096] For example, k is an integer starting from 0. When reading the kth m-bit data, calculate the offset of the first address of the first byte of the data group:

[0097] addr_base = floor(k / 8)×m

[0098] Wherein, addr_base indicates an offset, n=8, i.e., one byte, and floor indicates rounding down.

[0099] Then read m bytes starting from the first address (that is, all the sub-data of the data group):

[0100] data=memory[addr_base:addr_base+m].

[0101] If target data is to be extracted from data, the index sel=k%n is first calculated, and the sub-data of sel, sel+n, ..., sel+(m-1)n are extracted from data, thereby obtaining the kth m-bit data.

[0102] In an optional embodiment of the present invention, after reading and rearranging the sub-data in the data group to obtain the n groups of data with a bit width of m, it may also include: extracting the kth target data with a bit width of m from the n groups of data with a bit width of m according to the k and the n.

[0103] In order to further extract the k-th target data with a bit width of m, the index of the k-th data with a bit width of m in the n groups of data with a bit width of m can be determined according to k and n. In specific implementation, the target m-bit data is extracted through software or dedicated hardware circuits, and its index is: sel = k%n. That is, the target data is the sel-th data in the rearranged data, thereby obtaining the k-th data with a bit width of m.

[0104] Reference Fig.10 , shows a flow chart of a data reading method provided by an embodiment of the present invention, which may specifically include the following steps:

[0105] Step 201, read sub-data in a data group from m storage units in a memory; wherein the data group includes m data sub-groups, each data sub-group includes a sub-data of n groups of data with a bit width of m arranged in sequence, and the bit sequence of the sub-data of the same data in different data sub-groups is the same, and n is equal to the storage length of the storage unit.

[0106] In the embodiment of the present invention, the specific implementation method of this step can refer to the description in the above embodiment and will not be repeated here.

[0107] Step 202 , reading and rearranging the sub-data in the data group to obtain the n groups of data with a bit width of m.

[0108] In the embodiment of the present invention, the specific implementation method of this step can refer to the description in the above embodiment and will not be repeated here.

[0109] According to an embodiment of the present invention, sub-data in a data group is read from m storage units in a memory; wherein the data group includes m data sub-groups, and a sub-data of n groups of data with a bit width of m is arranged in sequence in each data sub-group, and the bit sequence of the sub-data of the same data in different data sub-groups is the same, and n is equal to the storage length of the storage unit. The sub-data in the read data group are read and rearranged to obtain the n groups of data with a bit width of m, so that data is compactly stored in a "vertical" manner, and n data with a bit width of m are used as the basic access unit, thereby effectively reusing the traditional byte-aligned data access method, and realizing data types applicable to arbitrary bit widths, consistent addressing rules for memory access, and no waste of storage space.

[0110] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0111] Reference Fig.11 , shows a structural block diagram of a data storage device embodiment provided by another embodiment of the present invention, which may specifically include the following modules:

[0112] The storage rearrangement module 301 is used to store and rearrange n groups of data with a bit width of m to obtain a data group; wherein n is equal to the storage length of a storage unit in the memory, and the data group includes m data subgroups, and each data subgroup has a sub-data of the n data arranged in sequence, and the sub-data of the same data in different data subgroups have the same bit sequence;

[0113] The storage module 302 is used to store the sub-data in the data group in the m storage units in the memory in sequence.

[0114] Optionally, the storage rearrangement module includes:

[0115] The arrangement submodule is used to arrange the x-th sub-data in the n data in sequence starting from x equals 1 until x equals m, thereby obtaining the data group.

[0116] Optionally, the device further comprises:

[0117] The data receiving module is used to receive a series of data with a bit width of m generated by a general processor or a dedicated accelerator before storing and rearranging n groups of data with a bit width of m to obtain data groups.

[0118] Optionally, the device further comprises:

[0119] a reading module, configured to read the sub-data in the data group from the m storage units in the memory after sequentially storing the sub-data in the data group in the m storage units in the memory;

[0120] The reading and rearranging module is used to read and rearrange the sub-data in the read data group to obtain the n groups of data with a bit width of m.

[0121] Optionally, the device further comprises:

[0122] a first address determination module, used for determining, before reading the sub-data in the data group from the m storage units in the memory, for the kth target data with a bit width of m to be read, according to k, n and m, the first address of the data group to which the target data belongs in the memory;

[0123] The reading module comprises:

[0124] The reading submodule is used to read the sub-data in the data group from the m storage units in the memory according to the first address.

[0125] Optionally, the device further comprises:

[0126] A data extraction module is used to read and rearrange the sub-data in the data group to obtain the n groups of data with a bit width of m, and then extract the kth target data with a bit width of m from the n groups of data with a bit width of m according to k and n.

[0127] According to an embodiment of the present invention, a data group is obtained by rearranging storage of n groups of data with a bit width of m; wherein n is equal to the storage length of a storage unit in a memory, and the data group includes m data subgroups, and in each data subgroup, a sub-data of the n data is arranged in sequence, and the bit sequence of the sub-data of the same data in different data subgroups is the same; the sub-data in the data group is stored in sequence in m storage units in the memory, so that the data is compactly stored in a "vertical" manner, and n data with a bit width of m are used as the basic access unit, thereby effectively reusing the traditional byte-aligned data access method, and realizing data types applicable to arbitrary bit widths, consistent addressing rules for memory access, and no waste of storage space.

[0128] Reference Fig.12 , shows a structural block diagram of a data reading device embodiment provided by another embodiment of the present invention, which may specifically include the following modules:

[0129] A reading module 401 is used to read sub-data in a data group from m storage units in a memory; wherein the data group includes m data sub-groups, each data sub-group includes n groups of sub-data of data with a bit width of m, and the bit sequence of sub-data of the same data in different data sub-groups is the same, and n is equal to the storage length of the storage unit;

[0130] The reading and rearranging module 402 is used to read and rearrange the sub-data in the read data group to obtain the n groups of data with a bit width of m.

[0131] According to an embodiment of the present invention, sub-data in a data group is read from m storage units in a memory; wherein the data group includes m data sub-groups, and a sub-data of n groups of data with a bit width of m is arranged in sequence in each data sub-group, and the bit sequence of the sub-data of the same data in different data sub-groups is the same, and n is equal to the storage length of the storage unit. The sub-data in the read data group are read and rearranged to obtain the n groups of data with a bit width of m, so that data is compactly stored in a "vertical" manner, and n data with a bit width of m are used as the basic access unit, thereby effectively reusing the traditional byte-aligned data access method, and realizing data types applicable to arbitrary bit widths, consistent addressing rules for memory access, and no waste of storage space.

[0132] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0133] Fig.13 1 is a block diagram of an electronic device 700 for data storage and data reading according to an exemplary embodiment. For example, the electronic device 700 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0134] Reference Fig.13 , the electronic device 700 may include one or more of the following components: a processing component 702 , a memory 704 , a power component 706 , a multimedia component 708 , an audio component 710 , an input / output (I / O) interface 712 , a sensor component 714 , and a communication component 716 .

[0135] The processing component 702 generally controls the overall operation of the electronic device 700, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 702 may include one or more processors 720 to execute instructions to complete all or part of the steps of the above-mentioned method. In addition, the processing component 702 may include one or more modules to facilitate the interaction between the processing component 702 and other components. For example, the processing component 702 may include a multimedia module to facilitate the interaction between the multimedia component 708 and the processing component 702.

[0136] The memory 704 is configured to store various types of data to support operations on the device 700. Examples of such data include instructions for any application or method operating on the electronic device 700, contact data, phone book data, messages, pictures, videos, etc. The memory 704 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0137] The power supply component 706 provides power to the various components of the electronic device 700. The power supply component 706 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device 700.

[0138] The multimedia component 708 includes a screen that provides an output interface between the electronic device 700 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 708 includes a front camera and / or a rear camera. When the electronic device 700 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0139] The audio component 710 is configured to output and / or input audio signals. For example, the audio component 710 includes a microphone (MIC), and when the electronic device 700 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 704 or sent via the communication component 716. In some embodiments, the audio component 710 also includes a speaker for outputting audio signals.

[0140] I / O interface 712 provides an interface between processing component 702 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0141] The sensor assembly 714 includes one or more sensors for providing various aspects of status assessment for the electronic device 700. For example, the sensor assembly 714 can detect the open / closed state of the device 700, the relative positioning of components, such as the display and keypad of the electronic device 700, and the sensor assembly 714 can also detect the position change of the electronic device 700 or a component of the electronic device 700, the presence or absence of contact between the user and the electronic device 700, the orientation or acceleration / deceleration of the electronic device 700, and the temperature change of the electronic device 700. The sensor assembly 714 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 714 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 714 may also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0142] The communication component 716 is configured to facilitate wired or wireless communication between the electronic device 700 and other devices. The electronic device 700 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 716 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 716 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0143] In an exemplary embodiment, the electronic device 700 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above methods.

[0144] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 704 including instructions, and the instructions can be executed by a processor 720 of an electronic device 700 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0145] A non-transitory computer-readable storage medium, when instructions in the storage medium are executed by a processor of a terminal, enables the terminal to perform a data storage method, the method comprising:

[0146] Rearrange storage of n groups of data with a bit width of m to obtain a data group; wherein n is equal to the storage length of a storage unit in the memory, and the data group includes m data subgroups, and each data subgroup has a sub-data of n data arranged in sequence, and the sub-data of the same data in different data subgroups have the same bit sequence;

[0147] The sub-data in the data group are sequentially stored in m storage units in the memory.

[0148] Optionally, the storing and rearranging n groups of data with a bit width of m to obtain data groups includes:

[0149] Starting from x being equal to 1, the x-th sub-data among the n data are arranged in sequence until x is equal to m, thereby obtaining the data group.

[0150] Optionally, before storing and rearranging n groups of data with a bit width of m to obtain data groups, the method further includes:

[0151] Receive a series of data with a bit width of m generated by a general-purpose processor or a dedicated accelerator.

[0152] Optionally, after sequentially storing the sub-data in the data group into the m storage units in the memory, the method further comprises:

[0153] Reading sub-data in the data group from m storage units in the memory;

[0154] The sub-data in the read data group are read and rearranged to obtain the n groups of data with a bit width of m.

[0155] Optionally, before reading the sub-data in the data group from the m storage units in the memory, the method further comprises:

[0156] For the k-th target data with a bit width of m to be read, determining the first address of the data group to which the target data belongs in the memory according to k, n and m;

[0157] The reading of the sub-data in the data group from the m storage units in the memory comprises:

[0158] According to the first address, sub-data in the data group are read from m storage units in the memory.

[0159] Optionally, after reading and rearranging the sub-data in the data group to obtain the n groups of data with a bit width of m, the method further includes:

[0160] According to the k and the n, the k-th target data with a bit width of m is extracted from the n groups of data with a bit width of m.

[0161] A non-transitory computer-readable storage medium, when instructions in the storage medium are executed by a processor of a terminal, enables the terminal to perform a data reading method, the method comprising:

[0162] Reading sub-data in a data group from m storage units in a memory; wherein the data group includes m data sub-groups, each data sub-group includes n groups of sub-data of data with a bit width of m, and the bit sequence of sub-data of the same data in different data sub-groups is the same, and n is equal to the storage length of the storage unit;

[0163] The sub-data in the read data group are read and rearranged to obtain the n groups of data with a bit width of m.

[0164] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0165] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0166] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0167] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0168] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0169] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0170] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0171] The data storage method, data reading method, data storage device, data reading device, electronic device and readable storage medium provided by the present invention are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A data storage method, characterized in that: include: Rearranging n groups of data with a bit width of m to obtain a data group includes: starting from x equal to 1, sequentially arranging the x-th sub-data in the n groups of data with a bit width of m until x equals m, thereby obtaining the data group; wherein n is equal to the storage length of a storage unit in a memory, the data group includes m data sub-groups, and the bit sequences of the sub-data of the same data with a bit width of m in different data sub-groups are the same; The sub-data in the data group are sequentially stored in m storage units in the memory.

2. The method according to claim 1, characterized in that Before storing and rearranging n groups of data with a bit width of m to obtain data groups, the method further includes: Receive a series of data with a bit width of m generated by a general-purpose processor or a dedicated accelerator.

3. The method according to claim 1, characterized in that After sequentially storing the sub-data in the data group into the m storage units in the memory, the method further includes: Reading sub-data in the data group from m storage units in the memory; The sub-data in the read data group are read and rearranged to obtain the n groups of data with a bit width of m.

4. The method according to claim 3, characterized in that Before reading the sub-data in the data group from the m storage units in the memory, the method further includes: For the k-th target data with a bit width of m to be read, determining the first address of the data group to which the target data belongs in the memory according to k, n and m; The reading of the sub-data in the data group from the m storage units in the memory comprises: According to the first address, sub-data in the data group are read from m storage units in the memory.

5. The method according to claim 4, characterized in that After reading and rearranging the sub-data in the data group to obtain the n groups of data with a bit width of m, the method further includes: According to the k and the n, the k-th target data with a bit width of m is extracted from the n groups of data with a bit width of m.

6. A data reading method, characterized in that: include: Read sub-data in a data group from m storage units in a memory; wherein the data group comprises: starting from x equal to 1, arranging the x-th sub-data in n groups of data with a bit width of m in sequence until x equals m, thereby obtaining the data group; the data group comprises m data sub-groups, and the bit sequences of the sub-data of the same data with a bit width of m in different data sub-groups are the same, and n is equal to the storage length of the storage unit; The sub-data in the data group are read and rearranged to obtain the n groups of data with a bit width of m.

7. A data storage device, characterized in that: include: A storage rearrangement module, used for performing storage rearrangement on n groups of data with a bit width of m to obtain a data group, comprising: starting from x being equal to 1, sequentially arranging the x-th sub-data in the n groups of data with a bit width of m until x is equal to m, thereby obtaining the data group; wherein n is equal to the storage length of a storage unit in a memory, the data group comprises m data sub-groups, and the bit sequences of the sub-data of the same data with a bit width of m in different data sub-groups are the same; The storage module is used to store the sub-data in the data group in the m storage units in the memory in sequence.

8. A data reading device, characterized in that: include: A reading module, used for reading sub-data in a data group from m storage units in a memory; wherein the data group comprises: starting from x equal to 1, arranging the x-th sub-data in n groups of data with a bit width of m in sequence until x equals m, thereby obtaining the data group; the data group comprises m data sub-groups, and the bit sequences of the sub-data of the same data with a bit width of m in different data sub-groups are the same, and n is equal to the storage length of the storage unit; The reading and rearranging module is used to read and rearrange the sub-data in the read data group to obtain the n groups of data with a bit width of m.

9. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor, for implementing the method steps described in any one of claims 1 to 6 when executing a program stored in a memory.

10. A readable storage medium, characterized in that: When the instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the method as claimed in any one of method claims 1 to 6.

Images