A method for monitoring failure of watchdog circuit

Abstract

The invention discloses a method for monitoring a fault of a watchdog circuit, and relates to the technical field of watchdog fault monitoring. The invention comprises: S1: initialization stage: when a system is started, the watchdog circuit is initialized and set, including setting a timing cycle and a reset condition of a watchdog timer; the specific steps are as follows: firstly, the stability of the power supply is detected, a fluctuation curve is established with the detected real-time power supply fluctuation data, upper and lower threshold standard lines are established on the fluctuation curve according to upper and lower thresholds, then the duration of the fluctuation curve within the range of the upper and lower threshold standard lines is counted, and the duration is compared with a preset standard duration, and when the duration is greater than or equal to the preset standard duration; the invention regularly monitors the working state of the watchdog circuit through a self-checking program, timely discovers and handles potential faults, thereby avoiding system stagnation or collapse caused by the failure of the watchdog circuit, and significantly improving the stability and reliability of the entire system.

Description

Technical Field

[0001] The invention relates to the technical field of watchdog fault monitoring, in particular to a watchdog circuit fault monitoring method. Background Art

[0002] A watchdog circuit is usually used to monitor the operating status of a microcontroller to prevent the system from stalling due to software errors or hardware failures.

[0003] Traditional watchdog circuits trigger a reset signal to restart the system when they detect a system anomaly. However, if the watchdog circuit itself fails, it will not be able to perform its monitoring function, which may cause the entire system to become unstable or even completely fail.

[0004] Therefore, it is necessary to develop a method that can self-check and monitor whether the watchdog circuit is working properly.

[0005] In order to solve the above defects, a technical solution is now provided. Summary of the invention

[0006] The purpose of the present invention is to solve the problem that the traditional watchdog circuit cannot self-check after a fault occurs and cannot perform its monitoring function, which may cause instability or even complete failure of the entire system, and propose a watchdog circuit fault monitoring method.

[0007] The purpose of the present invention can be achieved by the following technical solutions:

[0008] A method for monitoring a watchdog circuit fault, comprising:

[0009] S1: Initialization phase: When the system starts, the watchdog circuit is initialized, including setting the timing cycle and reset condition of the watchdog timer;

[0010] S2: Self-test phase: self-test the watchdog circuit through a specific self-test procedure;

[0011] S201: First, after initialization, a preset self-test program is started to send a test signal to the watchdog circuit, the test signal being a specific dog feeding command or a specific data sequence. After sending the test signal, the self-test program waits for a response from the watchdog circuit, wherein the response is a confirmation signal. When the confirmation signal is received, it is determined that the watchdog timer has received and processed the test signal;

[0012] S202: Compare the response of the watchdog circuit with the expected response, where the expected response includes a reset of the watchdog timer, a change in a status bit, or specific data returned; when the response does not meet the standard, the self-test program records the response that does not meet the standard;

[0013] S203: Then a simulated software fault is created. After the simulated fault occurs, the self-test program monitors whether the watchdog circuit triggers a reset signal after a predetermined timeout period. After the reset signal is triggered, the self-test program monitors whether the system is reset due to the timeout of the watchdog timer. When the system is successfully reset, the self-test program verifies the system status after the reset to ensure that the system can recover from the reset and restart.

[0014] S204: verifying whether the timing function of the watchdog timer is accurate through a self-checking program, comparing the timing period of the timer with the actual elapsed time, specifically, presetting a time interval, and then checking whether the watchdog timer is triggered at the end of the time interval, or calibrating the watchdog timer through an external clock signal;

[0015] S205: setting a self-check mechanism, including conditions for triggering a self-check test of the watchdog circuit;

[0016] S3: Fault judgment stage: According to the self-test results, judge whether the watchdog circuit works normally. If the self-test finds an abnormality, take corresponding treatment measures according to the fault type;

[0017] S4: Recording and reporting stage: The working status of the watchdog circuit and the corresponding self-test results are automatically recorded in the log, and the log is deeply analyzed.

[0018] Furthermore, the conditions for triggering the self-test of the watchdog circuit in S205 include:

[0019] When the system starts: During the system startup process, the self-test program is executed as part of the initialization;

[0020] Periodic execution: The self-check program is set to be executed regularly during system operation, and the frequency is adaptively adjusted according to the influencing factors, including hardware reliability, software reliability and environmental factors. The hard evaluation value YLZ, soft value RXZ and shadow value YYZ are obtained through influencing factor analysis, and then normalized and entered into the following formula: To get the frequency modulation value LVZ, where σ, τ are the preset weight coefficients of hard evaluation value, soft value and shadow environment value respectively;

[0021] The obtained frequency modulation value is compared with a plurality of preset frequency modulation value intervals, and different frequency adjustment degrees are set corresponding to the plurality of frequency modulation value intervals. When the frequency modulation value interval to which the frequency modulation value belongs is determined, the increase adjustment frequency of the watchdog circuit self-test program is determined;

[0022] Anomaly detection: When the system detects certain abnormal conditions, including software errors, hardware failures, or system performance degradation, it automatically triggers a self-check procedure;

[0023] User request: The user or system administrator triggers the self-test procedure of the watchdog circuit through manual control;

[0024] After system reset: When the system is reset due to the triggering of the watchdog circuit, the self-test program is executed again;

[0025] Specific event trigger: The self-test program is triggered after certain specific system events or operations occur. Specific system events or operations include: system idle, software update, hardware replacement or system configuration change, which automatically trigger the self-test program.

[0026] Furthermore, the specific operation steps of obtaining the hard evaluation value YLZ, the soft value RXZ and the shadow environment value YYZ through the influencing factor analysis in S205 are as follows:

[0027] The hardware reliability is analyzed by collecting hardware failure rate, usage time, repair time and evaluation value, which are calibrated as gl, st, xj and jp respectively. After normalization, they are entered into the following formula: The hardware evaluation value YLZ is obtained and used as a standard to measure the reliability of hardware. The hardware failure rate is the probability of hardware failure in a unit time. The use time is the total operating time of the hardware without failure. The repair time is the average time required to repair the hardware after a failure. The price evaluation value is calculated by calculating the difference between the average price of the same type of hardware in the market and the purchase price of the hardware.

[0028] For software reliability, the software failure rate, number of freezes, freeze time and defect density are collected. After normalization, the failure rate is multiplied by a constant m as the bottom circle diameter to establish the bottom circle, and the product of the number of freezes and the freeze time is used as the height to establish a cylindrical model. The center of mass of the cylindrical model is used as the center of the sphere. The defect density is multiplied by 100 and summed with the failure rate multiplied by the constant m to establish a spherical model as the diameter. The volume of the irregular body formed by the cylinder and the sphere is calculated and recorded as the soft value RXZ; the failure rate is the probability of software failure in unit time; the number of freezes is the number of times the software freezes during operation, and the software freezes by presetting the freeze judgment time; the freeze time is the sum of all freeze times since the software was running to the present; the defect density is the number of defects per thousand lines of code in the software;

[0029] Environmental factors: Analyze through temperature, humidity, air pressure, vibration and electromagnetic interference; preset standard temperature, standard humidity and standard air pressure, and calculate the difference between the obtained temperature and the standard temperature to get the temperature difference value, the difference between humidity and the standard humidity to get the humidity difference value, and the difference between air pressure and the standard air pressure to get the pressure difference value; hardware vibration is judged by monitoring the average vibration intensity of the hardware during use, and the average vibration intensity is used as the standard for measuring vibration; electromagnetic interference is measured by monitoring the interference intensity from radio waves, power lines and lightning during the use of the watchdog circuit;

[0030] The obtained temperature difference, humidity difference, pressure difference, average vibration intensity and interference intensity are normalized, and then the temperature difference, humidity difference and pressure difference are summed and used with the average vibration intensity and interference intensity as the three sides of the triangle to establish a triangle. Then a height is preset to establish a triangular pyramid, and the surface area of ​​the triangular pyramid is calculated, which is recorded as the shadow value YYZ.

[0031] Furthermore, the judgment criteria for whether the system is idle in S205 are as follows:

[0032] CPU usage: By monitoring the CPU usage, when it is lower than the preset threshold, the system is judged to be in idle state;

[0033] Task queue length: automatically checks the length of the task queue or the number of tasks waiting to be executed. If the number of task queues is lower than the threshold or there are no waiting tasks, the system is considered to be in an idle state.

[0034] System call frequency: monitor the frequency of system calls and determine whether it is lower than the preset frequency. When the real-time call frequency is lower than the preset frequency, the system is judged to be in an idle state;

[0035] Power management status: Determine whether the system has entered a low power state by monitoring the system. When the system enters a low power state, it is determined that the system is in an idle state.

[0036] Furthermore, the specific operation steps of the initialization phase in S1 are as follows:

[0037] First, the power supply stability is detected, and a fluctuation curve is established with the detected real-time power supply fluctuation data. On the fluctuation curve, upper and lower threshold standard lines are established according to the upper and lower thresholds. Then, the duration of the fluctuation curve within the range of the upper and lower threshold standard lines is counted, and the duration is compared with the preset standard duration. If the duration is greater than or equal to the preset standard duration, it is judged that the power supply stability meets the standard. Otherwise, it is judged that the power supply stability does not meet the standard, and a power supply stability failure instruction is sent to the management terminal;

[0038] Then select the watchdog working mode according to the system requirements, including timeout mode, window mode or question-and-answer mode, configure the timing cycle of the watchdog timer according to the watchdog working mode, and determine the time interval of the timer overflow by programming the watchdog timer register. The setting of the timing cycle should be determined according to the specific requirements and response time of the system, and the reset condition is configured at the same time; after completing the configuration of the timer and reset condition, decide whether the watchdog timer generates an interrupt or directly resets the microcontroller when a timeout occurs;

[0039] After completing all settings, enable the watchdog timer to start timing, and implement the watchdog feeding mechanism in the software of the microcontroller by scattering watchdog feeding instructions in the software or setting periodic interrupts to feed the watchdog.

[0040] Furthermore, the specific operation steps of the fault judgment stage in S3 are as follows:

[0041] First, the collected self-test data is analyzed and compared with the preset normal working parameters to determine whether the watchdog circuit works as expected. When the self-test data does not meet expectations, the type of fault is determined based on the abnormal data, including timeout failure, inaccurate timing, or dog feeding failure.

[0042] Then, according to the fault type, perform corresponding treatment measures, including:

[0043] If it is determined to be a software configuration problem, it will attempt to reconfigure automatically or prompt the user to perform manual configuration;

[0044] When it is determined to be a hardware failure, it will try to automatically restart the system or notify the administrator to replace the hardware at the terminal;

[0045] When it is determined to be a temporary or recoverable problem, including power fluctuation or electromagnetic interference, the system will wait for the preset time to automatically recover.

[0046] Furthermore, the specific operation steps of the recording and reporting stage in S4 are as follows:

[0047] First, extract all relevant self-test result data from the system log, including self-test time, self-test status, response time and error code;

[0048] Then perform data cleaning to remove noise or irrelevant information;

[0049] The collected data were then subjected to descriptive statistical analysis, including calculation of the mean response time, maximum or minimum value, and standard deviation;

[0050] Time series analysis is then used to identify trends in self-test results over time.

[0051] Compared with the prior art, the present invention has the following beneficial effects:

[0052] (1) The present invention regularly monitors the working status of the watchdog circuit through a self-checking program, timely discovers and handles potential faults, thereby avoiding system stagnation or collapse caused by watchdog circuit faults, and significantly improving the stability and reliability of the entire system;

[0053] (2) The present invention can adaptively adjust the self-test frequency of the watchdog circuit according to hardware reliability, software reliability and environmental factors, ensuring that the self-test program can be executed at the most appropriate frequency under different system loads and environmental conditions, thereby optimizing the use of system resources and improving the efficiency of fault detection;

[0054] (3) The present invention records the self-test results in detail in a log and conducts in-depth analysis, which not only helps to quickly locate and solve the current fault problem, but also helps to predict the fault trend that may occur in the future, providing valuable data support for the continuous optimization and maintenance of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] In order to facilitate understanding by those skilled in the art, the present invention is further described below in conjunction with the accompanying drawings;

[0056] Figure 1 The figure is a flow chart of the method of the present invention. DETAILED DESCRIPTION

[0057] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0058] It should be understood that the terms "include" and "comprising" used in the specification and claims of the present disclosure indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections thereof.

[0059] It should also be understood that the terms used in this disclosure are only for the purpose of describing specific embodiments and are not intended to limit the disclosure. As used in this disclosure and claims, the singular forms of "a", "an", and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should also be further understood that the term "and / or" used in this disclosure and claims refers to any combination of one or more of the associated listed items and all possible combinations, including these combinations.

[0060] like Figure 1 As shown, a method for monitoring a watchdog circuit fault comprises the following steps:

[0061] S1: Initialization phase: When the system starts, the watchdog circuit is initialized, including setting the timing cycle and reset condition of the watchdog timer; the specific steps are as follows:

[0062] First, the power supply stability is detected, and a fluctuation curve is established with the detected real-time power supply fluctuation data. On the fluctuation curve, upper and lower threshold standard lines are established according to the upper and lower thresholds. Then, the duration of the fluctuation curve within the range of the upper and lower threshold standard lines is counted, and the duration is compared with the preset standard duration. When the duration is greater than or equal to the preset standard duration, it is judged that the power supply stability meets the standard. Otherwise, it is judged that the power supply stability does not meet the standard, and a power supply stability failure instruction is sent to the management terminal to remind the management to optimize the power supply environment;

[0063] Then, according to the needs of the system, select the watchdog working mode, including timeout mode, window mode or question-and-answer mode, configure the timing cycle of the watchdog timer according to the working mode of the watchdog, and determine the time interval of the timer overflow by programming the watchdog timer register. The setting of the timing cycle should be determined according to the specific requirements and response time of the system, and the reset condition is configured at the same time; after completing the configuration of the timer and reset condition, determine whether the watchdog timer generates an interrupt or directly resets the microcontroller when a timeout occurs;

[0064] After all settings are completed, enable the watchdog timer, start timing, and implement the watchdog feeding mechanism in the microcontroller's software. Make sure the watchdog is reset before the timer expires to prevent unnecessary resets. Feed the watchdog by scattering watchdog feeding instructions in the software or setting periodic interrupts.

[0065] S2: Self-test phase: The watchdog circuit is self-tested through a specific self-test program. The self-test program includes the following running process:

[0066] First, after initialization, the self-test program is started to send a test signal to the watchdog circuit. The test signal can be a specific dog feeding command or a specific data sequence. After sending the test signal, the self-test program waits for the response of the watchdog circuit. This response is a confirmation signal, indicating that the watchdog timer has received and processed the test signal.

[0067] Then compare the response of the watchdog circuit with the expected response, which includes the reset of the watchdog timer, the change of the status bit, or the specific data returned; when the response does not meet the standard, the self-test program will record the response that does not meet the standard;

[0068] Then create a simulated software fault, such as simulating a software freeze or dead loop by stopping the watchdog feeding operation. After the simulated fault occurs, the self-test program will monitor whether the watchdog circuit triggers a reset signal after a predetermined timeout period. After the reset signal is triggered, the self-test program will monitor whether the system is reset due to the timeout of the watchdog timer. If the system is successfully reset, the self-test program will verify the system status after the reset to ensure that the system can recover from the reset and restart.

[0069] Then verify the accuracy of the watchdog timer's timing function through the self-test program, compare the timer's timing period with the actual elapsed time, specifically preset a time interval, and then check whether the watchdog timer is triggered at the end of this time interval, or calibrate the watchdog timer through an external clock signal;

[0070] A self-test mechanism is then set up, including the conditions for triggering the self-test test of the watchdog circuit, as follows:

[0071] System startup: During system startup, a self-test procedure is executed as part of initialization to ensure that the watchdog circuit is correctly configured and ready before the system is run;

[0072] Periodic execution: The self-check program is set to be executed periodically during system operation, and the frequency is adaptively adjusted based on influencing factors, including:

[0073] Hardware and software reliability: For hardware reliability, we collect hardware failure rate, usage time, repair time and evaluation value for analysis, which are calibrated as gl, st, xj and jp respectively. After normalization, they are entered into the following formula: The hardware evaluation value YLZ is obtained and used as a standard to measure the reliability of hardware. The hardware failure rate is the probability of hardware failure in a unit of time. The use time is the total operating time of the hardware without failure. The repair time is the average time required to repair the hardware after a failure. The price evaluation value is calculated by calculating the difference between the average price of the same type of hardware in the market and the purchase price of the hardware, and this difference is used as a standard to measure the price evaluation value.

[0074] For software reliability, the software failure rate, number of freezes, freeze time and defect density are collected. After normalization, the failure rate is multiplied by a constant m as the bottom circle diameter to establish the bottom circle, the product of the number of freezes and the freeze time is used as the height to establish a cylindrical model, the center of mass of the cylindrical model is used as the center of the sphere, the defect density is multiplied by 100 and summed with the failure rate multiplied by the constant m, and the spherical model is established as the diameter. The volume of the irregular body formed by the cylinder and the sphere is calculated and recorded as the soft value RXZ, and this soft value is used as the standard for measuring software reliability, where the constant m is 10.22; the failure rate is the probability of software failure in unit time; the number of freezes is the number of freezes that occur during the operation of the software, and the software is judged to be freezed by presetting the freeze judgment time, such as 0.2s or 0.4s; the freeze time is the sum of all freezes from the start of the software to the present; the defect density is the number of defects per thousand lines of code in the software. The lower the defect density, the higher the software quality, and vice versa.

[0075] Environmental factors: Analyze through temperature, humidity, air pressure, vibration and electromagnetic interference; preset standard temperature, standard humidity and standard air pressure, and calculate the difference between the obtained temperature and the standard temperature to get the temperature difference value, the difference between humidity and the standard humidity to get the humidity difference value, and the difference between air pressure and the standard air pressure to get the pressure difference value; hardware vibration is judged by monitoring the average vibration intensity of the hardware during use, and the average vibration intensity is used as the standard for measuring vibration; electromagnetic interference is measured by monitoring the interference intensity from radio waves, power lines and lightning during the use of the watchdog circuit;

[0076] Then, the obtained temperature difference, humidity difference, pressure difference, average vibration intensity and interference intensity are normalized, and the temperature difference, humidity difference and pressure difference are summed and used as the three sides of the triangle to establish a triangle, and then a triangular pyramid is established with a preset height, and the surface area of ​​the triangular pyramid is calculated and recorded as the shadow environment value YYZ, and this shadow environment value is used as a standard to measure the impact of environmental factors on the self-test frequency;

[0077] Then normalize the hard evaluation value YLZ, soft value RXZ and shadow value YYZ obtained above and enter them into the following formula: To get the frequency modulation value LVZ, where σ, τ are the preset weight coefficients of hard evaluation value, soft value and shadow value, and their values ​​are 1.135, 1.243 and 0.931 respectively;

[0078] The obtained frequency modulation value LVZ is compared with several preset frequency modulation value intervals, and different frequency adjustment degrees are set corresponding to the several frequency modulation value intervals. When the frequency modulation value interval to which the frequency modulation value belongs is determined, the increase adjustment frequency of the watchdog circuit self-test program is determined to achieve the adjustment of the start frequency of the watchdog circuit self-test program according to different situations;

[0079] Abnormal detection: When the system detects certain abnormal conditions, including software errors, hardware failures, or system performance degradation, it automatically triggers a self-test program to verify whether the watchdog circuit can respond normally;

[0080] User request: The user or system administrator triggers the self-test procedure of the watchdog circuit through manual control to perform troubleshooting or system maintenance;

[0081] After system reset: When the system is reset due to the triggering of the watchdog circuit, the self-test program is executed again to ensure that the watchdog circuit is not damaged during the reset process and can continue to work normally;

[0082] Specific event trigger: After certain specific system events or operations occur, including system idle, software update, hardware replacement or system configuration change, the self-test program is automatically triggered to ensure that the configuration and function of the watchdog circuit are not affected; the judgment criteria for system idle are as follows:

[0083] CPU usage rate: monitors the usage rate of the central processing unit (CPU). When the usage rate is lower than the preset threshold, which can be set to 5% or 10%, the system is judged to be in an idle state. Task queue length: automatically checks the length of the task queue or the number of tasks waiting to be executed. If the number of task queues is lower than the threshold or there are no waiting tasks, the system is judged to be in an idle state. System call frequency: monitors the frequency of system calls and determines whether it is lower than the preset frequency, reflecting the activity level of the application. When the real-time call frequency is lower than the preset frequency, the system is judged to be in an idle state. Power management status: determines whether the system has entered a low power consumption state by monitoring the system. When the system enters a low power consumption state, the system is judged to be in an idle state.

[0084] After power is restored: When the system experiences a brief interruption or reset due to a power problem, a self-test procedure may be performed after power is restored to ensure that the watchdog circuit was not affected during the power fluctuation.

[0085] Automatically record self-check results in the system log. When the self-check program finds a problem, it triggers an alarm and notifies the system administrator or automatically performs fault recovery operations.

[0086] S3: Fault judgment stage: According to the self-test results, judge whether the watchdog circuit works normally. If the self-test finds an abnormality, take corresponding treatment measures according to the fault type;

[0087] The specific process is as follows:

[0088] First, the collected self-test data is analyzed and compared with the preset normal working parameters to determine whether the watchdog circuit works as expected. When the self-test data does not meet expectations, the type of fault is determined based on the abnormal data, including timeout failure, inaccurate timing, or dog feeding failure.

[0089] Then, according to the fault type, corresponding processing measures are executed, including: if it is determined to be a software configuration problem, it will try to automatically reconfigure or prompt the user to perform manual configuration; if it is determined to be a hardware failure, it will try to automatically restart the system or notify the user to replace the hardware; if it is determined to be a temporary or recoverable problem, including power fluctuations or electromagnetic interference, it will wait for the system to automatically recover according to the preset time;

[0090] S4: Recording and reporting stage: The working status of the watchdog circuit and the corresponding self-test results are automatically recorded in the log, and the log is analyzed in depth for subsequent maintenance and troubleshooting. The specific steps are as follows:

[0091] First, extract all relevant self-test result data from the system log, including self-test time, self-test status (success or failure), response time, and error code; then perform data cleaning to ensure its accuracy and completeness and remove any possible noise or irrelevant information;

[0092] Descriptive statistical analysis is then performed on the collected data, including calculation of the average response time, maximum or minimum value, and standard deviation to understand the overall performance of the watchdog circuit. Time series analysis is then used to identify the trend of self-test results over time. For example, if the response time gradually increases, it indicates that the system performance is declining.

[0093] The preferred embodiments of the present invention disclosed above are only used to help explain the present invention. The preferred embodiments do not describe all the details in detail, nor do they limit the invention to only specific implementation methods. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A method for monitoring a watchdog circuit fault, characterized in that: The following steps are involved: S1: Initialization phase: When the system starts, the watchdog circuit is initialized, including setting the timing cycle and reset condition of the watchdog timer; S2: Self-test phase: self-test the watchdog circuit through the preset self-test program; S201: First, after initialization, a preset self-test program is started to send a test signal to the watchdog circuit, the test signal being a preset dog feeding command or data sequence. After sending the test signal, the self-test program waits for a response from the watchdog circuit, wherein the response is a confirmation signal. When the confirmation signal is received, it is determined that the watchdog timer has received and processed the test signal; S202: Compare the response of the watchdog circuit with the expected response, where the expected response includes a watchdog timer reset, a change in a status bit, or returned data; when the response does not meet the standard, the self-test program records the response that does not meet the standard; S203: Then a simulated software fault is created. After the simulated fault occurs, the self-test program monitors whether the watchdog circuit triggers a reset signal after a predetermined timeout period. After the reset signal is triggered, the self-test program monitors whether the system is reset due to the timeout of the watchdog timer. When the system is successfully reset, the self-test program verifies the system status after the reset to ensure that the system can recover from the reset and restart. S204: verifying whether the timing function of the watchdog timer is accurate through a self-checking program, comparing the timing period of the timer with the actual elapsed time, specifically, presetting a time interval, and then checking whether the watchdog timer is triggered at the end of the time interval, or calibrating the watchdog timer through an external clock signal; S205: setting a self-check mechanism, including conditions for triggering a self-check test of the watchdog circuit; The conditions that trigger the watchdog circuit self-test include: When the system starts: During the system startup process, the self-test program is executed as part of the initialization; Periodic execution: The self-check program is set to be executed regularly during system operation, and the frequency is adaptively adjusted according to the influencing factors, including hardware reliability, software reliability and environmental factors. The hard evaluation value YLZ, soft value RXZ and shadow value YYZ are obtained through influencing factor analysis, and then normalized and entered into the following formula: To get the frequency modulation value LVZ, where σ, τ are the preset weight coefficients of hard evaluation value, soft value and shadow environment value respectively; The obtained frequency modulation value is compared with a plurality of preset frequency modulation value intervals, and different frequency adjustment degrees are set corresponding to the plurality of frequency modulation value intervals. When the frequency modulation value interval to which the frequency modulation value belongs is determined, the increase adjustment frequency of the watchdog circuit self-test program is determined; Anomaly detection: When the system detects certain abnormal conditions, including software errors, hardware failures, or system performance degradation, it automatically triggers a self-check procedure; User request: The user or system administrator triggers the self-test procedure of the watchdog circuit through manual control; After system reset: When the system is reset due to the triggering of the watchdog circuit, the self-test program is executed again; Event trigger: The self-check program is triggered after a system event or operation occurs. System events or operations include: system idle, software update, hardware replacement or system configuration change, which automatically trigger the self-check program; The specific steps for obtaining the hard evaluation value YLZ, soft value RXZ and shadow value YYZ through influencing factor analysis are as follows: The hardware reliability is analyzed by collecting hardware failure rate, usage time, repair time and evaluation value, which are calibrated as gl, st, xj and jp respectively. After normalization, they are entered into the following formula: The hardware evaluation value YLZ is obtained and used as a standard to measure the reliability of hardware. The hardware failure rate is the probability of hardware failure in a unit time. The use time is the total operating time of the hardware without failure. The repair time is the average time required to repair the hardware after a failure. The price evaluation value is calculated by calculating the difference between the average price of the same type of hardware in the market and the purchase price of the hardware. For software reliability, the software failure rate, number of freezes, freeze time and defect density are collected. After normalization, the failure rate is multiplied by a constant m as the bottom circle diameter to establish the bottom circle, and the product of the number of freezes and the freeze time is used as the height to establish a cylindrical model. The center of mass of the cylindrical model is used as the center of the sphere. The defect density is multiplied by 100 and summed with the failure rate multiplied by the constant m to establish a spherical model as the diameter. The volume of the irregular body formed by the cylinder and the sphere is calculated and recorded as the soft value RXZ; the failure rate is the probability of software failure in unit time; the number of freezes is the number of times the software freezes during operation, and the software freezes by presetting the freeze judgment time; the freeze time is the sum of all freeze times since the software was running to the present; the defect density is the number of defects per thousand lines of code in the software; Environmental factors: Analyze through temperature, humidity, air pressure, vibration and electromagnetic interference; preset standard temperature, standard humidity and standard air pressure, and calculate the difference between the obtained temperature and the standard temperature to get the temperature difference value, the difference between humidity and the standard humidity to get the humidity difference value, and the difference between air pressure and the standard air pressure to get the pressure difference value; hardware vibration is judged by monitoring the average vibration intensity of the hardware during use, and the average vibration intensity is used as the standard for measuring vibration; electromagnetic interference is measured by monitoring the interference intensity from radio waves, power lines and lightning during the use of the watchdog circuit; Then normalize the obtained temperature difference, humidity difference, pressure difference, average vibration intensity and interference intensity, then sum the temperature difference, humidity difference and pressure difference, and use the average vibration intensity and interference intensity as the three sides of the triangle to build a triangle, then preset a height to build a triangular pyramid, calculate the surface area of ​​the triangular pyramid, and record it as the shadow value YYZ; S3: Fault judgment stage: According to the self-test results, judge whether the watchdog circuit works normally. If the self-test finds an abnormality, take corresponding treatment measures according to the fault type; S4: Recording and reporting stage: The working status of the watchdog circuit and the corresponding self-test results are automatically recorded in the log, and the log is deeply analyzed.

2. A method for monitoring a watchdog circuit fault according to claim 1, characterized in that: The judgment criteria for whether the system is idle in S205 are as follows: CPU usage: By monitoring the CPU usage, when it is lower than the preset threshold, the system is judged to be in idle state; Task queue length: automatically checks the length of the task queue or the number of tasks waiting to be executed. If the number of task queues is lower than the threshold or there are no waiting tasks, the system is considered to be in an idle state. System call frequency: monitor the frequency of system calls and determine whether it is lower than the preset frequency. When the real-time call frequency is lower than the preset frequency, the system is judged to be in an idle state; Power management status: Determine whether the system has entered a low power state by monitoring the system. When the system enters a low power state, it is determined that the system is in an idle state.

3. A method for monitoring a watchdog circuit fault according to claim 1, characterized in that: The specific operation steps of the initialization phase in S1 are as follows: First, the power supply stability is detected, and a fluctuation curve is established with the detected real-time power supply fluctuation data. On the fluctuation curve, upper and lower threshold standard lines are established according to the upper and lower thresholds. Then, the duration of the fluctuation curve within the range of the upper and lower threshold standard lines is counted, and the duration is compared with the preset standard duration. If the duration is greater than or equal to the preset standard duration, it is judged that the power supply stability meets the standard. Otherwise, it is judged that the power supply stability does not meet the standard, and a power supply stability failure instruction is sent to the management terminal; Then select the watchdog working mode according to the system requirements, including timeout mode, window mode or question-and-answer mode, configure the timing cycle of the watchdog timer according to the watchdog working mode, and determine the time interval of the timer overflow by programming the watchdog timer register. The setting of the timing cycle should be determined according to the specific requirements and response time of the system, and the reset condition is configured at the same time; after completing the configuration of the timer and reset condition, decide whether the watchdog timer generates an interrupt or directly resets the microcontroller when a timeout occurs; After completing all settings, enable the watchdog timer to start timing, and implement the watchdog feeding mechanism in the software of the microcontroller by scattering watchdog feeding instructions in the software or setting periodic interrupts to feed the watchdog.

4. A method for monitoring a watchdog circuit fault according to claim 1, characterized in that: The specific operation steps of the fault judgment stage in S3 are as follows: First, the collected self-test data is analyzed and compared with the preset normal working parameters to determine whether the watchdog circuit works as expected. When the self-test data does not meet expectations, the type of fault is determined based on the abnormal data, including timeout failure, inaccurate timing, or dog feeding failure. Then, according to the fault type, perform corresponding treatment measures, including: If it is determined to be a software configuration problem, it will attempt to reconfigure automatically or prompt the user to perform manual configuration; When it is determined to be a hardware failure, it will try to automatically restart the system or notify the administrator to replace the hardware at the terminal; When it is determined to be a temporary or recoverable problem, including power fluctuation or electromagnetic interference, the system will wait for the preset time to automatically recover.

5. A method for monitoring a watchdog circuit fault according to claim 1, characterized in that: The specific operation steps of the recording and reporting stage in S4 are as follows: First, extract all relevant self-test result data from the system log, including self-test time, self-test status, response time and error code; Then perform data cleaning to remove noise or irrelevant information; The collected data were then subjected to descriptive statistical analysis, including calculation of the mean response time, maximum or minimum value, and standard deviation; Time series analysis is then used to identify trends in self-test results over time.

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