Method, apparatus, medium and computer program product for video encoding
By disabling the transform skipped Rice parameters in the video codec decoder and enabling extended precision processing, the problems of low video codec efficiency and degradation of video quality in the prior art are solved, and the bit rate reduction and video quality improvement are achieved.
Patent Information
- Application Number
- CN202410775020.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-04-28
- Filing Date
- 2022-04-27
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2042-04-27
AI Technical Summary
Existing video encoding and decoding technologies are difficult to effectively utilize transform skipping and extended precision processing when compressing video data, resulting in high bit rate and reduced video quality.
Optimize the video encoding and decoding process by disabling the transform skipped Rice parameters in the decoder, enabling alignment flags based on the sequence parameter set, receiving extended precision processing flags, and initializing with pattern-related statistics at each subblock.
Improves the efficiency of video encoding and decoding, reduces the bit rate, and maintains high standards of video quality.
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Figure CN118632028B_ABST
Abstract
Description
[0001] This application is a divisional application of the patent application with the same name with application number 202280031734.9 filed on April 27, 2022.
[0002] CROSS-REFERENCE TO RELATED APPLICATIONS
[0003] This application is based upon and claims priority to provisional application No. 63 / 181,110 filed on April 28, 2021, the entire contents of which are incorporated herein by reference for all purposes. Technical Field
[0004] The present disclosure relates to video coding and compression. More specifically, the present disclosure relates to improvements and simplifications of residual and coefficient coding for video coding. Background Art
[0005] Various video codec techniques can be used to compress video data. Video coding is performed according to one or more video codec standards. For example, video codec standards include Versatile Video Codec (VVC), Joint Exploration Test Model (JEM), High Efficiency Video Codec (H.265 / HEVC), Advanced Video Codec (H.264 / AVC), Moving Picture Experts Group (MPEG) codec, etc. Video codecs typically use prediction methods (e.g., inter-frame prediction, intra-frame prediction, etc.) that exploit redundancy present in video images or sequences. An important goal of video coding techniques is to compress video data into a form that uses a lower bit rate while avoiding or minimizing the degradation of video quality. Summary of the invention
[0006] Examples of the present disclosure provide methods and apparatus for video encoding and decoding.
[0007] According to a first aspect of the present disclosure, a method for video coding is provided. The method may include: in response to determining that transform skip is disabled, disabling, by a decoder, the existence of rice parameters for transform skip residual coding.
[0008] According to a second aspect of the present disclosure, a method for video coding and decoding is provided. The method may include: receiving a sequence parameter set (SPS) alignment enable flag by a decoder, the flag indicating whether to align the index ivlCurrRange before bypass decoding the syntax elements sb_coded_flag, abs_remainder, dec_abs_level and coef_sign_flagn based on the value of the SPS alignment enable.
[0009] According to a third aspect of the present disclosure, a method for video coding and decoding is provided. The method may include: receiving, by a decoder, an extended precision processing flag, the flag indicating whether to adopt an extended dynamic range for transform coefficients and during transform processing based on a value of the extended precision processing flag.
[0010] According to a fourth aspect of the present disclosure, a method for video encoding and decoding is provided. The method may include: receiving, by a decoder, a persistent rice adaptation enable flag, the flag indicating whether the rice parameter derivation for binarization of abs_remaining and dec_abs_level is initialized at the beginning of each sub-block using mode-related statistics accumulated from previous sub-blocks based on the value of the persistent rice adaptation enable flag.
[0011] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not intended to restrict the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate examples consistent with the disclosure and, together with the description, serve to explain the principles of the disclosure.
[0013] Figure 1 is a block diagram of an encoder according to an example of the present disclosure.
[0014] Figure 2 is a block diagram of a decoder according to an example of the present disclosure.
[0015] Figure 3A is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.
[0016] Figure 3B is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.
[0017] Figure 3C is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.
[0018] Figure 3D is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.
[0019] Figure 3E is a diagram illustrating block partitioning in a multi-type tree structure according to an example of the present disclosure.
[0020] Figure 4 is an illustration of a picture with 18×12 luma CTUs according to an example of the present disclosure.
[0021] Figure 5is an illustration of a picture with 18×12 luma CTUs according to an example of the present disclosure.
[0022] Fig. 6A is a diagram of examples of ternary tree (TT) and binary tree (BT) partitions that are not allowed in a VTM according to examples of the present disclosure.
[0023] Figure 6B is a diagram of an example of TT and BT partitioning that is not allowed in a VTM according to an example of the present disclosure.
[0024] Figure 6C is a diagram of an example of TT and BT partitioning that is not allowed in a VTM according to an example of the present disclosure.
[0025] Fig.6D is a diagram of an example of TT and BT partitioning that is not allowed in a VTM according to an example of the present disclosure.
[0026] Fig. 6E is a diagram of an example of TT and BT partitioning that is not allowed in a VTM according to an example of the present disclosure.
[0027] Fig. 6F is a diagram of an example of TT and BT partitioning that is not allowed in a VTM according to an example of the present disclosure.
[0028] Figure 6G is a diagram of an example of TT and BT partitioning that is not allowed in a VTM according to an example of the present disclosure.
[0029] Figure 6H is a diagram of an example of TT and BT partitioning that is not allowed in a VTM according to an example of the present disclosure.
[0030] Figure 7 is a diagram of a residual coding structure for a transform block according to an example of the present disclosure.
[0031] Figure 8 is a diagram of a residual codec structure for transforming a skip block according to an example of the present disclosure.
[0032] Fig. 9 is a diagram of two scalar quantizers according to an example of the present disclosure.
[0033] Fig. 10A is a diagram of state transitions according to an example of the present disclosure.
[0034] Fig. 10B is a diagram of quantizer selection according to an example of the present disclosure.
[0035] Fig.11 is an illustration of a template for selecting a probability model according to the present disclosure.
[0036] Fig.12 is a diagram of an example of a block encoded and decoded in palette mode according to the present disclosure.
[0037] Fig.13 is a diagram of using palette prediction values to signal palette entries in accordance with the present disclosure.
[0038] Fig.14A is an illustration of a horizontal traversal scan according to the present disclosure.
[0039] Fig. 14B is an illustration of a vertical traversal scan according to the present disclosure.
[0040] Fig.15A is an illustration of a sub-block based index map scan for a palette according to the present disclosure.
[0041] Fig. 15B is an illustration of a sub-block based index map scan for a palette according to the present disclosure.
[0042] Fig.16 A method for encoding a video signal according to an example of the present disclosure.
[0043] Fig.17 A method for encoding a video signal according to an example of the present disclosure.
[0044] Fig.18 is a diagram illustrating a computing environment coupled with a user interface according to examples of the present disclosure.
[0045] Fig.19 A method for video encoding and decoding according to an example of the present disclosure is shown.
[0046] Fig. 20 A method for video encoding and decoding according to an example of the present disclosure is shown.
[0047] Fig.21 A method for video encoding and decoding according to an example of the present disclosure is shown.
[0048] Fig. 22 A method for video encoding and decoding according to an example of the present disclosure is shown.
[0049] Fig.23 is a block diagram illustrating an exemplary system for encoding and decoding video blocks according to examples of the present disclosure.
[0050] Fig.24 is a block diagram illustrating an exemplary video encoder according to examples of the present disclosure.
[0051] Fig.25 is a block diagram illustrating an exemplary video decoder according to examples of the present disclosure.
[0052] Fig.26 A low-delay transform skip residual coding (TSRC) method according to examples of the present disclosure is shown.
[0053] Fig. 27 A method for video encoding and decoding according to an example of the present disclosure is shown. DETAILED DESCRIPTION
[0054] Reference will now be made in detail to example embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, wherein, unless otherwise specified, the same numerals in different drawings represent the same or similar elements. The implementations set forth in the following description of example embodiments do not represent all implementations consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with aspects of the present disclosure as described in the appended claims.
[0055] The terms used in this disclosure are only used for the purpose of describing specific embodiments and are not intended to limit the disclosure. As used in this disclosure and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms as well. It should also be understood that the term "and / or" used herein is intended to represent and include any or all possible combinations of one or more of the associated listed items.
[0056] It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various information, the information should not be limited by these terms. These terms are only used to distinguish one type of information from another type of information. For example, without departing from the scope of the present disclosure, the first information may be referred to as the second information; similarly, the second information may also be referred to as the first information. As used herein, the term "if" may be understood to mean "when", "upon", or "in response to a judgment", depending on the context.
[0057] The first version of the HEVC standard was completed in October 2013, and it provides about 50% bitrate savings or equivalent perceptual quality compared to the previous generation video codec standard H.264 / MPEG AVC. Although the HEVC standard provides significant codec improvements over its predecessor, there is evidence that higher codec efficiency can be achieved with additional codec tools compared to HEVC. On this basis, both VCEG and MPEG have started exploring new codec technologies for future video codec standardization. ITU-T VECG and ISO / IEC MPEG established a Joint Video Exploration Team (JVET) in October 2015 to start major research on advanced technologies that can achieve significant improvements in codec efficiency. JVET maintains reference software called the Joint Exploration Model (JEM) by integrating several additional codec tools on top of the HEVC Test Model (HM).
[0058] In October 2017, ITU-T and ISO / IEC issued a joint call for proposals (CfP) on video compression with capabilities beyond HEVC. In April 2018, 23 CfP responses were received and evaluated at the 10th JVET meeting, indicating that the compression efficiency was improved by about 40% over HEVC. Based on such evaluation results, JVET launched a new project to develop a new generation of video codec standards, which is called the Versatile Video Codec (VVC). In the same month, a reference software code base called the VVC Test Model (VTM) was established to demonstrate the reference implementation of the VVC standard.
[0059] Like HEVC, VVC is built on a block-based hybrid video codec framework.
[0060] Figure 1 An overall diagram of a block-based video encoder for VVC is shown. Specifically, Figure 1 A typical encoder 100 is shown. The encoder 100 has a video input 110, motion compensation 112, motion estimation 114, intra / inter mode decision 116, block prediction value 140, adder 128, transform 130, quantization 132, prediction related information 142, intra prediction 118, picture buffer 120, inverse quantization 134, inverse transform 136, adder 126, memory 124, loop filter 122, entropy coding 138, and bitstream 144.
[0061] In encoder 100, a video frame is partitioned into multiple video blocks for processing. For each given video block, a prediction is formed based on either an inter-prediction method or an intra-prediction method.
[0062] The prediction residual is sent from adder 128 to transform 130, which represents the difference between the current video block (part of video input 110) and its prediction value (part of block prediction value 140). The transform coefficients are then sent from transform 130 to quantization 132 for entropy reduction. The quantized coefficients are then fed to entropy coding 138 to generate a compressed video bitstream. Figure 1 As shown, prediction related information 142 (e.g., video block partition information, motion vector (MV), reference picture index, and intra prediction mode) from intra / inter mode decision 116 is also fed through entropy coding 138 and saved into a compressed bitstream 144. The compressed bitstream 144 comprises a video bitstream.
[0063] In encoder 100, decoder-related circuitry is also required to reconstruct pixels for prediction. First, the prediction residual is reconstructed by inverse quantization 134 and inverse transformation 136. The reconstructed prediction residual is combined with the block prediction value 140 to generate the unfiltered reconstructed pixels of the current video block.
[0064] Spatial prediction (or "intra-prediction") uses pixels of samples from already encoded neighboring blocks (called reference samples) in the same video frame as the current video block to predict the current video block.
[0065] Temporal prediction (also called "inter prediction") uses reconstructed pixels from an already coded video picture to predict the current video block. Temporal prediction reduces temporal redundancy inherent in video signals. The temporal prediction signal for a given coding unit (CU) or coding block is typically signaled by one or more MVs that indicate the amount and direction of motion between the current CU and its temporal reference. In addition, if multiple reference pictures are supported, a reference picture index is additionally sent that identifies which reference picture in the reference picture storage the temporal prediction signal comes from.
[0066] The motion estimation 114 receives the video input 110 and the signal from the picture buffer 120, and outputs the motion estimation signal to the motion compensation 112. The motion compensation 112 receives the video input 110, the signal from the picture buffer 120, and the motion estimation signal from the motion estimation 114, and outputs the motion compensation signal to the intra / inter mode decision 116.
[0067] After performing spatial and / or temporal prediction, an intra / inter mode decision 116 in the encoder 100 selects the best prediction mode, for example based on a rate-distortion optimization method. The block prediction value 140 is then subtracted from the current video block, and the resulting prediction residual is decorrelated using a transform 130 and a quantization 132. The resulting quantized residual coefficients are inverse quantized by an inverse quantization 134 and inverse transformed by an inverse transform 136 to form a reconstructed residual, which is then added back to the prediction block to form a reconstructed signal for the CU. In addition, before the reconstructed CU is placed in the reference picture storage device of the picture buffer 120 and used to encode future video blocks, a loop filter 122 (e.g., a deblocking filter, a sample adaptive offset (SAO), and / or an adaptive loop filter (ALF)) may be applied to the reconstructed CU. To form an output video bitstream 144, the coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to an entropy coding unit 138 to be further compressed and packaged to form a bitstream.
[0068] Figure 1 A block diagram of a general block-based hybrid video coding system is given. The input video signal is processed block by block, called coding unit (CU). In VTM-1.0, a CU can be up to 128×128 pixels. However, unlike HEVC, which partitions blocks based on quadtree only, in VVC, a coding tree unit (CTU) is split into CUs to accommodate different local characteristics based on quadtree / binary tree / ternary tree. By definition, a coding tree block (CTB) is an NxN block of samples with a certain value of N, so that the division of components into CTBs is partitioning. A CTU includes one CTB for luma samples of a picture with three sample arrays, two corresponding CTBs for chroma samples, or one CTB for samples of a monochrome picture or a picture encoded or decoded using three separate color planes and a syntax structure for encoding and decoding samples. In addition, the concept of multiple partition unit types in HEVC is removed, that is, there is no longer a separation of CU, prediction unit (PU) and transform unit (TU) in VVC; instead, each CU is always used as a basic unit for both prediction and transform without further partitioning. In the multi-type tree structure, a CTU is first partitioned according to the quadtree structure. Then, each quadtree leaf node can be further partitioned according to the binary tree and ternary tree structure. Figure 3A , Figure 3B , Figure 3C , Figure 3D and Figure 3E As shown in , there are five types of partitioning, quadruple partitioning, horizontal binary partitioning, vertical binary partitioning, horizontal ternary partitioning, and vertical ternary partitioning.
[0069] Figure 3A A diagram illustrating block quad partitioning in a multi-type tree structure according to the present disclosure is shown.
[0070] Figure 3B A diagram illustrating vertical binary partitioning of blocks in a multi-type tree structure according to the present disclosure is shown.
[0071] Figure 3C A diagram illustrating block-level binary partitioning in a multi-type tree structure according to the present disclosure is shown.
[0072] Figure 3D A diagram illustrating vertical ternary partitioning of blocks in a multi-type tree structure according to the present disclosure is shown.
[0073] Figure 3E A diagram illustrating block-level ternary partitioning in a multi-type tree structure according to the present disclosure is shown.
[0074] exist Figure 1 In the video code, spatial prediction and / or temporal prediction can be performed. Spatial prediction (or "intra-frame prediction") uses pixels from samples of already coded neighboring blocks (called reference samples) in the same video picture / slice to predict the current video block. Spatial prediction reduces the spatial redundancy inherent in the video signal. Temporal prediction (also known as "inter-frame prediction" or "motion compensated prediction") uses reconstructed pixels from already coded video pictures to predict the current video block. Temporal prediction reduces the temporal redundancy inherent in the video signal. The temporal prediction signal of a given CU is usually represented by one or more motion vectors (MVs), which indicate the amount and direction of motion between the current CU and its temporal reference. In addition, if multiple reference pictures are supported, a reference picture index is additionally sent, which is used to identify which reference picture in the reference picture repository the temporal prediction signal comes from. After spatial and / or temporal prediction, the mode decision block in the encoder selects the best prediction mode, for example, based on a rate-distortion optimization method. The prediction block is then subtracted from the current video block; and the prediction residual is decorrelated and quantized using a transform. The quantized residual coefficients are inverse quantized and inverse transformed to form a reconstructed residual, which is then added back to the prediction block to form a reconstructed signal for the CU. In addition, loop filtering (e.g., deblocking filter, sample adaptive offset (SAO), and adaptive loop filter (ALF)) may be applied to the reconstructed CU before the reconstructed CU is placed in a reference picture repository and used to encode future video blocks. To form an output video bitstream, the coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to the entropy coding unit to be further compressed and packaged to form a bitstream.
[0075] Figure 2 The overall block diagram of the video decoder for VVC is shown. Specifically, Figure 2A block diagram of a typical decoder 200 is shown. The decoder 200 has a bitstream 210, entropy decoding 212, inverse quantization 214, inverse transform 216, adder 218, intra / inter mode selection 220, intra prediction 222, memory 230, loop filter 228, motion compensation 224, picture buffer 226, prediction related information 234 and video output 232.
[0076] Decoder 200 is similar to Figure 1 The decoder 200 is a decoder that decodes the video bitstream 210. In the decoder 200, the incoming video bitstream 210 is first decoded by entropy decoding 212 to derive the quantization coefficient levels and prediction related information. The quantization coefficient levels are then processed by inverse quantization 214 and inverse transform 216 to obtain reconstructed prediction residuals. The block prediction value mechanism implemented in the intra / inter mode selector 220 is configured to perform intra prediction 222 or motion compensation 224 based on the decoded prediction information. A set of unfiltered reconstructed pixels is obtained by adding the reconstructed prediction residuals from the inverse transform 216 to the prediction output generated by the block prediction value mechanism using a summer 218.
[0077] The reconstructed blocks may further pass through a loop filter 228 before being stored in a picture buffer 226 used as a reference picture repository. The reconstructed video in the picture buffer 226 may be sent to drive a display device, as well as used to predict future video blocks. With the loop filter 228 turned on, filtering operations are performed on these reconstructed pixels to derive the final reconstructed video output 232.
[0078] Figure 2 The overall block diagram of a block-based video decoder is given. The video bitstream is first entropy decoded at the entropy decoding unit. The coding mode and prediction information are sent to the spatial prediction unit (if intra-frame coding) or the temporal prediction unit (if inter-frame coding) to form a prediction block. The residual transform coefficients are sent to the inverse quantization unit and the inverse transform unit to reconstruct the residual block. The prediction block and the residual block are then added. The reconstructed block can be further loop filtered before being stored in the reference picture repository. The reconstructed video in the reference picture repository is then sent out to drive the display device and is used to predict future video blocks.
[0079] In general, the basic intra prediction scheme applied in VVC remains the same as that in HEVC, except that several modules are further extended and / or improved, such as intra sub-partitioning (ISP) codec mode, extended intra prediction with wide-angle intra direction, position-dependent intra prediction combination (PDPC), and 4-tap intra interpolation.
[0080] VVC divides pictures, tile groups, tiles and CTUs
[0081] In VVC, a tile is defined as a rectangular area of a CTU within a specific tile column and a specific tile row in a picture. A tile group is a group consisting of an integer number of tiles of a picture, which are exclusively contained in a single NAL unit. Basically, the concept of a tile group is the same as the slice defined in HEVC. For example, a picture is divided into tile groups and tiles. A tile is a sequence of CTUs covering a rectangular area of a picture. A tile group contains multiple tiles of a picture. Two modes of tile groups are supported, namely, raster scan tile group mode and rectangular tile group mode. In raster scan tile group mode, a tile group contains a sequence of tiles of a picture raster scanned by tiles. In rectangular tile group mode, a tile group contains multiple tiles of a picture, which together form a rectangular area of a picture. Tiles within a rectangular tile group are in the order of raster scan of tiles of the tile group.
[0082] Figure 4 An example of a raster scan tile group partitioning of a picture is shown, where the picture is divided into 12 tiles and 3 raster scan tile groups. Figure 4 It includes tiles 410, 412, 414, 416, and 418. Each tile has 18 CTUs. More specifically, Figure 4 A picture with 18×12 luma CTUs is shown, which is divided into 12 tiles and 3 tile groups (information-rich). The three tile groups are as follows: (1) the first tile group includes tiles 410 and 412, (2) the second tile group includes tiles 414, 416, 418, 420, and 422, and (3) the third tile group includes tiles 424, 426, 428, 430, and 432.
[0083] Figure 5 An example of a rectangular tile group partitioning of a picture is shown, where the picture is divided into 24 tiles (6 tile columns and 4 tile rows) and 9 rectangular tile groups. Figure 5 Included are tiles 510, 512, 514, 516, 518, 520, 522, 524, 526, 528, 530, 532, 534, 536, 538, 540, 542, 544, 546, 548, 550, 552, 554, and 556. More specifically, Figure 5A picture with 18×12 luma CTUs is shown, which is divided into 24 tiles and 9 tile groups (information-rich). A tile group contains tiles, and a tile contains a CTU. The 9 rectangular tile groups include (1) two tiles 510 and 512, (2) two tiles 514 and 516, (3) two tiles 518 and 520, (4) four tiles 522, 524, 534, and 536, (5) four tiles 526, 528, 538, and 540, (6) four tiles 530, 532, 542, and 544, (7) two tiles 546 and 548, (8) two tiles 550 and 552, and (9) two tiles 554 and 556.
[0084] Large block size transformation with high frequency zeroing in VVC
[0085] In VTM4, large block size transforms are enabled, with a maximum size of 64×64, which is mainly used for higher resolution videos, such as 1080p and 4k sequences. For transform blocks with a size (width or height, or both width and height) equal to 64, the high-frequency transform coefficients are zeroed, so that only the low-frequency coefficients are retained. For example, for an M×N transform block, where M is the block width and N is the block height, when M is equal to 64, only the left 32 columns of transform coefficients are retained. Similarly, when N is equal to 64, only the top 32 rows of transform coefficients are retained. When transform skip mode is used for large blocks, the entire block will be used without zeroing any values.
[0086] Virtual Pipeline Data Unit (VPDU) in VVC
[0087] A virtual pipeline data unit (VPDU) is defined as a non-overlapping unit in a picture. In a hardware decoder, consecutive VPDUs are processed simultaneously by multiple pipeline stages. In most pipeline stages, the VPDU size is roughly proportional to the buffer size, so it is important to keep the VPDU size small. In most hardware decoders, the VPDU size can be set to the maximum transform block (TB) size. However, in VVC, ternary tree (TT) and binary tree (BT) partitioning may result in an increase in the VPDU size.
[0088] To keep the VPDU size to 64x64 luma samples, the following canonical partitioning restrictions (with syntax signaling modifications) are applied in VTM5:
[0089] TT partitioning is not allowed for CUs with width or height or both width and height equal to 128.
[0090] For 128xN CUs with N≤64 (ie, width equal to 128 and height less than 128), horizontal BT partitioning is not allowed.
[0091] For Nx128 CUs with N≤64 (ie, height equal to 128 and width less than 128), vertical BT partitioning is not allowed.
[0092] Fig. 6A , Figure 6B , Figure 6C , Fig.6D , Fig. 6E , Fig. 6F , Figure 6G and Figure 6H An example of TT and BT partitions that are not allowed in VTM is shown.
[0093] Transform coefficient encoding and decoding in VVC
[0094] The transform coefficient encoding and decoding in VVC is similar to HEVC in that they both use non-overlapping coefficient groups (also called CGs or sub-blocks). However, there are also some differences between the two. In HEVC, each CG of the coefficient has a fixed size of 4x4. In VVC draft 6, the CG size depends on the TB size. Therefore, various CG sizes (1x16, 2x8, 8x2, 2x4, 4x2, and 16x1) are available in VVC. The CGs within a coding block and the transform coefficients within the CG are encoded and decoded according to a predefined scanning order.
[0095] In order to limit the maximum number of context coded bins per pixel, the area of the TB and the type of video component (e.g., luminance component vs. chrominance component) are used to derive the maximum number of context coded bins (CCBs) for the TB. The maximum number of context coded bins is equal to TB_zosize*1.75. Here, TB_zossize represents the number of samples in the TB after the coefficients are zeroed. Note that coded_sub_block_flag (a flag indicating whether the CG contains non-zero coefficients) CCB count is not taken into account.
[0096] Coefficient zeroing is an operation performed on a transform block to force coefficients located in a certain area of the transform block to be 0. For example, in the current VVC, the 64x64 transform has an associated zeroing operation. Therefore, the transform coefficients located outside the upper left 32x32 area within the 64x64 transform block are all forced to 0. In fact, in the current VVC, for any transform block with a size greater than 32 along a dimension, a coefficient zeroing operation is performed along that dimension to force the coefficients located outside the upper left 32x32 area to be 0.
[0097] In the transform coefficient coding in VVC, the variable remBinsPass1 is first set to the maximum number of allowed context coding bits (MCCB). During the coding process, the variable is reduced by 1 each time when the context coding bits are signaled. When remBinsPass1 is greater than or equal to 4, the coefficient is first signaled through the sig_coeff_flag, abs_level_gt1_flag, par_level_flag, and abs_level_gt3_flag syntaxes, all of which use context coding bits in the first pass. The remainder of the level information of the coefficient is coded and decoded in the second pass using the syntax element abs_remainder using the Golomb-rice code and the bypass coding bits. When remBinspass1 becomes less than 4 when coding the first pass, the current coefficient is not coded and decoded in the first pass, but is directly coded and decoded in the second pass using the syntax element dec_abs_level using the Golomb-Rice code and the bypass coding bits. The rice parameter derivation process of dec_abs_level[] is shown in Table 3. After encoding and decoding all the above levels, the sign (sign_flag) of all scanning positions where sig_coef_flag is equal to 1 is finally encoded and decoded into bypass binary bits. Figure 7 Such a process is described in . rembinspass1 is reset for each TB. The conversion from using context codec bits for sig_coeff_flag, abs_level_gt1_flag, par_level_flag, and abs_level_gt3_flag to using bypass codec bits for the remaining coefficients occurs at most once per TB. For a coefficient subblock, if remBinsPass1 is less than 4 before encoding its first coefficient, the entire coefficient subblock is encoded using bypass codec bits.
[0098] Figure 7 A diagram showing a residual codec structure for a transform block is shown.
[0099] A unified (same) rice parameter (RicePara) is derived for signaling the syntax abs_remainder and dec_abs_level. The only difference is that the base level BaseLevel is set to 4 and 0 for encoding and decoding abs_remainder and dec_abs_level, respectively. The Rice parameter is determined not only based on the sum of the absolute levels of the adjacent five transform coefficients in the local template but also based on the corresponding base level, as follows:
[0100] RicePara=RiceParTable[max(min(31,sumAbs-5*baseLevel),0)]
[0101] The syntax and associated semantics of residual codec in the current VVC draft specification are shown in Table 1 and Table 2, respectively. How to read Table 1 is shown in the Appendix section of this disclosure, which can also be found in the VVC specification.
[0102] Table 1 Syntax of residual codec
[0103]
[0104]
[0105]
[0106]
[0107]
[0108] Table 2 Residual encoding and decoding semantics
[0109]
[0110]
[0111]
[0112] Table 3 Derivation process of Rice parameters of abs_remainder[] and dec_abs_level[]
[0113]
[0114] Table 4 cRiceParam specifications based on locSumAbs
[0115] locSumAbs 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 cRiceParam 0 0 0 0 0 0 0 1 1 1 1 1 1 1 2 2 locSumAbs 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 cRiceParam 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3
[0116] Residual Coding and Decoding of Transform Skip Mode in VVC
[0117] Unlike HEVC where a single residual codec scheme is designed for coding both transform coefficients and transform skip coefficients, in VVC, two separate residual codec schemes are used for transform coefficients and transform skip coefficients (ie, residual), respectively.
[0118] In transform skip mode, the statistical characteristics of the residual signal are different from those of the transform coefficients, and no energy compression is observed around low-frequency components. The residual codec is modified to take into account the different signal characteristics of the (spatial) transform skip residual, including:
[0119] There is no signaling for the last x / y position;
[0120] When all previous flags are equal to 0, coded_sub_block_flag is encoded and decoded for each sub-block except the DC sub-block;
[0121] Use two adjacent coefficients for sig_coef_flag context modeling;
[0122] par_level_flag uses only one context model;
[0123] Additional greater than 5, 7, 9 signs;
[0124] Derivation of modified rice parameters for residual binarization;
[0125] The context modeling of the sign flag is determined based on the left and above neighboring coefficient values, and the sign flag is parsed after sig_coeff_flag to keep all context codec bins together.
[0126] like Figure 8 As shown, the syntax elements The codec is encoded and decoded in a residual sample-by-sample interleaved manner in the first pass, followed by the abs_level_gtX_flag bitplane in the second pass, and the Codec.
[0127] Channel 1: sig_coeff_flag, coeff_sign_flag, abs_level_gt1_flag, par_level_flag
[0128] Channel 2: abs_level_gt3_flag, abs_level_gt5_flag, abs_level_gt7_flag, abs_level_gt9_flag
[0129] Channel 3: abs_remainder
[0130] Figure 8 A diagram showing a residual codec structure for transform skip blocks.
[0131] The syntax and associated semantics for residual coding of transform skip mode in the current VVC draft specification are shown in Table 5 and Table 2, respectively. How to read Table 5 is explained in the Appendix section of this disclosure, which can also be found in the VVC specification.
[0132] Table 5 Syntax of residual codec for transform skip mode
[0133]
[0134]
[0135]
[0136]
[0137] Quantification
[0138] In the current VVC, the maximum QP value is extended from 51 to 63, and the signaling of the initial QP has also changed accordingly. When a non-zero value of slice_qp_delta is encoded and decoded, the initial value of SliceQpY can be modified at the slice segment level. For transform skip blocks, the minimum allowed quantization parameter (QP) is defined as 4, because when QP equals 4, the quantization step becomes 1.
[0139] In addition, the same HEVC scalar quantization is used with a new concept called correlated scalar quantization. Correlated scalar quantization refers to a method in which the set of allowable reconstruction values of a transform coefficient depends on the values of the transform coefficient level that precedes the current transform coefficient level in the reconstruction order. Compared with the traditional independent scalar quantization used in HEVC, the main effect of this method is that the allowable reconstruction vectors are packed more densely in the N-dimensional vector space (N represents the number of transform coefficients in the transform block). This means that for a given average number of allowable reconstruction vectors per N-dimensional unit volume, the average distortion between the input vector and the closest reconstruction vector is reduced. The correlated scalar quantization method is implemented by: (a) defining two scalar quantizers with different reconstruction levels; and (b) defining a switching process between the two scalar quantizers.
[0140] The two scalar quantizers represented by Q0 and Q1 are Fig. 9 The positions of the available reconstruction levels are uniquely specified by the quantization step size Δ. The scalar quantizer used (Q0 or Q1) is not explicitly signaled in the bitstream. Instead, the quantizer used for the current transform coefficient is determined by the parity of the transform coefficient levels that precede the current transform coefficient in the encoding / reconstruction order.
[0141] Fig. 9 A diagram of two scalar quantizers used in the proposed correlation quantization method is shown.
[0142] like Fig. 10A and Fig. 10BAs shown in FIG. 10 , switching between two scalar quantizers (Q0 and Q1) is implemented via a state machine with four quantizer states (QState). QState can take four different values: 0, 1, 2, 3. It is uniquely determined by the parity of the transform coefficient level that precedes the current transform coefficient in the encoding / reconstruction order. At the beginning of inverse quantization of the transform block, the state is set equal to 0. The transform coefficients are reconstructed in the scanning order (i.e., they are entropy decoded in the same order). After reconstruction of the current transform coefficient, the state is updated as shown in FIG. 10 , where k represents the value of the transform coefficient level.
[0143] Fig. 10A A transition diagram illustrating the state transitions for the proposed correlation quantization is shown.
[0144] Fig. 10B A table illustrating the quantizer selection for the proposed correlation quantization is shown.
[0145] Signaling of default and user defined scaling matrices is also supported. The default (DEFAULT) mode scaling matrices are all flat with elements equal to 16 for all TB sizes. IBC and intra codec modes currently share the same scaling matrix. Therefore, for user defined (USER_DEFINED) matrices, the number of MatrixType and MatrixType_DC are updated as follows:
[0146] MatrixType: 30 = 2 (2 for intra and IBC / inter) x 3 (Y / CB / Cr components) x 5 (square TB size: from 4x4 to 64x64 for luma, from 2x2 to 32x32 for chroma).
[0147] MatrixType_DC: 14 = 2 (2 for intra and IBC / inter × 1 for Y component) × 3 (TB size: 16×16, 32×32, 64×64) + 4 (2 for intra and IBC / inter × 2 for Cb / Cr components) × 2 (TB size: 16×16, 32×32).
[0148] The DC values are encoded and decoded for the following scaling matrices: 16×16, 32×32, and 64×64, respectively. For TBs of size less than 8×8, all elements in one scaling matrix are signaled. If the size of the TB is greater than or equal to 8×8, only 64 elements in an 8×8 scaling matrix are signaled as the basic scaling matrix. In order to obtain a square matrix of size greater than 8×8, the 8×8 basic scaling matrix is upsampled (by replication of elements) to the corresponding square size (i.e., 16×16, 32×32, 64×64). When the high frequency coefficients of the 64-point transform are zeroed, the corresponding high frequencies of the scaling matrix are also zeroed. That is, if the width or height of the TB is greater than or equal to 32, only the left half or the upper half of the coefficients are retained, and the remaining coefficients are assigned to zero. In addition, since the 4×4 elements in the lower right corner are never used, the number of elements signaled for the 64×64 scaling matrix is also reduced from 8×8 to three 4×4 sub-matrices.
[0149] Context Modeling for Transform Coefficients Coding and Decoding
[0150] The choice of probability model for syntax elements involving absolute values of transform coefficient levels depends on the values of absolute levels in the local neighborhood or of the partially reconstructed absolute levels. The template used is Fig.11 shown.
[0151] Fig.11 An illustration of a template used to select a probability model is shown. The black square specifies the current scan position, and the square with an "x" indicates the local neighborhood used.
[0152] The chosen probability model depends on the sum of the absolute levels (or the absolute levels of the partial reconstructions) in the local neighborhood and the number of absolute levels greater than 0 in the local neighborhood (given by the number of sig_coef_flags equal to 1). Context modeling and binarization depend on the following measures of the local neighborhood:
[0153] numSig: the number of non-zero levels in the local neighborhood;
[0154] sumAbs1: the sum of the partial reconstruction absolute levels (absLevel1) after the first channel in the local neighborhood;
[0155] sumAbs: the sum of the absolute levels of reconstruction in the local neighborhood;
[0156] Diagonal position (d): The sum of the horizontal and vertical coordinates of the current scan position within the transform block.
[0157] Based on the values of numSig, sumAbs1, and d, the probability model for encoding and decoding sig_coeff1, abs_level_gt1_flag, par_level_flag, and abs_level_gt3_flag is selected. The Rice parameters for binarizing abs_remainder and dec_abs_level are selected based on the values of sumAbs and numSig.
[0158] In the current VVC, the reduced 32-point MTS (also called RMTS32) is based on skipping high-frequency coefficients and is used to reduce the computational complexity of 32-point DST-7 / DCT-8. And, it is accompanied by coefficient coding changes, including all types of zeroing (i.e., the existing zeroing of high-frequency components in RMTS32 and DCT2). Specifically, the binarization of the last non-zero coefficient position coding is coded based on the reduced TU size, and the context model selection for the last non-zero coefficient position coding is determined by the original TU size. In addition, 60 context models are used to encode and decode the sig_coeff_flag of the transform coefficient. The selection of the context model index is based on the sum of the absolute levels of the maximum five previous partial reconstructions called locSumAbsPass1 and the state QState of the relevant quantization, as follows:
[0159] If cIdx is equal to 0, ctxInc is derived as follows:
[0160] ctxInc=12*Max(0,QState–1)+
[0161] Min((locSumAbsPass1+1)>>1,3)+
[0162] (d<2?8:(d<5?4:0))
[0163] Otherwise (cIdx is greater than 0), cIdx is derived as follows:
[0164] ctxInc=36+8*Max(0,QState-1)+
[0165] Min((locSumAbsPass1+1)>>1,3)+(d<2?4:0)
[0166] Palette Mode
[0167] The basic idea behind the palette mode is that the samples in a CU are represented by a small set of representative color values. This set is called the palette. It is also possible to indicate a color value that is excluded from the palette by signaling it as an escape color, the values of the three color components of the escape color are directly signaled in the bitstream. This is like Fig.12 shown.
[0168] Fig.12 An example of a block encoded and decoded in palette mode is shown. Fig.12 Includes 1210 blocks and 1220 palettes encoded and decoded in palette mode.
[0169] exist Fig.12 In , the palette size is 4. The first 3 samples are reconstructed using palette entries 2, 0, and 3 respectively. The black samples represent escape symbols. The CU level flag palette_escape_val_present_flag indicates whether there are any escape symbols in the CU. If there are escape symbols, the palette size is increased by one and the last index is used to indicate the escape symbol. Therefore, in Fig.12 , index 4 is assigned to the escape symbol.
[0170] In order to decode a palette-encoded block, the decoder needs to have the following information:
[0171] Palette table;
[0172] The palette index.
[0173] If the palette index corresponds to an escape symbol, additional overhead is signaled to indicate the corresponding color value of the sample.
[0174] Furthermore, on the encoder side, it is necessary to derive the appropriate palette to use with this CU.
[0175] For the derivation of the palette for lossy codecs, a modified k-means clustering algorithm is used. The first sample of a block is added to the palette. Then, for each subsequent sample from the block, the sum of absolute differences (SAD) between the sample and each current palette color is calculated. If the distortion of each component is less than a threshold corresponding to the palette entry with the smallest SAD, the sample is added to the cluster belonging to the palette entry. Otherwise, the sample is added as a new palette entry. When the number of samples mapped to a cluster exceeds a threshold, the centroid of that cluster is updated and becomes the palette entry for that cluster.
[0176] In the next step, the clusters are sorted in descending order of usage. Then, the palette entry corresponding to each entry is updated. Typically, the cluster centroid is used as the palette entry. However, a rate-distortion analysis is performed to analyze whether any entry from the palette prediction value may be more suitable to be used as an updated palette entry instead of the centroid when taking into account the cost of encoding and decoding the palette entry. This process continues until all clusters have been processed or the maximum palette size is reached. Finally, if a cluster has only a single sample and the corresponding palette entry is not in the palette prediction value, the sample is converted to an escape symbol. In addition, duplicate palette entries are removed and their clusters are merged.
[0177] After palette derivation, each sample in the block is assigned the index of the nearest (in the SAD) palette entry. Then, the samples are assigned to either 'INDEX' or 'COPY_ABOVE' mode. For each sample that can use either 'INDEX' or 'COPY_ABOVE' mode. Then, the cost of encoding or decoding that mode is calculated. The mode with the lower cost is chosen.
[0178] To encode and decode palette entries, a palette prediction is maintained. The maximum size of the palette and the palette prediction are signaled in the SPS. The palette prediction is initialized at the beginning of each CTU row, each slice, and each tile.
[0179] For each entry in the palette prediction value, a reuse flag is signaled to indicate whether it is part of the current palette. Fig.13 shown.
[0180] Fig.13 The use of palette prediction values to signal palette entries is shown. Fig.13 Included is a previous palette 1310 and a current palette 1320 .
[0181] The reuse flag is sent using a run length codec of zero. After this, the number of new palette entries is signaled using an exponential Golomb code of order 0. Finally, the component values of the new palette entries are signaled.
[0182] The palette index is encoded and decoded using horizontal and vertical traversal scans, such as Fig.14A and Fig. 14B Use palette_transpose_flag to explicitly signal the scan order in the bitstream.
[0183] Fig.14A A horizontal traversal scan is shown.
[0184] Fig. 14B A vertical traversal scan is shown.
[0185] To encode and decode the palette index, a linear coefficient group (CG) based palette mode is used, which divides the CU into multiple segments with 16 samples based on a traversal scan mode, such as Fig.15A and Fig. 15B As shown, where the index run, palette index value and quantized color for escape mode are encoded / parsed sequentially for each CG.
[0186] Fig.15A A sub-block based index map scan for a palette is shown.
[0187] Fig. 15B A sub-block based index map scan for a palette is shown.
[0188] Palette indices are encoded and decoded using two main palette sample modes: 'INDEX' and 'COPY_ABOVE'. As explained previously, escape symbols are assigned indices equal to the maximum palette size. In 'COPY_ABOVE' mode, the palette index of the sample in the row above is copied. In 'INDEX' mode, the palette index is explicitly signaled. The encoding order for palette run-length encoding and decoding in each segment is as follows:
[0189] For each pixel, 1 context codec binary bit run_copy_flag=0 is signaled, indicating whether the pixel has the same mode as the previous pixel, i.e., if the previous scanned pixel and the current pixel both have run type COPY_ABOVE, or if the previous scanned pixel and the current pixel both have run type INDEX and the same index value. Otherwise, run_copy_flag=1 is signaled.
[0190] If the pixel and the previous pixel have different modes, a context codec binary copy_above_palette_indices_flag indicating the run type of the pixel (i.e., INDEX or COPY_ABOVE) is signaled. If the sample is located in the first row (horizontal traversal scan) or the first column (vertical traversal scan), the decoder does not have to parse the run type because the INDEX mode is used by default. In addition, if the previously parsed run type is COPY_ABOVE, the decoder does not have to parse the run type.
[0191] After palette run-length encoding and decoding of pixels in a segment, the index value of the index mode (palette_idx_idc) and the quantized escape color (palette_escape_val) are bypass-encoded.
[0192] Improvements to residual and coefficient encoding and decoding
[0193] In VVC, when encoding and decoding transform coefficients, a unified (same) rice parameter (RicePara) derivation is used to signal the syntax of abs_remainder and dec_abs_level. The only difference is that the base level baseLevel is set to 4 and 0 for encoding and decoding abs_remainder and dec_abs_level, respectively. The Rice parameter is determined not only based on the sum of the absolute levels of the adjacent five transform coefficients in the local template, but also based on the corresponding base level, as follows:
[0194] RicePara=RiceParTable[max(min(31,sumabs-5*baselevel),0)]
[0195] In other words, the binary codewords of the syntax elements abs_remainder and dec_abs_level are adaptively determined according to the level information of the neighboring coefficients. Since this codeword determination is performed for each sample, it requires additional logic to handle this codeword adaptation for coefficient coding and decoding.
[0196] Similarly, when the residual block is encoded and decoded in transform skip mode, the binary codeword of the syntax element abs_remainder is adaptively determined according to the horizontal information of neighboring residual samples.
[0197] Furthermore, when coding syntax elements related to residual coding or transform coefficient coding, the selection of the probability model depends on the level information of neighboring levels, which requires additional logic and additional context models.
[0198] In the current design, the binarization of outlier samples is derived by calling the third-order Exp-Golomb binarization process. There is still room for further improvement in its performance.
[0199] In the current VVC, two different horizontal mapping schemes are available, and are applied to normal transform and transform skip respectively. Each horizontal mapping scheme is associated with different conditions, mapping functions and mapping positions. For blocks to which normal transform is applied, the horizontal mapping scheme is used after the number of context codec bits (CCB) exceeds the limit. The mapping position (expressed as ZeroPos[n]) and the mapping result (expressed as AbsLevel[xC][yC]) are derived as specified in Table 2. For blocks to which transform skip is applied, another horizontal mapping scheme is used before the number of context codec bits (CCB) exceeds the limit. The mapping position (expressed as predCoeff) and the mapping result (expressed as AbsLevel[xC][yC]) are derived as specified in Table 5. This non-uniform design may not be optimal from a standardization perspective.
[0200] For profiles above 10 bits in HEVC, extended_precision_processing_flag equal to 1 specifies extended dynamic range for coefficient parsing and inverse transform processing. In current VVC, residual codecs of transform coefficients or transform skip codecs above 10 bits are reported as causes of significant performance degradation. There is room for further performance improvement.
[0201] Proposed method
[0202] In this disclosure, several methods are proposed to solve the problems mentioned in the improvement of residual and coefficient coding. It should be noted that the following methods can be applied independently or in combination.
[0203] According to a first aspect of the present disclosure, it is proposed to use a fixed set of binary codewords to encode and decode certain syntax elements in residual coding, such as abs_remainder. The binary codewords can be formed using different methods. Some exemplary methods are listed below.
[0204] First, the same process used in current VVC to determine the codeword for abs_remainder is used, but a fixed rice parameter (eg, 1, 2, or 3) is always selected.
[0205] Second, fixed-length binarization.
[0206] Third, truncated Rice binarization.
[0207] Fourth, the truncated binary (TB) binarization process.
[0208] Fifth, the k-order Exp-Golomb binarization process (EGk).
[0209] Sixth, finite k-order Exp-Golomb binarization.
[0210] According to a second aspect of the present disclosure, it is proposed to use a fixed set of codewords to encode and decode certain syntax elements in transform coefficient encoding and decoding, such as abs_remainder and dec_abs_level. Binary codewords can be formed using different methods. Some example methods are listed below.
[0211] First, the same process used in current VVC to determine the codewords for abs_remainder and dec_abs_level is used, but with a fixed rice parameter, e.g., 1, 2, or 3. The value of baseLevel can still be different for abs_remainder and dec_abs_level, as used in current VVC. (e.g., baseLevel is set to 4 and 0 for codec abs_remainder and dec_abs_level, respectively).
[0212] Second, the same process used in current VVC to determine the codewords for abs_remainder and dec_abs_level is used, but with a fixed rice parameter, e.g., 1, 2, or 3. The value of baseLevel for abs_remainder and dec_abs_level is chosen to be the same. For example, use 0 for both or 4 for both.
[0213] Third, fixed-length binarization.
[0214] Fourth, truncated Rice binarization.
[0215] Fifth, the truncated binary (TB) binarization process.
[0216] Sixth, k-order Exp-Golomb binarization process (EGk).
[0217] Seventh, finite k-order Exp-Golomb binarization.
[0218] According to a third aspect of the present disclosure, it is proposed to use a single context to encode syntax elements (eg, abs_level_gtx_flag) related to residual coding or coefficient coding, and context selection based on adjacent decoding level information may be removed.
[0219] According to a fourth aspect of the present disclosure, it is proposed to use a variable set of binary codewords to encode and decode certain syntax elements in residual coding, such as abs_remainder, and to determine the selection of the set of binary codewords according to certain encoded information of the current block, such as a quantization parameter (QP) associated with a TB / CB and / or a slice, a prediction mode of a CU (e.g., IBC mode or intra or inter) and / or a slice type (e.g., I slice, P slice or B slice). Different methods can be used to derive a variable set of binary codewords, and some example methods are listed below.
[0220] First, the same process for determining the codeword of abs_remainder as used in current VVC is used, but with a different rice parameter.
[0221] Second, the k-th order Exp-Golomb binarization process (EGk).
[0222] Third, finite k-order Exp-Golomb binarization.
[0223] Table 6 Rice parameter determination based on QP value
[0224]
[0225]
[0226] The same method explained in the fourth aspect is also applicable to transform coefficient coding. According to the fifth aspect of the present disclosure, it is proposed to use a variable set of binary codewords to encode and decode certain syntax elements in transform coefficient coding, such as abs_remainder and dec_abs_level, and the selection of the set of binary codewords is determined according to certain encoded information of the current block, such as a quantization parameter (QP) associated with the TB / CB and / or slice, a prediction mode of the CU (e.g., IBC mode or intra-frame or inter-frame) and / or a slice type (e.g., I slice, P slice or B slice). Similarly, different methods can be used to derive a variable set of binary codewords, and some example methods are listed below.
[0227] First, the same process of determining the codeword of abs_remainder as used in current VVC is used, but with a different rice parameter.
[0228] Second, the k-th order Exp-Golomb binarization process (EGk).
[0229] Third, finite k-order Exp-Golomb binarization.
[0230] In the above method, different rice parameters can be used to derive different sets of binary codewords. For a given residual sample block, the rice parameter used is determined according to the CU QP (denoted as QP CU ). Instead of the adjacent horizontal information. A specific example is shown in Table 6, where TH1 to TH4 are predefined thresholds satisfying (TH1 < TH2 < TH3 < TH4), and K0 to K4 are predefined rice parameters. It should be noted that the same logic can be implemented in different ways in practice. For example, certain equations or look-up tables can also be used to derive the same rice parameter from the QP value of the current CU, as shown in Table 6.
[0231] According to a fifth aspect of the present disclosure, a set of parameters and / or thresholds associated with the determination of codewords for syntax elements of transform coefficient coding and / or transform skip residual coding is signaled in the bitstream. When syntax elements are coded by an entropy codec (e.g., arithmetic coding), the determined codewords are used as binarized codewords.
[0232] Note that the set of parameters and / or thresholds can be the entire set or a subset of all parameters and thresholds associated with the determination of codewords for syntax elements. The set of parameters and / or thresholds can be signaled at different levels in the video bitstream. For example, they can be signaled at the sequence level (e.g., sequence parameter set), picture level (e.g., picture parameter set and / or picture header), slice level (e.g., slice header), coding tree unit (CTU) level, or coding unit (CU) level.
[0233] In one example, the rice parameter for determining the codeword for coding the abs_remainder syntax in transform skip residual coding is signaled in the slice header, picture header, PPS, and / or SPS. When a CU is coded in transform skip mode and the CU is associated with the above slice header, picture header, PPS, and / or SPS, etc., the signaled rice parameter is used to determine the codeword for coding the syntax abs_remainder.
[0234] According to a sixth aspect of the present disclosure, a set of parameters and / or thresholds associated with the codeword determination described in the first and second aspects is used for syntax elements of transform coefficient coding and / or transform skip residual coding. And different sets can be used according to whether the current block contains luminance residuals / coefficients or chrominance residuals / coefficients. When syntax elements are coded by an entropy codec (e.g., arithmetic coding), the determined codewords are used as binarized codewords.
[0235] In one example, the codeword for abs_remainder associated with the transform residual codec used in the current VVC is used for both luma blocks and chroma blocks, but different fixed rice parameters are used for luma blocks and chroma blocks, respectively (e.g., K1 for luma blocks and K2 for chroma blocks, where K1 and K2 are integers).
[0236] According to a seventh aspect of the present disclosure, a set of parameters and / or thresholds associated with codeword determination of syntax elements for transform coefficient coding and / or transform skip residual coding is signaled in a bitstream. Different sets may be signaled for luminance blocks and chrominance blocks. When the syntax elements are coded (e.g., arithmetic coding) by an entropy codec, the determined codeword is used as a binarization codeword.
[0237] The same method explained in the above aspects also applies to escape value encoding and decoding in palette mode, for example, palette_escape_val.
[0238] According to an eighth aspect of the present disclosure, different k-orders of Exp-Golomb binarization can be used to derive different sets of binary codewords for encoding and decoding escape values in palette mode. In one example, for a given escape sample block, the Exp-Golomb parameter used (i.e., the value of k) is determined according to the QP value of the block (expressed as QP CU ) is determined. When deriving the value of parameter k based on a given QP value of a block, the same example as shown in Table 6 can be used. Although four different thresholds (from TH1 to TH4) are listed in this example, and it is possible to determine the value of parameter k based on these thresholds and QP CU Five different k values (from K0 to K4) are derived, but it should be noted that the number of thresholds is for illustration purposes only. In practice, different numbers of thresholds can be used to divide the entire QP value range into different numbers of QP value segments, and for each QP value segment, different k values can be used to derive the corresponding binary codewords for encoding the escape values of the blocks encoded in the palette mode. It is also worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can be used to derive the same rice parameters.
[0239] According to a ninth aspect of the present disclosure, a set of parameters and / or thresholds associated with codeword determination of a syntax element of an escaped sample is signaled in a bitstream. When the syntax element of the escaped sample is encoded and decoded (e.g., arithmetic encoding and decoding) by an entropy codec, the determined codeword is used as a binarization codeword.
[0240] Note that the set of parameters and / or thresholds may be the full set or a subset of all parameters and thresholds associated with codeword determination of syntax elements. The set of parameters and / or thresholds may be signaled at different levels in the video bitstream. For example, they may be signaled at a sequence level (e.g., a sequence parameter set), a picture level (e.g., a picture parameter set and / or a picture header), a slice level (e.g., a slice header), a coding tree unit (CTU) level, or a coding unit (CU) level.
[0241] In one example according to this aspect, k-order Exp-Golomb binarization is used to determine the codeword for encoding and decoding the palette_escape_val syntax in the palette mode, and the value of k is signaled to the decoder in the bitstream. The value of k can be signaled at different levels, for example, it can be signaled in a slice header, a picture header, a PPS and / or an SPS, etc. When the CU is encoded as a palette mode and the CU is associated with the above-mentioned slice header, a picture header, a PPS and / or an SPS, etc., the signaled Exp-Golomb parameters are used to determine the codeword for encoding and decoding the syntax palette_escape_val.
[0242] Coordination of horizontal mapping between transform skip mode and normal transform mode
[0243] According to the tenth aspect of the present disclosure, the same conditions for applying horizontal mapping are used for both transform skip mode and normal transform mode. In one example, it is proposed to apply horizontal mapping after the number of context coding and decoding bits (CCB) exceeds the limit for both transform skip mode and normal transform mode. In another example, it is proposed to apply horizontal mapping before the number of context coding and decoding bits (CCB) exceeds the limit for both transform skip mode and normal transform mode.
[0244] According to an eleventh aspect of the present disclosure, the same method for deriving a mapping position in a horizontal mapping is used for both a transform skip mode and a normal transform mode. In one example, it is proposed that the method for deriving a mapping position in a horizontal mapping used in a transform skip mode is also applied to a normal transform mode. In another example, it is proposed that the method for deriving a mapping position in a horizontal mapping used in a normal transform mode is also applied to a transform skip mode.
[0245] According to the twelfth aspect of the present disclosure, the same horizontal mapping method is applied to both the transform skip mode and the normal transform mode. In one example, it is proposed that the horizontal mapping function used in the transform skip mode is also applied to the normal transform mode. In another example, it is proposed that the horizontal mapping function used in the normal transform mode is also applied to the transform skip mode.
[0246] Simplification of Rice parameter derivation in residual coding
[0247] According to the thirteenth aspect of the present disclosure, it is proposed to use simple logic such as shift or division operations to replace the lookup table for rice parameter derivation when using Golomb-Rice code to encode and decode the syntax elements of abs_remainder / dec_abs_level. According to the present disclosure, the lookup table specified in Table 4 can be removed. In one example, the Rice parameter cRiceParam is derived as: cRiceParam = (locSumAbs>>n), where n is a positive number, such as 3. It is worth noting that in practice, other different logics can be used to obtain the same result, for example, a division operation by a value equal to 2 to the power of n. An example of the corresponding decoding process based on the VVC draft is shown below, where bold italic font shows changes and italic font shows deleted content.
[0248] Table 7 Rice parameter derivation process
[0249]
[0250]
[0251] According to the fourteenth aspect of the present disclosure, it is proposed to use fewer neighbor positions to derive rice parameters when using Golomb-Rice code to encode and decode the syntax elements of abs_remainder / dec_abs_level. In one example, it is proposed to use only 2 neighbor positions to derive rice parameters when encoding and decoding the syntax elements of abs_remainder / dec_abs_level. The corresponding decoding process based on the VVC draft is as follows, where bold italic fonts show changes and italic fonts show deleted content.
[0252] Table 8 Rice parameter derivation process
[0253]
[0254]
[0255] In another example, it is proposed to use only one neighbor position to derive the rice parameter when encoding and decoding the syntax element of abs_remainder / dec_abs_level. The corresponding decoding process based on the VVC draft is shown below, where bold italic fonts show changes and italic fonts show deleted content.
[0256] Table 9 Rice parameter derivation process
[0257]
[0258] According to the fifteenth aspect of the present disclosure, it is proposed that when using Golomb-Rice code to encode and decode the syntax elements of abs_remainder / dec_abs_level, different logic is used to adjust the value of locSumAbs based on the value of baseLevel for deriving rice parameters. In one example, additional scaling and offset operations are applied in the form of "(locSumAbs-baseLevel*5)*alpha+beta". When alpha takes the value of 1.5 and beta takes the value of 1, the corresponding decoding process based on the VVC draft is as follows, where bold italic fonts show changes and italic fonts show deleted content.
[0259] Table 10 Rice parameter derivation process
[0260]
[0261]
[0262] According to the sixteenth aspect of the present disclosure, it is proposed to remove the clipping operation for deriving rice parameters in the syntax elements of abs_remainder / dec_abs_level using Golomb-Rice code. According to the present disclosure, an example of the decoding process of the VVC draft is as follows, where bold italic fonts show changes and italic fonts show deleted content.
[0263] Table 11 Rice parameter derivation process
[0264]
[0265] According to the current disclosure, an example of the decoding process of the VVC draft is shown below, where bold italic font shows changes and italic font shows deleted content.
[0266] Table 12 Rice parameter derivation process
[0267]
[0268] According to the seventeenth aspect of the present disclosure, it is proposed that when using Golomb-Rice code to encode and decode the syntax element of abs_remainder / dec_abs_level, the initial value of locSumAbs is changed from 0 to a non-zero integer for deriving rice parameters. In an example, the initial value 1 is assigned to locSumAbs, and the corresponding decoding process based on the VVC draft is as follows, where bold italic fonts show changes and italic fonts show deleted content.
[0269] Table 13 Rice parameter derivation process
[0270]
[0271]
[0272] According to the eighteenth aspect of the present disclosure, it is proposed that when using Golomb-Rice code to encode and decode the syntax element of abs_remainder / dec_abs_level, the maximum value of the neighbor position level value is used instead of their sum value to derive the rice parameter. The corresponding decoding process based on the VVC draft is as follows, where bold italic fonts show changes and italic fonts show deleted content.
[0273] Table 14 Rice parameter derivation process
[0274]
[0275]
[0276] According to the nineteenth aspect of the present disclosure, it is proposed that when using Golomb-Rice code to encode and decode the syntax element of abs_remainder / dec_abs_level, a rice parameter is derived based on the relative amplitude of each AbsLevel value at adjacent positions and the basic level value. In an example, the rice parameter is derived based on how many of the AbsLevel values at adjacent positions are greater than the basic level. The corresponding decoding process based on the VVC draft is as follows, where bold italic fonts show changes and italic fonts show deleted content.
[0277] Table 15 Rice parameter derivation process
[0278]
[0279] In another example, the rice parameter is derived based on the sum of (AbsLevel-baseLevel) values for those neighboring positions whose AbsLevel values are greater than the base level. An example of a corresponding decoding process based on the VVC draft is shown below, where bold italic font shows changes and italic font shows deleted content.
[0280] Table 16 Rice parameter derivation process
[0281]
[0282]
[0283] According to the current disclosure, an example of the decoding process of the VVC draft is shown below, where bold italic font shows changes and italic font shows deleted content.
[0284] Table 17 Rice parameter derivation process
[0285]
[0286]
[0287] Simplification of horizontal mapping position derivation in residual coding
[0288] According to the twentieth aspect of the present disclosure, it is proposed to remove QState from the derivation of ZeroPos[n] so that ZeroPos[n] is derived solely from cRiceParam. An example of a corresponding decoding process based on the VVC draft is shown below, where bold italic fonts show changes and italic fonts show deleted content.
[0289] Table 18 Rice parameter derivation process
[0290]
[0291] According to the twenty-first aspect of the present disclosure, it is proposed to derive ZeroPos[n] based on the value of locSumAbs. An example of a corresponding decoding process based on the VVC draft is shown below, where bold italic fonts show changes and italic fonts show deleted content.
[0292] Table 19 Rice parameter derivation process
[0293]
[0294] According to the twenty-second aspect of the present disclosure, it is proposed to derive ZeroPos[n] based on the value of AbsLevel of the adjacent position. In one example, Zeropos[n] is derived based on the maximum value of AbsLevel[xC+1][yC] and AbsLevel[xC][yC+1]. An example of the corresponding decoding process based on the VVC draft is shown below, where bold italic fonts show changes and italic fonts show deleted content.
[0295] Table 20 Rice parameter derivation process
[0296]
[0297]
[0298] According to the twenty-third aspect of the present disclosure, it is proposed to derive both cRiceParam and ZeroPos[n] based on the maximum value of all AbsLevel values of adjacent positions. An example of the corresponding decoding process based on the VVC draft is shown below, where bold italic fonts show changes and italic fonts show deleted content.
[0299] Table 21 Rice parameter derivation process
[0300]
[0301]
[0302] The same method explained in the above aspects also applies to the derivation of predCoeff in residual coding of transform skip mode. In one example, the variable predCoeff is derived as follows:
[0303] predCoeff=Max(absLeftCoeff,absAboveCoeff)+1
[0304] Residual encoding and decoding of transform coefficients
[0305] In this disclosure, in order to solve the problems pointed out in the section "Improvements to residual and coefficient coding", methods are provided to simplify and / or further improve the existing design of residual coding. In general, the main features of the technology proposed in this disclosure are summarized as follows.
[0306] First, the rice parameter derivation used in conventional residual codec is adjusted based on the current design.
[0307] Second, the binary method used in conventional residual codecs is changed.
[0308] Third, the rice parameter derivation used in conventional residual codec is changed.
[0309] Derivation of Rice parameters in residual codec based on current designs
[0310] According to the twenty-fourth aspect of the present disclosure, a variable method derived using rice parameters is proposed to encode and decode certain syntax elements in residual encoding and decoding. For example, abs_remainder / dec_abs_level, and the selection is determined according to some encoded information of the current block (such as quantization parameters or encoding / decoding bit depths associated with TB / CB and / or stripes / profiles) and / or according to a new flag associated with the TB / CB / stripe / picture / sequence level (such as extended_precision_processing_flag). Different methods can be used to derive the rice parameters, and some example methods are listed below.
[0311] First, cRiceParam = (cRiceParam << a) + (cRiceParam >> b) + c, where a, b, and c are positive numbers, for example, {a, b, c} = {1, 1, 0}. It should be noted that in practice, other different logics can be used to obtain the same result. For example, a multiplication operation by a value equal to a power of 2.
[0312] Second, cRiceParam = (cRiceParam << a) + b, where a and b are positive numbers, for example, {a, b} = {1, 1}. It should be noted that in practice, other different logics can be used to obtain the same result. For example, a multiplication operation by a value equal to a power of 2.
[0313] Third, cRiceParam = (cRiceParam * a) + b, where a and b are positive numbers, for example, {a, b} = {1.5, 0}. It should be noted that in practice, other different logics can be used to obtain the same result. For example, a multiplication operation by a value equal to a power of 2.
[0314] An example of the corresponding decoding process based on the VVC draft is shown below, where the bold italic font shows the changes and the italic font shows the deleted content. The changes to the VVC draft are shown in bold italic font in Table 22. It should be noted that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters from the BitDepth value of the current CU / sequence.
[0315] Table 22 Rice Parameter Derivation Process
[0316]
[0317]
[0318] In another example, when BitDepth is greater than or equal to a predefined threshold (eg, 10, 11, 12, 13, 14, 15, or 16), the Rice parameter cRiceParam is derived as: cRiceParam=(cRiceParam<<a)+(cRiceParam> >b)+c, where a, b and c are positive numbers, such as 1. The corresponding decoding process based on the VVC draft is shown below, where bold italic fonts show changes and italic fonts show deleted content. Changes to the VVC draft are shown in bold italic fonts in Table 23. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters from the BitDepth value of the current CU / sequence.
[0319] Table 23 Rice parameter derivation process
[0320]
[0321]
[0322] Binary approach in residual coding for profiles with more than 10 bits
[0323] According to the twenty-fifth aspect of the present disclosure, it is proposed to use a variable set of binary codewords to encode and decode certain syntax elements in residual coding and decoding, such as abs_remainder / dec_abs_level, and determine the selection according to certain encoded information of the current block (e.g., quantization parameter or codec bit depth associated with TB / CB and / or slice / profile) and / or according to a new flag associated with TB / CB / slice / picture / sequence level (e.g., extended_precision_processing_flag). Different methods can be used to derive a variable set of binary codewords, and some example methods are listed below.
[0324] First, use the same process as that used for determining the码字 of abs_remainder in the current VVC, but always select a fixed Rice parameter (e.g., 2, 3, 4, 5, 6, 7, or 8). The fixed value can be different under different conditions according to some encoded information of the current block (e.g., the quantization parameter or the coding / decoding bit depth associated with the TB / CB and / or the slice / profile) and / or according to the syntax elements associated with the TB / CB / slice / picture / sequence level (e.g., rice_parameter_value). A specific example is shown in Table 24, where TH1 to TH4 are predefined thresholds satisfying (TH1 < TH2 < TH3 < TH4), and K0 to K4 are predefined Rice parameters. It should be noted that the same logic can be implemented differently in practice. For example, some equations or look-up tables can also be used to derive the same Rice parameter from the BitDepth value of the current CU / sequence, as shown in Table 24.
[0325] Second, fixed-length binarization.
[0326] Third, truncated Rice binarization.
[0327] Fourth, truncated binary (TB) binarization process.
[0328] Fifth, k-th order Exp-Golomb binarization process (EGk).
[0329] Sixth, finite k-th order Exp-Golomb binarization.
[0330] Table 24 BitDepth-based Rice parameter determination
[0331]
[0332] In one example, when the new flag (e.g., extended_precision_processing_flag) is equal to 1, the Rice parameter cRiceParam is fixed to n, where n is a positive number (e.g., 2, 3, 4, 5, 6, 7, or 8). The fixed value may be different under different conditions. An example of the corresponding decoding process based on the VVC draft is shown below, where the bold italic font shows the changes and the italic font shows the deleted content. The changes to the VVC draft are shown in bold italic font in Table 25.
[0333] Table 25 Rice parameter derivation process
[0334]
[0335]
[0336] In another example, it is proposed that when a new flag (e.g., extended_precision_processing_flag) is equal to 1, only a fixed value is used for the rice parameter when encoding and decoding the syntax elements of abs_remainder / dec_abs_level. The corresponding decoding process based on the VVC draft is shown below, where bold italic fonts show changes and italic fonts show deleted content. Changes to the VVC draft are shown in bold italic fonts in Table 26.
[0337] Table 26 Rice parameter derivation process
[0338]
[0339] In another example, when BitDepth is greater than or equal to a predefined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16), the Rice parameter cRiceParam is fixed to n, where n is a positive number, e.g., 4, 5, 6, 7, or 8. In different cases, the fixed value may be different. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16). Changes to the VVC draft are shown in bold italic font in Table 27, where bold italic font shows changes and italic font shows deleted content.
[0340] Table 27 Rice parameter derivation process
[0341]
[0342] In another example, it is proposed that when BitDepth is greater than a predefined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16), only a fixed value is used for the rice parameter when encoding and decoding the syntax elements of abs_remainder / dec_abs_level. The corresponding decoding process based on the VVC draft is as follows, where TH is a predefined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16), and where bold italic fonts show changes and italic fonts show deleted content. Changes to the VVC draft are shown in bold italic fonts in Table 28.
[0343] Table 28 Rice parameter derivation process
[0344]
[0345]
[0346] Derivation of Rice parameters in residual coding
[0347] According to the twenty-sixth aspect of the present disclosure, a variable method for deriving rice parameters is proposed to encode and decode certain syntax elements in residual coding, such as abs_remainder / dec_abs_level, and the selection is determined according to certain encoded information of the current block (e.g., quantization parameter or codec bit depth associated with TB / CB and / or slice / profile) and / or according to a new flag associated with TB / CB / slice / picture / sequence level (e.g., extended_precision_processing_flag). Different methods can be used to derive rice parameters, and some example methods are listed below.
[0348] First, it is proposed to use counters to derive rice parameters. The counter is determined based on the value of the coded coefficient and some coded information of the current block (e.g., component ID). A specific example, riceParameter = counter / a, where a is a positive number, such as 4, which maintains 2 counters (split by luma / chroma). These counters are reset to 0 at the beginning of each slice. Once encoded, if this is the first coefficient encoded in the sub-TU, the counter is updated as follows:
[0349] if(coeffValue>=(3< <rice))counter++
[0350] if(((coeffValue<<1)<(1<<riceParameter))&&(counter> 0))counter--;
[0351] Second, it is proposed to add a shift operation in the derivation of the rice parameter in VVC. The shift is determined according to the value of the coded coefficient. An example of the corresponding decoding process based on the VVC draft is shown below, where the shift is determined according to the counter of method 1, where bold italic font shows changes and italic font shows deleted content. Changes to the VVC draft are shown in bold italic font in Table 29.
[0352] Table 29 Rice parameter derivation process
[0353]
[0354]
[0355] First, it is proposed to add a shift operation in the derivation of the rice parameter in VVC. The shift is determined according to a certain encoded information of the current block, for example, the coding / decoding bit depth associated with the TB / CB and / or the slice profile (e.g., 14-bit profile or 16-bit profile). An example of the corresponding decoding process based on the VVC draft is shown below. The shift is determined according to the counter of Method 1, where the bold italic font shows the changes and the italic font shows the deleted content. The changes to the VVC draft are shown in bold italic font in Table 30.
[0356] Table 30 Rice Parameter Derivation Process
[0357]
[0358] Residual Coding for Transform Skip
[0359] According to the twenty-seventh aspect of the present disclosure, it is proposed to use a variable set of binary codewords to code / decode certain syntax elements in the residual coding for transform skip, such as abs_remainder, and determine the selection according to a certain encoded information of the current block (e.g., the quantization parameter or the coding / decoding bit depth associated with the TB / CB and / or the slice / profile) and / or according to a new flag associated with the TB / CB / slice / picture / sequence level (e.g., extended_precision_processing_flag). Different methods can be used to derive the variable set of binary codewords, and some example methods are listed below.
[0360] First, use the same process as the codeword used to determine abs_remainder in the current VVC, but always select a fixed rice parameter (e.g., 2, 3, 4, 5, 6, 7, or 8). According to a certain encoded information of the current block, such as the quantization parameter, frame type (e.g., I, P, or B), component ID (e.g., luminance or chrominance), color format (e.g., 420, 422, or 444), or the coding / decoding bit depth associated with the TB / CB and / or the slice / profile, and / or according to the syntax element associated with the TB / CB / slice / picture / sequence level (e.g., rice_parameter_value), the fixed value can be different under different conditions. A specific example is shown in Table 7, where TH1 to TH4 are predefined thresholds satisfying (TH1 < TH2 < TH3 < TH4), and K0 to K4 are predefined rice parameters. It should be noted that the same logic can be implemented differently in practice. For example, certain equations or look-up tables can also be used to derive the same rice parameter from the BitDepth value of the current CU / sequence, as shown in Table 7.
[0361] Second, fixed-length binarization.
[0362] Third, truncated Rice binarization.
[0363] Fourth, the truncated binary (TB) binarization process.
[0364] Fifth, the k-order Exp-Golomb binarization process (EGk).
[0365] Sixth, finite k-order Exp-Golomb binarization.
[0366] An example of the corresponding decoding process based on the VVC draft is shown below, with changes to the VVC draft shown in bold italic font in Table 31, and deleted content shown in italics. It is worth noting that the same logic can be implemented differently in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0367] Table 31 Rice parameter derivation process
[0368]
[0369] In another example, it is proposed that when a new flag (e.g., extended_precision_processing_flag) is equal to 1, only a fixed value is used for the rice parameter when encoding and decoding the syntax element of abs_remainder. The corresponding decoding process based on the VVC draft is shown below, where bold italic fonts show changes and italic fonts show deleted content. Changes to the VVC draft are shown in bold italic fonts in Table 32.
[0370] Table 32 Rice parameter derivation process
[0371]
[0372] In another example, when the new flag (e.g., extended_precision_processing_flag) is equal to 1, the Rice parameter cRiceParam is fixed to n, where n is a positive number (e.g., 2, 3, 4, 5, 6, 7, or 8). In different cases, the fixed value may be different. The corresponding decoding process based on the VVC draft is as follows, where bold italic fonts show changes and italic fonts show deleted content. Changes to the VVC draft are shown in bold italic fonts in Table 33.
[0373] Table 33 Rice parameter derivation process
[0374]
[0375] In yet another example, when BitDepth is greater than or equal to a predefined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16), the Rice parameter cRiceParam is fixed to n, where n is a positive number, e.g., 4, 5, 6, 7, or 8. In different cases, the fixed value may be different. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16), and where bold italic fonts show changes and italic fonts show deleted content. Changes to the VVC draft are shown in bold italic fonts in Table 34.
[0376] Table 34 Rice parameter derivation process
[0377]
[0378] In another example, a control flag is signaled in the slice header to indicate whether signaling of Rice parameters for transform skip blocks is enabled or disabled. When the control flag is signaled as enabled, a syntax element is further signaled for each transform skip slice to indicate the Rice parameters for the slice. When the control flag is signaled as disabled (e.g., set to equal "0"), no syntax elements are further signaled at a lower level to indicate the Rice parameters for the transform skip slice, and a default Rice parameter (e.g., 1) is used for all transform skip slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2), and where bold italic font shows changes and italic font shows deleted content. Changes to the VVC draft are shown in bold italic font in Table 35. It is worth noting that sh_ts_residual_coding_rice_index can be encoded and decoded in different ways and / or can have a maximum value. For example, an unsigned integer u(n) using n bits or a fixed pattern bit string f(n) written (from left to right) using n bits (with the left bits first) can also be used to encode / decode the same syntax element.
[0379] Strip Header Syntax
[0380] Table 35 Syntax of residual coding and decoding
[0381]
[0382] sh_ts_residual_coding_rice_flag equal to 1 specifies that sh_ts_residual_coding_rice_index may be present in the current slice. sh_ts_residual_coding_rice_flag equal to 0 specifies that sh_ts_residual_coding_rice_index does not exist in the current slice. When sh_ts_residual_coding_rice_flag is not present, the value of sh_ts_residual_coding_rice_flag is inferred to be equal to 0. sh_ts_residual_coding_rice_index specifies the rice parameter for the residual_ts_coding() syntax structure.
[0383] Table 36 Rice parameter derivation process
[0384]
[0385]
[0386] In another example, a control flag is signaled in a sequence parameter set (or sequence parameter set range extension syntax) to indicate whether signaling of Rice parameters for transform skip blocks is enabled or disabled. When the control flag is signaled as enabled, a syntax element is further signaled for each transform skip slice to indicate the Rice parameters for the slice. When the control flag is signaled as disabled (e.g., set to equal "0"), no further syntax elements are signaled at a lower level to indicate the Rice parameters for the transform skip slice, and a default Rice parameter (e.g., 1) is used for all transform skip slices. An example of a corresponding decoding process based on the VVC draft is shown below, where Th is a predefined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold italic font in Table 37, and deleted content is shown in italic font. It is worth noting that sh_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have a maximum value. For example, an unsigned integer u(n) using n bits or a fixed pattern bit string f(n) written (from left to right) using n bits (with the left bits first) can also be used to encode / decode the same syntax element.
[0387] Sequence Parameter Set RBSP Syntax
[0388] Table 37 Syntax of residual codec
[0389]
[0390] sps_ts_residual_coding_rice_presen_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx may be present in the SH syntax structure referencing the SPS. sps_ts_residual_coding_rice_presen_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx is not present in the SH syntax structure referencing the SPS. When sps_ts_residual_coding_rice_present_in_sh_flag is not present, the value of sps_ts_residual_coding_rice_present_in_sh_flag is inferred to be equal to 0.
[0391] Strip Header Syntax
[0392] Table 38 Syntax of residual coding and decoding
[0393]
[0394]
[0395] sh_ts_residual_coding_rice_idx specifies the rice parameter used for the residual_ts_coding() syntax structure.
[0396] Table 39 Rice parameter derivation process
[0397]
[0398] In one or more examples of the present disclosure, Fig. 27As shown, it is proposed that in step 2702, if transform skipping is disabled, the presence of Rice parameters for transform skip residual coding is disabled. In a specific example, in order to achieve such a design purpose, it is proposed to use sps_transform_skip_enabled_flag to constrain the presence of sps_ts_residual_coding_rice_present_in_sh_flag, as shown in step 2704. For example, when the flag sps_transform_skip_enabled_flag is equal to zero (i.e., transform skipping is disabled at the current picture), sps_ts_residual_coding_rice_present_in_sh_flag will not be signaled, but inferred to be 0. When the flag sps_transform_skip_enabled_flag is equal to 1, sps_ts_residual_coding_rice_present_in_sh_flag will be further signaled. Changes to the current VVC working draft are shown below in italic font.
[0399] if(sps_transform_skip_enabled_flag) sps_ts_residual_coding_rice_present_in_sh_flag u(1)
[0400] In another example, when the transform skip flag (sps_transform_skip_enabled_flag) is signaled as enabled, a control flag is further signaled in the sequence parameter set (or in the sequence parameter set range extension syntax) to indicate whether the signaling of Rice parameters for the transform skip block is enabled or disabled. When the control flag is signaled as enabled, a syntax element is further signaled for each transform skip slice to indicate the Rice parameters for the slice. When the control flag is signaled as disabled (e.g., set to equal "0"), no further syntax elements are signaled at a lower level to indicate the Rice parameters for the transform skip slice, and a default Rice parameter (e.g., 1) is used for all transform skip slices. An example of a corresponding decoding process based on the VVC draft is shown below. Changes to the VVC draft are shown in italic font.
[0401] Sequence Parameter Set RBSP Syntax
[0402]
[0403]
[0404] sps_ts_residual_coding_rice_presen_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx may be present in the SH syntax structure referencing the SPS. sps_ts_residual_coding_rice_present_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx_minus1 is not present in the SH syntax structure referencing the SPS. When sps_ts_residual_coding_rice_present_in_sh_flag is not present, the value of sps_ts_residual_coding_rice_present_in_sh_flag is inferred to be equal to 0.
[0405] Strip Header Syntax
[0406]
[0407] sh_ts_residual_coding_rice_idx_minus1 incremented by 1 specifies the rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_idx_minus1 is not present, the value of sh_ts_residual_coding_rice_idx_minus1 is inferred to be equal to 0.
[0408] 9.3.3.11 Binarization process of abs_remainder[]
[0409] The inputs to this process are a request for binarization of the syntax element abs_remainder[n], the color component cIdx, the current sub-block index i and the luma position (x0, y0) specifying the upper left corner sample of the current luma transform block relative to the upper left corner luma sample of the picture, the current coefficient scan position (xC, yC), the binary logarithm of the transform block width log2TbWidth, and the binary logarithm of the transform block height log2TbHeight.
[0410] The output of this process is the binarization of the syntax elements.
[0411] The variables lastAbsRemainder and lastRiceParam are derived as follows:
[0412] - If this procedure is called for the first time for the current sub-block index i, lastAbsRemainder and lastRiceParam are both set equal to 0.
[0413] - Otherwise (this process is not called for the first time for the current sub-block index i), lastAbsRemainder and lastRiceParam are set equal to the values of abs_remainder[n] and cRriceParam, respectively, that have been derived during the last call of the binarization process of the syntax element abs_remainder[n] as specified in this section.
[0414] The rice parameter cRriceParam is derived as follows:
[0415] - If transform_skip_flag[x0][y0][cIdx] is equal to 1, and sh_ts_residual_coding_disabled_flag is equal to 0, the Rice parameter cRiceParam is set equal to sh_ts_residual_coding_rice_idx_minus1+1.
[0416] Otherwise, the rice parameter cRiceParam is derived by calling the rice parameter derivation procedure for abs_remainder[] as specified in section 9.3.3.2 with the variable baseLevel set equal to 4, the color component index cIdx, the luma position (x0, y0), the current coefficient scan position (xC, yC), the binary logarithm of the transform block width log2TbWidth, and the binary logarithm of the transform block height log2TbHeight as input.
[0417] In another example, one syntax element is signaled for each transform skipped slice to indicate the Rice parameters for the slice. An example of a corresponding decoding process based on the VVC draft is shown below. The changes to the VVC draft are shown in bold italic font in Table 40. It is worth noting that sh_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have a maximum value. For example, an unsigned integer u(n) using n bits or a fixed pattern bit string f(n) written (from left to right) using n bits (where the left side bits come first) can also be used to encode / decode the same syntax element.
[0418] Strip Header Syntax
[0419] Table 40 Syntax of residual coding and decoding
[0420]
[0421] sh_ts_residual_coding_rice_idx specifies the rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_idx is not present, the value of sh_ts_residual_coding_rice_idx is inferred to be equal to 0.
[0422] Table 41 Rice parameter derivation process
[0423]
[0424] In another example, a control flag is signaled in the picture parameter set range extension syntax to indicate whether signaling of Rice parameters for the transform skip block is enabled or disabled. When the control flag is signaled as enabled, a syntax element is further signaled to indicate the Rice parameters for the picture. When the control flag is signaled as disabled (e.g., set to equal "0"), no further syntax elements are signaled at a lower level to indicate the Rice parameters for the transform skip slice, and a default Rice parameter (e.g., 1) is used for all transform skip slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold italic font in Table 42. It is worth noting that pps_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have a maximum value. For example, an unsigned integer u(n) using n bits or a fixed pattern bit string f(n) written (from left to right) using n bits (with the left bits first) can also be used to encode / decode the same syntax element.
[0425] Picture Parameter Set Range Extension Syntax
[0426] Table 42 Syntax of residual coding and decoding
[0427]
[0428]
[0429] pps_ts_residual_coding_rice_flag equal to 1 specifies that pps_ts_residual_coding_rice_idx may be present in the current picture. pps_ts_residual_coding_rice_flag equal to 0 specifies that pps_ts_residual_coding_rice_idx is not present in the current picture. When pps_ts_residual_coding_rice_flag is not present, the value of pps_ts_residual_coding_rice_flag is inferred to be equal to 0.
[0430] pps_ts_residual_coding_rice_idx specifies the rice parameter used for the residual_ts_coding() syntax structure.
[0431] Table 43 Rice parameter derivation process
[0432]
[0433] In another example, it is proposed to encode and decode the syntax element abs_remainder using only one variable rice parameter. The value of the applied rice parameter can be determined based on certain encoded information of the current block, such as block size, quantization parameter, bit depth, transform type, etc. In a specific embodiment, it is proposed to adjust the rice parameter based on the encoding and decoding bit depth and the quantization parameter applied to a CU. The corresponding decoding process based on the VVC draft is shown as follows, and the changes to the VVC draft are shown in bold italic font in Table 44, and the deleted content is shown in italic font. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0434] Table 44 Rice parameter derivation process
[0435]
[0436]
[0437]
[0438] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH is a predefined threshold (e.g., 33 or 34). Changes to the VVC draft are shown in bold italic font in Table 45, and deleted content is shown in italic font. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0439] Table 45 Rice parameter derivation process
[0440]
[0441] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH A and TH B is a predefined threshold (e.g., TH A =8,TH B =33 or 34). Changes to the VVC draft are shown in bold italic font in Table 46, and deleted content is shown in italic font. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0442] Table 46 Rice parameter derivation process
[0443]
[0444]
[0445] In another example, it is proposed that when a new flag (e.g., extended_precision_processing_flag) is equal to 1, only the changed rice parameters are used to encode and decode the syntax elements of abs_remainder. The change value can be determined based on some encoded information of the current block, such as block size, quantization parameter, bit depth, transform type, etc. In a specific embodiment, it is proposed to adjust the rice parameters based on the encoding and decoding bit depth and the quantization parameter applied to a CU. The corresponding decoding process based on the VVC draft is shown as follows. The changes to the VVC draft are shown in bold italic font in Table 47. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0446] Table 47 Rice parameter derivation process
[0447]
[0448]
[0449] In yet another example, the corresponding decoding process based on the VVC draft is as follows, where TH is a predefined threshold (e.g., 18, 19). The changes to the VVC draft are shown in bold italic font in Table 48. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0450] Table 48 Rice parameter derivation process
[0451]
[0452] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH A and TH B is a predefined threshold (e.g., TH A =8,TH B =18 or 19). The changes to the VVC draft are shown in bold italic font in Table 49. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0453] Table 49 Rice parameter derivation process
[0454]
[0455] Fig.16 A method for video encoding is shown. The method can be applied to an encoder, for example. In step 1610, the encoder can receive a video input. For example, the video input can be a real-time stream. In step 1612, the encoder can obtain a quantization parameter based on the video input. The quantization parameter can be calculated, for example, by a quantization unit in the encoder. In step 1614, the encoder can derive a rice parameter based on at least one predefined threshold, a codec bit depth, and a quantization parameter. For example, the rice parameter is used to signal the syntax of abs_remainder and dec_abs_level. In step 1616, the encoder can entropy encode a video bitstream based on the rice parameter. For example, the video bitstream can be entropy encoded to generate a compressed video bitstream.
[0456] In another example, it is proposed that when BitDepth is greater than 10, only fixed values (e.g., 2, 3, 4, 5, 6, 7, or 8) are used for the rice parameter when encoding and decoding the syntax element of abs_remainder. The fixed value may be different under different conditions depending on some encoded information of the current block, such as a quantization parameter. The corresponding decoding process based on the VVC draft is shown below, where TH is a predefined threshold (e.g., 18, 19). The changes to the VVC draft are shown in bold italic font in Table 50. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0457] Table 50 Rice parameter derivation process
[0458]
[0459] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH A and TH B is a predefined threshold (e.g., TH A =8,TH B =18 or 19). The changes to the VVC draft are shown in bold italic font in Table 51. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0460] Table 51 Rice parameter derivation process
[0461]
[0462] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH is a predefined threshold (e.g., 33 or 34). The changes to the VVC draft are shown in bold italic font in Table 52. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0463] Table 52 Rice parameter derivation process
[0464]
[0465]
[0466] In another example, the corresponding decoding process based on the VVC draft is as follows, where TH A and TH B is a predefined threshold (e.g., TH A=8,TH B =33 or 34). The changes to the VVC draft are shown in bold italic font in Table 53. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0467] Table 53 Rice parameter derivation process
[0468]
[0469] It is worth noting that in the above description, the equations for calculating specific rice parameters are used only as examples to illustrate the proposed concept. For technicians in the field of modern video coding and decoding technology, other mapping functions (or equivalent mapping equations) are already applicable to the proposed concept (i.e., determining the rice parameters of the transform skip mode based on the codec bits and the applied quantization parameters). At the same time, it should also be mentioned that in the current VVC design, the value of the applied quantization parameter is allowed to vary at the coding block group level. Therefore, the proposed rice parameter adjustment scheme can provide flexible adaptation of the rice parameters of the transform skip mode at the coding block group level.
[0470] Signaling information for normal residual codec and transform skip residual codec
[0471] According to the twenty-eighth aspect of the present disclosure, it is proposed to signal the rice parameters of binary codewords used for encoding and decoding certain syntax elements (e.g., abs_remainder in transform skip residual encoding and decoding), which are used to derive shift and offset parameters of the rice parameters of abs_remainder / dec_abs_level in conventional residual encoding and decoding, and determine whether to signal based on certain encoded information of the current block (e.g., quantization parameter or coding bit depth associated with TB / CB and / or slice / profile) and / or based on a new flag associated with TB / CB / slice / picture / sequence level (e.g., sps_residual_coding_info_present_in_sh_flag).
[0472] In one example, a control flag is signaled in the slice header to indicate whether the signaling of Rice parameters for transform skip blocks and the signaling of shift and / or offset parameters for derivation of rice parameters in transform blocks are enabled or disabled. When the control flag is signaled as enabled, one syntax element is further signaled for each transform skip slice to indicate the Rice parameters for the slice, and two syntax elements are further signaled for each transform slice to indicate the shift and / or offset parameters for derivation of Rice parameters for the slice. When the control flag is signaled as disabled (e.g., set to "0"), no further syntax elements are signaled at a lower level to indicate the Rice parameters for the transform skip slice, and default Rice parameters (e.g., 1) are used for all transform skip slices, and no further syntax elements are signaled at a lower level to indicate the shift and offset parameters for derivation of Rice parameters for the transform slice, and default shift and / or offset parameters (e.g., 0) are used for all transform slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2). The changes to the VVC draft are shown in bold italic font in Table 54. It is worth noting that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_index can be encoded and decoded in different ways and / or can have a maximum value. For example, an unsigned integer u(n) of n bits or a fixed pattern bit string f(n) written (from left to right) using n bits (where the left side bits come first) can also be used to encode / decode the same syntax element.
[0473] Fig.17 A method for video decoding is shown. The method can be applied, for example, to an encoder. In step 1710, the encoder can receive a video input. In step 1712, the encoder can signal rice parameters of binary codewords for codec syntax elements. The codec syntax elements can include abs_remainder in a transform skip residual codec. In step 1714, the encoder can entropy encode a video bitstream based on the rice parameters and the video input.
[0474] Strip Header Syntax
[0475] Table 54 Syntax of residual coding and decoding
[0476]
[0477] sh_residual_coding_rice_flag equal to 1 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_residual_coding_rice_index may be present in the current slice. sh_residual_coding_rice_flag equal to 0 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_residual_coding_rice_index do not exist in the current slice.
[0478] sh_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_shift is not present, the value of sh_residual_coding_rice_shift is inferred to be equal to 0.
[0479] sh_residual_coding_rice_offset specifies the offset parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_offset does not exist, the value of sh_residual_coding_rice_offset is inferred to be equal to 0.
[0480] sh_ts_residual_coding_rice_index specifies the rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_index does not exist, the value of sh_ts_residual_coding_rice_index is inferred to be equal to 0.
[0481] Table 55 Rice parameter derivation process
[0482]
[0483]
[0484] Table 56 Rice parameter derivation process
[0485]
[0486] In another example, a control flag is signaled in a sequence parameter set (or in a sequence parameter set range extension syntax) to indicate whether signaling of Rice parameters for transform skip blocks and signaling of shift and / or offset parameters for derivation of rice parameters in transform skip blocks are enabled or disabled. When the control flag is signaled as enabled, one syntax element is further signaled for each transform skip slice to indicate the Rice parameters for the slice, and two syntax elements are further signaled for each transform slice to indicate the shift and / or offset parameters for derivation of Rice parameters for the slice. When the control flag is signaled as disabled (e.g., set to "0"), no further syntax elements are signaled at a lower level to indicate Rice parameters for the transform skip slice, and default Rice parameters (e.g., 1) are used for all transform skip slices, and no further syntax elements are signaled at a lower level to indicate shift and / or offset parameters for derivation of Rice parameters for the transform slice, and default shift and / or offset parameters (e.g., 0) are used for all transform slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold italic font in Table 57. It is worth noting that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have a maximum value. For example, an unsigned integer u(n) of n bits or a fixed pattern bit string f(n) written (from left to right) using n bits (where the left side bits come first) can also be used to encode / decode the same syntax element.
[0487] Sequence Parameter Set RBSP Syntax
[0488] Table 57 Syntax of residual coding and decoding
[0489]
[0490] sps_residual_coding_info_present_in_sh_flag equal to 1 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx may be present in the SH syntax structures referencing the SPS. sps_residual_coding_info_present_in_sh_flag equal to 0 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx are not present in the SH syntax structures referencing the SPS. When sps_residual_coding_info_present_in_sh_flag is not present, the value of sps_residual_coding_info_present_in_sh_flag is inferred to be equal to 0.
[0491] Strip Header Syntax
[0492] Table 58 Syntax of residual coding
[0493]
[0494] sh_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_shift is not present, the value of sh_residual_coding_rice_shift is inferred to be equal to 0.
[0495] sh_residual_coding_rice_offset specifies the offset parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_offset does not exist, the value of sh_residual_coding_rice_offset is inferred to be equal to 0.
[0496] sh_ts_residual_coding_rice_idx specifies the rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_index does not exist, the value of sh_ts_residual_coding_rice_index is inferred to be equal to 0.
[0497] Table 59 Rice parameter derivation process
[0498]
[0499] Table 60 Rice parameter derivation process
[0500]
[0501]
[0502] In another example, one syntax element is signaled for each transform skipped slice to indicate the Rice parameters for the slice, and two syntax elements are signaled for each transform slice to indicate the shift and / or offset parameters used to derive the Rice parameters for the slice. An example of a corresponding decoding process based on the VVC draft is shown below. The changes to the VVC draft are shown in bold italic font in Table 61. It is worth noting that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or have maximum values. For example, an unsigned integer u(n) using n bits or a fixed pattern bit string f(n) written (from left to right) using n bits (where the left side bits come first) can also be used to encode / decode the same syntax element.
[0503] Strip Header Syntax
[0504] Table 61 Syntax of residual coding and decoding
[0505]
[0506] sh_ts_residual_coding_rice_idx specifies the rice parameter used for the residual_ts_coding() syntax structure. When sh_ts_residual_coding_rice_idx is not present, the value of sh_ts_residual_coding_rice_idx is inferred to be equal to 0.
[0507] sh_residual_coding_rice_offset specifies the offset parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_offset does not exist, the value of sh_residual_coding_rice_offset is inferred to be equal to 0.
[0508] sh_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When sh_residual_coding_rice_shift is not present, the value of sh_residual_coding_rice_shift is inferred to be equal to 0.
[0509] Table 62 Rice parameter derivation process
[0510]
[0511]
[0512] Table 63 Rice parameter derivation process
[0513]
[0514] In yet another example, a control flag is signaled in the picture parameter set range extension syntax to indicate whether signaling of Rice parameters for transform skip blocks and signaling of shift and / or offset parameters for deriving rice parameters in transform blocks is enabled or disabled. When the control flag is signaled as enabled, one syntax element is further signaled to indicate Rice parameters for transform skip residual codec for the picture, and two syntax elements are further signaled for normal residual codec to indicate shift and / or offset parameters for derivation of Rice parameters for the picture. When the control flag is signaled as disabled (e.g., set equal to "0"), no further syntax elements are signaled at a lower level to indicate Rice parameters for transform skip residual coding, and default Rice parameters (e.g., 1) are used for all transform skip residual coding, and no further syntax elements are signaled at a lower level to indicate shift and / or offset parameters for deriving Rice parameters for regular residual coding, and default shift and / or offset parameters (e.g., 0) are used for all regular residual coding. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predefined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold italic font in Table 64. It is worth noting that pps_residual_coding_rice_shift, pps_residual_coding_rice_offset, and pps_ts_residual_coding_rice_idx can be encoded and decoded in different ways and / or can have maximum values. For example, an unsigned integer u(n) using n bits or a fixed pattern bit string f(n) written (from left to right) using n bits (with the left bits first) can also be used to encode / decode the same syntax element.
[0515] Picture Parameter Set Range Extension Syntax
[0516] Table 64 Syntax of residual coding and decoding
[0517]
[0518] pps_residual_coding_info_flag equal to 1 specifies that pps_residual_coding_rice_shift, pps_residual_coding_rice_offset, and pps_ts_residual_coding_rice_idx may be present in the current picture. pps_residual_coding_info_flag equal to 0 specifies that pps_residual_coding_rice_shift, pps_residual_coding_rice_offset, and pps_ts_residual_coding_rice_idx are not present in the current picture. When pps_residual_coding_info_flag is not present, the value of pps_residual_coding_info_flag is inferred to be equal to 0.
[0519] pps_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When pps_residual_coding_rice_shift is not present, the value of pps_residual_coding_rice_shift is inferred to be equal to 0.
[0520] pps_residual_coding_rice_offset specifies the offset parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. When pps_residual_coding_rice_offset is not present, the value of pps_residual_coding_rice_offset is inferred to be equal to 0.
[0521] pps_ts_residual_coding_rice_idx specifies the rice parameter used for the residual_ts_coding() syntax structure. When pps_ts_residual_coding_rice_idx is not present, the value of pps_ts_residual_coding_rice_idx is inferred to be equal to 0.
[0522] Table 65 Rice parameter derivation process
[0523]
[0524] Table 66 Rice parameter derivation process
[0525]
[0526] According to the twenty-ninth aspect of the present disclosure, it is proposed to use different rice parameters to encode and decode certain syntax elements in transform skip residual coding, for example, abs_remainder, shift and offset parameters for the derivation of rice parameters for abs-remainder / dec_abs_level in conventional residual coding, and determine which rice parameter to use based on certain encoded information of the current block (for example, quantization parameter or encoding bit depth associated with TB / CB and / or slice / profile), and / or based on a new flag associated with TB / CB / slice / picture / sequence level (for example, sps_residual_coding_info_present_in_sh_flag).
[0527] In one example, a control flag is signaled in a slice header to indicate whether the derivation process of Rice parameters for transform skip blocks and the derivation process of shift and / or offset parameters for rice parameters in transform blocks are enabled or disabled. When the control flag is signaled as enabled, the Rice parameters may be different under different conditions depending on certain encoded information of the current block, such as quantization parameter and bit depth. And the shift and / or offset parameters used to derive Rice parameters in conventional residual coding may be different under different conditions depending on certain encoded information of the current block, such as quantization parameter and bit depth. When the control flag is signaled as disabled (e.g., set to "0"), the default Rice parameters (e.g., 1) are used for all transform skip slices, and the default shift and / or offset parameters (e.g., 0) are used for all transform slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH A and TH B is a predefined threshold (e.g., TH A =8,TH B =18 or 19). The changes to the VVC draft are shown in bold italic font in Table 67. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0528] Strip Header Syntax
[0529] Table 67 Syntax of residual coding and decoding
[0530]
[0531] sh_residual_coding_rice_flag equal to 1 specifies that the bit-depth-dependent Rice parameter derivation process is used in the current slice. sh_residual_coding_rice_flag equal to 0 specifies that the bit-depth-dependent Rice parameter derivation process is not used in the current slice.
[0532] Table 68 Rice parameter derivation process
[0533]
[0534] Table 69 Rice parameter derivation process
[0535]
[0536]
[0537] In yet another example, the corresponding decoding process based on the VVC draft is as follows, where TH is a predefined threshold (e.g., 18, 19). The changes to the VVC draft are shown in bold italic font in Table 70. It is worth noting that the same logic can be implemented in different ways in practice. For example, certain equations or lookup tables can also be used to derive the same rice parameters.
[0538] Table 70 Rice parameter derivation process
[0539]
[0540]
[0541] According to another aspect of the present disclosure, it is proposed to add constraints on the values of the above-mentioned codec tool flags in the general constraint information to provide the same general constraint control as others.
[0542] For example, sps_ts_residual_coding_rice_present_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx can be present in the SH syntax structure that references the SPS. sps_ts_residual_coding_rice_presen_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx does not exist in the SH syntax structure that references the SPS. According to the present disclosure, it is proposed to add a syntax element gci_no_ts_residual_coding_rice_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.
[0543]
[0544] In another example, pps_ts_residual_coding_rice_flag equal to 1 specifies that pps_ts_residual_coding_rice_idx may be present in the current picture. pps_ts_residual_coding_rice_flag equal to 0 specifies that pps_ts_residual_coding_rice_idx does not exist in the current picture. According to the present disclosure, it is proposed to add a syntax element gci_no_ts_residual_coding_rice_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.
[0545]
[0546] In another example, sps_rice_adaptation_enabled_flag is equal to 1 indicating that the binarized Rice parameters of abs_remaining[ ] and dec_abs_leveld can be derived by the formula.
[0547] The formula may include: RiceParam = RiceParam + shiftVal, and shiftVal = (localSumAbs < Tx[0])? Rx[0] : ((localSumAbs < Tx[1])? Rx[1] : ((localSumAbs < Tx[2])? Rx[2] : ((localSumAbs < Tx[3])? Rx[3] : Rx[4]))), where Tx[] and Rx[] are specified as follows: Tx[] = {32, 128, 512, 2048}>>(1523) Rx[] = {0, 2, 4, 6, 8}
[0548] According to the present disclosure, a syntax element gci_no_rice_adaptation_constraint_flag is proposed to be added to the common constraint information syntax to provide the same common constraint control as other flags. An example of the decoding process of the VVC draft is shown below. The changes to the VVC draft are highlighted. The added parts are highlighted in italic font.
[0549]
[0550] Since the proposed rice parameter adaptation scheme is only used for transform skip residual coding (TSRC), the proposed method is only effective when TSRC is enabled. Accordingly, in one or more embodiments of the present disclosure, a bitstream constraint is proposed, which requires that when the transform skip mode is disabled at the common constraint information level, for example, when the value of gci_no_transform_skip_constraint_flag is set to 1, the value of gci_no_rice_adaptation_constraint_flag is 1.
[0551] In another example, sps_range_extension_flag being equal to 1 specifies that the sps_range_extension() syntax structure exists in the SPS RBSP syntax structure. sps_range_extension_flag being equal to 0 specifies that this syntax structure does not exist. According to the present disclosure, a syntax element gci_no_range_extension_constraint_flag is proposed to be added to the common constraint information syntax to provide the same common constraint control as other flags. An example of the decoding process of the VVC draft is shown below. The changes to the VVC draft are highlighted. The added parts are highlighted in italic font.
[0552]
[0553]
[0554] Fig.19 A method for video coding and decoding according to an example of the present disclosure is shown. The method can be applied to a decoder, for example. In step 1902, the decoder can receive a sequence parameter set (SPS) range extension flag, which indicates whether a syntax structure sps_range_extension is present in a slice header (SH) raw byte sequence payload (RBSP) syntax structure based on a value of the SPS range extension flag.
[0555] In step 1904 , in response to determining that the value of the SPS range extension flag is equal to 1, the decoder may determine that sps_range_extension is present in the SH RBSP syntax structure.
[0556] In step 1906 , in response to determining that the value of the range extension flag is equal to 0, the decoder may determine that sps_range_extension is not present in the SH RBSP syntax structure.
[0557] In another example, sps_cabac_bypass_alignment_enabled_flag equal to 1 specifies that the value of ivlCurrRange can be aligned before bypass decoding of the syntax elements sb_coded_flag[][], abs_remainder[], dec_abs_level[n], and coeff_sign_flag[]. sps_cabac_bypass_alignment_enabled_flag equal to 0 specifies that the value of ivlCurrRange is not aligned before bypass decoding. According to the present disclosure, it is proposed to add a syntax element gci_no_cabac_bypass_alignment_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.
[0558]
[0559] Fig. 20A method for video coding and decoding according to an example of the present disclosure is shown. The method can be applied to a decoder, for example. In step 2002, the decoder can receive a sequence parameter set (SPS) alignment enable flag, which indicates whether to align the index ivlCurrRange before bypass decoding of the syntax elements sb_coded_flag, abs_remaimder, dec_abs_level, and coef_sign_flagn based on the value of the SPS alignment enable.
[0560] In step 2004, in response to determining that the value of the SPS alignment enable flag is equal to 1, the decoder can determine that ivlCurrRange is aligned before bypass decoding.
[0561] In step 2006, in response to determining that the value of the SPS alignment enable flag is equal to 0, the decoder can determine that ivlCurrRange is not aligned before bypass decoding.
[0562] In yet another example, extended_precision_processing_flag equal to 1 specifies that extended dynamic range can be used for transform coefficients and transform processing. extended_precision_processing_flag equal to 0 specifies that extended dynamic range is not used. According to the present disclosure, it is proposed to add a syntax element gci_no_extended_precision_processing_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.
[0563]
[0564] Fig.21 A method for video encoding and decoding according to an example of the present disclosure is shown. The method can be applied to a decoder, for example. In step 2102, the decoder can receive an extended precision processing flag, which indicates whether to use an extended dynamic range for transform coefficients and during transform processing based on the value of the extended precision processing flag.
[0565] In step 2104 , in response to determining that the value of the extended precision processing flag is equal to 1, the decoder may determine to employ an extended dynamic range for transform coefficients and during transform processing.
[0566] In step 2106 , in response to determining that the value of the extended precision processing flag is 0, the decoder may determine that extended dynamic range is not employed for transform coefficients or during transform processing.
[0567] In another example, persistent_rice_adaptation_enabled_flag equal to 1 specifies that the Rice parameter derivation for binarization of abs_remaining[] and dec_abs_level can be initialized at the beginning of each sub-block using the mode-related statistics accumulated from the previous sub-block. persistent_rice_adaptation_enabled_flag equal to 0 specifies that the previous sub-block state is not used in the Rice parameter derivation. According to the present disclosure, it is proposed to add a syntax element gci_no_persistent_rice_adaptation_constraint_flag in the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process for the VVC draft is shown below. Changes to the VVC draft are highlighted. The added parts are highlighted in italic font.
[0568]
[0569] Fig. 22 A method for video encoding and decoding according to an example of the present disclosure is shown. The method can be applied to a decoder, for example. In step 2202, the decoder can receive a persistent rice adaptation enable flag, which indicates whether the rice parameter derivation for binarization of abs_remaining and dec_abs_level is initialized at the beginning of each sub-block using mode-related statistics accumulated from previous sub-blocks based on the value of the persistent rice adaptation enable flag.
[0570] In step 2204, in response to determining that the value of the persistent rice adaptation enabled flag is equal to 1, the decoder may determine that rice parameter derivation for binarization is initialized at the beginning of each sub-block using mode-related statistics accumulated from previous sub-blocks.
[0571] In step 2206, in response to determining that the value of the persistent rice adaptation enabled flag is 0, the decoder may determine that the previous sub-block state is not employed in rice parameter derivation.
[0572] The above method can be implemented using an apparatus including one or more circuits, including an application specific integrated circuit (ASIC), a digital signal processor (DSP), a digital signal processing device (DSPD), a programmable logic device (PLD), a field programmable gate array (FPGA), a controller, a microcontroller, a microprocessor or other electronic components. The apparatus can use circuits combined with other hardware or software components to perform the above method. Each module, submodule, unit or subunit disclosed above can be implemented at least in part using one or more circuits.
[0573] Rice parameter decision
[0574] On the encoder side, TSRC encoding may require multiple encoding channels to derive the optimal Rice parameters. This multi-channel encoding may not be suitable for actual hardware encoder design. In order to solve this problem, a low-latency TSRC encoding method is also proposed. According to the thirtieth aspect of the present disclosure, it is proposed to derive Rice parameters based on certain encoded information of the current slice (for example, quantization parameters and / or codec bit depth associated with the slice / picture / sequence) and / or based on a hash ratio associated with the slice / picture / sequence level. Different methods can be used to derive Rice parameters, and some exemplary methods are listed below. It should be noted that the following methods can be applied independently or in combination.
[0575] 1. The Rice parameters mentioned in the above embodiments may additionally depend on the video resolution, including the temporal resolution (eg, frame rate) and spatial resolution (eg, image width and height) of the video.
[0576] 2. Rice parameters can vary at the sequence level, picture level, slice level, and / or any predefined area. In a specific example, different Rice values are used for pictures with different temporal layer IDs (this is related to nuh_temporal_id_plus1 specified in the VVC specification). Alternatively, the Rice parameters may include values determined based on the QP values used at the sequence level, picture level, slice level, and / or any predefined area. For example, rice parameter = Clip3 (1, 8, (TH-QP) / 6), where TH is a predefined threshold (e.g., 18, 19).
[0577] 3. Based on the change in the encoded information between the current slice and the previous slice, the Rice parameter can be set to a default value, such as 1. In a specific example, when the temporal layer ID of the picture changes compared to the previous picture, the default Rice value is used for the picture. Alternatively, when ΔQ is greater than TH, the default Rice value is used for the picture, where ΔQ is calculated as abs(QPcurrent-QPprevious) and TH is a predefined threshold. Rice parameter (such as 0, 5). For example, when the hash ratio form block intra-copy mode in the current slice is greater than TH, the Rice parameter = 1, where TH is a predefined threshold, for example, MAX(41*(number of CTUs), 4200).
[0578] 4. The Rice parameters for each stripe are based on the value of abs_remainder encoded in its previous stripe according to the encoding and decoding order. In a specific example, after a stripe is encoded, the number of binary bits used to binarize abs_remainder using different Rice parameters is calculated, and then the number is used to determine the Rice parameters for the next stripe. For example, the Rice parameter that reaches the minimum number of binary bits in the previous stripe will be selected for the current stripe. For another example, if the current stripe and its previous stripe use the same QP, the Rice parameter that reaches the minimum number of binary bits in the previous stripe is selected for the current stripe; otherwise, before comparing with other Rice parameters, the number of binary bits generated using the default Rice parameter (i.e., 1) in the previous stripe is scaled by TH, and the Rice parameter that results in the minimum number of binary bits is selected for the current stripe, where TH is a predefined threshold, for example, 0.9.
[0579] 5. The Rice parameter for each stripe is based on the value of abs_remainder encoded in its previous stripe according to the coding order, and the Rice parameter can be adjusted according to the change of the encoded information between the current stripe and the previous stripe. In a specific example, the Rice parameter that reaches the minimum number of binary bits in the previous stripe is selected for the current stripe. And the Rice value can be adjusted when ΔQ is greater than TH, where ΔQ is calculated as abs(QPcurrent-QPprevious) and TH is a predefined threshold. Rice parameter (e.g., 0, 5). The adjustment can be to add a predefined offset (e.g., +1, -1) or scale by a predefined value.
[0580] Fig.26A flow chart of a low-delay transform skip residual coding (TSRC) method according to an example of the present disclosure is shown. The method can be applied to an encoder, for example. In step 2602, the encoder can derive rice parameters based on encoded information of a current slice of the video. The encoded information can include one or more of the following parameters: a quantization parameter or a codec bit depth associated with a slice, picture, or sequence of the video; or a hash rate associated with a slice, picture, or sequence of the video.
[0581] Note that the above encoder method can be applied at the decoder side. In a specific example, the Rice parameters do not need to be signaled to the decoder, and the encoder / decoder use the same method to derive the Rice parameters.
[0582] Fig.18 A computing environment 1810 is shown coupled to a user interface 1860. The computing environment 1810 may be part of a data processing server. The computing environment 1810 includes a processor 1820, a memory 1840, and an I / O interface 1850.
[0583] The processor 1820 typically controls the overall operation of the computing environment 1810, for example, operations associated with display, data acquisition, data communication, and image processing. The processor 1820 may include one or more processors to execute instructions to perform all or some of the steps in the above method. In addition, the processor 1820 may include one or more modules that facilitate the interaction between the processor 1820 and other components. The processor may be a central processing unit (CPU), a microprocessor, a single-chip microcomputer, a GPU, etc.
[0584] The memory 1840 is configured to store various types of data to support the operation of the computing environment 1810. The memory 1840 may include predetermined software 1842. Examples of such data include instructions for any application or method operating on the computing environment 1810, video data sets, image data, etc. The memory 1840 may be implemented by using any type of volatile or non-volatile memory device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.
[0585] I / O interface 1850 provides an interface between processor 1820 and peripheral interface modules (e.g., keyboard, click wheel, buttons, etc.). Buttons may include, but are not limited to, a home button, a start scan button, and a stop scan button. I / O interface 1850 may be coupled to an encoder and a decoder.
[0586] In some embodiments, a non-transitory computer-readable storage medium is also provided, which includes multiple programs, for example, included in the memory 1840, and can be executed by the processor 1820 in the computing environment 1810 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.
[0587] The non-transitory computer-readable storage medium has stored therein a plurality of programs for execution by a computing device having one or more processors, wherein the plurality of programs, when executed by the one or more processors, causes the computing device to perform the above-mentioned motion prediction method.
[0588] In some embodiments, the computing environment 1810 may be implemented using one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), graphics processing units (GPUs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above methods.
[0589] Fig.23 is a block diagram illustrating an exemplary system 10 for encoding and decoding video blocks in parallel according to some embodiments of the present disclosure. Fig.23 As shown in , system 10 includes a source device 12 that generates and encodes video data to be later decoded by a destination device 14. Source device 12 and destination device 14 may include any of a wide variety of electronic devices, including desktop or laptop computers, tablet computers, smart phones, set-top boxes, digital televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some implementations, source device 12 and destination device 14 are equipped with wireless communication capabilities.
[0590] In some embodiments, the target device 14 may receive the encoded video data to be decoded via the link 16. The link 16 may include any type of communication medium or device capable of moving the encoded video data from the source device 12 to the target device 14. In one example, the link 16 may include a communication medium that enables the source device 12 to directly send the encoded video data to the target device 14 in real time. The encoded video data may be modulated according to a communication standard (e.g., a wireless communication protocol) and sent to the target device 14. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form a portion of a packet-based network (e.g., a local area network, a wide area network, or a global network such as the Internet). The communication medium may include a router, a switch, a base station, or any other device that may be beneficial to facilitate communication from the source device 12 to the target device 14.
[0591] In some other embodiments, the encoded video data may be sent from the output interface 22 to the storage device 32. The encoded video data in the storage device 32 may then be accessed by the target device 14 via the input interface 28. The storage device 32 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, a Blu-ray disc, a digital versatile disc (DVD), a compact disc read-only memory (CD-ROM), a flash memory, a volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data. In another example, the storage device 32 may correspond to a file server or another intermediate storage device that may hold the encoded video data generated by the source device 12. The target device 14 may access the stored video data from the storage device 32 via streaming or downloading. The file server may be any type of computer capable of storing encoded video data and sending the encoded video data to the target device 14. Exemplary file servers include a network server (e.g., for a website), a file transfer protocol (FTP) server, a network attached storage (NAS) device, or a local disk drive. Target device 14 may access the encoded video data through any standard data connection suitable for accessing encoded video data stored on a file server, including a wireless channel (e.g., a Wireless Fidelity (Wi-Fi) connection), a wired connection (e.g., a Digital Subscriber Line (DSL), a cable modem, etc.), or a combination of both wireless channels and wired connections. The transmission of the encoded video data from storage device 32 may be a streaming transmission, a download transmission, or a combination of both streaming and download transmissions.
[0592] like Fig.23As shown in , source device 12 includes video source 18, video encoder 20 and output interface 22. Video source 18 may include sources such as or a combination of such sources: a video capture device (e.g., a camera), a video archive containing previously captured video, a video feed interface for receiving video from a video content provider, and / or a computer graphics system for generating computer graphics data as source video. As an example, if video source 18 is a camera of a security monitoring system, source device 12 and target device 14 may form a camera phone or a video phone. However, the embodiments described in this application may be generally applicable to video encoding and decoding, and may be applied to wireless and / or wired applications.
[0593] The captured, pre-captured, or computer-generated video may be encoded by the video encoder 20. The encoded video data may be sent directly to the target device 14 via the output interface 22 of the source device 12. The encoded video data may also (or alternatively) be stored on a storage device 32 for later access by the target device 14 or other device for decoding and / or playback. The output interface 22 may further include a modem and / or a transmitter.
[0594] Target device 14 includes input interface 28, video decoder 30, and display device 34. Input interface 28 may include a receiver and / or a modem and receives encoded video data via link 16. The encoded video data transmitted via link 16 or provided on storage device 32 may include various syntax elements generated by video encoder 20 for use by video decoder 30 in decoding the video data. Such syntax elements may be included within the encoded video data sent over a communication medium, stored on a storage medium, or stored on a file server.
[0595] In some implementations, the target device 14 may include a display device 34, which may be an integrated display device and an external display device configured to communicate with the target device 14. The display device 34 displays the decoded video data to a user and may include any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.
[0596] The video encoder 20 and the video decoder 30 can operate according to a proprietary standard or an industry standard (e.g., VVC, HEVC, Part 10 of MPEG-4, AVC) or an extension of such a standard. It should be understood that the present application is not limited to a specific video encoding / decoding standard and can be applied to other video encoding / decoding standards. It is generally believed that the video encoder 20 of the source device 12 can be configured to encode the video data according to any of these current standards or future standards. Similarly, it is also generally believed that the video decoder 30 of the target device 14 can be configured to decode the video data according to any of these current standards or future standards.
[0597] The video encoder 20 and the video decoder 30 may be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic devices, software, hardware, firmware, or any combination thereof. When partially implemented in software, the electronic device may store instructions for the software in a suitable non-transitory computer-readable medium, and use one or more processors to execute the instructions in the hardware to perform the video encoding / decoding operations disclosed in the present disclosure. Each of the video encoder 20 and the video decoder 30 may be included in one or more encoders or decoders, and either of the encoders or decoders may be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device.
[0598] Fig.24 is a block diagram illustrating an exemplary video encoder 20 according to some embodiments described in the present application. The video encoder 20 can perform intra-frame prediction coding and inter-frame prediction coding on video blocks within a video frame. Intra-frame prediction coding relies on spatial prediction to reduce or remove spatial redundancy in video data within a given video frame or picture. Inter-frame prediction coding relies on temporal prediction to reduce or remove temporal redundancy in video data within adjacent video frames or pictures of a video sequence. It should be noted that in the field of video coding and decoding, the term "frame" can be used as a synonym for the term "image" or "picture".
[0599] like Fig.24As shown in FIG. 1 , the video encoder 20 includes a video data memory 40, a prediction processing unit 41, a decoded picture buffer (DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy coding unit 56. The prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a partition unit 45, an intra-frame prediction processing unit 46, and an intra-frame block copy (BC) unit 48. In some embodiments, the video encoder 20 also includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for video block reconstruction. A loop filter 63 such as a deblocking filter can be located between the adder 62 and the DPB 64 to filter the block boundary to remove the block effect from the reconstructed video. In addition to the deblocking filter, another loop filter (e.g., a sample adaptive offset (SAO) filter, and / or an adaptive loop filter (ALF)) can also be used to filter the output of the adder 62. In some examples, the loop filter can be omitted, and the decoded video block can be directly provided to the DPB 64 by the adder 62. Video encoder 20 may take the form of a fixed or programmable hardware unit, or may be distributed among one or more of the illustrated fixed or programmable hardware units.
[0600] Video data memory 40 may store video data to be encoded by components of video encoder 20. Fig.23 The video source 18 shown obtains video data in the video data memory 40. The DPB 64 is a buffer that stores reference video data (e.g., reference frames or pictures) for use by the video encoder 20 (e.g., in intra-frame or inter-frame prediction coding mode) when encoding the video data. The video data memory 40 and the DPB 64 can be formed by any of a variety of memory devices. In various examples, the video data memory 40 can be on-chip with other components of the video encoder 20, or off-chip relative to those components.
[0601] like Fig.24As shown in , after receiving the video data, the partition unit 45 within the prediction processing unit 41 partitions the video data into video blocks. This partitioning may also include partitioning the video frame into strips, tiles (e.g., a set of video blocks) or other larger coding units (CUs) according to a predefined splitting structure associated with the video data (e.g., a quadtree (QT) structure). A video frame is or can be viewed as a two-dimensional array or matrix of samples with sample values. The samples in the array may also be referred to as pixels or picture elements (pel). The number of samples in the horizontal and vertical directions (or axes) of the array or picture defines the size and / or resolution of the video frame. For example, a video frame may be divided into multiple video blocks using QT partitioning. A video block is again or may be viewed as a two-dimensional array or matrix of samples with sample values, but its dimension is smaller than the dimension of the video frame. The number of samples in the horizontal and vertical directions (or axes) of the video block defines the size of the video block. The video block may be further partitioned into one or more block partitions or sub-blocks (which may again form blocks) by, for example, iteratively using QT partitioning, binary tree (BT) partitioning or ternary tree (TT) partitioning or any combination thereof. It should be noted that the term "block" or "video block" used herein may be a portion of a frame or picture, in particular a rectangular (square or non-square) portion. With reference to, for example, HEVC and VVC, a block or video block may be or correspond to a coding tree unit (CTU), a CU, a prediction unit (PU) or a transform unit (TU) and / or may be or correspond to a corresponding block (e.g., a coding tree block (CTB), a coding block (CB), a prediction block (PB) or a transform block (TB)) and / or a sub-block.
[0602] The prediction processing unit 41 may select one of a plurality of feasible prediction coding modes for the current video block based on the error results (e.g., coding rate and distortion level), such as one of one or more inter-frame prediction coding modes in a plurality of intra-frame prediction coding modes. The prediction processing unit 41 may provide the resulting intra-frame prediction coding block or inter-frame prediction coding block to the adder 50 to generate a residual block, and to the adder 62 to reconstruct the coding block for subsequent use as part of a reference frame. The prediction processing unit 41 also provides syntax elements (e.g., motion vectors, intra-frame mode indicators, partition information, and other such syntax information) to the entropy coding unit 56.
[0603] To select an appropriate intra-prediction coding mode for the current video block, intra-prediction processing unit 46 within prediction processing unit 41 may perform intra-prediction coding of the current video block in relation to one or more neighboring blocks in the same frame as the current block to be encoded to provide spatial prediction. Motion estimation unit 42 and motion compensation unit 44 within prediction processing unit 41 may perform inter-prediction coding of the current video block in relation to one or more prediction blocks in one or more reference frames to provide temporal prediction. Video encoder 20 may perform multiple encoding passes, for example, to select an appropriate coding mode for each block of video data.
[0604] In some embodiments, motion estimation unit 42 determines an inter-prediction mode for a current video frame by generating a motion vector according to a predetermined pattern within a sequence of video frames, the motion vector indicating the displacement of a video block within the current video frame relative to a prediction block within a reference video frame. Motion estimation performed by motion estimation unit 42 is the process of generating a motion vector that estimates the motion of a video block. For example, a motion vector may indicate the displacement of a video block within a current video frame or picture relative to a prediction block within a reference frame associated with a current block being encoded within the current frame. The predetermined pattern may designate a video frame in a sequence as a P frame or a B frame. Intra BC unit 48 may determine a vector (e.g., a block vector) for intra BC coding in a manner similar to the motion vector determined by motion estimation unit 42 for inter prediction, or may utilize motion estimation unit 42 to determine a block vector.
[0605] In terms of pixel differences, the prediction block for the video block may be or may correspond to a block or reference block of a reference frame that is considered to closely match the video block to be encoded, and the pixel difference may be determined by the sum of absolute differences (SAD), the sum of squared differences (SSD), or other difference metrics. In some embodiments, the video encoder 20 may calculate values for sub-integer pixel positions of the reference frames stored in the DPB 64. For example, the video encoder 20 may interpolate values for quarter-pixel positions, eighth-pixel positions, or other fractional pixel positions of the reference frame. Thus, the motion estimation unit 42 may perform a motion search relative to full pixel positions and fractional pixel positions and output a motion vector with fractional pixel accuracy.
[0606] Motion estimation unit 42 calculates a motion vector for a video block in an inter-prediction coded frame by comparing the position of the video block to the position of a prediction block of a reference frame selected from a first reference frame list (list 0) or a second reference frame list (list 1), each of which identifies one or more reference frames stored in DPB 64. Motion estimation unit 42 sends the calculated motion vector to motion compensation unit 44 and then to entropy encoding unit 56.
[0607] The motion compensation performed by the motion compensation unit 44 may involve obtaining or generating a prediction block based on the motion vector determined by the motion estimation unit 42. After receiving the motion vector for the current video block, the motion compensation unit 44 may locate the prediction block pointed to by the motion vector in one of the reference frame lists, retrieve the prediction block from the DPB 64, and forward the prediction block to the adder 50. The adder 50 then forms a residual video block of pixel difference values by subtracting the pixel values of the prediction block provided by the motion compensation unit 44 from the pixel values of the current video block being encoded. The pixel difference values forming the residual video block may include a luminance difference component or a chrominance difference component or both. The motion compensation unit 44 may also generate syntax elements associated with the video block of the video frame for use by the video decoder 30 when decoding the video block of the video frame. The syntax elements may include, for example, syntax elements defining a motion vector for identifying a prediction block, any flag indicating a prediction mode, or any other syntax information described herein. It should be noted that the motion estimation unit 42 and the motion compensation unit 44 may be highly integrated, but are described separately for conceptual purposes.
[0608] In some embodiments, the intra BC unit 48 may generate vectors and obtain prediction blocks in a manner similar to that described above in conjunction with the motion estimation unit 42 and the motion compensation unit 44, but these prediction blocks are in the same frame as the current block being encoded, and these vectors are referred to as block vectors rather than motion vectors. Specifically, the intra BC unit 48 may determine the intra prediction mode to be used to encode the current block. In some examples, the intra BC unit 48 may encode the current block using various intra prediction modes, for example, during separate encoding passes, and test their performance through rate-distortion analysis. Next, the intra BC unit 48 may select a suitable intra prediction mode to use among the various tested intra prediction modes and generate an intra mode indicator accordingly. For example, the intra BC unit 48 may calculate rate-distortion values for the various tested intra prediction modes using rate-distortion analysis, and select an intra prediction mode with the best rate-distortion characteristic among the tested modes as a suitable intra prediction mode to use. The rate-distortion analysis generally determines the amount of distortion (or error) between a coded block and the original uncoded block that was encoded to produce the coded block, as well as the bit rate (i.e., the number of bits) used to produce the coded block. Intra BC unit 48 may calculate ratios based on the distortion and rate for the various coded blocks to determine which intra-prediction mode exhibits the best rate-distortion value for the block.
[0609] In other examples, intra BC unit 48 may use, in whole or in part, motion estimation unit 42 and motion compensation unit 44 to perform such functions for intra BC prediction in accordance with embodiments described herein. In either case, for intra block copying, the prediction block may be a block that is considered to closely match the block to be encoded in terms of pixel differences, which may be determined by SAD, SSD, or other difference metrics, and identifying the prediction block may include calculating values for sub-integer pixel positions.
[0610] Regardless of whether the prediction block is from the same frame according to intra-frame prediction or from a different frame according to inter-frame prediction, the video encoder 20 can form a residual video block by subtracting the pixel values of the prediction block from the pixel values of the current video block being encoded. The pixel difference values forming the residual video block may include both luma component differences and chroma component differences.
[0611] As an alternative to the inter-frame prediction performed by the motion estimation unit 42 and the motion compensation unit 44 or the intra-frame block copy prediction performed by the intra BC unit 48 as described above, the intra-frame prediction processing unit 46 can perform intra-frame prediction on the current video block. Specifically, the intra-frame prediction processing unit 46 can determine the intra-frame prediction mode for encoding the current block. To this end, the intra-frame prediction processing unit 46 can use various intra-frame prediction modes to encode the current block, for example, during separate encoding passes, and the intra-frame prediction processing unit 46 (or in some examples, the mode selection unit) can select a suitable intra-frame prediction mode from the tested intra-frame prediction modes to use. The intra-frame prediction processing unit 46 can provide information indicating the intra-frame prediction mode selected for the block to the entropy coding unit 56. The entropy coding unit 56 can encode the information indicating the selected intra-frame prediction mode into the bitstream.
[0612] After prediction processing unit 41 determines a prediction block for the current video block via inter-prediction or intra-prediction, adder 50 forms a residual video block by subtracting the prediction block from the current video block. The residual video data in the residual block may be included in one or more TUs and provided to transform processing unit 52. Transform processing unit 52 transforms the residual video data into residual transform coefficients using a transform (e.g., a discrete cosine transform (DCT) or a conceptually similar transform).
[0613] The transform processing unit 52 may send the resulting transform coefficients to a quantization unit 54. The quantization unit 54 quantizes the transform coefficients to further reduce the bit rate. The quantization process may also reduce the bit depth associated with some or all of the coefficients. The degree of quantization may be modified by adjusting a quantization parameter. In some examples, the quantization unit 54 may then perform a scan on the matrix including the quantized transform coefficients. Alternatively, the entropy coding unit 56 may perform the scan.
[0614] After quantization, entropy coding unit 56 entropy encodes the quantized transform coefficients into a video bitstream using, for example, context adaptive variable length coding (CAVLC), context adaptive binary arithmetic coding (CABAC), syntax-based context adaptive binary arithmetic coding (SBAC), probability interval partitioned entropy (PIPE) coding, or another entropy coding method or technique. The encoded bitstream may then be sent to a video bitstream such as a Fig.23 The video decoder 30 shown, or archived as Fig.23 The video frame may be stored in storage device 32 as shown for later transmission to or retrieval by video decoder 30. Entropy encoding unit 56 may also entropy encode motion vectors and other syntax elements for the current video frame being encoded.
[0615] Inverse quantization unit 58 and inverse transform processing unit 60 apply inverse quantization and inverse transform, respectively, to reconstruct the residual video block in the pixel domain for use in generating reference blocks for predicting other video blocks. As noted above, motion compensation unit 44 may generate a motion compensated prediction block from one or more reference blocks of a frame stored in DPB 64. Motion compensation unit 44 may also apply one or more interpolation filters to the prediction block to calculate sub-integer pixel values for use in motion estimation.
[0616] Adder 62 adds the reconstructed residual block to the motion compensated prediction block generated by motion compensation unit 44 to generate a reference block for storage in DPB 64. The reference block may then be used as a prediction block by intra BC unit 48, motion estimation unit 42, and motion compensation unit 44 to inter-predict another video block in a subsequent video frame.
[0617] Fig.25 1 is a block diagram showing an exemplary video decoder 30 according to some embodiments of the present application. The video decoder 30 includes a video data memory 79, an entropy decoding unit 80, a prediction processing unit 81, an inverse quantization unit 86, an inverse transform processing unit 88, an adder 90, and a DPB 92. The prediction processing unit 81 further includes a motion compensation unit 82, an intra-frame prediction unit 84, and an intra-frame BC unit 85. The video decoder 30 may perform the above-mentioned Fig.24 The encoding process is substantially the inverse of the decoding process described with respect to video encoder 20. For example, motion compensation unit 82 may generate prediction data based on motion vectors received from entropy decoding unit 80, and intra-prediction unit 84 may generate prediction data based on intra-prediction mode indicators received from entropy decoding unit 80.
[0618] In some examples, units of the video decoder 30 may be tasked to perform embodiments of the present application. In addition, in some examples, embodiments of the present disclosure may be dispersed in one or more of the units of the video decoder 30. For example, the intra BC unit 85 may perform embodiments of the present application alone or in combination with other units of the video decoder 30 (e.g., the motion compensation unit 82, the intra prediction unit 84, and the entropy decoding unit 80). In some examples, the video decoder 30 may not include the intra BC unit 85, and the functions of the intra BC unit 85 may be performed by other components of the prediction processing unit 81 (e.g., the motion compensation unit 82).
[0619] The video data memory 79 may store video data, such as an encoded video bitstream, to be decoded by other components of the video decoder 30. The video data stored in the video data memory 79 may be obtained, for example, from the storage device 32, from a local video source (e.g., a camera), via a wired or wireless network communication of video data, or by accessing a physical data storage medium (e.g., a flash drive or hard disk). The video data memory 79 may include a coded picture buffer (CPB) that stores encoded video data from an encoded video bitstream. The DPB 92 of the video decoder 30 stores reference video data for use by the video decoder 30 when decoding the video data (e.g., in an intra-frame or inter-frame prediction coding mode). The video data memory 79 and the DPB 92 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. For illustrative purposes, the video data memory 79 and the DPB 92 are shown in FIG. Fig.25 9 as two different components of the video decoder 30. However, it will be apparent to those skilled in the art that the video data memory 79 and the DPB 92 can be provided by the same memory device or separate memory devices. In some examples, the video data memory 79 can be on-chip with other components of the video decoder 30, or off-chip relative to those components.
[0620] During the decoding process, the video decoder 30 receives an encoded video bitstream representing video blocks of an encoded video frame and associated syntax elements. The video decoder 30 may receive syntax elements at the video frame level and / or the video block level. The entropy decoding unit 80 of the video decoder 30 entropy decodes the bitstream to generate quantization coefficients, motion vectors or intra-frame prediction mode indicators, and other syntax elements. The entropy decoding unit 80 then forwards the motion vectors or intra-frame prediction mode indicators, and other syntax elements to the prediction processing unit 81.
[0621] When a video frame is encoded as an intra-prediction coded (I) frame or for intra-coded prediction blocks in other types of frames, the intra-prediction unit 84 of the prediction processing unit 81 can generate prediction data for a video block of the current video frame based on the intra-prediction mode transmitted by the signal and reference data from a previously decoded block of the current frame.
[0622] When the video frame is encoded as an inter-frame prediction coding (i.e., B or P) frame, the motion compensation unit 82 of the prediction processing unit 81 generates one or more prediction blocks for the video block of the current video frame based on the motion vector and other syntax elements received from the entropy decoding unit 80. Each of the prediction blocks can be generated from a reference frame in one of the reference frame lists. The video decoder 30 can construct the reference frame lists, i.e., List 0 and List 1, based on the reference frames stored in the DPB 92 using a default construction technique.
[0623] In some examples, when a video block is encoded according to the intra BC mode described herein, intra BC unit 85 of prediction processing unit 81 generates a prediction block for the current video block based on the block vector and other syntax elements received from entropy decoding unit 80. The prediction block may be within a reconstructed region of the same picture as the current video block as defined by video encoder 20.
[0624] The motion compensation unit 82 and / or the intra BC unit 85 determine prediction information for a video block of the current video frame by parsing the motion vector and other syntax elements, and then use the prediction information to generate a prediction block for the current video block being decoded. For example, the motion compensation unit 82 uses some of the received syntax elements to determine a prediction mode (e.g., intra prediction or inter prediction) for encoding a video block of a video frame, an inter prediction frame type (e.g., B or P), construction information for one or more of the reference frame lists for the frame, motion vectors for each inter prediction encoded video block of the frame, inter prediction states for each inter prediction encoded video block of the frame, and other information for decoding a video block in the current video frame.
[0625] Similarly, the intra BC unit 85 may use some of the received syntax elements, such as flags, to determine whether the current video block is predicted using intra BC mode, construction information of which video blocks of the frame are within the reconstruction region and should be stored in the DPB 92, block vectors for each intra BC predicted video block of the frame, intra BC prediction status for each intra BC predicted video block of the frame, and other information for decoding the video block in the current video frame.
[0626] Motion compensation unit 82 may also perform interpolation using interpolation filters as used by video encoder 20 during encoding of the video blocks to calculate interpolated values for sub-integer pixels of reference blocks. In this case, motion compensation unit 82 may determine the interpolation filters used by video encoder 20 based on the received syntax elements and use these interpolation filters to produce the prediction blocks.
[0627] Inverse quantization unit 86 inverse quantizes the quantized transform coefficients provided in the bitstream and entropy decoded by entropy decoding unit 80, using the same quantization parameters calculated by video encoder 20 for each video block in the video frame to determine the degree of quantization. Inverse transform processing unit 88 applies an inverse transform (e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients to reconstruct the residual block in the pixel domain.
[0628] After the motion compensation unit 82 or the intra BC unit 85 generates a prediction block for the current video block based on the vector and other syntax elements, the adder 90 reconstructs the decoded video block for the current video block by adding the residual block from the inverse transform processing unit 88 to the corresponding prediction block generated by the motion compensation unit 82 and the intra BC unit 85. A loop filter 91 (e.g., a deblocking filter, an SAO filter, and / or an ALF) may be located between the adder 90 and the DPB 92 to further process the decoded video block. In some examples, the loop filter 91 may be omitted, and the decoded video block may be provided directly to the DPB 92 by the adder 90. The decoded video blocks in a given frame are then stored in the DPB 92, which stores reference frames for subsequent motion compensation of the next video block. The DPB 92 or a memory device separate from the DPB 92 may also store the decoded video for later presentation on a display device (e.g., Fig.23 on a display device 34).
[0629] The description of the present disclosure is presented for purposes of illustration and is not intended to be exhaustive or to limit the present disclosure. Many modifications, variations, and alternative implementations will be apparent to those of ordinary skill in the art having the benefit of the teachings presented in the foregoing description and the associated drawings.
[0630] These examples are selected and described in order to explain the principles of the present disclosure and enable others skilled in the art to understand the various implementations of the present disclosure and to best utilize the basic principles and various implementations with various modifications suitable for the specific use contemplated. Therefore, it should be understood that the scope of the present disclosure is not limited to the specific examples of the disclosed implementations, and modifications and other implementations are intended to be included within the scope of the present disclosure.
Claims
1. A method for video encoding, comprising: When transform skip is disabled, the encoder does not signal a control flag for indicating the presence of a syntax element for determining rice parameters for transform skip residual coding.
2. The method for video encoding according to claim 1, wherein: The control flag is sps_ts_residual_coding_rice_present_in_sh_flag, and the method further comprises: The existence of sps_ts_residual_coding_rice_present_in_sh_flag is constrained by using the transform skip flag sps_transform_skip_enabled_flag, wherein the flag sps_transform_skip_enabled_flag is used to indicate whether the transform skip is disabled.
3. The method for video encoding according to claim 2, further comprising: In case the flag sps_transform_skip_enabled_flag is set to 0 to indicate that transform skipping is disabled, sps_ts_residual_coding_rice_present_in_sh_flag is not signaled.
4. The method for video encoding according to claim 2, further comprising: In case the flag sps_transform_skip_enabled_flag is set to 1 to indicate that transform skipping is not disabled, sps_ts_residual_coding_rice_present_in_sh_flag is signaled.
5. The method for video encoding according to claim 1, further comprising: In case the transform skip flag sps_transform_skip_enabled_flag is signaled as enabled, the control flag is signaled in a sequence parameter set or in a sequence parameter set scope extension syntax.
6. The method for video encoding according to claim 5, further comprising: In case the control flag is set to 1, the syntax element is signaled, wherein the syntax element is for a slice.
7. The method for video encoding according to claim 5, further comprising: In case the control flag is set to 0, the syntax element is not signaled.
8. The method for video encoding according to claim 2, wherein: The syntax element is an index sh_ts_residual_coding_rice_idx_minus1, and the method further comprises: In case sps_ts_residual_coding_rice_present_in_sh_flag is set to 1, the index sh_ts_residual_coding_rice_idx_minus1 is signaled in the slice header (SH) syntax structure referencing the sequence parameter set (SPS).
9. The method for video encoding according to claim 2, wherein: The syntax element is an index sh_ts_residual_coding_rice_idx_minus1, and the method further comprises: In case sps_ts_residual_coding_rice_present_in_sh_flag is set to 0, the index sh_ts_residual_coding_rice_idx_minus1 is not signaled in the slice header (SH) syntax structure referencing the sequence parameter set (SPS).
10. An apparatus for video encoding, comprising: one or more processors; as well as A memory configured to store instructions executable by the one or more processors; wherein the one or more processors are configured to perform the method according to any one of claims 1-9 when executing the instructions.
11. A non-transitory computer-readable storage medium storing computer-executable instructions and storing a bit stream generated by the encoding method according to any one of claims 1 to 9, wherein when the computer-executable instructions are executed by one or more computer processors, the one or more computer processors execute the encoding method according to any one of claims 1 to 9.
12. A computer program product comprising a plurality of programs for execution by a computing device having one or more processors, wherein: The plurality of programs, when executed by the one or more processors, cause the computing device to perform the method according to any one of claims 1-9.
13. A method for storing a bit stream, wherein: The bit stream is generated by the encoding method according to any one of claims 1-9.