A light-emitting module

Abstract

The present invention discloses a light-emitting module comprising: a substrate, a chip array disposed on the substrate, a dam surrounding the chip array, a light conversion layer disposed above the chip array, and an encapsulation layer surrounding the dam. The chip array is provided with a plurality of P electrodes and a plurality of N electrodes, with support glue filling the spaces between the P electrodes and the N electrodes. By combining double-layer encapsulation with the chip array, the optical structure of the vehicle light is simplified. The support glue filling between the P electrodes and the N electrodes of the chip array improves the light emission contrast of the chip array, thereby enhancing the light output efficiency of the light-emitting module.

Description

Technical Field

[0001] The present invention mainly relates to the field of display technology, and in particular to a light-emitting module. Background Art

[0002] Digital car lights are one of the main technologies in the current automotive industry. They are based on digital car lights to achieve high-brightness display effects and patterned lighting effects. Currently, the display effects of digital cars are mainly realized through digital light processing (DLP) technology of digital micromirror devices (DMD).

[0003] Since DLP technology uses a million-level pixel display, in order to achieve fine lighting zoning and ultra-high-definition imaging projection effects, multiple light-emitting chips need to be integrated into the headlights, resulting in a complex optical structure design of the headlights. In addition, cross-lighting problems are prone to occur between multiple light-emitting chips, affecting the light output and lighting effect of digital headlights. Summary of the Invention

[0004] The purpose of the present invention is to overcome the shortcomings of the prior art. The present invention provides a light-emitting module, which is based on double-layer packaging and chip array cooperation to simplify the optical structure of the car light. Support glue is filled between several P electrodes and several N electrodes of the chip array to improve the light output contrast of the chip array, thereby improving the light output efficiency of the light-emitting module.

[0005] The present invention provides a light-emitting module, comprising: a substrate, a chip array disposed on the substrate, a dam surrounding the chip array, a light conversion layer disposed above the chip array, and an encapsulation layer surrounding the dam;

[0006] The chip array is provided with a plurality of P electrodes and a plurality of N electrodes, and support glue is filled between the plurality of P electrodes and the plurality of N electrodes.

[0007] Furthermore, the dam is a transparent adhesive layer, the encapsulation layer is a black adhesive layer, or the encapsulation layer is a white adhesive layer.

[0008] Furthermore, the height of the dam is h1, the height of the light conversion layer is h2, and the constraint relationship between h1 and h2 is: h1≥h2.

[0009] Furthermore, the substrate is a silicon-based circuit board, a driving circuit is provided on the silicon-based circuit board, and the plurality of light-emitting chips of the chip array are electrically connected to the driving circuit.

[0010] Furthermore, the light-emitting module further includes a transition carrier, the substrate is disposed on the transition carrier, and the substrate is electrically connected to an external circuit board based on the transition carrier.

[0011] Furthermore, the thermal expansion coefficient of the transition carrier is between the thermal expansion coefficient of the base plate and the thermal expansion coefficient of the external circuit board.

[0012] Furthermore, the transition carrier is provided with metal electrodes, the substrate is provided with connecting electrodes, and the metal electrodes of the transition carrier are electrically connected to the connecting electrodes on the substrate based on bonding wires.

[0013] Furthermore, the metal electrodes, the connecting electrodes and the bonding wires are contained within the packaging layer.

[0014] Furthermore, the chip array includes a chip main body structure, and the chip main body structure includes: a buffer layer, an N-type semiconductor layer, a quantum well layer, a P-type semiconductor layer and an electrode transition layer stacked in sequence;

[0015] The plurality of P electrodes and the plurality of N electrodes are formed in the chip main body structure.

[0016] Furthermore, the chip main body structure is provided with a plurality of wire grooves, and the chip main body structure forms a plurality of bosses arranged in an array based on the wire grooves;

[0017] The array structure of the plurality of bosses includes a plurality of N-pole bosses and a plurality of P-pole bosses, a P electrode is formed on the P-pole boss, and the plurality of P electrodes form a P-electrode array, an N electrode is formed on the N-pole boss, and the plurality of N electrodes are arranged on the outer edge of the P-electrode array.

[0018] Furthermore, a transition column is provided between the P electrode array and the plurality of N electrodes, and a plurality of transition electrodes are provided on the transition column.

[0019] Furthermore, the P electrode, N electrode and transition electrode have the same height.

[0020] Furthermore, the N electrode includes a first electrode layer provided on the N-pole boss and an N-pole welding point provided on the first electrode layer, and one side of the first electrode layer extends along the side wall of the N-pole boss toward the bottom of the wire slot;

[0021] The P-electrode includes a second electrode layer provided on the P-pole boss and a P-pole welding point provided on the second electrode layer.

[0022] Furthermore, the groove depth of any of the wire grooves extends to the N-type semiconductor layer.

[0023] The first electrode layer of the N-electrode extends to the N-type semiconductor layer, and any one of the P-electrodes is connected to the first electrode layer of the N-electrode based on the N-type semiconductor layer to form a light-emitting chip structure.

[0024] Furthermore, a transition column is provided between the P-electrode array and the plurality of N-electrodes, and a plurality of transition electrodes are provided on the transition column. The transition column is used to separate the P-electrode array and the plurality of N-electrodes.

[0025] Furthermore, the chip array further includes a current guiding layer, and the current guiding layer is arranged in at least one of the plurality of wire slots.

[0026] The present invention provides a light-emitting module that utilizes a dam formed by a transparent adhesive layer and an encapsulation layer to achieve double-layer encapsulation of a chip array and a light conversion layer, thereby improving the light output efficiency of the chip array. The combination of double-layer encapsulation and the chip array structure simplifies the structural design of the vehicle lamp. By filling support adhesive between the P electrodes and N electrodes of the chip array, the light output contrast of the chip array is increased, thereby improving the light output efficiency of the light-emitting module. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1 1 is a schematic structural diagram of a light-emitting module according to an embodiment of the present invention;

[0029] Figure 2 is a cross-sectional view of a chip array structure according to an embodiment of the present invention;

[0030] Figure 3 is a schematic diagram of a current guiding layer structure according to an embodiment of the present invention;

[0031] Figure 4 is a schematic diagram of another structural state of the current guiding layer in an embodiment of the present invention;

[0032] Figure 5 This is a schematic diagram of the connection structure between the chip array and the substrate in an embodiment of the present invention;

[0033] Figure 6 2. It is a top view of the structure of the chip array in an embodiment of the present invention;

[0034] Figure 7is another top view of the chip array structure in an embodiment of the present invention;

[0035] Figure 8 This is another top view of the structure of the central chip array in an embodiment of the present invention. DETAILED DESCRIPTION

[0036] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0037] Figure 1 A schematic diagram of the structure of a light-emitting module in an embodiment of the present invention is shown. The light-emitting module includes: a substrate 2, a chip array 3 disposed on the substrate 2, a dam 4 surrounding the chip array 3, a light conversion layer 5 disposed above the chip array 3, and an encapsulation layer 6 surrounding the dam 4. The light conversion layer 5 is used to convert the light emitted by the chip array 3 into a light color in another emission band. The chip array 3 integrates multiple light-emitting chips, combined with the double-layer encapsulation structure, to ensure the structural stability and reliability of the light-emitting module, thereby simplifying the structural design of the light-emitting module.

[0038] Specifically, the dam 4 is a transparent adhesive layer. In the embodiment of the present invention, the dam 4 is formed based on the transparent adhesive layer to avoid the situation where the dam 4 absorbs heat and causes excessive heat accumulation on the light-emitting surface of the light-emitting module when the dam 4 is a black adhesive layer. At the same time, it is avoided that when the dam 4 is a white adhesive layer, the dam 4 reflects the light emitted by the chip array 3 and causes stray light. That is, the dam 4 formed based on the transparent adhesive layer can complete the covering support of the light conversion layer 5, reduce the influence of the dam 4 on the light emitted by the chip array 3, and ensure that the chip array 3 has good light output efficiency.

[0039] Furthermore, the encapsulation layer 6 may be a black adhesive layer, and the black adhesive layer may be an adhesive layer doped with carbon powder. The black adhesive layer can protect the reliability of the light-emitting module and improve the contrast of the light emitted by the light-emitting module.

[0040] The encapsulation layer 6 may be a white adhesive layer, which can improve the reflection effect of the light emitted by the light-emitting module and improve the light emission efficiency of the light-emitting module.

[0041] The chip array 3 is provided with a plurality of P electrodes 32 and a plurality of N electrodes 31, and a supporting glue 8 is filled between the plurality of P electrodes 32 and the plurality of N electrodes 31. The supporting glue 8 can be a black primer. Based on the black primer, the cross-light phenomenon between the light-emitting chips in the chip array 3 is avoided, thereby improving the light output efficiency of the chip array 3.

[0042] Furthermore, the plurality of P electrodes 32 form a P electrode array, the plurality of N electrodes 31 are arranged outside the P electrode array, and a common N pole connection structure is set between the P electrode array and the plurality of N electrodes 31, thereby simplifying the electrical connection structure of the light-emitting module.

[0043] Specifically, the dam 4 may be made of silicone, that is, the dam 4 is a transparent silicone layer, which covers and protects the chip array 3 and the light conversion layer 5 to prevent the chip array 3 and the light conversion layer 5 from being damaged.

[0044] Furthermore, the dam layer 4 is arranged above and outside the chip array 3 , and the P-electrode array is located within the enclosed area of ​​the dam layer 4 , so as to prevent the dam layer 4 from affecting the light output efficiency of the chip array 3 .

[0045] Furthermore, the material of the dam 4 can also be resin, which has good plastic sealing and curing properties.

[0046] Specifically, the height of the dam 4 is h1, the height of the light conversion layer 5 is h2, and the constraint relationship between h1 and h2 is: h1≥h2, so that the dam 4 can completely cover the LED chip array 3 and the side wall of the light conversion layer 5, avoiding direct contact between the light conversion layer 5 and the LED chip array 3 and the packaging layer 6, and avoiding the black packaging layer 6 absorbing heat, causing heat damage to the light conversion layer 5.

[0047] Furthermore, the height of the dam 4 can be higher than the light conversion layer 5, and the dam 4 can cover the edge area of ​​the top surface of the light conversion layer 5, so that the dam 4 can protect the light conversion layer 5, reduce the risk of damage to the light conversion layer 5, and improve the light output efficiency of the chip array 3.

[0048] Furthermore, the light conversion layer 5 includes at least one of phosphors, quantum dots, and organic dyes.

[0049] Specifically, in this embodiment, phosphor is provided in the light conversion layer 5, and the light color of the light emitted by the chip array 3 is converted based on the phosphor. The phosphor is a YAG series yellow phosphor or a nitride yellow phosphor. In this embodiment, the phosphor is Y3Al5O 12 :Ce3+ , used to convert the blue light of the chip array 3 into white light.

[0050] Specifically, the substrate 2 is a silicon-based circuit board, on which a driving circuit is provided. Several light-emitting chips of the chip array 3 are electrically connected to the driving circuit. Based on the driving circuit, any light-emitting chip in the chip array 3 can be independently driven to realize lighting control of the chip array 3.

[0051] Specifically, the light-emitting module also includes a transition carrier 1, the substrate 2 is arranged on the transition carrier 1, and the substrate 2 is electrically connected to the external circuit board based on the transition carrier 1, that is, the transition carrier 1 is used to connect the substrate 2 and the external circuit board. The material of the transition carrier 1 can be ceramic, and the thermal expansion coefficient of the transition carrier 1 is between the thermal expansion coefficient of the substrate 2 and the thermal expansion coefficient of the external circuit board. The transition carrier 1 is arranged between the substrate 2 and the external circuit board, so that the thermal expansion coefficients between the external circuit board, the transition carrier 1 and the substrate 2 are matched, avoiding direct contact between the substrate 2 and the external circuit board, thereby avoiding cracking caused by thermal expansion between the substrate 2 and the external circuit board, and improving the structural stability of the light-emitting module.

[0052] Furthermore, in this embodiment, the material of the transition carrier 1 is AlN (aluminum nitride) ceramic material, which has good thermal conductivity and electrical insulation, can meet the installation requirements of the light-emitting module, and improve the heat dissipation efficiency of the light-emitting module.

[0053] Specifically, a metal electrode 11 is provided on the transition carrier 1, and a connecting electrode 21 is provided on the substrate 2. The metal electrode 11 of the transition carrier 1 and the connecting electrode 21 on the substrate 2 are electrically connected based on a welding wire, that is, the substrate 2 and the transition carrier 1 are connected based on a welding wire. A pin pad is provided at the bottom of the transition carrier 1, and the pin pad is arranged corresponding to the metal electrode 11. The transition carrier 1 can be electrically connected to an external circuit board based on the pin pad.

[0054] Furthermore, based on the transition carrier 1, the wire bonding connection mode of the substrate 2 is converted into a solder point connection mode of the pin pad, thereby improving the convenience of the integrated packaging of the light-emitting module and the external circuit board.

[0055] Furthermore, the metal electrode 11, the connecting electrode 21 and the welding wire are contained in the packaging layer 6, and the packaging layer 6 can shield and protect the metal electrode 11, the connecting electrode 21 and the welding wire, thereby ensuring the reliability of the electrical connection structure between the substrate 2 and the transition carrier 1.

[0056] Specifically, Figure 2 shows a cross-sectional view of the chip array structure in an embodiment of the present invention, Figure 3 A schematic diagram of a current guiding layer structure according to an embodiment of the present invention is shown; Figure 4 A schematic diagram of another structural state of the current guiding layer in an embodiment of the present invention is shown; the chip array 3 includes a chip main body structure 33, in which the plurality of P electrodes 32 and the plurality of N electrodes 31 are formed, and the chip main body structure 33 includes: a buffer layer 331, an N-type semiconductor layer 332, a quantum well layer 333, a P-type semiconductor layer 334 and an electrode transition layer 335 which are stacked in sequence.

[0057] Furthermore, the electrode transition layer 335 can be a single-layer structure or a multi-layer structure, and the multi-layer structure includes one or more layers of indium tin oxide (ITO) or other conductive oxides, or metal silver layers to meet the light output requirements of the light-emitting module.

[0058] Specifically, a plurality of wire grooves are opened on the chip main body structure 33, and the chip main body structure 33 forms a plurality of bosses arranged in an array based on the wire grooves. The array structure of the plurality of bosses includes a plurality of N-pole bosses and a plurality of P-pole bosses. P electrodes 32 are formed on the P-pole bosses, and the plurality of P electrodes 32 form a P-electrode array. N electrodes 31 are formed on the N-pole bosses, and the plurality of N electrodes 31 are arranged on the outer edge of the P-electrode array.

[0059] Furthermore, the several P electrodes 32 in the P electrode array are distributed independently of each other, and the several N electrodes 31 are connected in series. Any of the P electrodes 32 is connected to the N electrode 31 to form a light-emitting chip, that is, several light-emitting chips with a common N-pole design are formed in the chip array 3. Based on the common N-pole structure design, the electrical connection structure of the chip array 3 can be simplified, and the convenience of the electrical connection of the chip array 3 can be improved.

[0060] Specifically, the chip array further includes a current guiding layer 35 , and the current guiding layer 35 is disposed in at least one of the plurality of wire slots.

[0061] Specifically, the plurality of N electrodes 31 are arranged on the side of at least one side of the P electrode array, that is, the plurality of N electrodes 31 can be arranged on one or more of the upper side, lower side, left side and right side of the P electrode array. Based on the current guiding layer 35, the convenience of electrical connection between the P electrode 32 and the N electrode 31 is improved, so that the chip array 3 forms a common N-pole array arrangement.

[0062] The arrangement structure of the several N electrodes 31 is preferably a ring arrangement, that is, the several N electrodes 31 are arranged on the four sides of the P electrode array to form a ring arrangement structure, so that the current between the P electrodes 32 distributed on the periphery of the P electrode array and the several N electrodes 31 is evenly distributed. Based on the ring arrangement structure of the several N electrodes 31, in conjunction with the current guiding layer 35, the current of each P electrode 32 in the P electrode array can be evenly distributed.

[0063] Furthermore, the current guiding layer 35 may be a metal conductive material, such as one or more of gold (Au), silver (Ag), copper (Cu), aluminum (Al), nickel (Ni) and iron (Fe), or the current guiding layer 35 may be an alloy.

[0064] Furthermore, the shape of the current guiding layer 35 can be a longitudinal strip, a transverse strip, a ring, a grid, etc.

[0065] Furthermore, the current guiding layer 35 may be a metal grid, which can improve the uniformity of current transmission between a plurality of P electrodes and a plurality of N electrodes.

[0066] Furthermore, when preparing the chip array 3, the chip array 3 can be formed on a substrate 7, the substrate 7 is used to support the chip array 3, and the buffer layer 331 is used to grow the N-type semiconductor layer 332 to prevent the N-type semiconductor layer 332 from growing directly on the substrate 7, thereby reducing the growth defect density of the N-type semiconductor layer 332.

[0067] Furthermore, the substrate 7 can be made of a sapphire substrate, a silicon substrate, a silicon carbide substrate, or the like, to meet the preparation requirements of the chip array 3 .

[0068] Furthermore, after the chip array 3 is connected to the substrate 2 through a bonding process, the substrate 7 can be separated from the chip array 3 by a laser lift-off method, or the substrate 7 can be peeled off by chemical etching.

[0069] Furthermore, the substrate 7 is preferably stripped by chemical etching, which can prevent the gas generated during laser stripping from causing impact damage to the chip array 3.

[0070] Specifically, the N-electrode 31 includes: the N-pole boss, a first electrode layer 312 arranged on the top surface of the N-pole boss, and an N-pole solder point 311 arranged on the first electrode layer 312. One side of the first electrode layer 312 extends along the side wall of the N-pole boss to the bottom of the wire groove, so that the first electrode layer 312 is connected to the N-type semiconductor layer 332 of the chip structure, thereby realizing the electrical connection between the P-electrode 32 and the N-electrode 31.

[0071] Furthermore, a first insulating layer 313 is provided on the N electrode 31, and the first insulating layer 313 covers the side wall of the N pole boss and the surface of the first electrode. A first matching groove is formed on the top surface of the first electrode, and the N pole welding point 311 is provided in the first matching groove.

[0072] Specifically, the P-electrode 32 includes: the P-pole boss, a second electrode layer 322 arranged on the P-pole boss, a P-pole solder point 321 arranged on the second electrode layer 322, and a second insulating layer 323. The second insulating layer 323 covers the side wall of the P-pole boss, and the second insulating layer 323 covers the surface of the second electrode layer 322. Based on the second insulating layer 323, a second matching groove is formed on the top of the second electrode layer 322, and the P-pole solder point 321 is arranged in the second matching groove.

[0073] Furthermore, the N-pole solder point 311 and the P-pole solder point 321 are both Au-Sn solder points (gold-tin alloy solder points). The N-pole solder point 311 and the P-pole solder point 321 are used to realize the electrical connection between the chip array 3 and the working circuit board. Based on the structural design of the common N pole, the electrical circuit integration of the driving circuit can be simplified.

[0074] Furthermore, the driving circuit is provided with a plurality of conduction points, which are arranged in a one-to-one correspondence with the plurality of N electrodes 31 and the plurality of P electrodes 32 of the chip array 3, and the plurality of N-pole welding points 311 and the plurality of P-pole welding points 321 are electrically connected to the plurality of conduction points in a one-to-one correspondence, thereby realizing electrical connection between the plurality of N-pole welding points 311 and the plurality of P-pole welding points 321 and the substrate 2.

[0075] Furthermore, the arrangement of the plurality of conduction points on the substrate 2 avoids the position of the transition electrode 34 , so that the transition electrode 34 is in a non-conducting state, thereby avoiding a short circuit between the P electrode 32 and the N electrode 31 .

[0076] Specifically, a plurality of connection bumps are provided on the substrate 2, and the plurality of N electrodes 31, the plurality of P electrodes 32 and the plurality of transition electrodes 34 are connected to the plurality of connection bumps in a one-to-one correspondence. Based on the connection bumps, the structural height consistency between the plurality of N electrodes 31, the plurality of P electrodes 32 and the plurality of transition electrodes 34 can be ensured, thereby ensuring the structural stability of the light-emitting module.

[0077] Furthermore, the several connection bumps are metal connection bumps, so that the electrodes of the chip structure are electrically connected to the connection bumps, and the connection bumps corresponding to the positions of the several N electrodes 31 and the several P electrodes 32 on the substrate 2 are electrically connected to the internal driving circuit to form the several conduction points, so that the several N electrodes 31 and the several P electrodes 32 of the chip array 3 are connected to the driving circuit of the substrate 2; the connection bumps corresponding to the positions of the several transition electrodes 34 on the substrate 2 are arranged in the insulating area of ​​the substrate 2, so that the several transition electrodes 34 are in a non-conducting state, so as to ensure that there is sufficient electrical insulation distance between the several N electrodes 31 and the P electrode array, thereby avoiding a short circuit between the N electrode 31 and the P electrode 32.

[0078] Specifically, Figure 5 A schematic diagram of the connection structure between the chip array and the substrate in an embodiment of the present invention is shown; Figure 6 FIG2 shows a top view of the chip array structure in an embodiment of the present invention. Figure 7 FIG2 shows another top view of the chip array structure in an embodiment of the present invention. Figure 8 A top view of another structure in an embodiment of the present invention is shown; a transition column is provided between the P electrode array and the plurality of N electrodes 31, and a plurality of transition electrodes 34 are provided on the transition column. The transition column is used to separate the P electrode array and the plurality of N electrodes 31, so that there can be sufficient electrical protection distance between the N electrode 31 and the P electrode 32, thereby avoiding a short circuit between the N electrode 31 and the P electrode 32 during use of the chip array 3.

[0079] Furthermore, the electrode structure of the transition electrode 34 is the same as that of the N electrode 31 , and the top surfaces of the P electrode 32 , the N electrode 31 and the transition electrode 34 are located on the same horizontal plane, thereby improving the structural stability of the light-emitting module.

[0080] Specifically, based on the structural design of the transition column, the sizes of several wire grooves on the chip array 3 are the same. When the black primer is filled at the bottom, the flow uniformity of the black primer in the wire groove can be ensured, so that the black primer can be evenly laid between the several N electrodes 31 and the several P electrodes 32 of the chip array 3, avoiding the occurrence of glue jams and uneven distribution of the black primer, thereby improving the light output reliability of the chip array 3.

[0081] Specifically, the groove depth of any of the line grooves extends to the N-type semiconductor layer 332, and the first electrode layer 312 of the N-electrode 31 extends to the N-type semiconductor layer 332, so that after subsequent power-on, any of the P-electrodes 32 can be connected to the first electrode layer 312 of the N-electrode 31 based on the N-type semiconductor layer 332, thereby making the quantum well layer (light-emitting layer) emit light.

[0082] Specifically, a current guiding layer 35 is laid in the wire trough, and grooves are opened at positions of the N-type semiconductor layer 332 corresponding to the several wire troughs. The current guiding layer 35 is snap-fitted into the grooves. Based on the grooves, the convenience of installing the current guiding layer 35 and the accuracy of installation positioning can be improved.

[0083] Furthermore, the current guiding layer 35 is partially embedded in the N-type semiconductor layer 332, so that the current guiding layer 35 can block the light in the N-type semiconductor layer 332, that is, reduce the lateral propagation of the light between the multiple light-emitting chips in the chip array 3 in the N-type semiconductor layer 332, thereby reducing the risk of cross-talk between the light-emitting chips.

[0084] Specifically, the thickness of the current guiding layer 35 is greater than the depth of the groove, so that part of the current guiding layer 35 is exposed on the N-type semiconductor layer 332, so that the first electrode layer 312 of the N-electrode 31 can be connected to the current guiding layer 35 when extending to the N-type semiconductor layer 332, and the current guiding layer 35 can limit the first electrode layer 312, thereby improving the convenience of setting the first electrode layer 312.

[0085] Furthermore, based on the current guiding layer 35 , an interconnection path between the N electrode 31 and the P electrode 32 can be realized, and based on the current guiding layer 35 , the conductivity of the N-type semiconductor layer 332 is improved, thereby improving the current uniformity between the N electrode 31 and the P electrode 32 .

[0086] Furthermore, the surface of the current guiding layer 35 is covered with a third insulating layer 36 . The third insulating layer 36 is used to protect the current guiding layer 35 and prevent short circuits between the light-emitting chips in the chip array 3 .

[0087] An embodiment of the present invention provides a light-emitting module that utilizes a dam 4 formed of a transparent adhesive layer and an encapsulation layer 6 to achieve double-layer encapsulation of a chip array 3 and a light conversion layer 5, thereby improving the light output efficiency of the chip array 3. The combination of double-layer encapsulation and the chip array 3 structure simplifies the structural design of the vehicle lamp. By filling support adhesive between the plurality of P electrodes 32 and the plurality of N electrodes 31 of the chip array 3, the light output contrast of the chip array 3 is increased, thereby improving the light output efficiency of the light-emitting module.

[0088] In addition, the above is a detailed introduction to a light-emitting module provided in an embodiment of the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A light emitting module, characterized in that: The light emitting module includes: a substrate, a chip array arranged on the substrate, a dam covering the periphery of the chip array, a light conversion layer arranged above the chip array, and a packaging layer covering the periphery of the dam; The chip array is provided with a plurality of P electrodes and a plurality of N electrodes, and support glue is filled between the plurality of P electrodes and the plurality of N electrodes; The dam is a transparent adhesive layer, the encapsulation layer is a black adhesive layer, or the encapsulation layer is a white adhesive layer; The height of the dam is h1, the height of the light conversion layer is h2, and the constraint relationship between h1 and h2 is: h1 ≥ h2; The chip array includes a chip main body structure, and the chip main body structure includes: a buffer layer, an N-type semiconductor layer, a quantum well layer, a P-type semiconductor layer and an electrode transition layer stacked in sequence; The plurality of P electrodes and the plurality of N electrodes are formed in the chip main body structure; The chip main body structure is provided with a plurality of wire grooves, and the chip main body structure forms a plurality of bosses arranged in an array based on the wire grooves; The array structure of the plurality of bosses includes a plurality of N-pole bosses and a plurality of P-pole bosses, P electrodes are formed on the P-pole bosses, and the plurality of P electrodes form a P-electrode array, and N electrodes are formed on the N-pole bosses, and the plurality of N electrodes are arranged on the outer edge of the P-electrode array; The N electrode includes a first electrode layer provided on the N-pole boss and an N-pole welding point provided on the first electrode layer, wherein one side of the first electrode layer extends along the side wall of the N-pole boss toward the bottom of the wire slot; The P electrode includes a second electrode layer provided on the P-pole boss and a P-pole welding point provided on the second electrode layer; The depth of any of the wire grooves extends to the N-type semiconductor layer. The first electrode layer of the N-electrode extends to the N-type semiconductor layer.

2. The light emitting module according to claim 1, wherein: The substrate is a silicon-based circuit board, a driving circuit is provided on the silicon-based circuit board, and the plurality of light-emitting chips of the chip array are electrically connected to the driving circuit.

3. The light emitting module according to claim 1, wherein: The light-emitting module further includes a transition carrier, the substrate is disposed on the transition carrier, and the substrate is electrically connected to an external circuit board based on the transition carrier.

4. The light emitting module according to claim 3, wherein: The thermal expansion coefficient of the transition carrier is between the thermal expansion coefficient of the base plate and the thermal expansion coefficient of the external circuit board.

5. The light emitting module according to claim 4, wherein: The transition carrier is provided with a metal electrode, and the substrate is provided with a connecting electrode. The metal electrode of the transition carrier is electrically connected to the connecting electrode on the substrate based on a bonding wire.

6. The light emitting module according to claim 5, wherein: The metal electrodes, the connecting electrodes, and the bonding wires are housed in the packaging layer.

7. The light emitting module according to claim 1, wherein: A transition column is provided between the P electrode array and the plurality of N electrodes, and a plurality of transition electrodes are provided on the transition column.

8. The light emitting module according to claim 7, wherein: The top surfaces of the P electrode, the N electrode and the transition electrode are on the same horizontal plane.

9. The light emitting module according to claim 1, wherein: A transition column is provided between the P electrode array and the plurality of N electrodes. The transition column is provided with a plurality of transition electrodes. The transition column is used to separate the P electrode array and the plurality of N electrodes.

10. The light emitting module according to claim 1, wherein: The chip array further includes a current guiding layer, which is disposed in at least one of the plurality of wire slots.

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