A server fault diagnosis method, apparatus, electronic device, and storage medium

Abstract

This application provides a server fault diagnosis method, apparatus, electronic device, and storage medium. The method is applied to a BMC (Block Controller). After receiving an interrupt signal from the CPU, the BMC selects a target MCA (Memory Access Control) register. The target MCA register indicates a fault in the CPU or memory and records the fault type and the addresses of the faulty CPU and memory. When a CPU fault is determined based on the data stored in the target MCA register, and the fault type is uncorrectable, the CPU slot information is reported to the monitoring terminal. When a memory fault is determined based on the data stored in the target MCA register, and the fault type is uncorrectable, the identification information of the faulty target memory is determined based on the address recorded in the target MCA register, and the identification information is reported to the monitoring terminal, accurately locating the faulty component. By using the BMC, out-of-band diagnosis and reporting of server faults are achieved, improving server maintainability.

Description

Technical Field

[0001] This specification relates to the field of network communication, and in particular to a server fault diagnosis method, device, electronic device, and storage medium. Background Technology

[0002] Currently, server fault diagnosis is often achieved through the BIOS (Basic Input Output System) within the server. However, when a server experiences an Uncorrectable Error (UCE), the BIOS may freeze, making fault diagnosis impossible. In this case, maintenance personnel must manually restart the server. If the server restarts successfully, fault diagnosis continues through the BIOS; otherwise, no fault information is available. Summary of the Invention

[0003] To overcome the problems existing in related technologies, this specification provides a server fault diagnosis method, apparatus, electronic device, and storage medium.

[0004] This application provides a server fault diagnosis method, which is applied to a Baseboard Management Controller (BMC) in a server. The server further includes N Central Processing Units (CPUs), where N is greater than or equal to 1. The method includes:

[0005] Receives interrupt signals triggered by the CPU;

[0006] Based on the interrupt signal, a target MCA register is selected from all MCA registers connected to the CPU; the target MCA register is used to indicate that the CPU or the memory associated with the CPU has failed, the type of failure when the CPU or the memory fails, and the address of the CPU or the memory that has failed.

[0007] If the CPU is determined to be faulty based on the target MCA register and the type of the fault is an uncorrectable fault, then the slot information where the CPU is located is reported to the monitoring terminal.

[0008] If a memory fault associated with the CPU is determined based on the target MCA register and the fault type is an uncorrectable fault, then the identification information of the target memory that has the fault is determined based on the address recorded in the target MCA register, and the identification information of the target memory is reported to the monitoring terminal.

[0009] Optionally, the target MCA register is used to indicate that the component corresponding to the target MCA register in the server has failed, the type of failure when the component fails, and the address of the component; other MCA registers connected to the CPU, excluding the target MCA register, indicate that the component corresponding to the other MCA register in the server has not failed; and when the component corresponding to the MCA register fails, the value of the valid bit of the MCA register is a preset value;

[0010] The step of selecting the target MCA register from all MCA registers connected to the CPU based on the interrupt signal includes:

[0011] Upon receiving the interrupt signal, the CPU selects an MCA register whose valid bit value is a preset value from all MCA registers connected to it as the target register.

[0012] Optionally, selecting the MCA register with a preset value for the valid bit from all MCA registers connected to the CPU as the target register includes:

[0013] Send a Mailbox 43h command to the CPU so that the CPU can determine the index number of the MCA registers whose valid bits are set to preset values ​​in each MCA register connected to the CPU. Based on the index number, call the Mailbox 44h command to obtain the data stored in the MCA registers whose valid bits are set to preset values, and send the data stored in the MCA registers whose valid bits are set to preset values ​​to the BMC.

[0014] Optionally, the IPID sub-register in the target MCA register is used to indicate the component corresponding to the target MCA register, the component including the CPU and the memory associated with the CPU;

[0015] The STATUS sub-register in the target MCA register is used to indicate the error type of the component corresponding to the target MCA register. The error type includes correctable error type and uncorrectable error type.

[0016] When the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is the CPU, and the STATUS sub-register in the target MCA register indicates that the error type is an uncorrectable error type, the CPU is determined to be faulty and the type of the fault is an uncorrectable fault type.

[0017] When the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is memory, and the STATUS sub-register in the target MCA register indicates that the error type is an uncorrectable error type, the memory fault associated with the CPU is determined to be an uncorrectable fault type.

[0018] Optionally, after reporting the slot information where the CPU is located to the monitoring terminal, or reporting the identification information of the target memory to the monitoring terminal, the method further includes:

[0019] The server is controlled to restart based on the obtained restart configuration instruction that indicates the server will restart when an uncorrectable fault occurs.

[0020] Optionally, the interrupt signal is a signal generated by the CPU when it determines that the BIOS in the server has malfunctioned.

[0021] This application embodiment also provides a server fault diagnosis device, the device being applied to a baseboard management controller (BMC) in the server, the server further comprising N central processing units (CPUs), where N is greater than or equal to 1; the device includes:

[0022] The signal receiving module is used to receive interrupt signals triggered by the CPU;

[0023] The register determination module is used to select a target MCA register from all MCA registers connected to the CPU based on the interrupt signal; the target MCA register is used to indicate that the CPU or the memory associated with the CPU has failed, the fault type corresponding to the failure of the CPU or the memory, and the address of the CPU or the memory that has failed.

[0024] The first fault diagnosis module is used to determine the CPU fault based on the target MCA register and if the fault type is an uncorrectable fault type, then report the slot information where the CPU is located to the monitoring terminal.

[0025] The second fault diagnosis module is used to determine, based on the target MCA register, that the CPU-related memory fault is of the type of uncorrectable fault, and then to determine the identification information of the target memory that has the fault based on the address recorded in the target MCA register, and report the identification information of the target memory to the monitoring terminal.

[0026] Optionally, the target MCA register is used to indicate that the component corresponding to the target MCA register in the server has failed, the type of failure when the component fails, and the address of the component; other MCA registers connected to the CPU, excluding the target MCA register, indicate that the component corresponding to the other MCA register in the server has not failed; and when the component corresponding to the MCA register fails, the value of the valid bit of the MCA register is a preset value;

[0027] The step of selecting the target MCA register from all MCA registers connected to the CPU based on the interrupt signal includes:

[0028] Upon receiving the interrupt signal, select the MCA register with the preset value as the target register from all MCA registers connected to the CPU;

[0029] The step of selecting the MCA register with a preset value for the valid bit from all MCA registers connected to the CPU as the target register includes:

[0030] Send a Mailbox 43h command to the CPU so that the CPU can determine the index number of the MCA registers whose valid bits are set to preset values ​​in each MCA register connected to the CPU. Based on the index number, call the Mailbox 44h command to obtain the data stored in the MCA registers whose valid bits are set to preset values, and send the data stored in the MCA registers whose valid bits are set to preset values ​​to the BMC.

[0031] And / or, the IPID sub-register in the target MCA register is used to indicate the component corresponding to the target MCA register, the component including the CPU and the memory associated with the CPU;

[0032] The STATUS sub-register in the target MCA register is used to indicate the error type of the component corresponding to the target MCA register. The error type includes correctable error type and uncorrectable error type.

[0033] When the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is the CPU, and the STATUS sub-register in the target MCA register indicates that the error type is an uncorrectable error type, the CPU is determined to be faulty and the type of the fault is an uncorrectable fault type.

[0034] When the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is memory, and the STATUS sub-register in the target MCA register indicates that the error type is an uncorrectable error type, it is determined that the memory associated with the CPU is faulty and the type of the fault is an uncorrectable fault type.

[0035] And / or, after reporting the slot information where the CPU is located to the monitoring terminal, or reporting the identification information of the target memory to the monitoring terminal, the method further includes:

[0036] Based on the obtained restart configuration command indicating that the server will be restarted when an uncorrectable fault occurs, the server is controlled to restart.

[0037] And / or, the interrupt signal is a signal generated by the CPU when it determines that the BIOS in the server has malfunctioned.

[0038] This application provides an electronic device, the electronic device comprising:

[0039] Processor; and

[0040] A memory storing computer program instructions that, when executed by the processor, cause the processor to perform the steps in any of the methods described above.

[0041] This application provides a storage medium storing computer program instructions, which, when executed by a processor, cause the processor to perform the steps in any of the above methods.

[0042] The beneficial effects of this application lie in providing a server fault diagnosis method, apparatus, electronic device, and storage medium. This method is applied to the BMC (Block Controller) in a server. After receiving an interrupt signal from the CPU, the BMC selects a target MCA (Mechanical Access Controller) register from all MCA registers connected to the CPU. The target MCA register indicates a fault in the CPU or memory and records the fault type and the addresses of the faulty CPU and memory. When a CPU fault is determined based on the data stored in the target MCA register, and the fault type is uncorrectable, the slot information of the CPU is reported to the monitoring terminal. When a memory fault is determined based on the data stored in the target MCA register, and the fault type is uncorrectable, the identification information of the target memory is determined based on the address recorded in the target MCA register, and the identification information is reported to the monitoring terminal, accurately locating the faulty component. By using the BMC, out-of-band diagnosis and reporting of server faults are achieved, improving server maintainability. Attached Figure Description

[0043] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this specification and, together with the description, serve to explain the principles of this specification.

[0044] Figure 1 This is a first flowchart of a server fault diagnosis method provided in an embodiment of this application;

[0045] Figure 2 This is a second flowchart of a server fault diagnosis method provided in an embodiment of this application;

[0046] Figure 3 A third flowchart of a server fault diagnosis method provided in an embodiment of this application;

[0047] Figure 4 The fourth flowchart of a server fault diagnosis method provided in this application embodiment;

[0048] Figure 5 This is a schematic diagram of the structure of a server fault diagnosis device provided in an embodiment of this application;

[0049] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0050] To enable those skilled in the art to better understand the technical solutions provided in the embodiments of this application, and to make the above-mentioned objectives, features and advantages of the embodiments of this application more apparent and understandable, the technical solutions in the embodiments of this application will be further described in detail below with reference to the accompanying drawings.

[0051] Currently, server fault diagnosis relies on the server's BIOS. However, when a server experiences an uncorrectable fault, the BIOS may freeze, making fault diagnosis impossible. Therefore, this application provides a method for collecting and diagnosing fault information out-of-band using the server's BMC (Band Control Controller). The BMC is a dedicated component for monitoring and managing the server; its functionality remains unaffected when other components in the server malfunction. Even when the BIOS is frozen and fault diagnosis is impossible, the server's BMC can still locate and report information about the faulty CPU or memory.

[0052] Please refer to Figure 1 , Figure 1 This application provides a first flowchart of a server fault diagnosis method. The method is applied to a Baseboard Management Controller (BMC) in a server. The server also includes N Central Processing Units (CPUs), where N is greater than or equal to 1. The method includes:

[0053] S101 receives the interrupt signal triggered by the CPU.

[0054] The server comprises multiple CPUs, each connected to the BMC. For each CPU, when a CPU fails or its associated memory fails, the CPU sends an interrupt signal to the BMC. For example, when a CPU fails or its associated memory fails, the CPU sends an APML ALERT signal to the BMC via the APML (Advanced Platform Management Link) interface; the APML ALERT signal is equivalent to the aforementioned interrupt signal.

[0055] Furthermore, the CPU can further determine whether the BIOS in the server is malfunctioning. If the CPU or the memory connected to the CPU experiences an uncorrectable fault, and the CPU detects that the BIOS is functioning normally, the CPU can continue to allow the BIOS to collect and diagnose fault information without sending an interrupt signal to the BMC. If the CPU detects an abnormal BIOS function, it sends an interrupt signal to the BMC, thus enabling the collection and reporting of fault information from the faulty component via out-of-band transmission in the event of an uncorrectable fault in the server and a BIOS hang.

[0056] S102, select the target MCA register from all MCA registers connected to the CPU based on the interrupt signal; the target MCA register is used to indicate that the CPU or CPU-associated memory has failed, the corresponding fault type when the CPU or memory fails, and the address of the CPU or memory that failed.

[0057] The server in this application supports the MCA (Machine Check Architecture) mechanism, which is used to detect server faults. The MCA mechanism utilizes MCA registers, which enable the detection and recording of hardware faults. The server includes various types of MCA registers, each used to record fault information for its corresponding component. For example, the UMC register stores memory-related fault information, the LS register stores cache-related fault information, and L2 register stores L2 cache error information. The data stored in the MCA registers can determine whether the corresponding component has failed, the type of fault, and the address of the failed component.

[0058] After receiving an interrupt signal, the BMC selects the target MCA register from all MCA registers connected to the CPU. The target MCA register is the MCA register of the component (CPU or CPU-associated memory) that has failed. The data stored in the target MCA register can determine the address of the failed component and the type of fault.

[0059] S103, if the CPU fault is determined based on the target MCA register and the fault type is an uncorrectable fault, then the slot information where the CPU is located is reported to the monitoring terminal.

[0060] S104. If the CPU-related memory fault is determined based on the target MCA register and the fault type is an uncorrectable fault, then the identification information of the faulty target memory is determined based on the address recorded in the target MCA register, and the identification information of the target memory is reported to the monitoring terminal.

[0061] Server failures can be categorized into correctable and uncorrectable failures. Uncorrectable failures typically lead to server downtime. Therefore, when an uncorrectable failure occurs, it is essential to promptly locate the faulty component and report the relevant information so that maintenance personnel can quickly replace the faulty component.

[0062] In this application, when it is determined based on the target MCA register that a CPU in the server has malfunctioned, and the type of malfunction is an uncorrectable type, the CPU slot information is reported to the monitoring terminal. This application does not specifically limit how the CPU slot information is determined. For example, the CPLD (Complex Programmable Logic Device) in the server can detect the CPU that issued the interrupt signal and feed back the slot information corresponding to the CPU that issued the interrupt signal to the BMC, so that the BMC can report the CPU slot information to the monitoring terminal.

[0063] In this application, when it is determined from the target MCA register that a memory failure has occurred in the server, and the failure type is an uncorrectable failure, the identification information of the failed memory is determined based on the address recorded in the target MCA register. This application does not impose specific limitations on the memory identification information, as long as it can be used to uniquely identify the corresponding memory. For example, the machine silkscreen of the memory can be used as the memory identification information. The target MCA register stores the system address of the failed memory, which needs to be converted to a physical address based on the server's memory insertion method, capacity, and CPU type. Taking an AMD Genoa CPU as an example, each CPU supports 12 memory modules. During server startup initialization, the mapping relationship between the system address and physical address of the memory is determined. For example, a system address of 0x12345678 corresponds to the physical address of CPU0IMC1. The physical address of the memory can be further converted to the corresponding machine silkscreen. The correspondence between the two is defined in the server design using a JSON file. For example, the machine silkscreen corresponding to the physical address of CPU0IMC1 is CPU1CH6DIMM0. Finally, the identification information of the target memory is reported to the monitoring terminal so that the operation and maintenance personnel can replace the faulty target memory in a timely manner.

[0064] In summary, this application provides a server fault diagnosis method. This method is applied to the BMC (Block Controller) in the server. After receiving an interrupt signal from the CPU, the BMC selects a target MCA (Mechanical Access Controller) register from all MCA registers connected to the CPU. The target MCA register indicates a fault in the CPU or memory and records the fault type and the addresses of the faulty CPU and memory. When a CPU fault is determined based on the data stored in the target MCA register, and the fault type is uncorrectable, the slot information of the CPU is reported to the monitoring terminal. When a memory fault is determined based on the data stored in the target MCA register, and the fault type is uncorrectable, the identification information of the target memory is determined based on the address recorded in the target MCA register, and the identification information is reported to the monitoring terminal, accurately locating the faulty component. By using the BMC, out-of-band diagnosis and reporting of server faults are achieved, improving server maintainability.

[0065] Based on the above embodiments:

[0066] As an optional embodiment, the target MCA register is used to indicate that the component corresponding to the target MCA register in the server has failed, the type of failure when the component fails, and the address of the component; other MCA registers connected to the CPU, excluding the target MCA register, indicate that the component corresponding to the other MCA register in the server has not failed; and when the component corresponding to the MCA register fails, the value of the valid bit of the MCA register is a preset value.

[0067] The target MCA register is selected from all MCA registers connected to the CPU based on the interrupt signal, including: after receiving the interrupt signal, selecting the MCA register with the value of the valid bit set to the preset value from all MCA registers connected to the CPU as the target register.

[0068] In this embodiment, when a component corresponding to an MCA register malfunctions, the value of the valid bit of that MCA register is set to a preset value. Therefore, when the BMC selects a target MCA register from all MCA registers after receiving an interrupt signal, it can select the target MCA register based on whether the value of the valid bit of each MCA register is the preset value. A preset value for the valid bit of the target MCA register indicates that the component corresponding to that target MCA register has malfunctioned. Other information stored in the target MCA register can indicate the type of fault and the address of the malfunctioning component. If the valid bit values ​​of other MCA registers connected to the CPU (excluding the target MCA register) are not preset values, the components corresponding to those other MCA registers connected to the CPU (excluding the target MCA register) have not malfunctioned.

[0069] As an optional embodiment, the target register is selected from all MCA registers connected to the CPU, with the valid bit value set to a preset value. This includes:

[0070] Send the Mailbox 43h command to the CPU so that the CPU can determine the index number of the MCA register with the preset value of the valid bit in each MCA register connected to the CPU. Based on the index number, call the Mailbox 44h command to obtain the data stored in the MCA register with the preset value of the valid bit, and send the data stored in the MCA register with the preset value of the valid bit to the BMC.

[0071] This application utilizes data stored in the target MCA register to determine whether the fault type is correctable or uncorrectable, thereby determining whether it is necessary to locate the faulty component and whether the faulty component's information needs to be reported to the monitoring terminal. When determining that the fault type is uncorrectable using the data stored in the target MCA register, further fault information related to the faulty component needs to be determined based on the data stored in the target MCA register. In this embodiment, the BMC obtains the data stored in the target MCA register through the Mailbox service. Specifically, after receiving an interrupt signal, the BMC sends a Mailbox 43h command to the CPU. The Mailbox 43h command collects the index number, which can scan all MCA registers connected to the CPU where the valid bit values ​​are set to a preset value. Then, the index number is used to call the Mailbox 44h command to obtain the data stored in the MCA register where the valid bit values ​​are set to the preset value. Finally, the CPU sends the data stored in the MCA register where the valid bit values ​​are set to the preset value to the BMC.

[0072] It should be noted that when the CPU in the server fails, the functions involving the MCA mechanism in that CPU will not be affected. The transmission channel (such as APML) between the CPU and BMC can still transmit interrupt signals, commands involved in MailBoxservice, and data stored in the target MCA register normally.

[0073] Please refer to Figure 2 , Figure 2 This is a second flowchart of a server fault diagnosis method provided in an embodiment of this application. When the BIOS in the server is stuck, the APML interface and Mailbox service are used to collect out-of-band CPU and memory fault information. The BMC receives interrupt signals through the APML interface and collects data stored in the target MCA register based on the Mailbox service. After collecting the fault information of the faulty component stored in the MCA register, the fault information is parsed and reported. Figure 2 As shown, when there is a CPU failure and the failure type is uncorrectable, the slot information of the faulty CPU is reported to the monitoring terminal; when there is a memory failure and the failure type is uncorrectable, the identification information of the faulty memory, i.e., the machine silkscreen, is reported to the monitoring terminal, accurate to the specific location of the faulty component, so as to facilitate maintenance personnel to repair or replace the faulty component.

[0074] Specifically, the MCA register includes sub-registers such as the IPID sub-register, STATUS sub-register, and ADDR sub-register. The IPID sub-register in the target MCA register indicates the component corresponding to the target MCA register, which includes the CPU and CPU-associated memory. For example, if the IPID sub-register in the target MCA register determines that the MCA register belongs to a UMC register, then the component corresponding to the target MCA register is considered to be memory, thus indicating a memory-related fault in the server. If the IPID sub-register in the target MCA register determines that the MCA register belongs to a type of MCA register other than a UMC register, then the component corresponding to the target MCA register is considered to be the CPU, thus indicating a CPU-related fault in the server. These matching rules can be stored in the mca.json file for convenient subsequent maintenance and optimization of fault component location.

[0075] The STATUS sub-register in the target MCA register indicates the type of error that has occurred in the component corresponding to the target MCA register. Error types include correctable and uncorrectable error types. If the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is the CPU, and the STATUS sub-register in the target MCA register indicates an uncorrectable error type, then a CPU fault is determined, and the fault type is uncorrectable. If the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is memory, and the STATUS sub-register in the target MCA register indicates an uncorrectable error type, then a memory fault associated with the CPU is determined, and the fault type is uncorrectable.

[0076] For example, after collecting the data stored in the target MCA register, the data is saved to the AMD_MCA_result.rst file on the SD card, and this file is then parsed. A portion of the collected file content is shown below:

[0077] MCA_CTL_SMU: 0x7ff;

[0078] MCA_STATUS_SMU:0xbaa020000000011b;

[0079] MCA_ADDR_SMU: 0x0, MCA_MISC0_SMU: 0xd00d0fff00000000;

[0080] MCA_CONFIG_SMU:0x23000001fb;

[0081] MCA_IPID_SMU:0x1000103b30400;

[0082] MCA_SYND_SMU: 0xd0419a0;

[0083] MCA_CTL_MASK_SMU: 0x0;

[0084] MCA_TRANSSYND_SMU: 0x0;

[0085] MCA_TRANSADDR_SMU: 0x0;

[0086] As can be seen, the BMC collects data stored in the target MCA register, including the IPID sub-register, ADDR sub-register, STATUS sub-register, and CTL sub-register. The IPID sub-register, ADDR sub-register, and STATUS sub-register are the main registers involved in the parsing.

[0087] When the target MCA register is a UMC register, the server fault is determined to be a memory-related fault; when the target MCA register is an LS register, LF register, L2 register, L3 register, etc., the server fault is determined to be a CPU-related fault. The mapping between MCA register types and the types of faulty components can be pre-specified. Therefore, after locking the target MCA register, the mapping between the target MCA register type and the faulty component type can be used to determine whether the server fault is memory-related or CPU-related.

[0088] Please refer to Figure 3 and Figure 4 , Figure 3 This is a third flowchart of a server fault diagnosis method provided in an embodiment of this application. Figure 4 This is a fourth flowchart of a server fault diagnosis method provided in an embodiment of this application. When the MCA register is a UMC register, the ADDR register in the MCA register stores the system address of the faulty memory. When the MCA register is not a UMC register (e.g., ...), ... Figure 4When the LF register is in the MCA register, the ADDR register in the MCA register stores the system address of the faulty CPU. The STATUS sub-register records the error type and specific error information. When bit

[63] = 1, this MCA register is valid (indicating that the component corresponding to this MCA register is the faulty component), and bit

[61] represents whether the fault type is a correctable fault type or an uncorrectable fault type. In addition, the detailed fault information of the faulty component can be obtained according to the value of the bit corresponding to ErrorCodeExt in the STATUS sub-register and the correspondence between ErrorCodeExt and ErrorTypeDes. The detailed fault information includes, but is not limited to, DRAM ECC error (Dynamic Random Access Memory Error Correction Code Error), Write Data Poison error, SdpParity error, etc., which are not specifically limited in this application.

[0089] As an optional embodiment, after reporting the slot information where the CPU is located to the monitoring terminal, or reporting the identification information of the target memory to the monitoring terminal, the method further includes:

[0090] Control the server to restart based on the obtained restart configuration instructions that indicate when the server will restart when an uncorrectable fault occurs.

[0091] When a server malfunction causes a system crash, maintenance personnel typically have two needs: First, to automatically restart the server to restore operation as quickly as possible and minimize losses; second, to not automatically restart the server, but instead upload information about the faulty component to the monitoring system and wait for maintenance personnel to inspect it, preserving the site environment to quickly locate the faulty component and collect more anomaly information. Therefore, in this embodiment, when an uncorrectable fault occurs in the CPU or memory of the server, the user can choose whether to restart the server. The user can pre-enter a restart configuration command to the server, which instructs the server to restart when an uncorrectable fault occurs. When an uncorrectable fault occurs, the BMC reports the CPU slot information or the target memory identifier information to the monitoring system before controlling the server to restart. If an uncorrectable fault occurs but no restart configuration command is received, the site environment is preserved so that maintenance personnel can collect more fault information.

[0092] Please refer to Figure 5 , Figure 5This application provides a schematic diagram of the structure of a server fault diagnosis device according to an embodiment of the present application. The present application also provides a server fault diagnosis device applied to a Baseboard Management Controller (BMC) in a server, wherein the server further includes N Central Processing Units (CPUs), where N is greater than or equal to 1; the device includes:

[0093] The signal receiving module 501 is used to receive interrupt signals triggered by the CPU;

[0094] The register determination module 502 is used to select a target MCA register from all MCA registers connected to the CPU based on an interrupt signal; the target MCA register is used to indicate that the CPU or CPU-associated memory has failed, the type of failure when the CPU or memory fails, and the address of the CPU or memory that has failed.

[0095] The first fault diagnosis module 503 is used to determine the CPU fault based on the target MCA register and if the fault type is an uncorrectable fault type, then report the slot information where the CPU is located to the monitoring terminal.

[0096] The second fault diagnosis module 504 is used to determine the CPU-related memory fault based on the target MCA register and the fault type is an uncorrectable fault type. Then, it determines the identification information of the target memory that has the fault based on the address recorded in the target MCA register and reports the identification information of the target memory to the monitoring terminal.

[0097] Based on the above embodiments:

[0098] As an optional embodiment, the target MCA register is used to indicate that the component corresponding to the target MCA register in the server has failed, the type of failure when the component fails, and the address of the component; other MCA registers connected to the CPU, excluding the target MCA register, indicate that the component corresponding to the other MCA register in the server has not failed; and when the component corresponding to the MCA register fails, the value of the valid bit of the MCA register is a preset value.

[0099] The target MCA register is selected from all MCA registers connected to the CPU based on the interrupt signal, including:

[0100] Upon receiving an interrupt signal, select the MCA register with the preset value as the target register from all MCA registers connected to the CPU;

[0101] Select the MCA register with the preset value for the valid bit from all MCA registers connected to the CPU as the target register, including:

[0102] Send the Mailbox 43h command to the CPU so that the CPU can determine the index number of the MCA register with the preset value of the valid bit in each MCA register connected to the CPU. Based on the index number, call the Mailbox 44h command to obtain the data stored in the MCA register with the preset value of the valid bit, and send the data stored in the MCA register with the preset value of the valid bit to the BMC.

[0103] And / or, the IPID sub-register in the target MCA register is used to indicate the component corresponding to the target MCA register, including the CPU and the CPU-associated memory;

[0104] The STATUS sub-register in the target MCA register is used to indicate the type of error that has occurred in the component corresponding to the target MCA register. The error types include correctable error types and uncorrectable error types.

[0105] When the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is the CPU, and the STATUS sub-register in the target MCA register indicates that the error type is an uncorrectable error type, the CPU is determined to be faulty and the type of the fault is an uncorrectable fault type.

[0106] When the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is memory, and the STATUS sub-register in the target MCA register indicates that the error type is an uncorrectable error type, it is determined that the CPU-associated memory fault is an uncorrectable fault type.

[0107] And / or, after reporting the CPU slot information to the monitoring terminal, or reporting the target memory identification information to the monitoring terminal, the method further includes:

[0108] Control the server to restart based on the obtained restart configuration instructions that indicate when the server will restart when an uncorrectable fault occurs;

[0109] And / or, the interrupt signal is a signal generated by the CPU when it determines that the BIOS in the server has failed.

[0110] For a detailed description of the server fault diagnosis device provided in this application, please refer to the embodiments of the server fault diagnosis method described above; this application will not repeat the details here.

[0111] Please refer to Figure 6 , Figure 6This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device includes a processor 601 and a memory 602. The memory 602 stores computer program instructions, which, when executed by the processor 601, cause the processor 601 to perform the steps in any of the methods described above.

[0112] For a detailed description of the electronic equipment provided in this application, please refer to the embodiments of the server fault diagnosis method described above; this application will not repeat the details here.

[0113] This application provides a storage medium storing computer program instructions, which, when executed by a processor, cause the processor to perform the steps in any of the above methods.

[0114] For a detailed description of the storage medium provided in this application, please refer to the embodiments of the server fault diagnosis method described above; this application will not repeat the details here.

[0115] In this specification, the terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0116] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A server failure diagnosis method characterized by comprising: A baseboard management controller (BMC) applied to a server, the server further comprising N central processing units (CPUs), N being greater than or equal to 1; the method comprising: receiving a CPU-triggered interrupt signal; after receiving the interrupt signal, selecting, from all MCA registers connected to the CPU, an MCA register with a preset value of a valid bit as a target register; the target MCA register being used to indicate a fault of the CPU or a memory associated with the CPU, a fault type of the CPU or the memory when the CPU or the memory fails, and an address of the CPU or the memory that fails; when a server component corresponding to the MCA register fails, the MCA register has the preset value of the valid bit; based on the target MCA register, determining that the CPU fails and the fault type is an uncorrectable fault type, and reporting slot information where the CPU is located to a monitoring end; based on the target MCA register, determining that a memory associated with the CPU fails and the fault type is an uncorrectable fault type, and determining identification information of a target memory that fails based on an address recorded by the target MCA register, and reporting the identification information of the target memory to the monitoring end.

2. The server failure diagnosis method according to claim 1, characterized by, The target MCA register is used to indicate a fault of a component in the server corresponding to the target MCA register, a fault type of the component when the component fails, and an address of the component; other MCA registers connected to the CPU except the target MCA register indicate that a component in the server corresponding to the other MCA register does not fail.

3. The server failure diagnosis method according to claim 2, characterized by, The target MCA register is selected from all MCA registers connected to the CPU, and the MCA register has a preset value of a valid bit, comprising: sending a Mailbox 43h command to the CPU, so that the CPU determines an index number of an MCA register with a preset value of a valid bit in each MCA register connected to the CPU, calls a Mailbox 44h command based on the index number to obtain data stored in the MCA register with the preset value of the valid bit, and sends the data stored in the MCA register with the preset value of the valid bit to the BMC.

4. The server failure diagnosis method according to claim 1, characterized by, An IPID sub-register in the target MCA register is used to indicate a component corresponding to the target MCA register, the component including the CPU and a memory associated with the CPU; A STATUS sub-register in the target MCA register is used to indicate an error type of a fault of the component corresponding to the target MCA register, the error type including a correctable error type and an uncorrectable error type; When the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is the CPU, and the STATUS sub-register in the target MCA register indicates that the error type is the uncorrectable error type, it is determined that the CPU fails and the fault type is the uncorrectable fault type. When the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is a memory, and the STATUS sub-register in the target MCA register indicates that the error type is an uncorrectable error type, it is determined that the memory associated with the CPU is faulty and the type of the fault is an uncorrectable fault type.

5. The server failure diagnosis method according to claim 1, characterized by, After reporting the slot information in which the CPU is located to a monitoring end or reporting the identification information of the target memory to the monitoring end, the method further comprises: Based on the obtained restart configuration instruction for indicating that the server is restarted when an uncorrectable fault type occurs in the server, the server is restarted.

6. The server failure diagnosis method according to claim 1, characterized by, The interrupt signal is a signal generated when the BIOS in the server is determined to be faulty by the CPU.

7. A server failure diagnosis apparatus characterized by comprising: The application is applied to a baseboard management controller (BMC) in a server, and the server further comprises N central processing units (CPUs), where N is greater than or equal to 1; the apparatus comprises: a signal receiving module configured to receive an interrupt signal triggered by a CPU; a register determining module configured to select, after receiving the interrupt signal, an MCA register in which a value of a valid bit is a preset value from all MCA registers connected to the CPU as a target register; the target MCA register is used to indicate that the CPU or a memory associated with the CPU is faulty, a type of the fault of the CPU or the memory, and an address of the CPU or the memory that is faulty; when a component corresponding to the MCA register is faulty, the value of the valid bit of the MCA register is the preset value; a first fault diagnosing module configured to, based on the target MCA register, determine that the CPU is faulty and the type of the fault is an uncorrectable fault type, report slot information in which the CPU is located to a monitoring end; a second fault diagnosing module configured to, based on the target MCA register, determine that the memory associated with the CPU is faulty and the type of the fault is an uncorrectable fault type, determine identification information of a target memory that is faulty based on an address recorded by the target MCA register, and report the identification information of the target memory to the monitoring end.

8. The server failure diagnosis apparatus according to claim 7, characterized by The target MCA register is used to indicate that a component corresponding to the target MCA register in the server is faulty, a type of the fault of the component when the component is faulty, and an address of the component; other MCA registers connected to the CPU except the target MCA register indicate that a component corresponding to the other MCA register in the server is not faulty; the target register is selected from all MCA registers connected to the CPU in which a value of a valid bit is a preset value, comprising: sending a Mailbox 43h command to the CPU to determine an index number of an MCA register having a preset value in a valid bit of the MCA register connected to the CPU, calling a Mailbox 44h command based on the index number to obtain data stored in the MCA register having the preset value in the valid bit, and sending the data stored in the MCA register having the preset value in the valid bit to the BMC; and / or, the IPID sub-register in the target MCA register is used to indicate a component corresponding to the target MCA register, and the component includes the CPU and a memory associated with the CPU; the STATUS sub-register in the target MCA register is used to indicate an error type of a fault of the component corresponding to the target MCA register, and the error type includes a correctable error type and an uncorrectable error type; when the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is the CPU, and the STATUS sub-register in the target MCA register indicates that the error type is the uncorrectable error type, it is determined that the CPU is faulty and the type of the fault is the uncorrectable fault type; when the IPID sub-register in the target MCA register indicates that the component corresponding to the target MCA register is the memory, and the STATUS sub-register in the target MCA register indicates that the error type is the uncorrectable error type, it is determined that the memory associated with the CPU is faulty and the type of the fault is the uncorrectable fault type; and / or, after reporting the slot information in which the CPU is located to a monitoring end or reporting the identification information of the target memory to the monitoring end, the method further includes: based on the obtained restart configuration instruction used to indicate that the server is restarted when the server has the uncorrectable fault type, controlling the server to restart; and / or, the interrupt signal is a signal generated when the CPU determines that a BIOS in the server is faulty.

9. An electronic device, comprising: The electronic device includes: a processor; and a memory having computer program instructions stored therein, the computer program instructions, when executed by the processor, causing the processor to perform the steps in any one of the methods of claims 1 to 6.

10. A storage medium, characterized by The storage medium has computer program instructions stored thereon, the computer program instructions, when executed by a processor, causing the processor to perform the steps in any one of the methods of claims 1 to 6.

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