Display panel

Abstract

An embodiment of the present application discloses a display panel, which increases the light transmittance of the area near the second side edge by reducing the risk of liquid crystal in the area near the second side edge being disturbed by the vertical electric field formed by the common electrode and the pixel electrode, and reduces the risk of deviation in liquid crystal deflection. In addition, since the first opening exceeds the second side edge, the light loss in the area near the second side edge is reduced, further increasing the light transmittance of the area near the second side edge. Secondly, only the size of the first opening is improved to achieve the effect of increasing the light transmittance, thereby saving the cost of improvement.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel. Background Art

[0002] In existing liquid crystal display panels, in order to pursue high resolution, the pixel electrodes are usually reduced in size, but such a design will result in low light transmittance of the panel.

[0003] The current methods to solve the low light transmittance of the panel include increasing the aperture ratio, improving the efficiency of the liquid crystal, and selecting high-transmittance polarizers and backlight optical films, but the above methods will increase costs. Summary of the Invention

[0004] The embodiments of the present application provide a display panel that can improve the light transmittance of the panel while reducing the cost of improvement.

[0005] An embodiment of the present application provides a display panel, comprising:

[0006] An array substrate comprising scan lines, data lines, a common electrode, and a pixel electrode, wherein the common electrode and the pixel electrode are arranged in different layers, the scan lines and the data lines intersect to form a plurality of pixel regions, the pixel electrodes are arranged in the pixel regions, and the common electrode is provided with at least one first opening corresponding to the pixel region;

[0007] an opposite substrate disposed opposite to the array substrate, the opposite substrate including a black matrix layer, the black matrix layer being provided with a plurality of second openings corresponding to the pixel electrodes; and

[0008] a liquid crystal layer, disposed between the array substrate and the counter substrate;

[0009] In which, the pixel electrode includes a first portion and a second portion, the first portion is connected to a side of the second portion close to the scan line; in a planar view of the display panel, the first portion is arranged to overlap with the common electrode, the second portion is at least located within the first opening, the opening area of ​​the first opening and the opening area of ​​the second opening partially overlap, a part of the second portion is arranged within the second opening, the first opening has a first side edge on a side close to the scan line, the second opening has a second side edge on a side close to the scan line, the first side edge is located on a side of the second side edge close to the scan line, and the distance from the first side edge to the second side edge is greater than 0 microns.

[0010] Optionally, in some embodiments of the present application, the distance from the first side to the second side is between 0.5 microns and 0.9 microns.

[0011] Optionally, in some embodiments of the present application, in a pixel area, two first openings are arranged along a first direction, the first direction is parallel to the extension direction of the scanning line, the opening areas of the two first openings partially overlap with the opening area of ​​the same second opening, and the distance from the first side edges of the two first openings to the second side edges of the same second opening is greater than 0 microns and less than or equal to 0.8 microns.

[0012] Optionally, in some embodiments of the present application, in a pixel area, one of the two first openings has a third side on a side close to one of the data lines, the second portion has a first side edge adjacent to the third side, the first side edge is located on a side of the third side close to the other first opening, and the distance from the first side edge to the third side is greater than 0 microns.

[0013] Optionally, in some embodiments of the present application, the distance from the first side edge to the third side edge is between 0.2 microns and 0.6 microns.

[0014] Optionally, in some embodiments of the present application, in a pixel area, the other of the two first openings has a fourth side on a side close to the other data line, the second portion has a second side edge adjacent to the fourth side, the second side edge is located on a side of the fourth side close to the other first opening, and the distance from the second side edge to the fourth side is greater than 0 microns and less than or equal to 0.8 microns.

[0015] Optionally, in some embodiments of the present application, the distance from the first side edge to the third side edge is equal to the distance from the second side edge to the fourth side edge.

[0016] Optionally, in some embodiments of the present application, the common electrode further includes a branch electrode extending along a second direction, the second direction being parallel to the extension direction of the data line, and in one of the pixel areas, the branch electrode is arranged between two of the first openings, and the second portion extends along the second direction and is arranged to overlap with a portion of the branch electrode.

[0017] Optionally, in some embodiments of the present application, in the first direction, the first portion has a first width, the second portion has a second width, and the first width is greater than the second width.

[0018] Optionally, in some embodiments of the present application, the second portion is connected to the first portion, and a portion extending beyond the first opening is overlapped with the common electrode.

[0019] The display panel of the embodiment of the present application increases the light transmittance of the area near the second side edge by making the distance from the first side edge of the first opening of the common electrode to the second side edge of the second opening of the black matrix layer greater than 0 microns, that is, stretching the first opening toward the side close to the scanning line to exceed the second side edge of the second opening, so as to reduce the risk of liquid crystal in the area near the second side edge being disturbed by the vertical electric field formed by the common electrode and the pixel electrode, and reduce the risk of deviation of liquid crystal deflection; in addition, since the first opening exceeds the second side edge, the light loss in the area near the second side edge is reduced, further improving the light transmittance of the area near the second side edge; secondly, only the size of the first opening is improved to achieve the effect of improving the light transmittance, saving the improvement cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a partial plan view of a liquid crystal display panel;

[0021] Figure 2 corresponds to Figure 1 Schematic diagram of light transmission of a liquid crystal display panel;

[0022] Figure 3 is a planar schematic diagram of a display panel provided in an embodiment of the present application;

[0023] Figure 4 is a schematic cross-sectional structural diagram of a display panel provided in an embodiment of the present application;

[0024] Figure 5 yes Figure 3 Enlarged view of part A;

[0025] Figure 6 yes Figure 5 Enlarged view of the R part;

[0026] Figure 7 corresponds to Figure 5 A light transmission schematic diagram of a display panel;

[0027] Figure 8 is a planar schematic diagram of a pixel electrode of a display panel provided in an embodiment of the present application;

[0028] Figure 9 is a planar schematic diagram of a black matrix layer of a display panel provided in an embodiment of the present application;

[0029] Figure 10 3 is a plan view of a common electrode of a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application. In addition, it should be understood that the specific embodiments described here are only used to illustrate and explain the present application and are not used to limit the present application. In this application, the various embodiments can be combined with each other but will not be repeated one by one. In addition, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the drawings; while "inner" and "outer" refer to the outline of the device; the terms "first", "second", "third", etc. are used only as labels and do not impose numerical requirements or establish an order.

[0031] For related products, please refer to Figure 1 The liquid crystal display panel includes an array substrate, liquid crystal, and a color filter substrate. The color filter substrate includes a black matrix layer hs having multiple openings kk. The array substrate includes a common electrode com and a pixel electrode pix. Portions of the pixel electrode pix and the common electrode com correspond to the openings kk. A hollow opening lk corresponding to the opening kk is formed on the common electrode com. The pixel electrode pix is ​​a straight strip and covers the hollow opening lk. The edge region of the pixel electrode pix overlaps with the common electrode com. In the longitudinal direction y of the opening kk, the side edge cb of the hollow opening lk, which is perpendicular to the longitudinal direction y, overlaps with the side edge of the opening kk.

[0032] It should be understood that since the edge area of ​​the pixel electrode pix overlaps with the common electrode com, when the panel is lit, the vertical electric field generated in the overlapping area causes interference with the lateral driving electric field, causing the liquid crystal deflection near the overlapping area to deviate, thereby appearing a dark axis near the overlapping area in the opening kk (such as Figure 2 ), which reduces the light penetration rate.

[0033] The display panel of the embodiment of the present application is achieved by making the distance from the first side of the first opening of the common electrode to the second side of the second opening of the black matrix layer greater than 0 microns, that is, stretching the first opening toward the side close to the scanning line to exceed the second side of the second opening, so as to reduce the risk of liquid crystal in the area near the second side being disturbed by the vertical electric field formed by the common electrode and the pixel electrode, reduce the risk of deviation of liquid crystal deflection, reduce the dark axis, and thus improve the light transmittance of the area near the second side; in addition, since the first opening exceeds the second side, the light loss in the area near the second side is reduced, further improving the light transmittance of the area near the second side; secondly, only the size of the first opening is improved to achieve the effect of improving the light transmittance, saving the improvement cost.

[0034] The present application provides a display panel, which is described in detail below. It should be noted that the order of description of the following embodiments does not limit the preferred order of the embodiments.

[0035] exist Figure 3 and Figure 4 In the embodiment, the first direction F1 may be a direction parallel to one side of the display panel 100 in a plan view, and may be, for example, a transverse direction of the display panel 100. The second direction F2 may be a direction parallel to the other side of the display panel 100 in a plan view, and may be a longitudinal direction of the display panel 100. The third direction F3 may be a thickness direction of the display panel 100. That is, the first direction F1 is perpendicular to the second direction F2, but the present invention is not limited thereto. For example, the first direction F1 may intersect the second direction F2 at a non-perpendicular angle.

[0036] Please refer to Figure 3 and Figure 4 The embodiment of the present application provides a display panel 100, which includes an array substrate 10, an opposing substrate 20, and a liquid crystal layer 30. The opposing substrate 20 is disposed opposite to the array substrate 10, and the liquid crystal layer 30 is disposed between the array substrate 10 and the opposing substrate 20.

[0037] The array substrate 10 includes a thin film transistor TFT, a scan line scan, and a data line data. The gate of the thin film transistor TFT is connected to the scan line scan, and the source or drain of the thin film transistor TFT is connected to the data line data.

[0038] The thin film transistor (TFT) may be a top gate type, but is not limited thereto, and may be a bottom gate type, a double gate type, or a vertical channel type thin film transistor. The scan line (scan) and the data line (data) are arranged in different layers with an insulating layer between them.

[0039] Optionally, the array substrate 10 further includes a light shielding layer Ls, which is disposed on the side of the thin-film transistor TFT near the substrate CD. The light shielding layer Ls shields the thin-film transistor TFT. A first insulating layer jy1 is provided between the light shielding layer Ls and the active layer AD of the thin-film transistor TFT. The scan line scan is disposed on the same layer as the gate electrode g of the thin-film transistor TFT, and the data line data is disposed on the same layer as the source electrode s and drain electrode d of the thin-film transistor data.

[0040] Alternatively, the scan line scan, the data line data, the gate electrode g, and the source / drain electrodes s / d may be formed using a metal element selected from chromium, copper, aluminum, gold, silver, zinc, molybdenum, tantalum, titanium, tungsten, manganese, nickel, iron, neodymium, and cobalt, an alloy containing any of the foregoing metal elements, or an alloy combining any of the foregoing metal elements. Furthermore, the gate electrode g, the source / drain electrodes s / d, the scan line scan, and the data line data may have a single-layer structure or a stacked structure of two or more layers.

[0041] The active layer ad may be a silicon-based semiconductor or a metal oxide semiconductor, but is not limited thereto.

[0042] Optionally, the array substrate 10 further includes a common electrode 11 and a pixel electrode 12. The common electrode 11 is connected to a common voltage, and the pixel electrode 12 is connected to a data voltage provided by a data line data. A voltage difference is formed between the common electrode and the data voltage to generate a lateral electric field to drive the liquid crystal to deflect, thereby realizing the display function.

[0043] Optionally, the common electrode 11 and the pixel electrode 12 are arranged in different layers. The common electrode 11 can be arranged on the side of the pixel electrode 12 close to the liquid crystal layer 30 , but is not limited thereto. For example, the common electrode 11 can also be arranged on the side of the pixel electrode 12 away from the liquid crystal layer 30 .

[0044] Optionally, the common electrode 11 and the pixel electrode 12 are both transparent conductive layers, and their materials may be oxides such as indium tin oxide and indium zinc oxide.

[0045] A planar layer pt is disposed between the pixel electrode 12 and the source / drain electrodes s / d, and a second insulating layer jy2 ​​is disposed between the pixel electrode 12 and the common electrode 11 .

[0046] The counter substrate 20 includes a base jd, a color filter layer cf, and a black matrix layer bm. The black matrix layer bm is disposed on a side of the base jd close to the liquid crystal layer 30. The black matrix layer bm has a plurality of second openings k2. The color filter layer cf is disposed within the second openings k2.

[0047] The color filter layer cf includes a red filter block, a green filter block, and a blue filter block. Each filter block is disposed within a second opening k2 to form a subpixel. The red filter block corresponds to a red subpixel, the green filter block corresponds to a green subpixel, and the blue filter block corresponds to a blue subpixel.

[0048] It should be noted that, in some embodiments, the color filter layer cf may also be formed in the array substrate 10 , which will not be described in detail here.

[0049] The material of the black matrix layer bm can be a metal oxide material, such as CrO x 、MoO x , MnO2, etc., or it can be an organic black resin material, such as black polystyrene, black photoresist, etc.

[0050] exist Figure 3 、 Figure 5 In the embodiment, the scan lines scan extend in a direction parallel to the first direction F1 and are arranged along the second direction F2. The data lines data extend in a direction parallel to the second direction F2 and are arranged along the first direction F1. The plurality of scan lines scan and the plurality of data lines data intersect to form a plurality of pixel regions xs.

[0051] The second opening k2 corresponds to the pixel region xs. The pixel electrode 12 is disposed in the pixel region xs. The common electrode 11 is provided with at least one first opening k1 corresponding to the pixel region xs.

[0052] The pixel electrode 12 includes a first portion 121 and a second portion 122. The first portion 121 is connected to the side of the second portion 122 that is closest to the scan line scan. In a plan view of the display panel 100, the first portion 121 overlaps with the common electrode 11, and the second portion 122 is at least located within the first opening k1. The opening area of ​​the first opening k1 partially overlaps the opening area of ​​the second opening k2. A portion of the second portion 122 is located within the second opening k2.

[0053] Combine Figure 5 and Figure 6 The first opening k1 has a first side c1 on the side close to the scan line scan, and the second opening k2 has a second side c2 on the side close to the scan line scan. The first side c1 is located on the side of the second side c2 close to the scan line scan, and the distance D1 from the first side c1 to the second side c2 is greater than 0 microns.

[0054] The display panel 100 of the embodiment of the present application is configured such that the distance D1 from the first side c1 of the first opening k1 of the common electrode 11 to the second side c2 of the second opening k2 of the black matrix layer bm is greater than 0 micrometers. Figure 1, the first opening k1 is stretched toward the side close to the scan line scan to exceed the second side c2 of the second opening k2, so as to reduce the risk of the liquid crystal in the area near the second side c2 being disturbed by the vertical electric field formed by the common electrode 11 and the pixel electrode 12, reduce the risk of deviation of the liquid crystal deflection, reduce the dark axis, and thus improve the light transmittance in the area near the second side c2; in addition, since the first opening k1 exceeds the second side c2, the light loss in the area near the second side c2 is reduced, further improving the light transmittance in the area near the second side c2; secondly, only the size of the first opening k1 is improved to achieve the effect of improving the light transmittance, saving the improvement cost.

[0055] It should be noted that, in a pixel region xs, the embodiment of the present application is described by taking the number of the first openings k1 as 2 as an example, but is not limited thereto. For example, the number of the first openings k1 may be 1, or may be greater than 2, such as 3.

[0056] In some embodiments of the present application, in a pixel region xs, two first openings k1 are arranged along a first direction F1, which is parallel to the extension direction of the scan line scan. The opening areas of the two first openings k1 partially overlap with the opening area of ​​the same second opening k2. The distance from the first side c1 of the two first openings k1 to the second side of the same second opening k2 is greater than 0 micrometers.

[0057] The distances from the first side edges c1 of the two first openings k1 to the second side edges of the same second opening k2 are equal, but the present invention is not limited thereto. For example, the distances may be unequal.

[0058] Optionally, the distance D1 from the first side c1 to the second side c2 can be 0.1 micron, 0.2 micron, 0.3 micron, 0.4 micron, 0.5 micron, 0.6 micron, 0.7 micron, 0.8 micron, 0.9 micron, 1.0 micron, 1.1 micron, 1.2 micron, 1.3 micron, 1.4 micron, 1.5 micron, 1.6 micron, 1.7 micron, 1.8 micron, 1.9 micron, 2.0 micron, 2.1 micron, 2.2 micron, 2.3 micron, 2.4 micron, 2.5 micron, 2.6 micron, 2.7 micron, 2.8 micron, 2.9 micron, 3.0 micron or 3.1 micron.

[0059] It can be understood that the distance D1 from the first side c1 to the second side c2 is greater than 0 microns. The larger the distance D1, the larger the opening area of ​​the first opening k1, the smaller the overlapping area of ​​the common electrode 11 and the pixel electrode 12, the smaller the storage capacitance of the common electrode 11 and the pixel electrode 12, and the higher the transmittance of the area near the second side c2.

[0060] Optionally, in some embodiments of the present application, the distance D1 from the first side c1 to the second side c2 is between 0.5 micrometers and 0.9 micrometers. For example, the distance D1 from the first side c1 to the second side c2 can be 0.5 micrometers, 0.6 micrometers, 0.7 micrometers, 0.8 micrometers, or 0.9 micrometers.

[0061] It should be noted that the distance D1 from the first side c1 to the second side c2 is selected to be between 0.5 μm and 0.9 μm based on the storage capacitance requirements of the common electrode 11 and the pixel electrode 12. At the same time, the dark axis can be largely eliminated and the transmittance can be improved.

[0062] Moreover, the distance D1 from the first side c1 to the second side c2 is from 0.5 microns to 0.7 microns, and the corresponding transmittance increases according to a first linear relationship; the distance D1 from the first side c1 to the second side c2 is from 0.7 microns to 0.9 microns, and the corresponding transmittance increases according to a second linear relationship; wherein the slope of the first linear relationship is greater than the slope of the second linear relationship, that is, the growth rate of the second linear relationship is less than the growth rate of the first linear relationship, so considering the optimal relationship between transmittance and storage capacitance, the distance D1 from the first side c1 to the second side c2 is 0.7 microns, and the dark axis disappears (such as Figure 7 as shown), and retain a large storage capacitor.

[0063] Optionally, in some embodiments of the present application, in a pixel region xs, one of the two first openings k1 has a third side c3 on a side close to a data line data, the second portion 122 has a first side edge p1 adjacent to the third side c3, the first side edge p1 is located on a side of the third side c3 close to the other first opening k1, and a distance D2 from the first side edge p1 to the third side c3 is greater than 0 microns and less than or equal to 0.8 microns.

[0064] It should be noted that the positional relationship between the third side edge c3 and the first side edge p1 is related to the grayscale fluctuation of the image. The smaller the grayscale fluctuation, the better the grayscale transition uniformity. Specifically, compared to the overlap of the side region of the pixel electrode 12 and the common electrode 11, or the coincidence of the first side edge p1 of the pixel electrode 12 and the third side edge c3 of the first opening k1; the overlap of the side region of the pixel electrode 12 and the common electrode 11 generates a vertical electric field in the overlapping region, which interferes with the lateral electric field; and the overlap of the first side edge p1 of the pixel electrode 12 and the third side edge c3 of the first opening k1. This overlapping region is affected by both the vertical electric field and the stronger lateral electric field, both of which can cause deflection errors in the liquid crystal, thereby affecting the grayscale transition uniformity.

[0065] In addition, the distance D2 from the first side edge p1 to the third side edge c3 should not be too large. Therefore, the larger the distance D2, the weaker the lateral electric field between the two, and the weaker the ability to drive the liquid crystal deflection. When the lateral electric field is weak to a certain extent, the uniformity of the grayscale transition will be worse.

[0066] Therefore, in the embodiment of the present application, the first side edge p1 is retracted within 0.8 micrometers, thereby avoiding interference from the vertical electric field and ensuring the driving strength of the lateral electric field, thereby improving the uniformity of the grayscale transition of the display panel.

[0067] In some embodiments of the present application, the distance D2 from the first side edge p1 to the third side edge c3 is between 0.2 micrometers and 0.6 micrometers to improve the uniformity of grayscale transitions. For example, the distance D2 from the first side edge p1 to the third side edge c3 can be 0.2 micrometers, 0.3 micrometers, 0.4 micrometers, 0.5 micrometers, or 0.6 micrometers.

[0068] In some embodiments of the present application, in a pixel region xs, the other of the two first openings k1 has a fourth side c4 on a side close to the other data line data, the second portion 122 has a second side edge p2 adjacent to the fourth side c4, the second side edge p2 is located on a side of the fourth side c4 close to the other first opening k1, and a distance D3 from the second side edge p2 to the fourth side c4 is greater than 0 micrometers and less than or equal to 0.8 micrometers.

[0069] It should be noted that both side edges of the second portion 122 are retracted within 0.8 micrometers, which further improves the uniformity of grayscale transition.

[0070] Optionally, the distance D3 from the second side edge p2 to the fourth side edge c4 is between 0.2 μm and 0.6 μm to improve the uniformity of grayscale transition. For example, the distance D3 from the second side edge p2 to the fourth side edge c4 can be 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm or 0.6 μm.

[0071] Optionally, in some embodiments of the present application, the distance D2 from the first side edge p1 to the third side edge c3 is equal to the distance D3 from the second side edge p2 to the fourth side edge c4, further improving the uniformity of grayscale transitions. Of course, in some embodiments, the distance D2 and the distance D3 may also be different and can be adjusted according to actual conditions, which will not be further described here.

[0072] Optionally, in some embodiments of the present application, the common electrode 11 further includes a branch electrode 111 extending along a second direction F2. The second direction F2 is parallel to the extension direction of the data line data. In a pixel region xs, the branch electrode 111 is disposed between two first openings k1, and the second portion 122 extends along the second direction F2 and partially overlaps with the branch electrode 111.

[0073] The second portion 122 of the pixel electrode 12 and the branch electrode 111 partially overlap, so as to increase the storage capacitance of the common electrode 11 and the pixel electrode 12 .

[0074] Optional, please combine Figure 8 and Figure 5 In some embodiments of the present application, in the first direction F1, the first portion 121 has a first width h1, the second portion 122 has a second width h2, and the first width h1 is greater than the second width h2.

[0075] It is understandable that the first portion 121 is designed to be wider to increase the overlapping area between the pixel electrode 12 and the common electrode 11 , thereby increasing the storage capacitance to meet the storage capacitance requirement without affecting the light transmittance.

[0076] Optionally, in some embodiments of the present application, the second portion 122 is connected to the first portion 121 , and a portion extending beyond the first opening k1 is overlapped with the common electrode 11 .

[0077] It can be understood that compared with using the first part 121 to overlap with the common electrode, using the second part 122 to overlap with the side of the common electrode 11 close to the first opening k1 reduces the overlapping area, which can further reduce the impact of the vertical electric field on the area near the second side c2 and improve light transmittance.

[0078] Optional, please combine Figure 9 and Figure 5 In some embodiments, the black matrix layer bm further includes a shielding portion zd that covers a portion of the first opening k1. The shielding portion zd is used to shield spacers, which are disposed between the array substrate 10 and the counter substrate 20 to support the array substrate 10 and the counter substrate 20.

[0079] In some embodiments, the black matrix layer bm further includes a first light shielding portion b1 and a second light shielding portion b2. The first light shielding portion b1 extends along a first direction F1, and the second light shielding portion b2 extends along a second direction F2. The first light shielding portion b1 and the second light shielding portion b2 are intersectingly connected. The shielding portion zd is located at the intersection of the first light shielding portion b1 and the second light shielding portion b2.

[0080] Please combine Figure 10 and Figure 5 The common electrode 11 includes a first electrode portion 112 and a second electrode portion 113. The first electrode portion 112 extends along a first direction F1, and the second electrode portion 113 extends along a second direction F2. The first electrode portion 112 and the second electrode portion 113 are cross-connected. The opposite ends of the branch electrodes 111 are both connected to the first electrode portion 112.

[0081] The first light shielding portion b1 shields and covers the scan line scan and the first electrode portion 112. The second light shielding portion b2 shields and covers a portion of the second electrode portion 113 and the data line data.

[0082] The display panel of the embodiment of the present application increases the light transmittance of the area near the second side edge by making the distance from the first side edge of the first opening of the common electrode to the second side edge of the second opening of the black matrix layer greater than 0 microns, that is, stretching the first opening toward the side close to the scanning line to exceed the second side edge of the second opening, so as to reduce the risk of liquid crystal in the area near the second side edge being disturbed by the vertical electric field formed by the common electrode and the pixel electrode, and reduce the risk of deviation of liquid crystal deflection; in addition, since the first opening exceeds the second side edge, the light loss in the area near the second side edge is reduced, further improving the light transmittance of the area near the second side edge; secondly, only the size of the first opening is improved to achieve the effect of improving the light transmittance, saving the improvement cost.

[0083] The above is a detailed introduction to a display panel provided in an embodiment of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for those skilled in the art, based on the ideas of the present application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A display panel, characterized in that: include: An array substrate comprising scan lines, data lines, a common electrode, and a pixel electrode, wherein the common electrode and the pixel electrode are arranged in different layers, the scan lines and the data lines intersect to form a plurality of pixel regions, the pixel electrodes are arranged in the pixel regions, and the common electrode is provided with at least one first opening corresponding to the pixel region; an opposite substrate disposed opposite to the array substrate, the opposite substrate comprising a black matrix layer, the black matrix layer being provided with a plurality of second openings corresponding to the pixel electrodes; as well as a liquid crystal layer, disposed between the array substrate and the counter substrate; The pixel electrode includes a first portion and a second portion, the first portion being connected to a side of the second portion close to the scan line; in a plan view of the display panel, the first portion is overlapped with the common electrode, the second portion is at least located within the first opening, an opening area of ​​the first opening and an opening area of ​​the second opening partially overlap, a portion of the second portion is located within the second opening, the first opening has a first side edge on a side close to the scan line, the second opening has a second side edge on a side close to the scan line, the first side edge is located on a side of the second side edge close to the scan line, and a distance between the first side edge and the second side edge is greater than 0 micrometers; In one pixel region, two first openings are arranged along a first direction parallel to an extension direction of the scan line, opening areas of the two first openings partially overlap with an opening area of ​​the same second opening, and distances from first sides of the two first openings to a second side of the same second opening are both greater than 0 micrometers; In one of the pixel areas, one of the two first openings has a third side on a side close to one of the data lines, the second portion has a first side edge adjacent to the third side, the first side edge is located on a side of the third side close to the other first opening, and the distance from the first side edge to the third side is greater than 0 microns and less than or equal to 0.8 microns.

2. The display panel according to claim 1, wherein: A distance from the first side to the second side is between 0.5 micrometers and 0.9 micrometers.

3. The display panel according to claim 1, wherein: A distance from the first side edge to the third side edge is between 0.2 micrometers and 0.6 micrometers.

4. The display panel according to claim 3, wherein: In one of the pixel areas, the other of the two first openings has a fourth side on a side close to the other data line, the second portion has a second side edge adjacent to the fourth side, the second side edge is located on a side of the fourth side close to the other first opening, and the distance from the second side edge to the fourth side is greater than 0 microns and less than or equal to 0.8 microns.

5. The display panel according to claim 4, wherein: A distance from the first side edge to the third side edge is equal to a distance from the second side edge to the fourth side edge.

6. The display panel according to claim 1, wherein: The common electrode further includes a branch electrode extending along a second direction, wherein the second direction is parallel to an extension direction of the data line. In one pixel area, the branch electrode is disposed between two first openings, and the second portion extends along the second direction and partially overlaps with the branch electrode.

7. The display panel according to claim 6, wherein: In the first direction, the first portion has a first width, the second portion has a second width, and the first width is greater than the second width.

8. The display panel according to claim 7, wherein: The second portion is connected to the first portion, and a portion exceeding the first opening is overlapped with the common electrode.

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