A method for preparing a metal oxide thin film transistor device and a device

Abstract

The present invention provides a method for preparing a metal oxide thin film transistor device and a device, which includes: S1, forming a gate structure and a metal oxide thin film on an insulating substrate; S2, setting a source electrode, a gate electrode and a drain electrode, forming a source region and a drain region on the metal oxide thin film respectively, the source region and the drain region are between the channel region, and a plurality of stoppers are arranged above the channel region and arranged at intervals along the carrier movement path; S3, preparing a plurality of alternatingly arranged main parts and defective parts in the channel region through the stoppers, wherein the defect concentration of the defective part is higher than the defect concentration of the main part. Compared with conventional semiconductor devices at this stage, the present application not only has the advantages of low off-state leakage current and small subthreshold swing of metal oxide semiconductor devices, but also has conductive properties comparable to those of polysilicon thin film transistors, and thus has a wide range of application prospects in this industry.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a preparation method and a device of a metal oxide thin film transistor device. Background Art

[0002] Metal oxide semiconductors represented by amorphous indium gallium zinc oxide (a-IGZO) have the advantages of large bandgap, transparency in the visible light range, and good uniformity over a large area. The thin film transistors prepared using such substrates have low off-state leakage current and small subthreshold swing, which has broad application prospects in active matrix liquid crystal displays, active matrix light-emitting diode displays, and dynamic random access memories. However, the carrier mobility of metal oxide thin film transistors is generally low (a measure of the conductivity of semiconductor materials), and the driving current still has a lot of room for improvement compared to polycrystalline silicon thin film transistors. Taking amorphous indium gallium zinc oxide thin film transistors as an example, their electron mobility is generally around 10cm 2 / Vs, while conventional polysilicon thin film transistors can reach 100cm 2 / Vs. Therefore, metal oxide semiconductor materials can only be used in application scenarios with low requirements for current driving capability.

[0003] At present, small-size active matrix light-emitting diode displays in smart watches and smart phones have begun to use low-temperature polycrystalline oxide (LTPO) thin-film transistor technology based on two thin-film transistor technologies: high-mobility polycrystalline silicon thin-film transistors and low-off-current amorphous indium gallium zinc oxide thin-film transistors. However, this technology is more complex and has a higher manufacturing cost than single polycrystalline silicon thin-film transistor technology or amorphous indium gallium zinc oxide thin-film transistor technology. Therefore, if the current driving capability of metal oxide thin-film transistors can be further improved, metal oxide thin-film transistors will have a broader application market in the field of flat-panel displays.

[0004] In traditional processes, in order to increase the driving current of metal oxide thin film transistors, there are several preparation schemes for thin film transistors:

[0005] Method 1: Using a double active layer heterostructure, that is, depositing two different materials to form the active layer of the thin film transistor. This method usually requires sputtering to deposit a layer of ITO (indium tin oxide) with a high carrier concentration, and the active layer is thin enough to be completely depleted. If the ITO layer is too thick, it cannot be completely depleted and the device cannot be turned off. If the ITO layer is too thin, it is difficult to accurately deposit it in large-scale mass production processes due to the uniformity of the deposition process.

[0006] Method 2: Using a dual-gate structure, that is, making a top gate on the basis of the traditional gate structure metal oxide thin film transistor. Due to the introduction of an additional top gate and a top gate insulating layer, the device preparation process parameters and process conditions need to be specially optimized, which increases the complexity and difficulty of the process. At the same time, in order to achieve the improvement of carrier mobility, the thickness of a-IGZO must also be controlled to be very thin (usually a few nanometers thick). It is difficult to achieve uniform deposition of such a thin a-IGZO in a large-area manufacturing process.

[0007] Method three: Increasing carrier mobility by doping metal oxides with nitrogen. In the technology of increasing carrier mobility by doping a-IGZO with nitrogen, the device characteristics are closely related to the flow ratio of nitrogen. Due to the multiple functions of nitrogen in a-IGZO, the effects of nitrogen doping in existing reference technologies are not uniform. Excessive nitrogen doping during the sputtering process will introduce nitrogen-related defects in a-IGZO, thereby deteriorating the electrical properties of a-IGZO thin-film transistors.

[0008] Therefore, the prior art does not have a simple and stable solution to the problem of limited electron mobility and driving current of metal oxide thin film transistor devices. Summary of the invention

[0009] Therefore, the technical problem to be solved by the present invention is to overcome the problems of limited electron mobility and driving current of metal oxide thin film transistor devices in the prior art, and to provide a preparation method and device of a metal oxide thin film transistor device.

[0010] In order to solve the above technical problems, the present invention provides a method for preparing a metal oxide thin film transistor device, which comprises the following steps: step S1, forming a gate structure and the metal oxide thin film on an insulating substrate; step S2, arranging a source electrode, a gate electrode and a drain electrode on the insulating substrate, wherein the gate electrode is connected to the gate structure, and the source electrode and the drain electrode are respectively connected to the metal oxide thin film to form a source region and a drain region on the metal oxide thin film, respectively, and on the metal oxide thin film, a channel region is formed between the source region and the drain region, and a plurality of stoppers are arranged on a side of the channel region away from the insulating substrate, and a plurality of stoppers are arranged along a carrier movement path. The metal oxide film is arranged in a radially spaced relationship, wherein a passivation layer is arranged above the metal oxide film, the passivation layer covers the metal oxide film and is connected to the source, the gate and the drain, and a plurality of stoppers are arranged on the metal oxide film and the passivation layer, or a barrier layer is arranged above the metal oxide film, the barrier layer is connected to the channel region, and a plurality of stoppers are arranged on the metal oxide film and the barrier layer; step S3, preparing a plurality of alternatingly arranged main parts and defect parts in the channel region by means of the stoppers, wherein the defect part is formed by annealing, and the defect concentration of the defect part is higher than the defect concentration of the main part.

[0011] In one embodiment of the present invention, in step S1, the gate structure includes a gate body and a gate insulating layer, the gate body is connected to the insulating substrate, and the gate insulating layer covers the gate body.

[0012] In one embodiment of the present invention, in step S1, the gate body, the gate insulating layer and the metal oxide film are sequentially prepared on the insulating substrate, or the metal oxide film, the gate insulating layer and the gate body are sequentially prepared on the insulating substrate.

[0013] In one embodiment of the present invention, in step S2, a blocking layer and a passivation layer are sequentially arranged above the metal oxide film, wherein the blocking layer is connected to the channel region, the passivation layer covers the source, the gate, the drain and the metal oxide film, and a plurality of stoppers are arranged on the blocking layer and / or the passivation layer.

[0014] The barrier layer and the passivation layer substrates are respectively one or more of silicon oxide, silicon nitride, aluminum oxide, and hafnium oxide.

[0015] In one embodiment of the present invention, in step S3, the defective portion is formed by annealing.

[0016] In one embodiment of the present invention, in the carrier moving direction, the width of the stopper and the width of the defect portion are 1 to 10 μm; the stopper substrate is one or more of Mo, Al, Cu, W, Ti, and Ni.

[0017] The present invention also provides a metal oxide thin film transistor device, which is prepared by the above-mentioned method for preparing the metal oxide thin film transistor device, and comprises: an insulating substrate; a gate structure, wherein the gate structure is arranged on the insulating substrate, and the gate is connected to the gate structure; a metal oxide film, wherein the metal oxide film is placed on the insulating substrate, and the source and the drain are respectively connected to the metal oxide film, the place where the metal oxide film and the source are connected is the source region, the place where the metal oxide film and the drain are connected is the drain region, and the place between the source region and the drain region is the channel region; a plurality of stoppers, wherein the plurality of stoppers are arranged above the channel region and are arranged at intervals along the carrier movement path to divide the channel region into a plurality of alternatingly arranged main body parts and defect parts, wherein the defect concentration of the defect part is higher than the defect concentration of the main body part.

[0018] In one embodiment of the present invention, it further includes: a passivation layer, the passivation layer covers the metal oxide film and connects the source, the gate and the drain, and at least part of the stopper is disposed on the passivation layer.

[0019] In one embodiment of the present invention, it further includes: a blocking layer, wherein the blocking layer is connected to the channel region, and at least a portion of the stopper is disposed on the blocking layer.

[0020] The above technical solution of the present invention has the following advantages compared with the prior art:

[0021] The preparation method and device of the metal oxide thin film transistor device of the present invention prepare a plurality of defect portions arranged at intervals on the metal oxide film, so that carriers can flow through regions with different defect concentrations during their movement, thereby obtaining a metal oxide thin film transistor device with a high driving current. In actual use, compared with conventional semiconductor devices at this stage, the present application not only has the advantages of low off-state leakage current and small subthreshold swing of metal oxide semiconductor devices, but also has conductive properties comparable to those of polysilicon thin film transistors, and thus has a wide range of application prospects in the industry. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to make the contents of the present invention more clearly understood, the present invention is further described in detail below based on specific embodiments of the present invention in conjunction with the accompanying drawings.

[0023] Figure 1is a partial preparation flow chart of a metal oxide thin film transistor device in a preferred embodiment of the present invention;

[0024] Figure 2 is a partial preparation flow chart of a metal oxide thin film transistor device in another embodiment of the present invention;

[0025] Figure 3 is a partial preparation flow chart of a metal oxide thin film transistor device in another embodiment of the present invention;

[0026] Figure 4 1 is an output characteristic curve diagram of the metal oxide thin film transistor device prepared in Example 1 and a conventional metal oxide thin film transistor device in the prior art.

[0027] Explanation of the reference numerals in the specification: 100, insulating substrate; 200, gate structure; 210, gate body; 220, gate insulating layer; 300, metal oxide film; 310, source region; 320, drain region; 330, channel region; 331, body portion; 332, defect portion; 400, source electrode; 500, drain electrode; 600, gate electrode; 700, stopper; 800, passivation layer; 900, blocking layer. DETAILED DESCRIPTION

[0028] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention.

[0029] Embodiment 1

[0030] This embodiment provides a method for preparing a metal oxide thin film transistor device, which is used to prepare a metal oxide thin film transistor device with high conductivity. Figure 1 As shown, it specifically includes the following steps:

[0031] Step S1: forming the gate structure 200 and the metal oxide film 300 on the insulating substrate 100; specifically, see Figure 1 As shown, in this embodiment, the gate body 210 , the gate insulating layer 220 and the metal oxide film 300 are sequentially prepared on the insulating substrate 100 , so that the gate structure 200 is disposed between the insulating substrate 100 and the metal oxide film 300 .

[0032] Furthermore, the gate structure 200 in this embodiment includes a gate body 210 and a gate insulating layer 220, wherein the gate body 210 is connected to the insulating substrate 100, and the gate insulating layer 220 covers the gate body 210, wherein the gate body 210 is used to form a gate 600 electrode in a later stage, and the voltage on the gate body 210 determines the charge carrier concentration in the channel region, thereby controlling the switching state of the transistor; the gate insulating layer 220 is located between the gate body 210 and the channel region, and is used to isolate the gate body 210 from the channel region to prevent charges from being directly transferred from the gate body 210 to the channel region.

[0033] Furthermore, the metal oxide film 300 in this embodiment can be set to at least one of zinc oxide, indium tin oxide, indium gallium oxide, indium gallium zinc oxide, aluminum indium tin zinc oxide. The gate insulating layer 220 can be set to at least one of silicon dioxide, silicon nitride, and hafnium dioxide.

[0034] Step S2, setting a source 400, a gate 600 and a drain 500 on the insulating substrate 100, wherein the gate 600 is connected to the gate body 210, and the source 400 and the drain 500 are respectively connected to the metal oxide film 300, so as to form a source region 310 and a drain region 320 on the metal oxide film 300, respectively, and on the metal oxide film 300, a channel region 330 is formed between the source region 310 and the drain region 320, and a plurality of stoppers 700 are arranged on a side of the channel region 330 away from the insulating substrate 100, and are arranged at intervals along the carrier movement path; specifically, in this embodiment, the stopper 700 is preferably a metal stopper 700, and its base material can be at least one of Mo, Al, Cu, W, Ti, and Ni.

[0035] Furthermore, it is necessary to set a passivation layer 800 above the metal oxide film 300. The passivation layer 800 covers the metal oxide film 300 and connects the source 400, the gate 600 and the drain 500. A plurality of stoppers 700 are set on the metal oxide film 300 and / or the passivation layer 800. Specifically, the stoppers 700 in this embodiment are placed on the metal oxide film 300 and the passivation layer 800. The setting of the passivation layer 800 can protect the surface of the device and prevent it from chemically reacting with the surrounding environment (such as oxygen and moisture in the air). The passivation layer 800 is usually composed of an insulating material, such as silicon oxide SiO2, which can reduce surface defects and impurities, thereby improving the electrical performance of the device. Specifically, Figure 1 a)~ Figure 1b) shows the actual arrangement of the stopper 700 on the passivation layer 800 and the metal oxide film 300 and the defects of the metal oxide film 300 after annealing. In different embodiments, the passivation layer 800 can be set to one or more of silicon oxide, silicon nitride, aluminum oxide, and hafnium oxide.

[0036] Furthermore, in this embodiment, the setting area of ​​the stopper 700 is spaced apart from the source 400, the gate 600 and the drain 500, and in the carrier moving direction, the width of the stopper 700 and the width of the defect 332 are both 1 to 10 μm. In different embodiments, the stopper 700 can be set to different shapes and quantities, and the present invention does not specifically limit this.

[0037] Step S3 , preparing a plurality of alternatingly arranged main parts 331 and defect parts 332 in the channel region 330 by using the stopper 700 , wherein the defect concentration of the defect part 332 is higher than the defect concentration of the main part 331 . Specifically, in the present embodiment, the annealing temperature of the metal oxide film 300 is 100°C-600°C, preferably 400°C. Since the generation and annihilation of defects are originally in a state of dynamic equilibrium, during the annealing process, the source region 310 and the drain region 320 are blocked by the source 400 and the drain 500, and the annealing atmosphere they receive is relatively small. Similarly, the defect portion 332 in the channel region 330 also has a correspondingly small resistance. In the unblocked portion, oxygen particles in the annealing atmosphere can continuously enter the metal oxide film 300 during the annealing process. The defects generated at high temperature and the original defects in the film will be passivated by these oxygen particles, thereby forming a channel for the movement of carriers. Therefore, the resistance encountered by the carriers will change continuously during the movement of the carriers, thereby achieving the purpose of enhancing the current without affecting the normal function of the device.

[0038] Embodiment 2

[0039] See also Figure 2 and Figure 3 As shown, this embodiment provides another method for preparing a metal oxide thin film transistor device. In step S2 of this embodiment, a barrier layer 900 and a passivation layer 800 are sequentially arranged above the metal oxide film 300, wherein the barrier layer 900 is connected to the channel region 330, the passivation layer 800 covers the source 400, the gate 600, the drain 500 and the metal oxide film 300, and a plurality of stoppers 700 are arranged on the barrier layer 900 and / or the passivation layer 800, thereby further improving the protection performance. Specifically, Figure 2 The structure when the stoppers 700 are all disposed on the passivation layer 800 is shown. Figure 3The structure when the stopper 700 is evenly distributed on the stopper layer and the passivation layer 800 is shown.

[0040] Embodiment 3

[0041] The present embodiment provides a metal oxide thin film transistor device, which is prepared by the preparation method of the metal oxide thin film transistor device in the first embodiment, and comprises: an insulating substrate 100; a gate structure 200, wherein the gate structure 200 is arranged on the insulating substrate 100, and a gate 600 is connected to the gate structure 200; a metal oxide film 300, wherein the metal oxide film 300 is arranged on the insulating substrate 100, and a source electrode 400 and a drain electrode 500 are respectively connected to the metal oxide film 300, and the metal oxide film The junction between the metal oxide film 300 and the source electrode 400 is the source region 310, the junction between the metal oxide film 300 and the drain electrode 500 is the drain region 320, and the channel region 330 is between the source region 310 and the drain region 320; a plurality of stoppers 700, wherein the plurality of stoppers 700 are disposed above the channel region 330 and are arranged at intervals along the carrier movement path so as to divide the channel region 330 into a plurality of alternatingly arranged main body portions 331 and defect portions 332, wherein the defect concentration of the defect portion 332 is higher than the defect concentration of the main body portion 331.

[0042] In other embodiments, a passivation layer 800 may be further provided, the passivation layer 800 covers the metal oxide film 300 and is connected to the source 400, the gate 600 and the drain 500, and at least part of the stopper 700 is provided on the passivation layer 800. Furthermore, in other embodiments, a blocking layer 900 may be further provided, the blocking layer 900 is connected to the channel region 330, and at least part of the stopper 700 is provided on the blocking layer 900.

[0043] Comparative Example

[0044] Figure 4 The output characteristic curves of the metal oxide thin film transistor device and the conventional metal oxide thin film transistor device in the prior art are compared. In the preparation processes of the two thin film transistors, except for preparing the defect portion 332 on the metal oxide film 300, the other process steps are the same. Figure 4 It can be seen that under the same gate voltage conditions, the saturation current of the metal oxide thin film transistor device is much larger than that of the conventional metal oxide thin film transistor device in the prior art. When the gate voltage is 6V, 8V and 10V, the saturation current of the metal oxide thin film transistor device prepared in Example 1 is 4 to 5 times that of the conventional metal oxide thin film transistor device in the prior art. This proves that the current carrying capacity of the metal oxide thin film transistor device is significantly improved through the preparation of the defect portion 332.

[0045] In summary, the method for preparing a metal oxide thin film transistor device and the device of the present invention prepare a plurality of spaced defect portions 332 on the metal oxide film 300, so that carriers can flow through regions with different defect concentrations during their movement, thereby obtaining a metal oxide thin film transistor device with a high driving current. In actual use, compared with conventional semiconductor devices at this stage, the present application not only has the advantages of low off-state leakage current and small subthreshold swing of metal oxide semiconductor devices, but also has conductive properties comparable to those of polysilicon thin film transistors, and thus has a wide range of application prospects in the industry.

[0046] Obviously, the above embodiments are merely examples for clear explanation and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from these are still within the protection scope of the invention.

Claims

1. A method for preparing a metal oxide thin film transistor device, characterized in that: The steps include: Step S1, forming a gate structure and the metal oxide film on an insulating substrate; Step S2, arranging a source electrode, a gate electrode and a drain electrode on the insulating substrate, wherein the gate electrode is connected to the gate structure, and the source electrode and the drain electrode are respectively connected to the metal oxide film to form a source region and a drain region on the metal oxide film, respectively, and a channel region is formed between the source region and the drain region on the metal oxide film, and a plurality of stoppers are arranged on a side of the channel region away from the insulating substrate and are arranged at intervals along a carrier movement path, wherein a passivation layer is arranged above the metal oxide film, the passivation layer covers the metal oxide film and is connected to the source electrode, the gate electrode and the drain electrode, and a plurality of stoppers are arranged on the metal oxide film and on the passivation layer, or a barrier layer is arranged above the metal oxide film, the barrier layer is connected to the channel region, and a plurality of stoppers are arranged on the metal oxide film and on the barrier layer; Step S3, preparing a plurality of alternatingly arranged main parts and defect parts in the channel region by using the stopper, wherein the defect parts are formed by annealing, and the defect concentration of the defect parts is higher than the defect concentration of the main part.

2. The method for preparing a metal oxide thin film transistor device according to claim 1, characterized in that: In step S1 , the gate structure includes a gate body and a gate insulating layer, the gate body is connected to the insulating substrate, and the gate insulating layer covers the gate body.

3. The method for preparing a metal oxide thin film transistor device according to claim 1, characterized in that: In step S1, a gate body, a gate insulating layer and the metal oxide thin film are sequentially prepared on the insulating substrate, or the metal oxide thin film, the gate insulating layer and the gate body are sequentially prepared on the insulating substrate.

4. The method for preparing a metal oxide thin film transistor device according to claim 3, characterized in that: The barrier layer and the passivation layer substrates are respectively one or more of silicon oxide, silicon nitride, aluminum oxide, and hafnium oxide.

5. The method for preparing a metal oxide thin film transistor device according to claim 1, characterized in that: In the carrier movement direction, the stopper width and the defect width are 1 to 10 μm; the stopper substrate is one or more of Mo, Al, Cu, W, Ti, and Ni, and the stopper structure is a single-layer metal or a multi-layer metal stack.

6. A metal oxide thin film transistor device, characterized in that: The method for preparing a metal oxide thin film transistor device according to any one of claims 1 to 5 comprises: Insulating substrate; A gate structure, wherein the gate structure is disposed on the insulating substrate, and a gate is connected to the gate structure; A metal oxide film, wherein the metal oxide film is disposed on the insulating substrate, a source electrode and a drain electrode are respectively connected to the metal oxide film, a portion where the metal oxide film and the source electrode are connected is a source region, a portion where the metal oxide film and the drain electrode are connected is a drain region, and a channel region is between the source region and the drain region; A plurality of stoppers are disposed above the channel region and are arranged at intervals along a carrier movement path to divide the channel region into a plurality of alternating main parts and defect parts, wherein the defect concentration of the defect part is higher than the defect concentration of the main part.

7. The metal oxide thin film transistor device according to claim 6, characterized in that: It also includes a passivation layer, which covers the metal oxide film and connects the source electrode, the gate electrode and the drain electrode, and at least part of the stopper is arranged on the passivation layer.

8. The metal oxide thin film transistor device according to claim 6, characterized in that: The invention also includes a blocking layer, wherein the blocking layer is connected to the channel region, and at least a part of the stopper is arranged on the blocking layer.

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