A power supply switching circuit and board

Abstract

The present application discloses a power supply switching circuit and a board, which relate to the technical field of board power supply, and include: a control module, a first switch module, and a second switch module. When the second power supply end is powered off, the control module controls the first switch module to be turned on, so that the first power supply end supplies power to a logic controller; when the second power supply end is powered on, the second switch module is controlled to be turned on, so that the second power supply end supplies power to the logic controller, so that before the second power supply end (12 volt power supply signal) is powered on, the logic controller is powered by the first power supply end (3.3 volt power supply signal), and the logic controller is initialized in advance, which reduces the initialization time and voltage conversion time of the logic controller after the second power supply end is powered on, so that the logic controller sends a reset signal in time within the reset time after the second power supply end is powered on, thereby avoiding board reset timeout.

Description

Technical Field

[0001] The present application belongs to the technical field of board power supply, and specifically relates to a power supply switching circuit and a board. Background Art

[0002] The power supply signals provided by the motherboard to the board include the 12 volt power supply signal P12V and the 3.3 volt power supply signal P3V3_AUX. P3V3_AUX has current limitation and is not suitable for the large current required by the board. Therefore, the board is powered by P12V.

[0003] After the motherboard provides the 12 volt power supply signal to the board, the logic controller of the board needs to send a reset signal (RESET signal) to other components of the board within the reset time to reset. It should be noted that the logic controller requires a power supply voltage of 3.3 volts, so the 12 volt power supply signal needs to be converted to power the logic controller.

[0004] Since the reset signal can only be sent after the logic controller is powered on and initialized, the voltage conversion and initialization of the logic controller are time-consuming, resulting in a timeout for the logic controller to send the reset signal, causing the board to fail to reset. Summary of the invention

[0005] The present application aims to provide a power supply switching circuit and a board, which at least solves the problem in the prior art that the logic controller times out the reset signal due to the time-consuming voltage conversion and initialization of the logic controller, resulting in the failure of the board to reset.

[0006] In order to solve the above technical problems, this application is implemented as follows:

[0007] In a first aspect, an embodiment of the present application provides a power supply switching circuit, including: a control module, a first switch module, and a second switch module;

[0008] The first switch module is electrically connected to the second switch module, and the first switch module is used to be electrically connected to the first power supply end of the interface of the board and the logic controller of the board respectively;

[0009] The second switch module is used to be electrically connected to the logic controller;

[0010] The control module is electrically connected to the first switch module and the second switch module respectively. The control module is used to be electrically connected to the second power supply end of the interface. When the second power supply end is powered off, the control module controls the first switch module to be turned on so that the first power supply end supplies power to the logic controller; when the second power supply end is powered on, the control module controls the second switch module to be turned on so that the second power supply end supplies power to the logic controller;

[0011] The first power supply terminal is powered on earlier than the second power supply terminal.

[0012] In a second aspect, an embodiment of the present application further provides a board, comprising a power supply switching circuit as described in the first aspect.

[0013] In an embodiment of the present application, when the second power supply end is powered off, the control module controls the first switch module to be turned on so that the first power supply end supplies power to the logic controller; when the second power supply end is powered on, the second switch module is controlled to be turned on so that the second power supply end supplies power to the logic controller, so that before the second power supply end (12 volt power supply signal) is powered on, the logic controller is powered by the first power supply end (3.3 volt power supply signal), and the logic controller is initialized in advance, which reduces the initialization time and voltage conversion time of the logic controller after the second power supply end is powered on, so that the logic controller sends a reset signal in time within the reset time after the second power supply end is powered on, thereby avoiding board reset timeout. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is a structural schematic diagram of a power supply switching circuit provided in an embodiment of the present application;

[0015] Figure 2 is a specific structural diagram of a power supply switching circuit provided in an embodiment of the present application;

[0016] Figure 3 is another specific structural schematic diagram of the power supply switching circuit provided in an embodiment of the present application;

[0017] Figure 4 This is another specific structural diagram of the power supply switching circuit provided in the embodiment of the present application.

[0018] Reference numerals:

[0019] 10-first switch module; 20-second switch module; 21-first switch submodule; 22-second switch submodule; 30-control module; 31-third switch submodule; 32-fourth switch submodule; 40-logic controller; 50-interface; 51-first power supply terminal; 52-second power supply terminal; 60-voltage converter. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0021] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0022] Reference Figure 1 The embodiment of the present application provides a power supply switching circuit, including: a control module 30, a first switch module 10, and a second switch module 20; the first switch module 10 is electrically connected to the second switch module 20, and the first switch module 10 is used to be electrically connected to the first power supply terminal 51 of the interface 50 of the board and the logic controller 40 of the board respectively; the second switch module 20 is used to be electrically connected to the logic controller 40; the control module 30 is electrically connected to the first switch module 10 and the second switch module 20 respectively, and the control module 30 is used to be electrically connected to the second power supply terminal 52 of the interface 50, when the second power supply terminal 52 is powered off, the first switch module 10 is controlled to be turned on, so that the first power supply terminal 51 supplies power to the logic controller 40; when the second power supply terminal 52 is powered on, the second switch module 20 is controlled to be turned on, so that the second power supply terminal 52 supplies power to the logic controller 40; wherein the power-on time of the first power supply terminal 51 is earlier than the power-on time of the second power supply terminal 52.

[0023] It should be noted that the types of boards include graphics cards, sound cards, network cards, expansion cards, storage controllers, etc., and the types of board interface 50 include peripheral component interconnect (PCI) interface, peripheral component interconnect express (PCIe) interface, compact peripheral component interconnect (CPCI) interface, PCI expansion for instrumentation (PXI, PCI eXtensions for Instrumentation) interface, etc.; the board is electrically connected to the mainboard through the board interface 50.

[0024] The power supply signals provided by the motherboard to the board include a 12-volt power supply signal P12V and a 3.3-volt power supply signal P3V3_AUX. The power-on time of the 3.3-volt power supply signal P3V3_AUX is earlier than the power-on time of the 12-volt power supply signal P12V, that is, the 3.3-volt power supply signal P3V3_AUX of the motherboard powers the board first, and the 12-volt power supply signal P12V of the motherboard powers the board later.

[0025] The first power supply terminal 51 of the interface 50 of the board card is used to receive a 3.3 volt power supply signal P3V3_AUX provided by the motherboard; the second power supply terminal 52 of the interface 50 of the board card is used to receive a 12 volt power supply signal P12V.

[0026] Specifically, the control module 30 is used to control the first switch module 10 to turn on when the second power supply terminal 52 is powered off, so that the first power supply terminal 51 supplies power to the logic controller 40, and controls the second switch module 20 to turn off; when the second power supply terminal 52 is powered on, control the second switch module 20 to turn on, so that the second power supply terminal 52 supplies power to the logic controller 40, and controls the first switch module 10 to turn off.

[0027] Reference Figure 2 In some embodiments, the control module 30 is specifically used to be electrically connected to the voltage converter 60, and the voltage converter 60 is electrically connected to the second power supply terminal 52 of the interface 50; the voltage converter 60 is used to convert the voltage of the power supply signal provided by the second power supply terminal 52 and output it to the control module 30. Specifically, the voltage converter 60 converts the 12 volt power supply signal P12V into a 3.3 volt power supply signal.

[0028] Specifically, the voltage converter 60 may be a buck converter.

[0029] Before the board is reset, the logic controller 40 has fewer processing tasks, and the working current of the logic controller 40 is less than the current limit of P3V3_AUX; after the board is reset, the tasks processed by the logic controller 40 increase, causing the working current processed by the logic controller 40 to exceed the current limit of P3V3_AUX, so it is necessary to switch to P12V power supply and use the motherboard's 12 volt power supply signal P12V to power the logic controller 40.

[0030] To summarize, in the embodiment of the present application, when the second power supply terminal 52 is powered off, the control module 30 controls the first switch module 10 to be turned on so that the first power supply terminal 51 supplies power to the logic controller 40; when the second power supply terminal 52 is powered on, the second switch module 20 is controlled to be turned on so that the second power supply terminal 52 supplies power to the logic controller 40, so that before the second power supply terminal 52 (12 volt power supply signal) is powered on, the logic controller 40 is powered through the first power supply terminal 51 (3.3 volt power supply signal), and the logic controller 40 is initialized in advance, which reduces the initialization time and voltage conversion time of the logic controller 40 after the second power supply terminal 52 is powered on, so that the logic controller 40 sends a reset signal in time within the reset time after the second power supply terminal 52 is powered on, thereby avoiding board reset timeout.

[0031] Optional, see Figure 3 In some embodiments, the second switch module 20 includes a first switch submodule 21 and a second switch submodule 22; the first end of the first switch submodule 21 is electrically connected to the control end of the second switch submodule 22, the second end of the first switch submodule 21 is grounded, and the control end of the first switch submodule 21 is electrically connected to the output end of the control module 30; the control module 30 is specifically used to control the first switch submodule 21 to turn off when the second power supply end 52 is powered off; and to control the first switch submodule 21 to turn on when the second power supply end 52 is powered on; the first end of the second switch submodule 22 is electrically connected to the output end of the control module 30, and the second end of the second switch submodule 22 is electrically connected to the power supply end of the logic controller 40, and the second switch submodule 22 is used to turn off when the first switch submodule 21 is turned off; and turn on when the first switch submodule 21 is turned on, so that the second power supply end 52 supplies power to the logic controller 40.

[0032] In an embodiment of the present application, when the second power supply terminal 52 is powered off, the control module 30 controls the first switch submodule 21 to be turned off, so that the second switch submodule 22 is used to be turned off when the first switch submodule 21 is turned off, and when the second power supply terminal 52 is powered on, the control module 30 controls the first switch submodule 21 to be turned on, and then the second switch submodule 22 is turned on when the first switch submodule 21 is turned on, so that the second power supply terminal 52 supplies power to the logic controller 40.

[0033] Optionally, in some embodiments, the first switch submodule 21 includes a first switch device Q1, a first resistor R1, and a second resistor R2; the first end of the first resistor R1 is electrically connected to the output end of the control module 30, and the second end of the first resistor R1 is electrically connected to the first end of the second resistor R2 and the control end of the first switch device Q1, respectively; the first end of the first switch device Q1 is electrically connected to the control end of the second switch submodule 22, and the second end of the first switch device Q1 is grounded; the second end of the second resistor R2 is grounded.

[0034] In some other embodiments, the first switch submodule 21 also includes a first capacitor C1 and a first parasitic diode D1 of the first switch device Q1, the first end of the first capacitor C1 is electrically connected to the second end of the first resistor R1, and the second end of the first capacitor C1 is grounded; the positive electrode of the first parasitic diode D1 is grounded, and the negative electrode of the first parasitic diode D1 is electrically connected to the control end of the second switch submodule 22.

[0035] It should be noted that the first resistor R1 is a current limiting resistor, the second resistor R2 is a pull-down resistor, and the first capacitor C1 is a filter capacitor.

[0036] In the embodiment of the present application, the control module 30 controls the first switch device Q1 to be turned off when the second power supply terminal 52 is powered off, and controls the first switch device Q1 to be turned on when the second power supply terminal 52 is powered on.

[0037] Optionally, in some embodiments, the first switching device Q1 is an NMOS tube; the drain of the first switching device Q1 is electrically connected to the control end of the second switching submodule 22, the source of the first switching device Q1 is grounded, and the gate of the first switching device Q1 is electrically connected to the second end of the first resistor R1.

[0038] It should be noted that the NMOS tube is a negative channel metal oxide semiconductor tube (Negative channel-Metal-Oxide-Semiconductor).

[0039] In the embodiment of the present application, when the second power supply terminal 52 is powered off, the control module 30 makes the voltage difference between the gate of the first switching device Q1 and the source of the first switching device Q1 smaller than the turn-on voltage threshold of the first switching device Q1, so as to control the first switching device Q1 to be turned off; and when the second power supply terminal 52 is powered on, the voltage of the gate of the first switching device Q1 is greater than the voltage of the source of the first switching device Q1, and the voltage difference between the gate of the first switching device Q1 and the source of the first switching device Q1 is greater than the turn-on voltage threshold of the first switching device Q1, so as to control the first switching device Q1 to be turned on.

[0040] Optionally, in some embodiments, the first switching device Q1 is an NPN transistor; the collector of the first switching device Q1 is electrically connected to the control end of the second switching submodule 22, the emitter of the first switching device Q1 is grounded, and the base of the first switching device Q1 is electrically connected to the second end of the first resistor R1.

[0041] It should be noted that the NPN transistor is composed of three semiconductors, including two N (Negative Electricity) type semiconductors (electron semiconductors) and one P (Positive Electricity) type semiconductor (hole semiconductor), with the P-type semiconductor in the middle and two N-type semiconductors on both sides.

[0042] In the embodiment of the present application, when the second power supply terminal 52 is powered off, the control module 30 makes the voltage difference between the base of the first switching device Q1 and the emitter of the first switching device Q1 smaller than the turn-on voltage threshold of the first switching device Q1, so as to control the first switching device Q1 to be turned off; and when the second power supply terminal 52 is powered on, the voltage of the base of the first switching device Q1 is greater than the voltage of the emitter of the first switching device Q1, and the voltage difference between the base of the first switching device Q1 and the emitter of the first switching device Q1 is greater than the turn-on voltage threshold of the first switching device Q1, so as to control the first switching device Q1 to be turned on.

[0043] Optionally, in some embodiments, the second switch submodule 22 includes a second switch device Q2, a third resistor R3, a fourth resistor R4 and a second parasitic diode D2 of the second switch device Q2; the first end of the second switch device Q2 is electrically connected to the output end of the control module 30, the second end of the second switch device Q2 is electrically connected to the first end of the third resistor R3 and the power supply end of the logic controller 40 respectively, and the control end of the second switch device Q2 is electrically connected to the first end of the fourth resistor R4; the second end of the third resistor R3 is electrically connected to the first end of the fourth resistor R4; the second end of the fourth resistor R4 is electrically connected to the first end of the first switch submodule 21; the positive electrode of the second parasitic diode D2 is electrically connected to the output end of the control module 30, the negative electrode of the second parasitic diode D2 is electrically connected to the first end of the third resistor R3, and the negative electrode of the second parasitic diode D2 is used to be electrically connected to the power supply end of the logic controller 40.

[0044] In some other embodiments, the second switch submodule 22 further includes a second capacitor C2, a first end of the second capacitor C2 is electrically connected to a power supply end of the logic controller 40, and a second end of the second capacitor C2 is electrically connected to a first end of a fourth resistor R4.

[0045] It should be noted that the third resistor R3 and the fourth resistor R4 are both voltage-dividing resistors, and the second capacitor C2 is a filter capacitor.

[0046] In the embodiment of the present application, the second switch device Q2 is turned off when the first switch submodule 21 is turned off, and is turned on when the first switch submodule 21 is turned on, so that the second power supply terminal 52 supplies power to the logic controller 40 .

[0047] Optionally, in some embodiments, the second switching device Q2 is a PMOS tube; the drain of the second switching device Q2 is electrically connected to the output end of the control module 30, the source of the second switching device Q2 is electrically connected to the first end of the third resistor R3 and the power supply end of the logic controller 40, and the gate of the second switching device Q2 is electrically connected to the first end of the fourth resistor R4.

[0048] It should be noted that a PMOS tube is a positive channel Metal Oxide Semiconductor tube.

[0049] In the embodiment of the present application, when the first switch submodule 21 is turned off, the voltage difference between the source of the second switch device Q2 and the gate of the second switch device Q2 is less than the turn-on voltage threshold of the second switch device Q2, so that the second switch device Q2 is turned off, and when the first switch submodule 21 is turned on, the voltage of the source of the second switch device Q2 is greater than the voltage of the gate of the second switch device Q2, and the voltage difference between the source of the second switch device Q2 and the gate of the second switch device Q2 is greater than the turn-on voltage threshold of the second switch device Q2, so that the second switch device Q2 is turned on, so that the second power supply terminal 52 supplies power to the logic controller 40.

[0050] Optionally, in some embodiments, the first switch module 10 includes a third switch device Q3, a fifth resistor R5, a sixth resistor R6 and a third parasitic diode D3 of the third switch device Q3; the first end of the third switch device Q3 is used to be electrically connected to the first power supply terminal 51, the second end of the third switch device Q3 is used to be electrically connected to the power supply terminal of the logic controller 40, and the control end of the third switch device Q3 is electrically connected to the first end of the sixth resistor R6; the first end of the fifth resistor R5 is electrically connected to the second end of the third switch device Q3, and the second end of the fifth resistor R5 is electrically connected to the control end of the third switch device Q3 and the first end of the sixth resistor R6 respectively; the second end of the sixth resistor R6 is electrically connected to the output end of the control module 30 and the input end of the second switch module 20 respectively, and the sixth resistor R6 is grounded through the second switch module 20; the positive electrode of the third parasitic diode D3 is used to be electrically connected to the first power supply terminal 51, and the negative electrode of the third parasitic diode D3 is used to be electrically connected to the power supply terminal of the logic controller 40.

[0051] In some other embodiments, the first switch module 10 further includes a third capacitor C3, a first end of the third capacitor C3 is electrically connected to a power supply end of the logic controller 40, and a second end of the third capacitor C3 is electrically connected to a first end of a sixth resistor R6.

[0052] It should be noted that the fifth resistor R5 and the sixth resistor R6 are both voltage-dividing resistors, and the third capacitor C3 is a filter capacitor.

[0053] In the embodiment of the present application, when the second power supply terminal 52 is powered off, the control module 30 controls the third switch device Q3 to be turned on, so that the first power supply terminal 51 supplies power to the logic controller 40 .

[0054] Optionally, in some embodiments, the third switching device Q3 is a PMOS tube; the drain of the third switching device Q3 is used to be electrically connected to the first power supply terminal 51, the source of the third switching device Q3 is used to be electrically connected to the power supply terminal of the logic controller 40, and the gate of the third switching device Q3 is electrically connected to the first end of the sixth resistor R6.

[0055] In the embodiment of the present application, when the second power supply terminal 52 is powered off, the control module 30 makes the voltage of the source of the third switching device Q3 greater than the voltage of the gate of the third switching device Q3, and the voltage difference between the source of the third switching device Q3 and the gate of the third switching device Q3 is greater than the turn-on voltage threshold of the third switching device Q3, thereby turning on the third switching device Q3, so that the first power supply terminal 51 supplies power to the logic controller 40.

[0056] Optionally, in some embodiments, the control module 30 includes a third switch submodule 31 and a fourth switch submodule 32; the first end of the third switch submodule 31 is electrically connected to the control end of the fourth switch submodule 32, the second end of the third switch submodule 31 is grounded, the control end of the third switch submodule 31 is used to be electrically connected to the second power supply end 52, the third switch submodule 31 is used to be turned off when the second power supply end 52 is powered off, and to be turned on when the second power supply end 52 is powered on; the first end of the fourth switch submodule 32 is used to be electrically connected to the second power supply end 52, the second end of the fourth switch submodule 32 is respectively electrically connected to the control end of the first switch module 10 and the input end of the second switch module 20, the fourth switch submodule 32 is used to be turned off when the third switch submodule 31 is turned off, and to be turned on when the third switch submodule 31 is turned on.

[0057] In the embodiment of the present application, the third switch submodule 31 is turned off when the second power supply terminal 52 is powered off, and then the fourth switch submodule 32 is turned off when the third switch submodule 31 is turned off, so that the second power supply terminal 52 does not supply power to the logic controller 40, and the third switch submodule 31 is turned on when the second power supply terminal 52 is powered on, and then the fourth switch submodule 32 is turned on when the third switch submodule 31 is turned on, thereby controlling the second switch module 20 to be turned on, so that the second power supply terminal 52 supplies power to the logic controller 40.

[0058] Optionally, in some embodiments, the third switch submodule 31 includes a fourth switch device Q4, a seventh resistor R7, and an eighth resistor R8; the first end of the seventh resistor R7 is used to be electrically connected to the second power supply terminal 52, and the second end of the seventh resistor R7 is electrically connected to the first end of the eighth resistor R8 and the control end of the fourth switch device Q4, respectively; the first end of the fourth switch device Q4 is electrically connected to the control end of the fourth switch submodule 32, and the second end of the fourth switch device Q4 is grounded; the second end of the eighth resistor R8 is grounded.

[0059] In other embodiments, the third switch submodule 31 also includes a fourth capacitor C4 and a fourth parasitic diode D4 of the fourth switch device Q4, the first end of the fourth capacitor C4 is electrically connected to the second end of the seventh resistor R7, and the second end of the fourth capacitor C4 is grounded; the positive electrode of the fourth parasitic diode D4 is grounded, and the negative electrode of the fourth parasitic diode D4 is electrically connected to the control end of the fourth switch submodule 32.

[0060] It should be noted that the seventh resistor R7 is a current limiting resistor, the eighth resistor R8 is a pull-down resistor, and the fourth capacitor C4 is a filter capacitor.

[0061] In the embodiment of the present application, the fourth switch device Q4 is turned off when the second power supply terminal 52 is powered off, so that the fourth switch submodule 32 is turned off when the fourth switch device Q4 is turned off, and the fourth switch device Q4 is turned on when the second power supply terminal 52 is powered on, so that the fourth switch submodule 32 is turned on when the fourth switch device Q4 is turned on.

[0062] Optionally, in some embodiments, the fourth switch device Q4 is an NMOS tube; the drain of the fourth switch device Q4 is electrically connected to the control end of the fourth switch submodule 32, the source of the fourth switch device Q4 is grounded, and the gate of the fourth switch device Q4 is electrically connected to the second end of the seventh resistor R7.

[0063] In the embodiment of the present application, when the second power supply terminal 52 is powered off, the voltage difference between the gate of the fourth switch device Q4 and the source of the fourth switch device Q4 is less than the turn-on voltage threshold of the fourth switch device Q4, so that the fourth switch device Q4 is turned off, and when the second power supply terminal 52 is powered on, the voltage of the gate of the fourth switch device Q4 is greater than the voltage of the source of the fourth switch device Q4, and the voltage difference between the gate of the fourth switch device Q4 and the source of the fourth switch device Q4 is greater than the turn-on voltage threshold of the fourth switch device Q4, so that the fourth switch device Q4 is turned on.

[0064] Optionally, in some embodiments, the fourth switch device Q4 is an NPN transistor; the collector of the fourth switch device Q4 is electrically connected to the control end of the fourth switch submodule 32, the emitter of the fourth switch device Q4 is grounded, and the base of the fourth switch device Q4 is electrically connected to the second end of the seventh resistor R7.

[0065] In the embodiment of the present application, when the second power supply terminal 52 is powered off, the voltage difference between the base of the fourth switch device Q4 and the emitter of the fourth switch device Q4 is less than the turn-on voltage threshold of the fourth switch device Q4, so that the fourth switch device Q4 is turned off, and when the second power supply terminal 52 is powered on, the voltage of the base of the fourth switch device Q4 is greater than the voltage of the emitter of the fourth switch device Q4, and the voltage difference between the base of the fourth switch device Q4 and the emitter of the fourth switch device Q4 is greater than the turn-on voltage threshold of the fourth switch device Q4, so that the fourth switch device Q4 is turned on.

[0066] Optionally, in some embodiments, the fourth switch submodule 32 includes a fifth switch device Q5, a ninth resistor R9, a tenth resistor R10 and a fifth parasitic diode D5 of the fifth switch device Q5; the first end of the fifth switch device Q5 is used to be electrically connected to the second power supply terminal 52, the second end of the fifth switch device Q5 is respectively electrically connected to the first end of the ninth resistor R9, the control end of the first switch module 10, and the input end of the second switch module 20, and the control end of the fifth switch device Q5 is electrically connected to the first end of the tenth resistor R10; the second end of the ninth resistor R9 is electrically connected to the first end of the tenth resistor R10; the second end of the tenth resistor R10 is electrically connected to the first end of the third switch submodule 31; the positive electrode of the fifth parasitic diode D5 is used to be electrically connected to the second power supply terminal 52, and the negative electrode of the fifth parasitic diode D5 is respectively electrically connected to the first end of the ninth resistor R9, the control end of the first switch module 10, and the input end of the second switch module 20.

[0067] In some other embodiments, the fourth switch submodule 32 further includes a fifth capacitor C5, a first end of the fifth capacitor C5 is electrically connected to the cathode of the fifth parasitic diode D5 and the cathode of the fifth diode, and a second end of the fifth capacitor C5 is electrically connected to the first end of the tenth resistor R10.

[0068] It should be noted that the ninth resistor R9 and the tenth resistor R10 are both voltage-dividing resistors, and the fifth capacitor C5 is a filter capacitor.

[0069] In the embodiment of the present application, the fifth switching device Q5 is turned on when the fourth switching device Q4 is turned on, and the fifth switching device Q5 is turned off when the fourth switching device Q4 is turned off.

[0070] Optionally, in some embodiments, the fifth switching device Q5 is a PMOS tube; the drain of the fifth switching device Q5 is used to be electrically connected to the second power supply terminal 52, the source of the fifth switching device Q5 is electrically connected to the first end of the ninth resistor R9, the control end of the first switching module 10, and the input end of the second switching module 20, respectively, and the gate of the fifth switching device Q5 is electrically connected to the first end of the tenth resistor R10.

[0071] In the embodiment of the present application, when the fourth switching device Q4 is turned on, the voltage at the source of the fifth switching device Q5 is greater than the voltage at the gate of the fifth switching device Q5, and the voltage difference between the source of the fifth switching device Q5 and the gate of the fifth switching device Q5 is greater than the turn-on voltage threshold of the fifth switching device Q5, so that the fifth switching device Q5 is turned on, and when the fourth switching device Q4 is turned off, the voltage difference between the source of the fifth switching device Q5 and the gate of the fifth switching device Q5 is less than the turn-on voltage threshold of the fifth switching device Q5, so that the fifth switching device Q5 is turned off.

[0072] Optional, see Figure 4 In some embodiments, the control module 30 includes a sixth diode D6; the anode of the sixth diode D6 is used to be electrically connected to the second power supply terminal 52, and the cathode of the sixth diode D6 is electrically connected to the control terminal of the first switch module 10 and the input terminal of the second switch module 20 respectively.

[0073] In the embodiment of the present application, when the second power supply terminal 52 is powered off, the output voltage of the sixth diode D6 is 0, so that the first switch module 10 is turned on, so that the first power supply terminal 51 supplies power to the logic controller 40; when the second power supply terminal 52 is powered on, the output voltage of the sixth diode D6 is greater than 0, so that the second switch module 20 is turned on, so that the second power supply terminal 52 supplies power to the logic controller 40.

[0074] Specifically, refer to Figure 2In some embodiments, the second switch device Q2, the third switch device Q3, and the fifth switch device Q5 are all PMOS tubes, the first switch device Q1 and the fourth switch device Q4 are all NMOS tubes, the second power supply terminal 52 is electrically connected to the input terminal of the voltage converter 60, and the output terminal of the voltage converter 60 is electrically connected to the positive electrode of the fifth parasitic diode D5, the drain of the fifth switch device Q5, and the first end of the seventh resistor R7; the first end of the first resistor R1 is electrically connected to the second end of the sixth resistor R6, the negative electrode of the fifth parasitic diode D5, and the source of the fifth switch device Q5, and the second end of the first resistor R1 is electrically connected to the first end of the second resistor R2 and the gate of the first switch device Q1; the drain of the first switch device Q1 is electrically connected to the second end of the fourth resistor R4, and the source of the first switch device Q1 is electrically connected to the gate of the first switch device Q1. The second end of the second resistor R2 is grounded; the drain of the second switch device Q2 is electrically connected to the second end of the sixth resistor R6, the cathode of the fifth parasitic diode D5, and the source of the fifth switch device Q5, respectively; the source of the second switch device Q2 is electrically connected to the first end of the third resistor R3 and the power supply end of the logic controller 40, respectively; the gate of the second switch device Q2 is electrically connected to the first end of the fourth resistor R4; the second end of the third resistor R3 is electrically connected to the first end of the fourth resistor R4; the anode of the second parasitic diode D2 is electrically connected to the second end of the sixth resistor R6, the cathode of the fifth parasitic diode D5, and the source of the fifth switch device Q5, respectively; the cathode of the second parasitic diode D2 is electrically connected to the first end of the third resistor R3, and the cathode of the second parasitic diode D2 is used to be electrically connected to the power supply end of the logic controller 40;

[0075] The drain of the third switch device Q3 is used to be electrically connected to the first power supply terminal 51, the source of the third switch device Q3 is used to be electrically connected to the power supply terminal of the logic controller 40, and the gate of the third switch device Q3 is electrically connected to the first end of the sixth resistor R6; the first end of the fifth resistor R5 is electrically connected to the source of the third switch device Q3, and the second end of the fifth resistor R5 is electrically connected to the gate of the third switch device Q3 and the first end of the sixth resistor R6 respectively; the second end of the sixth resistor R6 is electrically connected to the first end of the first resistor R1 and the drain of the second switch device Q2 respectively ; The anode of the third parasitic diode D3 is used to be electrically connected to the first power supply terminal 51, and the cathode of the third parasitic diode D3 is used to be electrically connected to the power supply terminal of the logic controller 40; the first end of the seventh resistor R7 is used to be electrically connected to the second power supply terminal 52 through the voltage converter 60, and the second end of the seventh resistor R7 is electrically connected to the first end of the eighth resistor R8 and the gate of the fourth switch device Q4 respectively; the drain of the fourth switch device Q4 is electrically connected to the second end of the tenth resistor R10, and the source of the fourth switch device Q4 is grounded; the second end of the eighth resistor R8 is grounded;

[0076] The drain of the fifth switching device Q5 is used to be electrically connected to the second power supply terminal 52 through the voltage converter 60, the source of the fifth switching device Q5 is electrically connected to the first end of the ninth resistor R9, the first end of the first resistor R1, and the drain of the second switching device Q2, respectively, the gate of the fifth switching device Q5 is electrically connected to the first end of the tenth resistor R10; the second end of the ninth resistor R9 is electrically connected to the first end of the tenth resistor R10; the anode of the fifth parasitic diode D5 is used to be electrically connected to the second power supply terminal 52 through the voltage converter 60, and the cathode of the fifth parasitic diode D5 is electrically connected to the first end of the ninth resistor R9, the second end of the sixth resistor R6, and the drain of the second switching device Q2, respectively.

[0077] It should be noted that the resistance of the sixth resistor R6 , the resistance of the first resistor R1 , and the resistance of the second resistor R2 are all smaller than the resistance of the fifth resistor R5 .

[0078] In the embodiment of the present application, when the first power supply terminal 51 is powered on and the second power supply terminal 52 is powered off, the power supply signal of the first power supply terminal 51 is output to the power supply terminal of the logic controller 40 through the third parasitic diode D3. At the same time, since the resistance value of the sixth resistor R6, the resistance value of the first resistor R1, and the resistance value of the second resistor R2 are all smaller than the resistance value of the fifth resistor R5, the voltage value across the sixth resistor R6, the voltage value across the first resistor R1, and the voltage value across the second resistor R2 are all smaller than the voltage value across the fifth resistor R5. By setting the resistance value of the sixth resistor R6, the resistance value of the first resistor R1, the resistance value of the second resistor R2, and the resistance value of the fifth resistor R5, the voltage value across the fifth resistor R5 (i.e., the voltage difference between the source of the third switch device Q3 and the gate of the third switch device Q3) is greater than the turn-on voltage threshold of the third switch device Q3, and the voltage of the source of the third switch device Q3 is greater than the turn-on voltage threshold of the third switch device Q3. The gate voltage of the first switch device Q3 is increased, and the third switch device Q3 is turned on. At this time, the power supply signal of the first power supply terminal 51 is directly output to the power supply terminal of the logic controller 40 through the third switch device Q3, and the logic controller 40 is powered on and initialized; in addition, by setting the resistance value of the sixth resistor R6, the resistance value of the first resistor R1, the resistance value of the second resistor R2, and the resistance value of the fifth resistor R5, the sum of the voltage value across the first resistor R1 and the voltage value across the second resistor R2 (that is, the voltage difference between the gate of the first switch device Q1 and the source of the first switch device Q1) is less than the turn-on voltage threshold of the first switch device Q1, and the first switch device Q1 is turned off. Since the first switch device Q1 is turned off, the voltage across the third resistor R3 (the voltage difference between the gate of the second switch device Q2 and the source of the second switch device Q2) is less than the turn-on voltage threshold of the second switch device Q2, so the second switch device Q2 is turned off;

[0079] Since the second power supply terminal 52 is powered off, the sum of the voltage value across the seventh resistor R7 and the voltage value across the eighth resistor R8 (i.e., the voltage difference between the gate of the fourth switch device Q4 and the source of the fourth switch device Q4) is less than the turn-on voltage threshold of the fourth switch device Q4, and the fourth switch device Q4 is turned off; since the fourth switch device Q4 is turned off, the voltage across the ninth resistor R9 (i.e., the voltage difference between the gate of the fifth switch device Q5 and the source of the fifth switch device Q5) is less than the turn-on voltage threshold of the fifth switch device Q5, and the fifth switch device Q5 is turned off;

[0080] Therefore, when the first power terminal 51 is powered on and the second power terminal 52 is powered off, the fifth switch device Q5 is turned off, the second switch device Q2 is turned off, and the third switch device Q3 is turned on, so that the first power terminal 51 supplies power to the logic controller 40 .

[0081] After the first power supply terminal 51 is powered on for a period of time, the second power supply terminal 52 is powered on. At this time, the power supply signal of the second power supply terminal 52 is converted by the voltage converter 60 and then output by the voltage converter 60. The voltage of the power supply signal output by the voltage converter 60 is equal to the voltage of the power supply signal output by the first power supply terminal 51. The power supply signal output by the voltage converter 60 is output to the drain of the second switch device Q2, the first end of the first resistor R1, and the second end of the sixth resistor R6 through the fifth parasitic diode D5. The power supply signal output by the voltage converter 60 is output to the first end of the third resistor R3 and the power supply end of the logic controller 40 through the fifth parasitic diode D5 and the second parasitic diode D2. At the same time, the sum of the voltage value across the seventh resistor R7 and the voltage value across the eighth resistor R8 (i.e., the voltage difference between the gate of the fourth switch device Q4 and the source of the fourth switch device Q4) is greater than the turn-on voltage threshold of the fourth switch device Q4, and the voltage of the gate of the fourth switch device Q4 is greater than the source of the fourth switch device Q4. , the fourth switch device Q4 is turned on; because the fourth switch device Q4 is turned on, the gate of the fifth switch device Q5 is grounded, the voltage across the ninth resistor R9 (i.e., the voltage difference between the gate of the fifth switch device Q5 and the source of the fifth switch device Q5) is greater than the turn-on voltage threshold of the fifth switch device Q5, and the voltage at the source of the fifth switch device Q5 is greater than the voltage at the gate of the fifth switch device Q5, so the fifth switch device Q5 is turned on, at this time, the power supply signal output by the voltage converter 60 is directly output to the drain of the second switch device Q2, the first end of the first resistor R1, and the second end of the sixth resistor R6 through the fifth switch device Q5, so that the sum of the voltage value across the first resistor R1 and the voltage value across the second resistor R2 (i.e., the voltage difference between the gate of the first switch device Q1 and the source of the first switch device Q1) is greater than the turn-on voltage threshold of the first switch device Q1, and the voltage at the gate of the first switch device Q1 is greater than the voltage at the source of the first switch device Q1, and the first switch device Q1 is turned on;

[0082] Since the first switch device Q1 is turned on, the voltage across the third resistor R3 (the voltage difference between the gate of the second switch device Q2 and the source of the second switch device Q2) is greater than the turn-on voltage threshold of the second switch device Q2, and the voltage at the source of the second switch device Q2 is greater than the voltage at the gate of the second switch device Q2, then the second switch device Q2 is turned on, and at this time, the power supply signal output by the voltage converter 60 is directly output to the power supply end of the logic controller 40 through the fifth switch device Q5 and the second switch device Q2, so that the logic controller 40 is powered on;

[0083] In addition, since the power supply signal output by the voltage converter 60 is output to the second end of the sixth resistor R6, the voltage value across the fifth resistor R5 (i.e., the voltage difference between the source of the third switch device Q3 and the gate of the third switch device Q3) is less than the turn-on voltage threshold of the third switch device Q3, and the third switch device Q3 is turned off; since the voltage at the anode of the third parasitic diode D3 (the voltage of the power supply signal at the first power supply terminal 51) is equal to the voltage at the cathode of the third parasitic diode D3 (the voltage of the power supply signal output by the voltage converter 60), the third parasitic diode D3 is not turned on;

[0084] Therefore, when the second power supply terminal 52 is energized, the fifth switch device Q5 is turned on, the second switch device Q2 is turned on, and the third switch device Q3 is turned off, so that the second power supply terminal 52 supplies power to the logic controller 40, completing the switch from the first power supply terminal 51 supplying power to the logic controller 40 to the second power supply terminal 52 supplying power to the logic controller 40.

[0085] It should be noted that the voltage of the power supply signal of the first power supply terminal 51 is greater than the conduction voltage threshold of the third parasitic diode D3, and the voltage of the power supply signal output by the voltage converter 60 is greater than the conduction voltage threshold of the second parasitic diode D2 and the conduction voltage threshold of the fifth parasitic diode D5.

[0086] Reference Figure 4In some other embodiments, the second switch device Q2 and the third switch device Q3 are both PMOS tubes, the first switch device Q1 is an NMOS tube, the second power supply terminal 52 is electrically connected to the input terminal of the voltage converter 60, and the output terminal of the voltage converter 60 is electrically connected to the positive electrode of the sixth diode D6; the first end of the first resistor R1 is electrically connected to the second end of the sixth resistor R6 and the negative electrode of the sixth diode D6, respectively, and the second end of the first resistor R1 is electrically connected to the first end of the second resistor R2 and the gate of the first switch device Q1; the drain of the first switch device Q1 is electrically connected to the second end of the fourth resistor R4, and the source of the first switch device Q1 is grounded; the second end of the second resistor R2 is grounded The drain of the second switch device Q2 is electrically connected to the second end of the sixth resistor R6 and the cathode of the sixth diode D6, respectively; the source of the second switch device Q2 is electrically connected to the first end of the third resistor R3 and the power supply end of the logic controller 40, respectively; the gate of the second switch device Q2 is electrically connected to the first end of the fourth resistor R4; the second end of the third resistor R3 is electrically connected to the first end of the fourth resistor R4; the anode of the second parasitic diode D2 is electrically connected to the second end of the sixth resistor R6 and the cathode of the sixth diode D6, respectively; the cathode of the second parasitic diode D2 is electrically connected to the first end of the third resistor R3, and the cathode of the second parasitic diode D2 is used to be electrically connected to the power supply end of the logic controller 40;

[0087] The drain of the third switching device Q3 is used to be electrically connected to the first power supply terminal 51, the source of the third switching device Q3 is used to be electrically connected to the power supply terminal of the logic controller 40, and the gate of the third switching device Q3 is electrically connected to the first end of the sixth resistor R6; the first end of the fifth resistor R5 is electrically connected to the source of the third switching device Q3, and the second end of the fifth resistor R5 is electrically connected to the gate of the third switching device Q3 and the first end of the sixth resistor R6 respectively; the second end of the sixth resistor R6 is electrically connected to the first end of the first resistor R1 and the drain of the second switching device Q2 respectively; the anode of the third parasitic diode D3 is used to be electrically connected to the first power supply terminal 51, and the cathode of the third parasitic diode D3 is used to be electrically connected to the power supply terminal of the logic controller 40; the anode of the sixth diode D6 is used to be electrically connected to the second power supply terminal 52 through the voltage converter 60, and the cathode of the sixth diode D6 is electrically connected to the second end of the sixth resistor R6, the first end of the first resistor R1, and the drain of the second switching device Q2 respectively.

[0088] It should be noted that the resistance of the sixth resistor R6 , the resistance of the first resistor R1 , and the resistance of the second resistor R2 are all smaller than the resistance of the fifth resistor R5 .

[0089] In the embodiment of the present application, when the first power supply terminal 51 is powered on and the second power supply terminal 52 is powered off, the power supply signal of the first power supply terminal 51 is output to the power supply terminal of the logic controller 40 through the third parasitic diode D3. At the same time, since the resistance value of the sixth resistor R6, the resistance value of the first resistor R1, and the resistance value of the second resistor R2 are all smaller than the resistance value of the fifth resistor R5, the voltage value across the sixth resistor R6, the voltage value across the first resistor R1, and the voltage value across the second resistor R2 are all smaller than the voltage value across the fifth resistor R5. By setting the resistance value of the sixth resistor R6, the resistance value of the first resistor R1, the resistance value of the second resistor R2, and the resistance value of the fifth resistor R5, the voltage value across the fifth resistor R5 (i.e., the voltage difference between the source of the third switch device Q3 and the gate of the third switch device Q3) is greater than the turn-on voltage threshold of the third switch device Q3, and the voltage of the source of the third switch device Q3 is greater than the turn-on voltage threshold of the third switch device Q3. The gate voltage of the first switch device Q3 is increased, and the third switch device Q3 is turned on. At this time, the power supply signal of the first power supply terminal 51 is directly output to the power supply terminal of the logic controller 40 through the third switch device Q3, and the logic controller 40 is powered on and initialized; in addition, by setting the resistance value of the sixth resistor R6, the resistance value of the first resistor R1, the resistance value of the second resistor R2, and the resistance value of the fifth resistor R5, the sum of the voltage value across the first resistor R1 and the voltage value across the second resistor R2 (that is, the voltage difference between the gate of the first switch device Q1 and the source of the first switch device Q1) is less than the turn-on voltage threshold of the first switch device Q1, and the first switch device Q1 is turned off. Since the first switch device Q1 is turned off, the voltage across the third resistor R3 (the voltage difference between the gate of the second switch device Q2 and the source of the second switch device Q2) is less than the turn-on voltage threshold of the second switch device Q2, so the second switch device Q2 is turned off;

[0090] In addition, since the second power supply terminal 52 is powered off, the voltage outputted from the output terminal of the voltage converter 60 is 0, and the sixth diode D6 is turned off.

[0091] Therefore, when the first power terminal 51 is powered on and the second power terminal 52 is powered off, the sixth diode D6 is turned off, the second switch device Q2 is turned off, and the third switch device Q3 is turned on, so that the first power terminal 51 supplies power to the logic controller 40 .

[0092] After the first power supply terminal 51 is powered on for a period of time, the second power supply terminal 52 is powered on. At this time, the power supply signal of the second power supply terminal 52 is converted by the voltage converter 60 and then output by the voltage converter 60. The voltage of the power supply signal output by the voltage converter 60 is equal to the sum of the voltage of the power supply signal output by the first power supply terminal 51 and the conduction voltage of the sixth diode D6. The power supply signal output by the voltage converter 60 is output to the drain of the second switching device Q2, the first end of the first resistor R1, and the second end of the sixth resistor R6 through the sixth diode D6. The power supply signal output by the voltage converter 60 is output to the drain of the second switching device Q2, the first end of the first resistor R1, and the second end of the sixth resistor R6 through the sixth diode D6 and the second parasitic diode D2. The voltage converter 60 outputs the power supply signal to the first end of the third resistor R3 and the power supply end of the logic controller 40; at the same time, since the power supply signal output by the voltage converter 60 is directly output to the drain of the second switch device Q2, the first end of the first resistor R1 and the second end of the sixth resistor R6 through the sixth diode D6, the sum of the voltage value across the first resistor R1 and the voltage value across the second resistor R2 (i.e., the voltage difference between the gate of the first switch device Q1 and the source of the first switch device Q1) is greater than the turn-on voltage threshold of the first switch device Q1, and the voltage of the gate of the first switch device Q1 is greater than the voltage of the source of the first switch device Q1, and the first switch device Q1 is turned on;

[0093] Since the first switch device Q1 is turned on, the voltage across the third resistor R3 (the voltage difference between the gate of the second switch device Q2 and the source of the second switch device Q2) is greater than the turn-on voltage threshold of the second switch device Q2, and the voltage at the source of the second switch device Q2 is greater than the voltage at the gate of the second switch device Q2, and the second switch device Q2 is turned on. At this time, the power supply signal output by the voltage converter 60 is directly output to the power supply end of the logic controller 40 through the sixth diode D6 and the second switch device Q2, so that the logic controller 40 is powered on;

[0094] In addition, since the power supply signal output by the voltage converter 60 is output to the second end of the sixth resistor R6, the voltage value across the fifth resistor R5 (i.e., the voltage difference between the source of the third switch device Q3 and the gate of the third switch device Q3) is less than the turn-on voltage threshold of the third switch device Q3, and the third switch device Q3 is turned off; since the voltage at the anode of the third parasitic diode D3 (the voltage of the power supply signal at the first power supply terminal 51) is equal to the voltage at the cathode of the third parasitic diode D3 (the difference between the voltage of the power supply signal output by the voltage converter 60 and the turn-on voltage of the sixth diode D6), the third parasitic diode D3 is not turned on;

[0095] Therefore, when the second power supply terminal 52 is energized, the sixth diode D6 is turned on, the second switch device Q2 is turned on, and the third switch device Q3 is turned off, so that the second power supply terminal 52 supplies power to the logic controller 40, completing the switch from the first power supply terminal 51 supplying power to the logic controller 40 to the second power supply terminal 52 supplying power to the logic controller 40.

[0096] It should be noted that the voltage of the power supply signal of the first power supply terminal 51 is greater than the conduction voltage threshold of the third parasitic diode D3, and the voltage of the power supply signal output by the voltage converter 60 is greater than the conduction voltage threshold of the second parasitic diode D2 and the conduction voltage threshold of the sixth diode D6.

[0097] An embodiment of the present application also provides a board, comprising the aforementioned power supply switching circuit.

[0098] The specific implementation method of the power supply switching circuit in the board provided in the embodiment of the present application is similar to the specific implementation method of the aforementioned power supply switching circuit, which will not be repeated here.

[0099] To summarize, in the embodiment of the present application, when the second power supply terminal 52 is powered off, the control module 30 controls the first switch module 10 to be turned on so that the first power supply terminal 51 supplies power to the logic controller 40; when the second power supply terminal 52 is powered on, the second switch module 20 is controlled to be turned on so that the second power supply terminal 52 supplies power to the logic controller 40, so that before the second power supply terminal 52 (12 volt power supply signal) is powered on, the logic controller 40 is powered through the first power supply terminal 51 (3.3 volt power supply signal), and the logic controller 40 is initialized in advance, which reduces the initialization time and voltage conversion time of the logic controller 40 after the second power supply terminal 52 is powered on, so that the logic controller 40 sends a reset signal in time within the reset time after the second power supply terminal 52 is powered on, thereby avoiding board reset timeout.

[0100] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A power supply switching circuit, characterized in that: include: A control module, a first switch module, and a second switch module; The first switch module is electrically connected to the second switch module, and the first switch module is used to be electrically connected to the first power supply end of the interface of the board and the logic controller of the board respectively; The second switch module is used to be electrically connected to the logic controller; The control module is electrically connected to the first switch module and the second switch module respectively. The control module is used to be electrically connected to the second power supply end of the interface. When the second power supply end is powered off, the control module controls the first switch module to be turned on so that the first power supply end supplies power to the logic controller; when the second power supply end is powered on, the control module controls the second switch module to be turned on so that the second power supply end supplies power to the logic controller; The first power supply terminal is powered on earlier than the second power supply terminal; The second switch module includes a first switch submodule and a second switch submodule; The first end of the first switch submodule is electrically connected to the control end of the second switch submodule, the second end of the first switch submodule is grounded, and the control end of the first switch submodule is electrically connected to the output end of the control module; The control module is specifically used to control the first switch submodule to turn off when the second power supply end is powered off; When the second power supply end is powered on, controlling the first switch submodule to be turned on; The first end of the second switch submodule is electrically connected to the output end of the control module, and the second end of the second switch submodule is electrically connected to the power supply end of the logic controller. The second switch submodule is used to be turned off when the first switch submodule is turned off; and turned on when the first switch submodule is turned on, so that the second power supply end supplies power to the logic controller; The first switch submodule includes a first switch device, a first resistor, and a second resistor; The first end of the first resistor is electrically connected to the output end of the control module, and the second end of the first resistor is electrically connected to the first end of the second resistor and the control end of the first switch device respectively; A first end of the first switch device is electrically connected to a control end of the second switch submodule, and a second end of the first switch device is grounded; The second end of the second resistor is grounded; The second switch submodule includes a second switch device, a third resistor, a fourth resistor and a second parasitic diode of the second switch device; The first end of the second switch device is electrically connected to the output end of the control module, the second end of the second switch device is electrically connected to the first end of the third resistor and the power supply end of the logic controller respectively, and the control end of the second switch device is electrically connected to the first end of the fourth resistor; The second end of the third resistor is electrically connected to the first end of the fourth resistor; The second end of the fourth resistor is electrically connected to the first end of the first switch submodule; The anode of the second parasitic diode is electrically connected to the output end of the control module, the cathode of the second parasitic diode is electrically connected to the first end of the third resistor, and the cathode of the second parasitic diode is used to be electrically connected to the power supply end of the logic controller; The second switch device is a PMOS tube; The drain of the second switch device is electrically connected to the output end of the control module, the source of the second switch device is electrically connected to the first end of the third resistor and the power supply end of the logic controller respectively, and the gate of the second switch device is electrically connected to the first end of the fourth resistor.

2. The power supply switching circuit according to claim 1, characterized in that: The first switch device is an NMOS tube; The drain of the first switch device is electrically connected to the control end of the second switch submodule, the source of the first switch device is grounded, and the gate of the first switch device is electrically connected to the second end of the first resistor.

3. The power supply switching circuit according to claim 1, characterized in that: The first switch device is an NPN transistor; The collector of the first switch device is electrically connected to the control end of the second switch submodule, the emitter of the first switch device is grounded, and the base of the first switch device is electrically connected to the second end of the first resistor.

4. The power supply switching circuit according to claim 1, characterized in that: The first switch module includes a third switch device, a fifth resistor, a sixth resistor and a third parasitic diode of the third switch device; The first end of the third switch device is used to be electrically connected to the first power supply end, the second end of the third switch device is used to be electrically connected to the power supply end of the logic controller, and the control end of the third switch device is electrically connected to the first end of the sixth resistor; The first end of the fifth resistor is electrically connected to the second end of the third switch device, and the second end of the fifth resistor is electrically connected to the control end of the third switch device and the first end of the sixth resistor respectively; The second end of the sixth resistor is electrically connected to the output end of the control module and the input end of the second switch module respectively, and the sixth resistor is grounded through the second switch module; The anode of the third parasitic diode is used to be electrically connected to the first power supply terminal, and the cathode of the third parasitic diode is used to be electrically connected to the power supply terminal of the logic controller.

5. The power supply switching circuit according to claim 4, characterized in that: The third switch device is a PMOS tube; The drain of the third switch device is used to be electrically connected to the first power supply terminal, the source of the third switch device is used to be electrically connected to the power supply terminal of the logic controller, and the gate of the third switch device is electrically connected to the first end of the sixth resistor.

6. The power supply switching circuit according to claim 1, characterized in that: The control module includes a third switch submodule and a fourth switch submodule; The first end of the third switch submodule is electrically connected to the control end of the fourth switch submodule, the second end of the third switch submodule is grounded, the control end of the third switch submodule is used to be electrically connected to the second power supply end, and the third switch submodule is used to be turned off when the second power supply end is powered off, and turned on when the second power supply end is powered on; The first end of the fourth switch submodule is used to be electrically connected to the second power supply end, the second end of the fourth switch submodule is electrically connected to the control end of the first switch module and the input end of the second switch module respectively, and the fourth switch submodule is used to be turned off when the third switch submodule is turned off, and to be turned on when the third switch submodule is turned on.

7. The power supply switching circuit according to claim 6, characterized in that: The third switch submodule includes a fourth switch device, a seventh resistor, and an eighth resistor; The first end of the seventh resistor is used to be electrically connected to the second power supply end, and the second end of the seventh resistor is electrically connected to the first end of the eighth resistor and the control end of the fourth switch device respectively; A first end of the fourth switch device is electrically connected to a control end of the fourth switch submodule, and a second end of the fourth switch device is grounded; A second end of the eighth resistor is grounded.

8. The power supply switching circuit according to claim 7, characterized in that: The fourth switch device is an NMOS tube; The drain of the fourth switch device is electrically connected to the control end of the fourth switch submodule, the source of the fourth switch device is grounded, and the gate of the fourth switch device is electrically connected to the second end of the seventh resistor.

9. The power supply switching circuit according to claim 6, characterized in that: The fourth switch submodule includes a fifth switch device, a ninth resistor, a tenth resistor, and a fifth parasitic diode of the fifth switch device; The first end of the fifth switch device is used to be electrically connected to the second power supply end, the second end of the fifth switch device is electrically connected to the first end of the ninth resistor, the control end of the first switch module, and the input end of the second switch module respectively, and the control end of the fifth switch device is electrically connected to the first end of the tenth resistor; The second end of the ninth resistor is electrically connected to the first end of the tenth resistor; The second end of the tenth resistor is electrically connected to the first end of the third switch submodule; The anode of the fifth parasitic diode is used to be electrically connected to the second power supply end, and the cathode of the fifth parasitic diode is electrically connected to the first end of the ninth resistor, the control end of the first switch module, and the input end of the second switch module respectively.

10. The power supply switching circuit according to claim 9, characterized in that: The fifth switch device is a PMOS tube; The drain of the fifth switching device is used to be electrically connected to the second power supply terminal, the source of the fifth switching device is electrically connected to the first end of the ninth resistor, the control end of the first switching module, and the input end of the second switching module, respectively, and the gate of the fifth switching device is electrically connected to the first end of the tenth resistor.

11. The power supply switching circuit according to claim 1, characterized in that: The control module includes a sixth diode; The anode of the sixth diode is used to be electrically connected to the second power supply end, and the cathode of the sixth diode is electrically connected to the control end of the first switch module and the input end of the second switch module respectively.

12. A board, characterized in that: The invention comprises the power supply switching circuit as claimed in any one of claims 1 to 11.

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