A method for improving the analysis capability of IC substrate circuits

Abstract

The present invention discloses a method for improving the resolution capability of IC carrier circuits; the method includes: setting a plurality of different contrast negative compensation values ​​according to an initial negative compensation value; setting a plurality of different contrast exposure energy values ​​according to an initial exposure energy value; combining the above values ​​to form a plurality of different experimental groups, and exposing each experimental group, and after the end, selecting the experimental group that can fully realize film erection; respectively testing the line width of the plurality of experimental groups that fully realize film erection, and after the testing, selecting a group of experimental groups with the highest line width accuracy, and setting the corresponding contrast negative compensation value and contrast exposure energy value for use in the exposure program of mass production. Through the structure of the present invention, the initial negative compensation value and the initial exposure energy value can be used as the basis, and the contrast negative compensation value and the contrast exposure energy value can be screened to obtain the most effective result and applied to the exposure, so that the circuit can obtain a higher resolution capability.

Description

Technical Field

[0001] The present invention relates to a circuit processing method, and in particular to a method for improving the circuit analysis capability of an IC carrier board. Background Art

[0002] The description in this section merely provides background information related to the present disclosure and does not constitute prior art.

[0003] In the existing market, with the expansion of 5G technology, more and more consumer electronic products are pursuing extreme miniaturization and mobility. Therefore, on the basis of thinner and lighter electronic product shells, they still maintain higher performance and stability requirements. Therefore, higher requirements are put forward for the IC substrate circuits used in electronic products.

[0004] IC substrate circuits refer to the connection and support structure on the integrated circuit (IC) and the printed circuit board (PCB), which involves the layout, connection method and related design technology of the IC chip and surrounding electronic components on the PCB. Its production process needs to be completed through steps such as lamination, exposure and development. Among them, the dry film used for the die stamping generally adopts a single photosensitive dry film. Under the conditions of matching different lamination, exposure and development process parameters, the ultimate goal is to achieve a film-standing state without short circuits or open circuits. However, in the case of fine line sizes, it is affected by many uncontrollable environmental factors. When the initial default negative compensation value and exposure energy value are directly used to expose the dry film, it is often difficult to obtain a high-precision, high-quality, and high-resolution finished circuit. In severe cases, it may even lead to the problem of failure to achieve film standing and reduced yield.

[0005] Currently, there is no method to improve the IC substrate circuit resolution capability that can solve the above problems. Summary of the invention

[0006] The purpose of the present invention is to provide a method for improving the resolution capability of IC substrate circuits, which can be based on the initial negative compensation value and the initial exposure energy value, compare the negative compensation value and the comparative exposure energy value for screening, and obtain the most effective result and apply it to exposure, so that the circuit can obtain a higher resolution capability.

[0007] In order to achieve the above-mentioned object, the present invention discloses the following method for improving the resolution capability of IC substrate circuits, wherein the original exposure program includes an initial negative compensation value and an initial exposure energy value; the method for improving the resolution capability of IC substrate circuits includes:

[0008] Setting a plurality of different contrast negative compensation values ​​according to the initial negative compensation value, wherein the absolute value of the difference between each contrast negative compensation value and the initial negative compensation value is within a first preset range;

[0009] Setting a plurality of different comparative exposure energy values ​​according to the initial exposure energy value, wherein the absolute value of the difference between each comparative exposure energy value and the initial exposure energy value is within a second preset range;

[0010] Each different contrast negative compensation value is combined with each different contrast exposure energy value to form a plurality of different experimental groups, and each of the experimental groups is exposed under the conditions of the same line and the same number of monitoring, and after the end, the experimental groups that can fully achieve film erection are screened out;

[0011] The line widths of the experimental groups that have all achieved film formation are tested separately. After the test is completed, the experimental group with the highest line width accuracy is selected, and the corresponding contrast negative compensation value and contrast exposure energy value are set for use in the exposure program of mass production.

[0012] Further, in the step of “setting a plurality of different contrast negative compensation values ​​according to the initial negative compensation value”, the plurality of contrast negative compensation values ​​are between -1.5 um and -2 um.

[0013] Further, in the step of “setting a plurality of different comparative exposure energy values ​​according to the initial exposure energy value”, the plurality of comparative exposure energy values ​​are between 66 mJ and 74 mJ.

[0014] Furthermore, the plurality of contrast exposure energy values ​​are set to be an arithmetic progression with a difference of 2 mJ.

[0015] Furthermore, in the step of "exposing each of the experimental groups under the conditions of the same circuit and the same number of monitoring, and screening out the experimental groups that can fully achieve film standing after the end", the size of the circuit is 12 / 12um, and the screening conditions for achieving film standing are to observe the circuit with a 40x optical microscope, and then inspect the bottom and side walls of the dry film with a scanning electron microscope. A defect-free state means that film standing is achieved without overexposure that will cause edge collapse or underexposure that will cause blurred graphics.

[0016] Further, in the step of "performing line width tests on each of the plurality of experimental groups that have all achieved film erection, and after the tests are completed, selecting a group of experimental groups with the highest line width accuracy", the tests include the mean of the line width, the standard deviation of the line width and the range of the line width.

[0017] Furthermore, the accuracy and precision of the line width of each experimental group are calculated based on the default upper specification limit, median specification limit and lower specification limit of the line width, and the precision is calculated based on the accuracy and precision of the line width of each group.

[0018] Furthermore, in the step of "combining each different contrast negative compensation value with each different contrast exposure energy value to form a plurality of different experimental groups", the number of samples in each experimental group is 144.

[0019] Furthermore, in the step of "testing the line widths of the plurality of experimental groups that all achieve vertical film formation, and after the tests, selecting the experimental group with the highest line width accuracy", 9 samples are selected from each experimental group for the test, and the monitoring is repeated 3 times.

[0020] By means of the above technical solution, the beneficial effects of the present invention are as follows:

[0021] The method for improving the resolution capability of the IC substrate circuit of the present invention can be achieved by setting a plurality of different contrast negative compensation values ​​and different contrast exposure energy values ​​within a preset range based on the initial negative compensation value and the initial exposure energy value, and then comparing and screening a plurality of experimental groups after recombining them to obtain an optional scheme that can achieve film erection, and continue to detect the line width in the optional schemes, and select the optimal contrast negative compensation value and contrast exposure energy value scheme through accuracy and apply it to actual mass production, so that the finished circuit with the highest accuracy, high quality and high resolution capability that can be achieved under existing conditions can be mass-produced. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of this specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0023] Figure 1 It is a schematic diagram of an experimental group for realizing a film-forming method for improving the resolution capability of an IC substrate circuit provided in an embodiment of this specification;

[0024] Figure 2 It is a schematic diagram of line width detection of a method for improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0025] Figure 3 It is a compression diagram of a method for improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0026] Figure 4 It is a schematic diagram of laser drilling of a method for improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0027] Figure 5 It is a schematic diagram of chemical copper of a method for improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0028] Figure 6 It is a schematic diagram of a lithography pre-processing method for improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0029] Figure 7 It is a schematic diagram of a lithography die for a method of improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0030] Figure 8 It is an exposure / development schematic diagram of a method for improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0031] Fig. 9 It is a schematic diagram of electroplating of a method for improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0032] Fig.10 It is a schematic diagram of film removal of a method for improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0033] Fig.11 It is an etching schematic diagram of a method for improving the resolution capability of IC substrate circuits provided in an embodiment of this specification;

[0034] Fig.12 This is a schematic diagram of a first screening experiment group of a method for improving the analysis capability of IC substrate circuits provided in an embodiment of this specification;

[0035] Fig.13 It is a schematic diagram of a second screening experiment group of a method for improving the analysis capability of IC substrate circuits provided in an embodiment of this specification; DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below in conjunction with the drawings in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on the embodiments in this specification, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this specification.

[0037] In the description of the present invention, it should be noted that the orientations or positional relationships indicated by the terms "upper", "middle", "lower", "inner", "outer", "front", "back", etc. are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. The terms "first", "second", and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. The following describes an implementation method of the present invention based on its overall structure.

[0038] This embodiment provides a method for improving the resolution capability of IC substrate circuits, wherein the original exposure program includes an initial negative compensation value and an initial exposure energy value; wherein the method for improving the resolution capability of IC substrate circuits includes:

[0039] Setting a plurality of different contrast negative compensation values ​​according to the initial negative compensation value, wherein the absolute value of the difference between each contrast negative compensation value and the initial negative compensation value is within a first preset range;

[0040] Setting a plurality of different comparative exposure energy values ​​according to the initial exposure energy value, wherein the absolute value of the difference between each comparative exposure energy value and the initial exposure energy value is within a second preset range;

[0041] Each different contrast negative compensation value is combined with each different contrast exposure energy value to form a plurality of different experimental groups, and each experimental group is exposed under the conditions of the same line and the same number of monitors, and after the end, the experimental group that can fully achieve film erection is screened out;

[0042] The line widths of multiple experimental groups that have all achieved film formation are tested separately. After the test, a group of experimental groups with the highest line width accuracy is selected, and the corresponding contrast negative compensation value and contrast exposure energy value are set for use in the exposure program of mass production.

[0043] For the above process, according to the processing equipment manufacturer or the original experience, the initial negative compensation value and the initial exposure energy value commonly used in the existing exposure stage are obtained. Under the production conditions of the default initial negative compensation value and the initial exposure energy value, the produced IC substrate circuits often fail to stand up. That is to say, under the influence of the existing external conditions, there may be overexposure causing the edge of the dry film to collapse, or underexposure causing blurred graphics of the dry film. Short circuits or open circuits may occur, which may affect the yield rate of the normal use of the product.

[0044] Since the basic composition of the dry film photoresist in this link is mainly composed of high molecular polymers, functional monomers, initiators and other components, and since the main component of the photoresist is the initiator, the different absorption capacity of the initiator during the exposure process is the ultimate cause of the influence, and the initiator is the original production basis, it is not easy to change from the perspective of cost, etc., so it can be judged that the initial negative compensation value and the initial exposure energy value of the exposure machine during the exposure process need to be adjusted to reasonable parameters to effectively improve the above situation. First, in this embodiment, it is necessary to select a parameter range, based on the initial negative compensation value and the initial exposure energy value, set a plurality of values ​​in the preset range that are different in size but similar in both directions of the value as available comparison negative compensation values ​​and comparison exposure energy values, and then arrange and combine the comparison negative compensation values ​​and the comparison exposure energy values, so that each comparison negative compensation value is matched with another comparison exposure energy value to form a group, and finally obtain a plurality of corresponding experimental groups, and then the next step of the experimental group screening link that can realize the film can be carried out. Specifically, the first preset range is based on the initial negative compensation value, and is a set of at least one numerical value selected within a certain reasonable deviation range before and after the initial negative compensation value, which can theoretically be used under normal working conditions of the exposure machine; similarly, the second preset range is also a set of exposure energies within a reasonable deviation range established based on the initial exposure energy value.

[0045] After eliminating the experimental groups that cannot achieve film formation, the remaining experimental groups that can achieve film formation meet the production requirements of IC substrate circuits to a certain extent, and can enter the next stage of line width detection screening. In this round of screening, it is first necessary to measure the line width of the experimental group objects that can achieve film formation for detection. After the detection results of multiple groups are gathered, the line width results of each experimental group can be analyzed through methods such as process capability analysis in statistical process control (SPC), and the corresponding accuracy values ​​in each experimental group can be obtained. Finally, the contrast negative compensation value and contrast exposure energy value of one of the experimental groups with the highest accuracy can be directly input into the exposure machine, and this data can be used in mass production to achieve the production of high-precision, high-quality, and high-resolution finished product circuits. Specifically, the exposure machine used is a Japanese ORC and IP series laser exposure machine.

[0046] In the above process, it is only necessary to perform multiple screening and calculation based on the existing equipment and parameters, and the results obtained through the final screening can be directly put into the existing exposure application, further improving the high-resolution exposure capability and achieving improved production quality. In the entire process, there is no need to add or replace equipment and raw materials in large quantities. Only a small degree of experimentation is required, which is low in cost and can significantly improve the exposure accuracy and quality.

[0047] In this embodiment, the experiment is conducted based on the SAP (Semi-Additive Process) process. Since the metal layer to be etched in the SAP process is relatively thin, the underlying metal can be removed by rapid etching, which can solve the side etching problem. Therefore, it is suitable for fine circuit manufacturing and can achieve rapid screening of experiments.

[0048] Specifically, in the SAP process of this embodiment, the other steps before the exposure experiment are all used as constants in the control variable method and the operations are kept consistent. Figure 3 In the lamination step shown in the figure, a dielectric layer is pressed by a lamination roller, and under this condition, the GL series ABF film is used; Figure 4 In the laser drilling step shown, a laser drilling device is used to drill through the first dielectric layer to form a blind hole; Figure 5 In the chemical copper step shown, a layer of chemical copper is deposited on the dielectric layer with a thickness of between 0.5um and 1um. The main purpose is to realize resin and glass cloth metallization of the non-conductive part of the hole wall around the blind hole and the dielectric layer, which serves as the base for the subsequent electroplating copper process, including hole filling, activation, acceleration, and chemical copper. The hole filling is to make the hole wall negatively charged after drilling, so that the negatively charged tin-palladium colloid (Pd / Sn Colloid) is adsorbed on the hole wall by the positive and negative attraction. The hole filling agent (surfactant) is used to adjust the electrical properties, so that the hole wall is converted from negative to positive to facilitate the adsorption of the tin-palladium colloid. The activation is to make the palladium colloid adsorbed on the hole wall, promote chemical copper precipitation, and provide copper atoms. The acceleration is to strip the tin shell to expose the tin-palladium colloid. The chemical copper is to deposit a conductive layer with good adhesion and complete coverage on the hole wall to facilitate the subsequent electroplating base; Figure 6 In the pre-lithography process shown in the figure, in order to achieve better adhesion between the dry film and copper, the copper surface needs to be roughened first. In this step, 6±2% sulfuric acid is used for micro-etching and removal of copper surface oxides. Under this condition, with the GL series ABF film, the maximum height roughness of the copper surface is between 2μm-3μm, and the average roughness is between 0.1μm-0.4μm. In addition, the brush film process can also be used with brushes of different materials to achieve this roughness condition; Figure 7 In the lithography lamination step shown, the lamination method is used, with a Japanese RD series negative photoresist dry film with a thickness of 15um-25um, and a roller is used to press the photosensitive dry film (photosensitive resin) onto the substrate. The selection is made according to the copper thickness specification, wherein the pressure is set between 0.1MPa-0.4MPa, the lamination temperature is set between 70-90 degrees Celsius, and the baking must be accompanied by a standing time of 10min-20min, which ultimately makes the adhesion of the complex salts on the copper surface better.

[0049] After the above steps, if Figure 8As shown, the exposure / development steps in this embodiment can be performed. First, the energy of ultraviolet light is used to transfer the circuit to the photoresist covered by the copper surface from the negative film as a mask, so that a photochemical reaction is formed to generate a link. Then, the exposure operation is performed using the corresponding contrast negative compensation value and contrast exposure energy value. After exposure, a 1-minute baking at 70-100 degrees Celsius is used to mainly enhance the curing degree of the exposed dry film. After the dry film (negative photoresist is used) is exposed, the solubility of the dry film decreases and it will not be dissolved in the development process, while the unexposed position will be dissolved by the developer. Among them, in the development conditions, the development spray pressure is set to 1.0bar-1.6bar, and the development temperature is set to 50-60 degrees Celsius. In addition, a breaking point test is required, which is specifically a method for checking the process capability of the developing line that mainly confirms the developing capability. In this embodiment, the steps are to directly develop after laminating on a copper plate. The entire dry film substrate must be dissolved within 40% of the slot length of the developing tank body, and the copper plate must be presented outside 40%. That is to say, in this embodiment, this condition must be less than 40% at the breaking point, and only a maximum of 40% of the area is allowed to show that the resist is completely removed to meet the requirements.

[0050] After the above batch experimental group steps are completed, the experimental group with the best exposure effect is screened out by the previous method of this embodiment.

[0051] After selecting the best experimental group as fixed parameters, the following steps need to be performed in the mass production step: Fig. 9 In the electroplating step shown, a layer of electroplated copper is deposited on the base layer of electroplated copper; Fig.10 In the film removal step shown, the solidified dry film is removed by using a film removal liquid. In this embodiment, a strong alkali (NaOH or KOH) is used to attack the solidified dry film, causing it to swell and strip, and finally the stripped dry film is removed by physical washing. Fig.11In the etching step shown, the chemical copper under the dry film (bottom) is etched away. In this embodiment, wet etching is used. Specifically, the substrate process is equipped with horizontal equipment to etch away the chemical copper at the bottom by physical flushing (spraying). In this embodiment, the etching solution is sulfuric acid and hydrogen peroxide, and finally a revetment agent is added. The revetment agent can preferentially dissolve and remove chemical copper (electroless copper) and inhibit the erosion (side etching) of the electrolytic copper part, so that there is almost no loss in line width and line thickness. At this point, the production of batch circuit boards is completed. Further, in the step of "setting multiple different contrast negative compensation values ​​according to the initial negative compensation value", the multiple contrast negative compensation values ​​are between -1.5um and -2um. Specifically, in the present embodiment, the contrast negative compensation values ​​are selected as -1.5um and -2um. At the same time, the multiple contrast exposure energy values ​​are between 66mJ and 74mJ, and the multiple contrast exposure energy values ​​are set to an arithmetic progression with a difference of 2mJ. Specifically, in the present embodiment, the contrast exposure energy values ​​are selected as 66mJ, 68mJ, 70mJ, 72mJ, and 74mJ. That is to say, the number of experimental groups after combination in the present embodiment is 10 groups. The above selection is based on the initial negative compensation value of -3um and the initial exposure energy value of 69mJ recommended by Japanese raw material manufacturers, combined with the negative compensation value of -1.5um and the exposure energy value of 70mJ of the historical best exposure quality parameters. Of course, in other embodiments, different numbers and different numerical spans of comparison negative compensation values ​​and comparison exposure energy values ​​can be selected as needed, but this may lead to too many experimental groups, affecting the experimental screening efficiency, or too few experimental groups, affecting the performance of the final effective results.

[0052] Furthermore, in the step of "exposing each experimental group under the conditions of the same circuit and the same number of monitoring, and screening out the experimental groups that can fully achieve film standing after the end", the size of the circuit is 12 / 12um, the number of detections is 144 per group, and the screening conditions for achieving film standing are to observe the circuit with a 40x optical microscope, and then detect the bottom and side walls of the dry film with a scanning electron microscope. There is no overexposure that will cause edge collapse, and there is no underexposure that will cause blurred graphics. A defect-free state is to achieve film standing. Among them, the scanning electron microscope is SEM (Scanning Electron Microscope), and its electron gun uses an electron beam to detect the bottom and side walls of the dry film to ensure that it has the expected electrical properties. Specifically, the control variables are used. Except for the differences in the contrast negative compensation value and the contrast exposure energy value of each experimental group, the size of the circuit used for the experimental group, the exposure time, and the number of samples in each experimental group are all the same, and it is concluded that Fig.12 The experimental data are shown.

[0053] Combination Figure 1As shown, from Fig.12 It can be seen from the experimental results that among the above 10 experimental groups, experimental group 5 using the contrast negative compensation value of 74mJ and the contrast exposure energy value of -1.5um, experimental group 9 using the contrast negative compensation value of 72mJ and the contrast exposure energy value of -2um, and experimental group 10 using the contrast negative compensation value of 74mJ and the contrast exposure energy value of -2um, the above 3 groups have passed the screening of whether the film can be formed. Therefore, the above 3 groups of data in this embodiment can enter the next link of line width detection.

[0054] Furthermore, in the step of "testing the line width of multiple experimental groups that have all achieved film erection, and after the test is completed, selecting a group of experimental groups with the highest line width accuracy", the test includes the mean of the line width, the standard deviation of the line width, and the range of the line width. Among them, the accuracy and precision of the line width of each experimental group are calculated based on the default upper specification limit, median specification limit, and lower specification limit of the line width, and the accuracy is calculated based on the accuracy and precision of each group of line width. Among them, the analysis is performed through the process capability analysis (Process Capability Analysis) in statistical process control (SPC).

[0055] In this embodiment, USL is the upper specification limit, which defaults to 17um; T is the median specification limit, which defaults to 12um; LSL is the lower specification limit, which defaults to 7um; μ is the mean value of the sample, and σ is the process standard deviation value.

[0056] The accuracy is the Ca value, which is to see the degree of deviation of the process average value from the center value of the specification; a positive Ca value indicates that the actual performance value is too high, and a negative Ca value indicates that the actual performance value is too low. The smaller the Ca, the closer the actual performance is to the target value.

[0057] Precision is the Cp value, which measures the difference between the process variation width and the upper and lower limits of the specification, that is, the number of ±3σ (i.e. 6σ) that can be accommodated between the upper and lower limits of the specification. The smaller the variation of the process, the better the precision;

[0058] Precision is the Cpk value, which is a comprehensive indicator of the two values ​​of Cp and Ca. It takes into account the position of the process average value and the degree of variation of the process, and best reflects the actual effect pursued by this embodiment.

[0059] Specifically, the accuracy is calculated as Ca = (μ-T) / ((USL-LSL) / 2);

[0060] The calculation method of accuracy is Cp=(USL-LSL) / (6σ);

[0061] The calculation method of accuracy is Cpk=(1-|Ca|)Cp.

[0062] In summary, for the data of the three experimental groups, 9 samples were selected from each experimental group for testing, and the monitoring was repeated 3 times. The results are as follows Fig.13 shown.

[0063] For specific results, please refer to Figure 2 Finally, it can be concluded that experimental group 9 has the highest accuracy, that is, the contrast negative compensation value -2um and the contrast exposure energy value 72mJ in experimental group 9 can be adopted and set in the exposure machine for exposure operations in mass production, which has the best accuracy and can significantly improve the resolution capability of IC substrate circuits.

[0064] In addition, in another embodiment, after it is concluded that experimental group 9 has the highest accuracy, a shear force test step is required for experimental group 9, and the shear force of the final screened IC substrate circuit must be greater than 0.3kN / m, preferably, controlled between 0.3kN / m-0.4kN / m, so as to meet the quality and reliability requirements for subsequent mass production.

[0065] Furthermore, in the above embodiment, the matched substrate is of a unified model, specifically a substrate product with a size of 510mmx510mm, a thickness of 0.2mm-2.4mm, a line grade of 12-100um and a copper thickness of 10-30um.

[0066] Although different specific embodiments are mentioned in the content of this application, this application is not limited to the situations described in the industry standards or embodiments, etc. Some industry standards or slightly modified implementation plans based on the implementation of the custom methods or embodiments can also achieve the same, equivalent or similar, or predictable implementation effects after deformation of the above embodiments. The embodiments of data acquisition, processing, output, judgment methods, etc. after these modifications or deformations can still fall within the scope of the optional implementation plans of this application.

[0067] Although the present application has been described through embodiments, those skilled in the art will appreciate that there are many modifications and changes to the present application without departing from the spirit of the present application. It is intended that the attached embodiments include these modifications and changes without departing from the present application.

Claims

1. A method for improving the analysis capability of IC substrate circuits, wherein: The original exposure procedure includes an initial negative compensation value and an initial exposure energy value; characterized in that the method for improving the resolution capability of the IC substrate circuit includes: Setting a plurality of different contrast negative compensation values ​​according to the initial negative compensation value, wherein the absolute value of the difference between each contrast negative compensation value and the initial negative compensation value is within a first preset range; Setting a plurality of different comparative exposure energy values ​​according to the initial exposure energy value, wherein the absolute value of the difference between each comparative exposure energy value and the initial exposure energy value is within a second preset range; Each different contrast negative compensation value is combined with each different contrast exposure energy value to form a plurality of different experimental groups, and each of the experimental groups is exposed under the conditions of the same line and the same number of monitoring, and after the end, the experimental groups that can fully achieve film erection are screened out; Performing line width tests on the experimental groups that all achieve film erection, and after the tests are completed, selecting the experimental group with the highest line width accuracy, and setting the corresponding negative contrast compensation value and the contrast exposure energy value for use in a mass production exposure program; Among them, a plurality of the contrast negative compensation values ​​are between -1.5um and -2um, and a plurality of the contrast exposure energy values ​​are between 66mJ and 74mJ.

2. The method for improving the resolution capability of IC substrate circuit according to claim 1, characterized in that: The plurality of contrast exposure energy values ​​are set to be an arithmetic progression with a difference of 2 mJ.

3. The method for improving the resolution capability of IC substrate circuit according to claim 1, characterized in that: In the step of "exposing each experimental group under the conditions of the same circuit and the same number of monitoring, and screening out the experimental group that can achieve film standing after the end", the size of the circuit is 12 / 12um, and the screening condition for achieving film standing is to observe the circuit with a 40x optical microscope, and then inspect the bottom and side walls of the dry film with a scanning electron microscope. The defect-free state without overexposure that will cause edge collapse and underexposure that will cause blurred graphics means that the film standing is achieved.

4. The method for improving the resolution capability of IC substrate circuits according to claim 1, characterized in that: In the step of "testing the line widths of the plurality of experimental groups that all achieve vertical film formation, and after the test, selecting the experimental group with the highest line width accuracy", the test includes the mean of the line width, the standard deviation of the line width and the range of the line width.

5. The method for improving the resolution capability of IC substrate circuits according to claim 4, characterized in that: The accuracy and precision of the line width of each experimental group are calculated based on the default upper specification limit, median specification limit and lower specification limit of the line width, and the precision is calculated based on the accuracy and precision of the line width of each group.

6. The method for improving the resolution capability of IC substrate circuits according to claim 1, characterized in that: In the step of "combining each different contrast negative compensation value with each different contrast exposure energy value to form a plurality of different experimental groups", the number of samples in each experimental group is 144.

7. The method for improving the resolution capability of IC substrate circuits according to claim 6, characterized in that: In the step of "testing the line widths of the plurality of experimental groups that all achieve vertical film formation, and after the test, selecting the experimental group with the highest line width accuracy", 9 samples are selected from each experimental group for the test, and the test is repeated 3 times.

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