Hardware-accelerated digital GPU simulation method and system
Through the hardware-accelerated digital GPU simulation method, the GPU operation is disassembled into a virtual queue using SDL2 and virtual IO layers, and local GPU hardware acceleration is called, solving the problems of low GPU simulation efficiency and large CPU resource utilization in the existing technology, and realizing the Efficient GPU simulation and high frame rate display.
Patent Information
- Application Number
- CN202411354686.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-27
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2044-09-27
AI Technical Summary
The existing GPU simulation technology is inefficient, especially the software direct simulation solution occupies a large amount of CPU resources, resulting in poor display frame rate, and the virtualization method has problems such as network transmission performance loss and API search performance loss.
Using hardware-accelerated digital GPU simulation method, the front-end display layer uses SDL2 to simulate the display, model the virtual GPU module and the back-end driver interaction, and use the virtual IO layer and the virtual IO ring cache layer to disassemble the GPU operation into a virtual queue, and call it The local GPU hardware accelerates the completion of operations and returns the calculation results through the virtual GPU module.
It improves CPU execution efficiency, reduces the consumption of host CPU resources, improves the computing power and display frame rate of digital GPUs, solves cross-platform compatibility problems, and ensures efficient GPU simulation performance.
Smart Images

Figure CN118885301B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of digital GPU simulation, and in particular to a hardware-accelerated digital GPU simulation method and system. Background Art
[0002] The current GPU simulation field mainly includes three simulation solutions:
[0003] 1. Direct simulation by software. Since GPU contains a large number of parallel computing processing units, and host CPU contains a large number of logic control units, the two have different uses and design architectures. Therefore, it is inefficient to use a general host CPU to simulate a virtual machine GPU. However, this solution can be used for multi-GPU computer system simulation.
[0004] 2. Graphics card pass-through: Using special interfaces provided by different graphics card manufacturers to enable virtual machines to directly use GPU hardware. This solution has high virtual GPU efficiency, but the GPU cannot be shared and is not suitable for simulating multi-GPU computer systems.
[0005] 3. API forwarding: This solution allocates GPU hardware to virtual machines through time slices, thus realizing virtual multi-system GPU sharing. At the same time, the virtual machines also have higher simulation operation efficiency.
[0006] Graphics Processing Unit (GPU), also known as visual processor or display chip, mainly performs floating-point operations and parallel operations. Its floating-point operation and parallel operation speed can be hundreds of times faster than CPU. With the expansion of digital CPU simulation technology in airborne display systems, digital GPU has also become an urgent need. Currently, the commonly used GPU simulation mostly uses software to simulate OpenGL rendering. Its internal GPU rendering part uses llvmpipe, which converts all GPU operations into CPU operations. Therefore, it has high accessibility, but occupies a large amount of CPU resources, resulting in poor display frame rate and reducing the CPU execution efficiency.
[0007] In the prior art (Chinese patent application number 202010134209.2, which discloses "GPU virtualization implementation system and method based on API redirection technology"), the host machine is a remote server, the virtual machine is a local client, and the network transmission brings performance loss, and the performance is not as good as the local application's direct data reference method.
[0008] In the prior art (Chinese patent with application number 202010386295.6, which discloses "GPU virtualization method, system and medium based on graphics library API proxy"), the virtual machine uses inter-process communication to transmit API information to the host machine, which also has certain performance losses, and the method of searching API also has performance losses. Summary of the invention
[0009] In view of the defects in the prior art, an object of the present invention is to provide a hardware-accelerated digital GPU simulation method and system.
[0010] The hardware-accelerated digital GPU simulation method provided by the present invention includes:
[0011] Step 1: Use the open source software SDL2 in the front-end display layer to complete the front-end display simulation and simulate the display and its interface;
[0012] Step 2: Model and implement the virtual GPU module, and use a unified interface to implement the interaction between different types of virtual IO devices and backend drivers;
[0013] Step 3: Model and implement the virtual IO layer, using the virtual queue interface as a bridge for front-end and back-end communication. Different types of devices use different numbers of virtual queues.
[0014] Step 4: Model and implement a virtual IO ring cache layer, decompose GPU operations into different virtual queues, call local GPU hardware acceleration to complete the operation, and then return the operation results to the virtual IO ring cache layer;
[0015] Step 5: The local GPU hardware accelerated computing result is returned to the front-end display layer through the virtual GPU module to complete the display of the GPU computing result.
[0016] Preferably, the step 1 comprises:
[0017] Step 1.1: The front-end display layer uses the open source software SDL2 to complete the simulation of the display system display interface, including screen display and touch screen operation, supports different display frame rates and resolution settings, and supports dynamic scaling of display windows;
[0018] Step 1.2: Capture the coordinates of the mouse click point, and convert them into corresponding function call events through preset command configuration analysis to complete the mouse click event simulation;
[0019] Step 1.3: The front-end display layer and the virtual GPU module exchange data, convert the screen switching triggered by the click operation of the display screen into a GPU drawing and rendering operation command, use the hardware GPU capabilities encapsulated by the virtual GPU module to complete the drawing and rendering operations, and load the GPU operation results to the front-end display layer to complete the display screen refresh;
[0020] Step 1.4: Display the screen Use Gallium TGSI renderer to accelerate 3D rendering and screen display.
[0021] Preferably, step 2 comprises:
[0022] Step 2.1: The virtual GPU module intercepts the OpenGL call command of the last display system application through the virtual driver layer function, and converts the called OpenGL function command into a unified encapsulated virtual GPU call function interface through a preset command conversion table;
[0023] Step 2.2: The virtual GPU module calls the interface to perform unified interface processing on different GPU models and convert them into standard virtual IO calls.
[0024] Preferably, the step 3 comprises:
[0025] Step 3.1: The application discovers the virtual IO device by loading the configuration information of the operating system and performs unified operation and mounting;
[0026] Step 3.2: After the virtual IO completes the operation and mounting, it automatically covers the hardware IO call;
[0027] Step 3.3: Virtual IO calls use a unified driver interface;
[0028] Step 3.4: Classify and disassemble the virtual IO calls into different packaged virtual task queues according to different IO interface types, map the corresponding virtual GPU model according to the specifications of the actual hardware GPU, and complete the virtual queue settings of the GPU model through configuration to adapt to a variety of GPU graphics cards.
[0029] Preferably, step 4 comprises:
[0030] Step 4.1: Virtual IO ring buffer layer is a shared memory used for virtual IO data transmission;
[0031] Step 4.2: Obtain the IO request submitted by the front-end device through the virtual IO ring cache layer, and convert the IO request into a virtual task queue: initialize it through the data structure of the back-end driver, set the information of the IO device, and combine it into the virtual IO device, set the host status, configure and initialize the virtual queue, bind a virtual queue and queue processing function to each IO device, and bind the device processing function to process the IO request;
[0032] Step 4.3: The virtual task queue calls the local host GPU hardware resources to complete the IO request processing vertex, texture, and lighting data through the configured hardware acceleration technology, and converts them into two-dimensional images, including matrix transformation and lighting calculation operation commands.
[0033] The hardware-accelerated digital GPU simulation system provided by the present invention includes:
[0034] Module M1: Use the open source software SDL2 in the front-end display layer to complete the front-end display simulation, simulate the display and its interface;
[0035] Module M2: Modeling and implementing the virtual GPU module, using a unified interface to implement the interaction between different types of virtual IO devices and backend drivers;
[0036] Module M3: Modeling and implementing the virtual IO layer, using the virtual queue interface as a bridge for front-end and back-end communication. Different types of devices use different numbers of virtual queues.
[0037] Module M4: Modeling and implementing a virtual IO ring cache layer, breaking down GPU operations into different virtual queues, calling local GPU hardware acceleration to complete the operation, and then returning the operation results to the virtual IO ring cache layer;
[0038] Module M5: The local GPU hardware accelerated computing results are returned to the front-end display layer through the virtual GPU module to complete the display of the GPU computing results.
[0039] Preferably, the module M1 comprises:
[0040] Module M1.1: The front-end display layer uses the open source software SDL2 to complete the simulation of the display system display interface, including screen display and touch screen operation, supports different display frame rates and resolution settings, and supports dynamic scaling of display windows;
[0041] Module M1.2: Capture the coordinates of the mouse click point, convert them into corresponding function call events through preset command configuration analysis, and complete the mouse click event simulation;
[0042] Module M1.3: The front-end display layer and the virtual GPU module exchange data, converting the screen switching triggered by the click operation of the display screen into a GPU drawing and rendering operation command, using the hardware GPU capabilities encapsulated by the virtual GPU module to complete the drawing and rendering operations, and at the same time loading the GPU operation results to the front-end display layer to complete the display screen refresh;
[0043] Module M1.4: Display uses Gallium TGSI renderer to accelerate 3D rendering and display.
[0044] Preferably, the module M2 comprises:
[0045] Module M2.1: The virtual GPU module intercepts the OpenGL call command of the last display system application through the virtual driver layer function, and converts the called OpenGL function command into a unified encapsulated virtual GPU call function interface through a preset command conversion table;
[0046] Module M2.2: The virtual GPU module call interface performs unified interface processing on different GPU models and converts them into standard virtual IO calls.
[0047] Preferably, the module M3 comprises:
[0048] Module M3.1: The application discovers the virtual IO device by loading the configuration information of the operating system and performs unified operation and mounting;
[0049] Module M3.2: After the virtual IO is mounted, it automatically covers the hardware IO call;
[0050] Module M3.3: Virtual IO calls use a unified driver interface;
[0051] Module M3.4: Classify and disassemble virtual IO calls into different packaged virtual task queues according to different IO interface types, map the corresponding virtual GPU model according to the specifications of the actual hardware GPU, and complete the virtual queue settings of the GPU model through configuration to adapt to a variety of GPU graphics cards.
[0052] Preferably, the module M4 comprises:
[0053] Module M4.1: Virtual IO ring cache layer is a shared memory for virtual IO data transmission;
[0054] Module M4.2: Obtain IO requests submitted by front-end devices through the virtual IO ring cache layer, and convert IO requests into virtual task queues: initialize through the data structure of the back-end driver, set the information of the IO device, and combine it into the virtual IO device, set the host status, configure and initialize the virtual queue, bind a virtual queue and queue processing function to each IO device, and bind the device processing function to process the IO request;
[0055] Module M4.3: The virtual task queue calls the local host GPU hardware resources to complete the IO request processing vertex, texture, and lighting data through the configured hardware acceleration technology, and converts them into two-dimensional images, including matrix transformation and lighting calculation operation commands.
[0056] Compared with the prior art, the present invention has the following beneficial effects:
[0057] (1) Through the virtualized IO framework, a communication framework and programming interface between upper-layer applications and various models of virtualized GPUs are provided, which reduces the compatibility issues caused by cross-platform and greatly improves the efficiency of driver development;
[0058] (2) Improve the execution efficiency of the host CPU by reducing the consumption of host CPU resources by the digital GPU;
[0059] (3) The computing power of the digital GPU is improved through the host GPU hardware acceleration technology, ensuring the display frame rate and resolution of the digital GPU. BRIEF DESCRIPTION OF THE DRAWINGS
[0060] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:
[0061] Figure 1 A schematic diagram of a hardware accelerated digital GPU simulation method;
[0062] Figure 2 Schematic diagram of the hardware-accelerated digital GPU simulation process. DETAILED DESCRIPTION
[0063] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, several changes and improvements can also be made without departing from the concept of the present invention. These all belong to the protection scope of the present invention.
[0064] Example 1
[0065] The present invention provides a hardware-accelerated digital GPU simulation method, comprising:
[0066] Step 1: The front-end display layer uses SDL2 to complete the front-end display simulation, simulating the display and its interface;
[0067] Step 2: Model and implement the virtual GPU module. Different types of virtual IO devices interact with the backend driver using a unified interface.
[0068] Step 3: Model and implement the virtual IO layer and the virtual queue interface as a bridge for front-end and back-end communication. Different types of devices use different numbers of virtual queues.
[0069] Step 4: Model and implement a virtual IO ring cache layer, decompose GPU operations into different virtual queues to call the local GPU to complete the operation, and then return the operation results to the virtual IO ring cache layer;
[0070] Step 5: The local GPU hardware accelerated computing result is returned to the front-end display layer through the virtual GPU to complete the display of the GPU computing result.
[0071] The step 1 comprises the following steps:
[0072] Step 1.1: The front-end display layer uses SDL2 to complete the simulation of the display system display interface, including screen display and touch screen operation, supports different display frame rates and resolution settings, and supports dynamic scaling of display windows;
[0073] Step 1.2: Capture the coordinates of the mouse click point, and convert them into corresponding function call events through the preset command configuration analysis to complete the mouse click event simulation;
[0074] Step 1.3: The front-end display layer and the virtual GPU module exchange data, convert the screen switching triggered by the click operation of the display screen into a GPU drawing and rendering operation command, use the hardware GPU capabilities encapsulated by the virtual GPU module to complete the drawing and rendering operations, and load the GPU operation results to the front-end display layer to complete the display screen refresh;
[0075] Step 1.4: Display the screen Use Gallium TGSI renderer to accelerate 3D rendering and screen display.
[0076] The step 2 comprises the following steps:
[0077] Step 2.1: The virtual GPU module intercepts the OpenGL call command of the last display system application through the virtual driver layer function, and converts the called OpenGL function command into a unified encapsulated virtual GPU call function interface through the set command conversion table;
[0078] Step 2.2: The virtual GPU call interface performs unified interface processing on different GPU models and converts them into standard virtual IO calls.
[0079] The step 3 comprises the following steps:
[0080] Step 3.1: The application discovers the virtual IO device by loading the configuration information of the operating system and performs unified operation and mounting;
[0081] Step 3.2: After the virtual IO completes the operation and mounting, it automatically covers the hardware IO call;
[0082] Step 3.3: Virtual IO calls reduce cross-platform compatibility issues and use a unified driver interface;
[0083] Step 3.4: Classify and disassemble the virtual IO calls into different packaged virtual task queues according to different IO interface types, map the corresponding virtual GPU model according to the specifications of the actual hardware GPU, and complete the virtual queue settings of the GPU model through configuration to adapt to a variety of GPU graphics cards.
[0084] The step 4 comprises the following steps:
[0085] Step 4.1: Virtual IO ring buffer layer is a shared memory used for virtual IO data transmission;
[0086] Step 4.2: Obtain the IO request submitted by the front-end device through the virtual IO ring cache layer, and convert the IO request into a virtual task queue: initialize it through the data structure of the back-end driver, set the information of the IO device, and combine it into the virtual IO device, set the host status, configure and initialize the virtual queue, bind a virtual queue and queue processing function to each IO device, and bind the device processing function to process the IO request;
[0087] Step 4.3: The virtual task queue calls the local host GPU hardware resources to complete the IO request processing vertex, texture, and lighting data through the configured hardware acceleration technology, and converts them into two-dimensional images, including matrix transformation and lighting calculation operation commands.
[0088] The step 5 comprises the following steps:
[0089] Step 5.1: After the virtual task queue completes the GPU operation, it returns the result to the virtual IO ring buffer;
[0090] Step 5.2: The virtual IO call reads the GPU operation result from the virtual IO ring buffer and returns it to the virtual GPU;
[0091] Step 5.3: The virtual GPU returns the calculation results to the front-end display layer for use.
[0092] Example 2
[0093] The present invention also provides a hardware-accelerated digital GPU simulation system, which can be implemented by executing the process steps of the hardware-accelerated digital GPU simulation method, that is, those skilled in the art can understand the hardware-accelerated digital GPU simulation method as a preferred implementation of the hardware-accelerated digital GPU simulation system.
[0094] The hardware-accelerated digital GPU simulation system provided by the present invention comprises: module M1: using open source software SDL2 in the front-end display layer to complete the front-end display simulation, simulating the display and its interface part; module M2: modeling and implementing the virtual GPU module, using a unified interface to implement the interaction between different types of virtual IO devices and back-end drivers; module M3: modeling and implementing the virtual IO layer, using the virtual queue interface as a bridge for front-end and back-end communication, and different types of devices use different numbers of virtual queues; module M4: modeling and implementing the virtual IO ring cache layer, disassembling the GPU operation into different virtual queues, calling the local GPU hardware acceleration to complete the operation, and then returning the operation result to the virtual IO ring cache layer; module M5: the local GPU hardware acceleration operation result is returned to the front-end display layer through the virtual GPU module to complete the display of the GPU operation result.
[0095] The module M1 includes: module M1.1: the front-end display layer uses the open source software SDL2 to complete the simulation of the display system display interface, including screen display and touch screen operation, supports different display frame rates and resolution settings, and supports dynamic scaling of the display window; module M1.2: through the coordinate capture of the mouse click point, it is converted into a corresponding function call event through the preset command configuration analysis to complete the mouse click event simulation; module M1.3: the front-end display layer and the virtual GPU module interact with data, and the click operation of the display screen triggers the screen switch to be converted into a GPU drawing rendering operation operation command, and the hardware GPU capability encapsulated by the virtual GPU module is used to complete the drawing and rendering operations, and the GPU operation operation results are loaded to the front-end display layer to complete the display screen refresh; module M1.4: the display screen uses the Gallium TGSI renderer to accelerate 3D rendering and screen display.
[0096] The module M2 includes: module M2.1: the virtual GPU module intercepts the OpenGL call command of the last display system application through the virtual driver layer function, and converts the called OpenGL function command into a unified encapsulated virtual GPU call function interface through a preset command conversion table; module M2.2: the virtual GPU module call interface performs unified interface processing on different GPU models and converts them into standard virtual IO calls.
[0097] The module M3 includes: module M3.1: the application discovers the virtual IO device by loading the configuration information of the operating system and performs unified operation mounting; module M3.2: after the virtual IO completes the operation mounting, it automatically completes the coverage of the hardware IO call; module M3.3: the virtual IO call uses a unified driver interface; module M3.4: the virtual IO call is classified and disassembled into different packaged virtual task queues according to different IO interface types, the corresponding virtual GPU model is mapped according to the specifications of the actual hardware GPU, and the virtual queue setting of the GPU model is completed through configuration to adapt to a variety of GPU graphics cards.
[0098] The module M4 includes: module M4.1: a virtual IO ring cache layer is a shared memory used for virtual IO data transmission; module M4.2: obtaining the IO request submitted by the front-end device through the virtual IO ring cache layer, and converting the IO request into a virtual task queue: initializing through the data structure of the back-end driver, setting the information of the IO device, and combining it with the virtual IO device, setting the host status, configuring and initializing the virtual queue, binding a virtual queue and queue processing function for each IO device, and binding the device processing function to process the IO request; module M4.3: the virtual task queue calls the local host GPU hardware resources to complete the processing of vertices, textures, and lighting data of the IO request through the configured hardware acceleration technology, and converts them into two-dimensional images, including matrix transformation and lighting calculation operation commands.
[0099] Those skilled in the art know that, in addition to implementing the system, device and its various modules provided by the present invention in a purely computer-readable program code, it is entirely possible to implement the same program in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers and embedded microcontrollers by logically programming the method steps. Therefore, the system, device and its various modules provided by the present invention can be considered as a hardware component, and the modules included therein for implementing various programs can also be considered as structures within the hardware component; the modules for implementing various functions can also be considered as both software programs for implementing the method and structures within the hardware component.
[0100] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily.
Claims
1. A hardware-accelerated digital GPU simulation method, characterized in that: include: Step 1: Use the open source software SDL2 in the front-end display layer to complete the front-end display simulation and simulate the display and its interface; Step 2: Model and implement the virtual GPU module, and use a unified interface to implement the interaction between different types of virtual IO devices and backend drivers; Step 3: Model and implement the virtual IO layer, using the virtual queue interface as a bridge for front-end and back-end communication. Different types of devices use different numbers of virtual queues. Step 4: Model and implement a virtual IO ring cache layer, decompose GPU operations into different virtual queues, call local GPU hardware acceleration to complete the operation, and then return the operation results to the virtual IO ring cache layer; Step 5: The local GPU hardware accelerated computing result is returned to the front-end display layer through the virtual GPU module to complete the display of the GPU computing result; The step 4 comprises: Step 4.1: Virtual IO ring buffer layer is a shared memory used for virtual IO data transmission; Step 4.2: Obtain the IO request submitted by the front-end device through the virtual IO ring cache layer, and convert the IO request into a virtual task queue: initialize it through the data structure of the back-end driver, set the information of the IO device, and combine it into the virtual IO device, set the host status, configure and initialize the virtual queue, bind a virtual queue and queue processing function to each IO device, and bind the device processing function to process the IO request; Step 4.3: The virtual task queue calls the local host GPU hardware resources to complete the IO request processing vertex, texture, and lighting data through the configured hardware acceleration technology, and converts them into two-dimensional images, including matrix transformation and lighting calculation operation commands.
2. The hardware-accelerated digital GPU simulation method according to claim 1, characterized in that: The step 1 comprises: Step 1.1: The front-end display layer uses the open source software SDL2 to complete the simulation of the display system display interface, including screen display and touch screen operation, supports different display frame rates and resolution settings, and supports dynamic scaling of display windows; Step 1.2: Capture the coordinates of the mouse click point, and convert them into corresponding function call events through preset command configuration analysis to complete the mouse click event simulation; Step 1.3: The front-end display layer and the virtual GPU module exchange data, convert the screen switching triggered by the click operation of the display screen into a GPU drawing and rendering operation command, use the hardware GPU capabilities encapsulated by the virtual GPU module to complete the drawing and rendering operations, and load the GPU operation results to the front-end display layer to complete the display screen refresh; Step 1.4: Display the screen Use Gallium TGSI renderer to accelerate 3D rendering and screen display.
3. The hardware-accelerated digital GPU simulation method according to claim 1, characterized in that: The step 2 comprises: Step 2.1: The virtual GPU module intercepts the OpenGL call command of the last display system application through the virtual driver layer function, and converts the called OpenGL function command into a unified encapsulated virtual GPU call function interface through a preset command conversion table; Step 2.2: The virtual GPU module calls the interface to perform unified interface processing on different GPU models and convert them into standard virtual IO calls.
4. The hardware accelerated digital GPU simulation method according to claim 1, characterized in that: The step 3 comprises: Step 3.1: The application discovers the virtual IO device by loading the configuration information of the operating system and performs unified operation and mounting; Step 3.2: After the virtual IO completes the operation and mounting, it automatically covers the hardware IO call; Step 3.3: Virtual IO calls use a unified driver interface; Step 3.4: Classify and disassemble the virtual IO calls into different packaged virtual task queues according to different IO interface types, map the corresponding virtual GPU model according to the specifications of the actual hardware GPU, and complete the virtual queue settings of the GPU model through configuration to adapt to a variety of GPU graphics cards.
5. A hardware-accelerated digital GPU simulation system, characterized in that: include: Module M1: Use the open source software SDL2 in the front-end display layer to complete the front-end display simulation, simulate the display and its interface; Module M2: Modeling and implementing the virtual GPU module, using a unified interface to implement the interaction between different types of virtual IO devices and backend drivers; Module M3: Modeling and implementing the virtual IO layer, using the virtual queue interface as a bridge for front-end and back-end communication. Different types of devices use different numbers of virtual queues. Module M4: Modeling and implementing a virtual IO ring cache layer, breaking down GPU operations into different virtual queues, calling local GPU hardware acceleration to complete the operation, and then returning the operation results to the virtual IO ring cache layer; Module M5: The local GPU hardware acceleration calculation results are returned to the front-end display layer through the virtual GPU module to complete the display of the GPU calculation results; The module M4 comprises: Module M4.1: Virtual IO ring cache layer is a shared memory for virtual IO data transmission; Module M4.2: Obtain IO requests submitted by front-end devices through the virtual IO ring cache layer, and convert IO requests into virtual task queues: initialize through the data structure of the back-end driver, set the information of the IO device, and combine it into the virtual IO device, set the host status, configure and initialize the virtual queue, bind a virtual queue and queue processing function to each IO device, and bind the device processing function to process the IO request; Module M4.3: The virtual task queue calls the local host GPU hardware resources to complete the IO request processing vertex, texture, and lighting data through the configured hardware acceleration technology, and converts them into two-dimensional images, including matrix transformation and lighting calculation operation commands.
6. The hardware accelerated digital GPU simulation system according to claim 5, characterized in that: The module M1 comprises: Module M1.1: The front-end display layer uses the open source software SDL2 to complete the simulation of the display system display interface, including screen display and touch screen operation, supports different display frame rates and resolution settings, and supports dynamic scaling of display windows; Module M1.2: Capture the coordinates of the mouse click point, convert them into corresponding function call events through preset command configuration analysis, and complete the mouse click event simulation; Module M1.3: The front-end display layer and the virtual GPU module exchange data, converting the screen switching triggered by the click operation of the display screen into a GPU drawing and rendering operation command, using the hardware GPU capabilities encapsulated by the virtual GPU module to complete the drawing and rendering operations, and at the same time loading the GPU operation results to the front-end display layer to complete the display screen refresh; Module M1.4: Display uses Gallium TGSI renderer to accelerate 3D rendering and display.
7. The hardware accelerated digital GPU simulation system according to claim 5, characterized in that: The module M2 comprises: Module M2.1: The virtual GPU module intercepts the OpenGL call command of the last display system application through the virtual driver layer function, and converts the called OpenGL function command into a unified encapsulated virtual GPU call function interface through a preset command conversion table; Module M2.2: The virtual GPU module call interface performs unified interface processing on different GPU models and converts them into standard virtual IO calls.
8. The hardware accelerated digital GPU simulation system according to claim 5, characterized in that: The module M3 comprises: Module M3.1: The application discovers the virtual IO device by loading the configuration information of the operating system and performs unified operation and mounting; Module M3.2: After the virtual IO is mounted, it automatically covers the hardware IO call; Module M3.3: Virtual IO calls use a unified driver interface; Module M3.4: Classify and disassemble virtual IO calls into different packaged virtual task queues according to different IO interface types, map the corresponding virtual GPU model according to the specifications of the actual hardware GPU, and complete the virtual queue settings of the GPU model through configuration to adapt to a variety of GPU graphics cards.
Citation Information
Patent Citations
GPU virtualization implementation system and method based on API redirection technology
CN111399976A
GPU virtualization method and system based on graphics library API agent and medium
CN111552554A
GPU simulation method and system based on virtual simulation platform
CN116010037A