Intelligent control method for TSV etching equipment

Abstract

The present invention discloses an intelligent control method for TSV etching equipment, which belongs to the field of intelligent control, including: using preset etching process parameters to perform deep hole etching, and in the etching process, forming an etching depth sequence to obtain substrate component characteristic information; according to the substrate component characteristic information and the preset etching process parameters, obtaining the hole wall etching morphology, thereby obtaining conductor deposition defect information and electrical connection quality attenuation information; according to the electrical connection quality attenuation information, making decisions to adjust the step size; adjusting and optimizing the preset etching process parameters to obtain the optimal etching process parameters; continuing etching control, and continuing to optimize and control the etching process parameters within the next preset time period. By real-time detection of etching depth, predicting conductor filling defects and electrical connection quality, and dynamically optimizing etching process parameters accordingly, the technical effect of improving TSV deep hole etching quality, improving conductor filling effect, and ensuring chip electrical performance is achieved.

Description

Technical Field

[0001] The present invention relates to the field of intelligent control, and in particular to an intelligent control method for TSV etching equipment. Background Art

[0002] In semiconductor chip manufacturing, TSV technology is widely used to achieve vertical electrical connections between various functional layers inside the chip. One of the key links in TSV manufacturing is to etch deep holes with high aspect ratios on the silicon substrate and deposit insulating layers and metal conductors in the holes to achieve good insulation and conduction characteristics. However, the TSV deep hole etching process in the prior art lacks real-time monitoring and dynamic adjustment methods, resulting in the inability to accurately control the etching state. The inhomogeneity of the silicon substrate composition, such as uneven distribution of impurities, will affect the etching effect, making the actual hole wall morphology prone to defects such as tilt and roughness. These defects will cause gaps and falling off during the subsequent deposition of insulating layers and metal conductors, seriously affecting the electrical connection quality and reliability of the chip. Summary of the invention

[0003] This application provides an intelligent control method for TSV etching equipment, aiming to solve the technical problem in the prior art that the control of TSV etching process parameters is not accurate enough, it is difficult to obtain the ideal hole wall morphology, and the subsequent conductor filling process is prone to defects, which ultimately affects the quality of chip electrical connections.

[0004] The intelligent control method for TSV etching equipment disclosed in the present application comprises: using preset etching process parameters, performing deep hole etching processing on the etching area of ​​the substrate based on the TSV etching equipment, and in the etching process, continuously detecting and collecting the etching depth information in the deep hole formed by etching within a preset time period through interference measurement to form an etching depth sequence; performing substrate component characteristic analysis according to the etching depth sequence to obtain substrate component characteristic information; performing deep hole wall etching morphology prediction according to the substrate component characteristic information and the preset etching process parameters to obtain the hole wall etching morphology; and performing deep hole wall etching morphology prediction according to the hole wall etching morphology. Etching morphology, respectively predict the defects of conductor deposition after the through-hole etching is completed, obtain the conductor deposition defect information, and analyze to obtain the electrical connection quality attenuation information; according to the electrical connection quality attenuation information, decide on the adjustment step size for adjusting and optimizing the preset etching process parameters; according to the adjustment step size, combined with the substrate component characteristic information, with the purpose of improving the standardization of the hole wall etching morphology, adjust and optimize the preset etching process parameters to obtain the optimal etching process parameters; continue to perform etching control using the optimal etching process parameters, and continue to optimize and control the etching process parameters within the next preset time period.

[0005] One or more technical solutions provided in this application have at least the following technical effects or advantages:

[0006] Since the etching area of ​​the substrate is deep-hole etched using preset etching process parameters, and the etching depth information within a certain period of time is continuously detected and collected through interference measurement to form a depth sequence, the purpose of real-time monitoring of the etching depth change during the etching process is achieved, providing a data basis for subsequent analysis; the substrate component characteristics are analyzed according to the etching depth sequence to obtain substrate component characteristic information; according to the substrate component characteristic information and the preset etching process parameters, the etching morphology of the deep hole wall is predicted, and the hole wall etching morphology information is obtained to provide support for the prediction of defects that may occur in the subsequent conductor deposition link; according to the hole wall etching morphology, the defects that may occur in the conductor deposition link after the through-hole etching is completed are predicted, and the conductor deposition defect information is obtained, and the electrical connection quality attenuation information is obtained based on this analysis. The hole wall morphology directly affects the subsequent conductor deposition effect. The vertical and smooth hole wall is conducive to the deposition of a dense and uniform conductor layer, while the inclined and rough hole wall is prone to deposition defects, resulting in a decrease in electrical performance; according to the electrical connection quality attenuation information, the preset etching process parameters are adjusted and optimized. step length, providing a basis for optimization control; according to the adjustment step length, combined with the substrate composition characteristic information, with the purpose of improving the standardization of the hole wall etching morphology, the preset etching process parameters are adjusted and optimized to obtain the optimal etching process parameters, and the optimal process parameters after dynamic update are obtained; the optimal etching process parameters are used to continue etching control, and the etching process parameters are optimized and controlled in the next preset time period, and the updated optimal parameters are applied to implement etching, and the above optimization process is repeated in the new time period to achieve a technical solution of continuous dynamic intelligent control, which solves the technical problem that the TSV etching process parameter control in the prior art is not accurate enough, it is difficult to obtain the ideal hole wall morphology, which leads to defects in the subsequent conductor filling link, and ultimately affects the quality of chip electrical connection. By real-time detection of etching depth, analysis of substrate composition characteristics and prediction of hole wall morphology, conductor filling defects and electrical connection quality are predicted, and the etching process parameters are dynamically optimized accordingly, the technical effect of improving TSV deep hole etching quality, improving conductor filling effect and ensuring chip electrical performance is achieved.

[0007] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 A flow chart of an intelligent control method for TSV etching equipment is provided for an embodiment of the present application;

[0009] Figure 2A flow chart of obtaining substrate component characteristic information in an intelligent control method for TSV etching equipment is provided for an embodiment of the present application. DETAILED DESCRIPTION

[0010] The overall idea of ​​the technical solution provided by this application is as follows:

[0011] The embodiment of the present application provides an intelligent control method for TSV etching equipment. First, deep hole etching is performed on the substrate using preset etching process parameters, and the etching depth is continuously detected by interferometric measurement to form an etching depth sequence. Then, the substrate component characteristics are analyzed according to the depth sequence, and the hole wall etching morphology is predicted in combination with the characteristics and the etching process parameters. Then, the defects of the conductor deposition after the through hole are predicted based on the hole wall morphology, and then the attenuation information of the electrical connection quality is analyzed. Finally, with the goal of improving the standardization of the hole wall etching morphology, the etching process parameters are dynamically adjusted and optimized according to the electrical quality attenuation information, the substrate component characteristics, and the dynamically generated adjustment step size, so as to obtain the optimal parameters and continuously optimize and control the etching process.

[0012] In general, this application achieves the technical effect of improving the quality of TSV deep hole etching, improving conductor filling effect, and ensuring the electrical performance of the chip by real-time detection and analysis of etching data during the etching process, predicting the impact of etching results on subsequent processes and performance, and dynamically optimizing etching parameter control based on this technical means.

[0013] After introducing the basic principles of the present application, the non-limiting implementation methods of the present application will be specifically introduced below in conjunction with the drawings in the specification.

[0014] like Figure 1 As shown, an embodiment of the present application provides an intelligent control method for TSV etching equipment, the method comprising:

[0015] S1: Using preset etching process parameters, deep hole etching is performed on the etching area of ​​the substrate based on the TSV etching equipment. During the etching process, through interference measurement, the etching depth information in the deep hole formed by etching is continuously detected and collected within a preset time period to form an etching depth sequence.

[0016] Specifically, first, according to the process requirements of TSV etching, a set of initial etching process parameters are set as preset etching process parameters, such as the type and flow rate of etching gas, RF power, substrate temperature, etching time, etc. Then, the substrate is sent into the etching chamber of the TSV etching equipment, the plasma is started, and deep hole etching is performed on the designated area of ​​the substrate according to the preset etching process parameters. While the etching process is in progress, the interferometric measurement technology is used to monitor the etching depth in real time, and the interference fringes formed by the reflection of light on the measured surface are used to infer the thickness of the film layer. The interferometer is integrated into the TSV etching equipment to obtain the etching depth data in real time without affecting the etching process. The interferometric measurement is triggered at a preset time interval (such as every few seconds), and the etching depth information is continuously collected throughout the preset time period (such as the entire etching process), and a series of etching depth values ​​corresponding to time are obtained, forming an etching depth sequence reflecting the etching process, which intuitively presents the trend of the etching depth over time, and provides an important data basis for the subsequent process intelligent control.

[0017] S2: performing substrate component characteristic analysis according to the etching depth sequence to obtain substrate component characteristic information.

[0018] Specifically, the substrate for TSV etching is a silicon wafer, but the material composition of the silicon wafer is not absolutely uniform. During the manufacturing process, silicon wafers are usually doped with some other elements (such as boron, phosphorus, arsenic, etc.) to adjust their conductivity, and the doping concentration may vary in different areas of the silicon wafer. In addition, the surface of the silicon wafer is covered with some thin film layers (such as silicon dioxide), which will affect the etching process. The spatial difference in the composition of the substrate will cause the etching rate to fluctuate locally, making the change in the etching depth show specific characteristics. By analyzing these characteristic information contained in the etching depth sequence, the intrinsic composition distribution of the substrate can be inferred.

[0019] In order to realize the analysis of substrate composition characteristics, a machine learning method is used to construct a substrate composition analysis model. First, a series of silicon wafers with known substrate composition are collected from historical production data as training samples to obtain their etching depth sequences under specific etching process parameters. Then, these sequences are input into a preset analysis model (such as a support vector machine or a neural network) for training, so that it can learn the mapping relationship from the etching depth sequence to the substrate composition characteristics. After training and optimization, the analysis model can judge the new etching depth sequence and provide substrate composition characteristic information, such as the type, concentration level and distribution of doping elements.

[0020] S3: According to the substrate component characteristic information and the preset etching process parameters, the etching morphology of the deep hole wall is predicted to obtain the hole wall etching morphology.

[0021] Specifically, the goal of TSV etching is to obtain high-quality deep holes with vertical, smooth and defect-free side walls, creating favorable conditions for subsequent conductor filling. However, in the actual etching process, affected by various factors, the morphology of the deep hole side walls often has some deviations, such as side wall tilt, surface roughness, bottom curvature, etc. These morphological defects will lead to post-process problems, such as uneven coverage of the insulating layer and barrier layer, incomplete conductor filling, etc., which ultimately affect the electrical performance and reliability of the chip. Therefore, being able to predict the morphological quality of the hole wall in a timely manner during the etching process is crucial to the optimization and control of the etching process.

[0022] Traditional characterization of hole wall morphology usually relies on cross-section detection after etching, which not only destroys the sample but also cannot guide production. Therefore, the embodiment of the present application uses the obtained substrate composition information and etching process conditions to predict the hole wall morphology through modeling and simulation, thereby achieving online non-destructive quality prediction. The basic principle is that the composition characteristics of the substrate (such as doping type and concentration distribution) will affect the anisotropy and selectivity of the etching reaction, thereby affecting the local etching rate of the deep hole sidewall; and the etching process parameters (such as etching gas composition, RF power, bias, etc.) determine the overall morphology of the etching by adjusting the density, energy and bombardment direction of the plasma. The combined effect of the two ultimately leads to the formation of the hole wall morphology.

[0023] In order to establish the quantitative relationship between substrate composition, process parameters and hole wall morphology, a hybrid modeling method combining physical model and data-driven is adopted. First, according to the mechanism of etching reaction, a theoretical model based on physical laws is constructed to describe the basic phenomena such as particle transport, surface reaction, energy conversion, etc. in the etching process, and numerical simulation methods such as finite element and finite difference are used to solve it to obtain a preliminary prediction of the hole wall morphology. Then, a machine learning model is introduced as a supplement to train the neural network to learn the deviation between the theoretical model and the actual morphology, and to correct the theoretical prediction results to obtain a more accurate prediction of the hole wall morphology. The whole process is iteratively optimized to continuously improve the prediction accuracy. The hole wall morphology obtained by modeling prediction can not only intuitively present the three-dimensional contour of the deep hole, but also further quantify the key geometric parameters of the side wall, such as the side wall angle, bottom curvature radius, surface roughness, etc., so as to obtain the hole wall etching morphology, which provides a basis for subsequent defect prediction and process optimization.

[0024] S4: According to the hole wall etching morphology, defect prediction of conductor deposition after through-hole etching is completed is performed to obtain conductor deposition defect information, and electrical connection quality attenuation information is obtained through analysis.

[0025] Specifically, the ultimate goal of TSV etching is to form a high-quality conductive path to achieve interconnection between different devices in the chip. However, the deep hole structure formed by etching is only the basis for subsequent conductor filling, and the defects in its sidewall morphology will directly affect the deposition quality of the conductor material, and thus affect the final electrical connection performance. For example, when the surface of the deep hole sidewall is rough and there are irregular morphologies such as protrusions or depressions, it will hinder the uniform coverage of the conductor film, resulting in defects such as voids, pores, and cracks inside the film layer, which increases the resistance and even causes open circuit failures. Therefore, in order to optimize the precise control of etching, the types and distribution of defects that may occur in the subsequent conductor deposition are pre-judged according to the morphology of the hole wall formed by etching, so as to analyze and obtain information on the attenuation of electrical connection quality.

[0026] First, a large number of cross-sectional scanning electron microscope images of deep holes after TSV etching are obtained from the production database, and defects are annotated on these images to obtain a paired data set of hole wall morphology and deposition defects. Then, the convolutional neural network model is trained using this data set to learn the mapping relationship between hole wall morphology images and deposition defect distribution maps. The convolutional neural network automatically extracts multi-scale and multi-level features in the image and mines the correlation between local morphology and defect occurrence. After training and optimization, the prediction model makes defect judgments on new hole wall morphology images, identifies high-risk areas where poor conductor deposition may occur, and gives key information such as the type and number of defects to obtain conductor deposition defect information.

[0027] On the basis of obtaining the conductor deposition defect information, we further combine the physical parameters such as resistivity, breakdown electric field strength, and geometric parameters such as defect size and distribution position, and use finite element simulation and other methods to evaluate the electrical performance. We quantitatively analyze the degradation of electrical connection quality caused by deposition defects, such as the percentage increase in resistance, the percentage reduction in allowable current, the shortened expected life span, etc., to obtain the electrical connection quality attenuation information.

[0028] S5: Determine an adjustment step for optimizing preset etching process parameters according to the electrical connection quality attenuation information.

[0029] Specifically, the control of TSV etching is a dynamic optimization process. According to the etching status information obtained in each time period, the process parameters are adjusted in time to compensate for the deviation and stabilize the output. However, the adjustment range of the etching process parameters cannot be too small (resulting in untimely response and affecting production efficiency) or too large (causing oscillation instability and introducing new defects). Therefore, according to the fluctuation of etching quality, the adjustment step of the process parameters is determined to achieve intelligent etching control.

[0030] First, the quality attenuation information of the electrical connection obtained by analysis (such as the percentage of resistance increase) is compared with the preset quality attenuation level (such as slight, medium, severe, etc.) to determine the attenuation degree of the current quality level. Then, the membership function is established between the attenuation degree and the process parameter adjustment amplitude to describe the relative size of the parameter adjustment step under different attenuation degrees. Finally, after fuzzy reasoning and anti-fuzzy operation, the attenuation degree is converted into a specific percentage or numerical adjustment step to guide process optimization. For example, assuming that the resistance increase within 5% is defined as "slight attenuation", 5%-20% is "medium attenuation", and more than 20% is "severe attenuation". When the analyzed resistance increases by 18%, it is determined to be "medium attenuation". Under the medium attenuation state, the fuzzy membership of the etching power adjustment amplitude can be set to "reduce 5-8%", and the etching time adjustment amplitude can be set to "reduce 3-5 seconds". Through the centroid defuzzification method, the membership interval is converted into a specific power adjustment value of 6.2% and a time adjustment value of 4.1 seconds. If the analysis resistance increases by only 3%, it corresponds to slight attenuation, and the adjustment range will be reduced accordingly; if the analysis resistance increases by up to 50%, it corresponds to severe attenuation, and the adjustment range will increase sharply.

[0031] S6: According to the adjustment step length, combined with the substrate component characteristic information, the preset etching process parameters are adjusted and optimized for the purpose of improving the standardization of the hole wall etching morphology to obtain the optimal etching process parameters.

[0032] Specifically, TSV etching control is a multi-parameter, strongly coupled, and nonlinear optimization problem. There is neither a simple one-to-one correspondence between etching process parameters and hole wall morphology, nor is it difficult to accurately describe it using an analytical model. At the same time, the evaluation criteria for etching quality are not single. It is necessary to consider not only geometric dimensions such as hole depth and sidewall angle, but also morphological features such as surface roughness and defect density. Therefore, a heuristic intelligent optimization algorithm is used to explore and search in the parameter space to find the optimal etching process parameters that can balance multiple quality indicators.

[0033] Taking the genetic algorithm as an example, first, according to the obtained adjustment step, the variation range of each process parameter is determined to form a parameter gene library. Then, parameter value combinations are randomly extracted from the gene library to form an initial population, and the fitness of each set of parameters (i.e., morphology quality score) is calculated using the hole wall morphology prediction model based on the substrate component characteristic information. Then, through genetic operations such as selection, crossover, and mutation, the fittest will survive, and new parameter combinations will be continuously generated for evolutionary optimization. In the evolutionary process, in order to balance the exploratory and exploitative nature of the algorithm and avoid premature convergence to the local optimum, strategies such as simulated annealing are used to accept parameter combinations with lower fitness with a certain probability and jump out of the local extreme value. After multiple iterations, it finally converges to the parameter combination with the highest fitness, which is output as the optimal etching process parameter.

[0034] S7: Continue etching control using the optimal etching process parameters, and continue to optimize and control the etching process parameters within a next preset time period.

[0035] Specifically, TSV etching is a continuous and dynamic process. The material properties of the workpiece and the state parameters of the equipment are changing all the time. Even if the optimal etching process parameters are used, the control effect will fluctuate. At the same time, various random disturbances and nonlinear failures may be encountered during the etching process, such as plasma fluctuations, temperature changes, etc., causing the etching state to deviate from expectations. Therefore, it is not enough to obtain the optimal etching process parameters within one optimization cycle. It is also necessary to continuously optimize and control the parameters throughout the etching process to form a dynamic closed loop and achieve continuous improvement in etching quality.

[0036] Adopting the rolling optimization strategy, the optimization control process is repeatedly executed in each preset time period. That is, the optimal etching process parameters obtained in the previous cycle are used as new initial parameters to control the etching equipment for processing; at the same time, a new round of online detection, quality analysis and parameter optimization is started to find the optimal parameter combination for the current etching state in the new time period; then the new optimal parameters are put into the etching control of the next time period, and the cycle is repeated, so that the etching parameters can be synchronized with the etching state in real time, and continuously adapt and self-correct to improve the quality of TSV deep hole etching.

[0037] Furthermore, the embodiment of the present application also includes:

[0038] Using preset etching process parameters, deep hole etching is performed on the etching area of ​​the substrate based on TSV etching equipment; during the etching process, through interference measurement, the etching depth information in the deep hole formed by etching is continuously detected and collected at a preset frequency within a preset time period; based on multiple interference detection time periods formed by the preset frequency, multiple etching depth information are arranged to obtain an etching depth sequence.

[0039] In a feasible implementation, first, according to the material properties of the substrate to be processed, the deep hole size requirements and other factors, the initial etching process parameters are set as the preset etching process parameters, including the type and flow rate of the etching gas, the RF power, the substrate temperature, the etching time, etc., which are obtained according to process experience or a reference parameter comparison table. Then, the substrate to be etched is loaded onto the workpiece table of the TSV etching equipment and aligned with a specific etching area. The etching equipment is started, and deep hole etching is performed on the substrate according to the preset etching process parameters. Specifically, the etching equipment first introduces the etching gas, which is ionized to generate plasma under the action of the RF electric field; the high-energy plasma bombards the surface of the substrate, reacts with it, and etches the material; as the reaction proceeds, the surface of the substrate is gradually etched downward to form a deep hole structure, and the entire etching process continues until the set etching time is reached.

[0040] During the entire preset etching time period, the interferometric measurement technology is used to monitor the deep hole etching depth in real time at a certain frequency. Interferometric measurement is a high-precision, non-contact measurement method that uses the coherent superposition principle of light waves. A beam of light is introduced into the deep hole. After being reflected at the bottom of the hole, the light interferes with the reference light to form fringes; by analyzing the change law of the fringes, the value of the hole depth can be calculated. In order to obtain the depth change information of the entire etching process, a fixed sampling frequency (i.e., the preset frequency) is set, for example, interference fringes are collected every 1 second. At each sampling moment, a fringe signal corresponding to the current etching depth can be obtained. Continuous sampling and calculation can obtain a series of data points reflecting the depth change and obtain the etching depth information. In order to analyze the overall change trend of the depth over time, the discrete data points in the etching depth information are arranged and combined. The corresponding depth values ​​are arranged in sequence according to the timestamp of each sampling point to form a two-dimensional table of time-depth, which intuitively shows the dynamic change process of the etching depth during the entire processing cycle, i.e., the etching depth sequence.

[0041] Further, such as Figure 2 As shown, the embodiment of the present application also includes:

[0042] According to the etching depth sequence, the etching depth change rate sequence is calculated, and the etching depth change rate curve is fitted; according to the historical data of etching the substrate deep hole according to the preset etching process parameters, a set of sample etching depth sequences is collected, and the set of sample etching depth change rate curves is processed to obtain; according to the component detection data of the substrate etching position in the etching record data corresponding to different sample etching depth sequences, a set of sample substrate component characteristic information is obtained; the sample etching depth change rate curve set is used as training input, and the sample substrate component characteristic information set is used as training supervision to train a substrate component analyzer for analyzing substrate component characteristic information; based on the substrate component analyzer, the etching depth change rate curve is analyzed to obtain substrate component characteristic information.

[0043] In a feasible implementation, since the etching depth sequence reflects the corresponding relationship between depth and time, higher-level feature information, namely, etching rate, can be extracted from the etching depth sequence. For example, by using the numerical difference method, the difference between two adjacent depth data points is divided by the corresponding time interval to obtain the instantaneous etching rate at each time point, and finally form a rate sequence of equal length to the depth sequence. However, due to the error in the discrete sampling process itself, the directly obtained rate sequence usually has large local fluctuations, which is not conducive to subsequent analysis. In order to more accurately characterize the overall change trend of the rate, the discrete rate sequence is smoothed and fitted to obtain the etching depth change rate curve. Then, according to the historical production records of the product, a batch of substrate samples processed with the same etching process parameters are screened, and the corresponding etching depth sequence is extracted to form a sample etching depth sequence set. Subsequently, the rate sequence of each sample is curve-fitted to obtain a set of sample etching depth change rate curves. The sample etching depth sequence set gives the rate curve morphology under different substrate conditions, and the specific composition information of these substrates needs to be obtained additionally. In the production process of silicon wafers, the material composition is strictly tested and recorded, such as doping type, doping concentration, impurity content, etc. Therefore, corresponding component data is extracted from the production record or quality inspection report of each sample substrate, thereby obtaining a set of sample substrate component characteristic information.

[0044] Then, the sample rate curve in the sample etching depth change rate curve set is used as the training input, and the sample component features in the sample substrate component feature information set are used as the training labels, and the model training is performed using a machine learning algorithm, such as a support vector machine, a decision tree, a neural network, etc. By adjusting the hyperparameters of the model, controlling the number of training iterations, and continuously optimizing the generalization performance of the model, it is possible to fit the rate-component mapping relationship as accurately as possible, thereby obtaining a substrate component analyzer for analyzing substrate component feature information. Then, an etching depth change rate curve is generated according to the current etching depth sequence and input into the trained substrate component analyzer. After feature transformation and calculation, the substrate component analyzer can give a component feature prediction value, such as the concentration level of the doping element, the percentage of the impurity element, etc., to obtain the substrate component feature information.

[0045] Furthermore, the embodiment of the present application also includes:

[0046] Based on historical data of deep hole etching of substrates, a set of sample substrate component feature information and a set of sample etching process parameters, as well as a set of sample hole wall morphology images obtained by observing the morphology of the etched deep hole walls are collected; based on a generative adversarial network, a hole wall morphology analyzer for generating hole wall etching morphology is constructed, wherein the hole wall morphology analyzer includes a generation channel and a discrimination channel; the generation channel is generatively trained using the sample substrate component feature information set and the sample etching process parameter set, the sample substrate component feature information and the sample etching process parameters are input and a hole wall morphology image is generated, the discrimination channel is discriminated using the sample hole wall morphology image set, and the generated hole wall morphology image is discriminated based on the sample hole wall morphology image; the training is continued until the hole wall morphology analyzer meets the requirements; the substrate component feature information and the preset etching process parameters are input and generated using the hole wall morphology analyzer to obtain the hole wall etching morphology.

[0047] In a preferred embodiment, first, a group of representative substrate samples are selected from the historical TSV etching production records, and their component characteristic information is extracted to form a sample substrate component characteristic information set. Secondly, for each selected substrate sample, the corresponding etching process parameter settings are extracted, such as etching gas type and flow rate, RF power, etching time, etc., to form a sample etching process parameter set. The hole wall morphology of each substrate sample after etching is observed by scanning electron microscopy, and the microscopic morphological features of the hole wall, such as verticality, roughness, step shape, etc., are clearly presented through imaging analysis of the deep hole section, and the obtained hole wall images are summarized to form a sample hole wall morphology image set.

[0048] Subsequently, a deep learning model of a generative adversarial network was used to construct a hole wall morphology analyzer for hole wall etching morphology generation. The generative adversarial network includes a generation channel and a discrimination channel. The generation channel generates a hole wall morphology image that matches the condition according to the input condition vector (such as substrate composition and etching process parameters) through convolution, upsampling and other operations; while the discrimination channel distinguishes the authenticity of the image given by the generation channel and gives the probability that the image comes from a real sample. Then, the generative adversarial network is trained using the obtained sample substrate composition feature information set, sample etching process parameter set sample data set and sample hole wall morphology image set, and the network parameters are adjusted to enable it to learn the intrinsic correlation between substrate composition, process parameters and hole wall morphology. Specifically, a batch of substrate composition features and etching process parameters are randomly selected from the sample set as the input of the generation channel. The generation channel generates the corresponding hole wall morphology image through forward propagation calculation according to the input condition vector; then a batch of real hole wall SEM images are randomly selected from the sample hole wall morphology image set, and the images generated by the generation channel and the real images are sent to the discrimination channel together to calculate the real probability score of the images generated by the generation channel; next, the loss functions of the generation channel and the discrimination channel are calculated respectively. For the discrimination channel, the cross entropy loss is used to encourage it to give high scores to the real images and low scores to the generated images; for the generation channel, the adversarial loss is used to encourage its generated images to deceive the discrimination channel and obtain the highest possible real score; finally, the loss function is used to perform gradient back propagation and update on the network parameters of the generation channel and the discrimination channel, and the generator adjusts the parameters. Repeat the training process and continuously iterate and optimize until the generation channel and the discrimination channel reach a dynamic balance and meet the requirements, such as monitoring the change trend of the loss functions of the generation channel and the discrimination channel. When both tend to be stable and the values ​​are close, it is considered to meet the requirements, thereby obtaining a hole wall morphology analyzer.

[0049] After training, the hole wall morphology analyzer has the ability to predict the hole wall morphology based on the substrate composition and process parameters. Therefore, in actual TSV etching production, the analyzer is directly used to make forward predictions of the hole wall morphology. Specifically, for a new substrate to be etched, the substrate composition characteristic information and the preset etching process parameters are encoded to form a conditional vector that meets the input requirements of the generation channel. The conditional vector is input into the generation channel of the trained hole wall morphology analyzer, and the predicted hole wall morphology image is output as the hole wall etching morphology.

[0050] Furthermore, the embodiment of the present application also includes:

[0051] According to the historical data of conductor vapor deposition in deep holes of substrate, a set of sample hole wall etching morphologies is collected, and the number of conductor deposition gaps after conductor vapor deposition is collected, and a set of sample conductor deposition defect information is obtained by identification; the sample hole wall etching morphology set and the sample conductor deposition defect information set are used as training input and output, and based on a convolutional neural network, a conductor deposition defect analyzer that predicts conductor deposition defects based on the hole wall etching morphology is trained, and the hole wall etching morphology is input and analyzed to obtain the conductor deposition defect information; the conductor deposition defect information is indexed in an electrical connection quality comparison table to obtain electrical connection quality attenuation information, wherein the electrical connection quality comparison table includes an index relationship between multiple sample conductor deposition defect information and multiple sample electrical connection quality attenuation information.

[0052] In a feasible implementation, first, a batch of substrate samples that have completed conductor deposition are selected from the historical TSV manufacturing database, and the SEM images of the hole walls after etching are extracted to form a sample hole wall etching morphology set. Then, after the conductor vapor deposition is completed for each substrate sample, the deposited conductor film is characterized in three dimensions using physical analysis methods (such as transmission electron microscopy, X-ray tomography, etc.) to observe whether there are unfilled gaps or microcracks between the conductor material and the hole wall. By extracting and calculating characteristic quantities such as crack size and density, the degree of defects in conductor deposition is quantitatively evaluated, and numerical indicators (such as the number of defects per unit area, average crack size, etc.) are used to identify the conductor deposition defect information of each sample, and the sample conductor deposition defect information is summarized to form a set of sample conductor deposition defect information.

[0053] Then, a convolutional neural network is used to achieve end-to-end mapping from hole wall morphology image to deposition defect index. Taking the sample hole wall etching morphology image as input, multiple convolutional layers are used to extract local features such as edge and texture of the image, and the size of the feature map is gradually reduced through the pooling layer; then the high-dimensional features are mapped to the low-dimensional space of defect index through the fully connected layer, and the network parameters are optimized with loss functions such as mean square error, so that the output defect prediction value is as close as possible to the sample defect label. During the training process, the sample hole wall morphology image and the corresponding defect index are used as the input and supervision signal of the convolutional neural network respectively, and the network weights are updated by the back propagation algorithm. The prediction performance is iteratively optimized to obtain the conductor deposition defect analyzer. After sufficient training, the conductor deposition defect analyzer has mastered the mapping law from SEM morphology to deposition defect index. In practical applications, the hole wall etching morphology to be predicted is directly input into the conductor deposition defect analyzer, and the corresponding conductor deposition defect information (such as crack density, size distribution, etc.) is output after forward propagation calculation.

[0054] After obtaining the conductor deposition defect information, the impact of the defect on the electrical performance is further analyzed to evaluate the attenuation of the electrical connection quality. In order to establish the association between the conductor deposition defect information and the electrical connection quality attenuation information, an electrical connection quality comparison table is pre-constructed. This comparison table is obtained through a large number of simulation analyses and experimental tests, which systematically records the correspondence between different defect parameter combinations (such as crack number, crack size, crack depth, etc.) and electrical performance attenuation indicators (such as resistance increase value, signal attenuation coefficient, delay time, etc.), forming a multi-dimensional index table, including the index relationship between multiple sample conductor deposition defect information and multiple sample electrical connection quality attenuation information. In the application, the predicted conductor deposition defect information is input into the electrical connection quality comparison table, and the matching electrical connection quality attenuation index is found through multi-parameter joint indexing, so as to obtain the electrical connection quality attenuation information.

[0055] Furthermore, the embodiment of the present application also includes:

[0056] Obtain an electrical connection quality threshold; obtain attenuated electrical connection quality information after attenuation based on the electrical connection quality attenuation information; perform compensation calculations on multiple preset adjustment steps for multiple types of process parameter adjustments within the etching process parameters based on the attenuated electrical connection quality information and the electrical connection quality threshold, and obtain multiple parameter adjustment steps.

[0057] In a feasible implementation, the electrical connection quality threshold is determined by the process requirements and product specifications, reflecting the minimum conduction level to be achieved in the integrated circuit. Specifically, the electrical connection quality threshold is defined from aspects such as DC resistance, AC impedance, signal attenuation and delay, and the corresponding upper limit value is set. Then, the actual electrical connection quality level after attenuation is obtained using the obtained electrical connection quality attenuation information to provide information for process parameter adjustment. By performing mathematical operations on the original design indicators and the attenuation amount, the actual attenuation of electrical performance under the action of deposition defects is quantitatively described, and the attenuated electrical connection quality information reflecting the current structural quality level is obtained, such as the resistance value, impedance value, signal attenuation coefficient and delay time after attenuation.

[0058] When the actual electrical connection quality level after attenuation, that is, the attenuated electrical connection quality information does not meet the electrical connection quality threshold, the etching process parameters are dynamically adjusted in time to improve the hole wall morphology and enhance the deposition quality. However, the adjustment range of the etching process parameters should not be too small or too large. In order to quantify the optimal adjustment range of the process parameters, an adaptive parameter adjustment step optimization method is adopted. Based on the pre-set standard adjustment step of each process parameter, the standard adjustment step is corrected and compensated according to the degree of deviation between the attenuated electrical connection quality and the quality threshold. The greater the deviation, the greater the compensation amplitude and the larger the adjustment step; and vice versa. By establishing a mapping relationship between the deviation level and the compensation coefficient, the actual adjustment step corresponding to the current quality state can be obtained, and multiple parameter adjustment steps can be obtained.

[0059] Furthermore, the embodiment of the present application also includes:

[0060] According to the adjustment range of multiple process parameters in the preset etching process parameters, an etching process parameter space is constructed, wherein the multiple process parameters include gas flow rate, radio frequency power, substrate temperature, and bias voltage; according to the multiple adjustment directions of the multiple process parameters, they are randomly combined to construct an optimization direction library, wherein each optimization direction includes different adjustment directions of different process parameters of different numbers; a first optimization direction is randomly selected from the optimization direction library, and according to the process parameter category adjusted in the first optimization direction, the preset etching process parameters are adjusted using the corresponding parameter adjustment step lengths in the multiple parameter adjustment step lengths to obtain the first etching process parameters; according to the first etching process parameters combined with the substrate component characteristic information, a first hole wall morphology standard degree is analyzed and obtained; and according to the first optimization direction, the hole wall morphology standard degree is continuously obtained according to the multiple parameter adjustment step lengths. The first etching process parameter is adjusted according to the parameter adjustment step within the number of adjustment steps to obtain the second etching process parameter, and the second hole wall morphology standard is obtained by analysis; when the second hole wall morphology standard is greater than the first hole wall morphology standard, the second etching process parameter is retained, and the optimization adjustment is continued according to the first optimization direction; when the second hole wall morphology standard is not greater than the first hole wall morphology standard, a jump-out probability is generated according to the ratio of the second hole wall morphology standard to the first hole wall morphology standard, and the second etching process parameter or the first etching process parameter is randomly retained according to the jump-out probability, and the optimization adjustment is continued according to the first optimization direction or the second optimization direction is randomly selected; the iterative optimization is continued until convergence, and the etching process parameter with the largest hole wall morphology standard is output to obtain the optimal etching process parameter.

[0061] In a preferred embodiment, the adjustment range of multiple process parameters in the etching process parameters is determined by comprehensively considering various factors such as process window limitations, equipment performance limitations, product quality requirements, and production efficiency requirements. Then, based on the adjustment range of multiple process parameters, a multidimensional parameter optimization search space is constructed, i.e., an etching process parameter space, wherein the multiple process parameters include gas flow, RF power, substrate temperature, and bias voltage. After determining the adjustment range of each process parameter, possible optimization paths are extracted from the parameter space to construct a library of optimization directions in various forms, wherein each optimization direction represents a parameter combination adjustment strategy, which can be either a single parameter adjustment or a coordinated adjustment of multiple parameters; it can be either an increase in the parameter value or a decrease in the parameter value.

[0062] Then, a random optimization direction is selected from the optimization direction library as the first optimization direction, and the process parameter category and adjustment direction involved in the adjustment are extracted, and the corresponding adjustment step value is queried. The adjustment step and adjustment direction are substituted into the original preset etching process parameters for mathematical calculation, and a set of corrected new parameter combinations are obtained as the first etching process parameters. After the first etching process parameters are obtained, the first etching process parameters and the substrate component characteristic information are input into the hole wall morphology analyzer to generate a three-dimensional hole wall morphology image, and then the generated three-dimensional hole wall morphology image is compared with the standard hole wall morphology image. By extracting characteristic parameters such as side wall angle, bottom surface curvature, surface roughness, etc. and calculating their standard deviations, the morphology standard value reflecting the overall deviation degree is obtained as the first hole wall morphology standard, which reflects the hole wall quality level that can be obtained by using the first etching process parameters, and provides an important basis for judging the subsequent parameter optimization. Continue to adjust the parameters along the first optimization direction to obtain the second etching process parameters, and evaluate the corresponding second hole wall morphology standard.

[0063] Next, compare the first hole wall morphology standard and the second hole wall morphology standard. If the second hole wall morphology standard is greater than the first hole wall morphology standard, it means that the first optimization direction is effective. At this time, the second etching process parameters should be retained as the new current optimal etching process parameters, and the parameters should continue to be adjusted along the first optimization direction to further improve the hole wall morphology. If the second hole wall morphology standard is less than or equal to the first hole wall morphology standard, it means that the first optimization direction is not the best choice and may have reached the local optimum. In order to jump out of the local extreme value, a random search strategy is introduced. The jump-out probability is calculated based on the ratio of the second hole wall morphology to the first hole wall morphology standard. The closer the two are, the greater the jump-out probability. Then, according to the jump-out probability, it is randomly determined whether to retain the second etching process parameters and continue to adjust along the original direction, or to retain the first etching process parameters and select a new second optimization direction. Through random jump-out and multi-directional exploration, the global optimal solution can be found in a larger range, improving the optimization efficiency and result quality. Repeat the process parameter adjustment and optimization, evaluate the hole wall morphology, compare the standardization, retain the best, and dynamically jump out, so that the optimization process converges to the global optimal point and obtains the optimal etching process parameters that maximize the standardization of the hole wall morphology.

[0064] Furthermore, the embodiment of the present application also includes:

[0065] The hole wall morphology analyzer is used to input the first etching process parameter and the substrate component characteristic information to obtain a first hole wall etching morphology; and the first hole wall morphology standard degree is calculated based on the deviation between the first hole wall etching morphology and the standard hole wall morphology.

[0066] In a feasible implementation, after obtaining the first etching process parameters, the first etching process parameters and the substrate component characteristic information of the substrate to be processed are input into the generation channel of the hole wall morphology analyzer in a specified format, and the first hole wall etching morphology is output, which is the three-dimensional hole wall contour that may be formed by etching the current substrate using the first process parameters. After obtaining the prediction result of the first hole wall etching morphology by using the hole wall morphology analyzer, the degree of deviation from the design target is judged according to the standard hole wall morphology, that is, the hole wall morphology standardization is calculated to provide a quantitative basis for subsequent parameter optimization. Among them, the standard hole wall morphology is a standardized definition of indicators such as the side wall angle, aperture aspect ratio, and bottom surface flatness of the etching quality based on specific application requirements, representing an ideal geometric shape. The first hole wall etching morphology is compared with the standard hole wall morphology to obtain the first hole wall morphology standardization. Specifically, the three-dimensional profiles of the standard hole wall morphology and the first hole wall etching morphology are digitally characterized, key geometric parameters are extracted, and distance metrics of the two sets of geometric parameters, such as Euclidean distance and Mahalanobis distance, are calculated to obtain numerical indicators reflecting local shape deviations, and various deviation indicators are weighted averaged to form a comprehensive morphology standardization quantification value, namely, the first hole wall morphology standardization. The closer the first hole wall morphology standardization is to 1, the more similar the first hole wall etching morphology is to the standard hole wall morphology, and the better the effect of the corresponding first etching process parameters.

[0067] In summary, the intelligent control method for TSV etching equipment provided in the embodiment of the present application has the following technical effects:

[0068] Using preset etching process parameters, the etching area of ​​the substrate is deep-hole etched based on the TSV etching equipment. During the etching process, the etching depth information of the deep hole formed by etching is continuously detected and collected within the preset time period through interference measurement to form an etching depth sequence, and the real-time etching state data required for subsequent intelligent control is obtained. According to the etching depth sequence, the substrate component characteristics are analyzed to obtain the substrate component characteristic information, which is an important basis for subsequent prediction and optimization. According to the substrate component characteristic information and the preset etching process parameters, the etching morphology of the deep hole wall is predicted to obtain the hole wall etching morphology, and the impact of the etching results on the subsequent process is predicted in the etching stage. According to the hole wall etching morphology, the defects of the conductor deposition after the through-hole etching are predicted to obtain the conductor deposition defect information, and the electrical connection quality attenuation information is analyzed to directly associate the etching results with the device performance, providing a target basis for process optimization. According to the electrical connection quality attenuation information, the adjustment step size for adjusting and optimizing the preset etching process parameters is decided, and the direction and intensity of process parameter improvement are clarified by quantitatively analyzing the quality impact. According to the adjustment step length, combined with the characteristic information of the substrate composition, the preset etching process parameters are adjusted and optimized to improve the standardization of the hole wall etching morphology, and the optimal etching process parameters are obtained. The original etching process parameters are corrected to obtain an updated optimal parameter combination to achieve dynamic closed-loop optimization of the etching process. The etching control is continued using the optimal etching process parameters, and the etching process parameters are optimized and controlled in the next preset time period, so that the etching process can adapt to the changes in the substrate composition and etching state during the entire processing cycle, and stably output high-quality TSV deep hole structures.

[0069] Any step of the method described above can be stored as a computer instruction or program in an unlimited computer memory, and can be called and recognized by an unlimited computer processor to implement any method in the embodiments of the present application, without any unnecessary restrictions.

[0070] Furthermore, the first or second mentioned above may not only represent an order relationship, but may also represent a specific concept, and / or refer to multiple elements that can be selected individually or in full. Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the present application and its equivalents, the present application intends to include these changes and variations.

Claims

1. An intelligent control method for TSV etching equipment, characterized in that: The method comprises: Using preset etching process parameters, deep hole etching is performed on the etching area of ​​the substrate based on the TSV etching equipment, and during the etching process, the etching depth information in the deep hole formed by etching is continuously detected and collected within a preset time period through interference measurement to form an etching depth sequence; Performing substrate component characteristic analysis according to the etching depth sequence to obtain substrate component characteristic information; According to the substrate component characteristic information and the preset etching process parameters, the etching morphology of the deep hole wall is predicted to obtain the hole wall etching morphology; According to the hole wall etching morphology, respectively predict the defects of the conductor deposition after the through hole etching is completed, obtain the conductor deposition defect information, and analyze and obtain the electrical connection quality attenuation information; Determine an adjustment step for optimizing preset etching process parameters according to the electrical connection quality attenuation information; According to the adjustment step length, combined with the substrate component characteristic information, the preset etching process parameters are adjusted and optimized for the purpose of improving the standardization of the hole wall etching morphology to obtain the optimal etching process parameters; Continue etching control using the optimal etching process parameters, and continue to optimize and control the etching process parameters within a next preset time period; Wherein, performing substrate component characteristic analysis according to the etching depth sequence to obtain substrate component characteristic information includes: According to the etching depth sequence, an etching depth variation speed sequence is calculated and an etching depth variation speed curve is obtained by fitting; According to the historical data of etching the deep hole of the substrate according to the preset etching process parameters, a set of sample etching depth sequences is collected, and a set of sample etching depth change rate curves is obtained by processing; Obtaining a set of sample substrate component characteristic information based on component detection data of substrate etching positions in etching record data corresponding to different sample etching depth sequences; Using the sample etching depth variation rate curve set as training input, using the sample substrate component characteristic information set as training supervision, training a substrate component analyzer for performing substrate component characteristic information analysis; Based on the substrate component analyzer, the etching depth change rate curve is analyzed to obtain substrate component characteristic information.

2. The intelligent control method for TSV etching equipment according to claim 1, characterized in that: Using preset etching process parameters, deep hole etching is performed on the etching area of ​​the substrate based on the TSV etching equipment. During the etching process, the etching depth information in the deep hole formed by etching is continuously detected and collected within a preset time period through interference measurement to form an etching depth sequence, including: Using preset etching process parameters, deep hole etching is performed on the etching area of ​​the substrate based on TSV etching equipment; During the etching process, the etching depth information in the deep hole formed by etching is continuously detected and collected at a preset frequency within a preset time period through interferometric measurement; Based on the multiple interference detection time periods formed by the preset frequency, multiple etching depth information are arranged to obtain an etching depth sequence.

3. The intelligent control method for TSV etching equipment according to claim 1, characterized in that: According to the substrate component characteristic information and the preset etching process parameters, the etching morphology of the deep hole wall is predicted to obtain the hole wall etching morphology, including: Based on the historical data of deep hole etching of substrates, a set of sample substrate component characteristic information and a set of sample etching process parameters are collected, as well as a set of sample hole wall morphology images obtained by observing the morphology of the etched deep hole wall; Based on the generative adversarial network, a hole wall morphology analyzer for generating hole wall etching morphology is constructed, wherein the hole wall morphology analyzer includes a generation channel and a discrimination channel; The generation channel is trained by using the sample substrate component feature information set and the sample etching process parameter set, the sample substrate component feature information and the sample etching process parameter are input and a hole wall morphology image is generated, the discrimination channel is trained by using the sample hole wall morphology image set, and the generated hole wall morphology image is discriminated based on the sample hole wall morphology image; Continue training until the hole wall morphology analyzer meets the requirements; The hole wall morphology analyzer is used to input the substrate component characteristic information and preset etching process parameters to obtain the hole wall etching morphology.

4. The intelligent control method for TSV etching equipment according to claim 1, characterized in that: According to the hole wall etching morphology, the defects of the conductor deposition after the through hole etching is completed are predicted to obtain the conductor deposition defect information, and the electrical connection quality attenuation information is analyzed, including: According to the historical data of conductor vapor deposition in deep holes of substrates, a set of sample hole wall etching morphology is collected, and the number of conductor deposition gaps after conductor vapor deposition is collected, and a set of sample conductor deposition defect information is obtained by marking; Using the sample hole wall etching morphology set and the sample conductor deposition defect information set as training input and output, based on a convolutional neural network, training a conductor deposition defect analyzer that predicts conductor deposition defects according to the hole wall etching morphology, performing input analysis on the hole wall etching morphology, and obtaining the conductor deposition defect information; The conductor deposition defect information is used to index in an electrical connection quality comparison table to obtain electrical connection quality attenuation information, wherein the electrical connection quality comparison table includes an index relationship between multiple sample conductor deposition defect information and multiple sample electrical connection quality attenuation information.

5. The intelligent control method for TSV etching equipment according to claim 3, characterized in that: According to the electrical connection quality attenuation information, determining an adjustment step for optimizing the preset etching process parameters includes: Get the electrical connection quality threshold; According to the electrical connection quality attenuation information, obtaining attenuated electrical connection quality information after attenuation; According to the attenuated electrical connection quality information and the electrical connection quality threshold, compensation calculation is performed on multiple preset adjustment steps of multiple types of process parameter adjustments in the etching process parameters to obtain multiple parameter adjustment steps.

6. The intelligent control method for TSV etching equipment according to claim 5, characterized in that: According to the adjustment step length, combined with the substrate component characteristic information, the preset etching process parameters are adjusted and optimized for the purpose of improving the standardization of the hole wall etching morphology, including: Constructing an etching process parameter space according to the adjustment range of multiple process parameters within the preset etching process parameters, wherein the multiple process parameters include gas flow rate, radio frequency power, substrate temperature, and bias voltage; Randomly combining the multiple adjustment directions of the multiple process parameters to construct an optimization direction library, wherein each optimization direction includes different adjustment directions of different process parameters of different numbers; Randomly selecting a first optimization direction in the optimization direction library, and adjusting the preset etching process parameters by using corresponding parameter adjustment steps in the plurality of parameter adjustment steps according to the process parameter category adjusted in the first optimization direction, to obtain first etching process parameters; Analyze and obtain a first hole wall morphology standard according to the first etching process parameter combined with the substrate component characteristic information; Continue to adjust the first etching process parameter according to the first optimization direction, according to the corresponding parameter adjustment step length in the plurality of parameter adjustment step lengths, to obtain the second etching process parameter, and analyze and obtain the second hole wall morphology standard degree; When the second hole wall morphology standard degree is greater than the first hole wall morphology standard degree, retaining the second etching process parameters, and continuing to optimize and adjust according to the first optimization direction; When the second hole wall morphology standard is not greater than the first hole wall morphology standard, a jump-out probability is generated according to the ratio of the second hole wall morphology standard to the first hole wall morphology standard, the second etching process parameter or the first etching process parameter is randomly retained according to the jump-out probability, and the optimization adjustment is continued according to the first optimization direction or the second optimization direction is randomly selected; Continue iterative optimization until convergence, output the etching process parameters with the largest hole wall morphology standardization, and obtain the optimal etching process parameters.

7. The intelligent control method for TSV etching equipment according to claim 6, characterized in that: Analyzing and obtaining a first hole wall morphology standard according to the first etching process parameter combined with the substrate component characteristic information includes: Using the hole wall morphology analyzer, the first etching process parameter and the substrate component characteristic information are input and generated to obtain a first hole wall etching morphology; The first hole wall morphology standard degree is calculated based on the deviation between the first hole wall etching morphology and the standard hole wall morphology.

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