A layout processing method, apparatus and computer-readable storage medium

Abstract

The present application relates to a layout processing method, apparatus, and computer-readable storage medium. The layout processing method includes: obtaining layout information, where the layout information includes multiple modules and call information of the multiple modules; sorting the multiple modules based on the call information to obtain a sorting result; traversing to obtain the module information of each module; sequentially traversing the multiple modules according to the sorting result for flattening processing to obtain a processing result; where the flattening processing includes: obtaining the sub-modules called by the module and the call information, performing transformation processing on the module information of the sub-modules based on the call information to obtain a transformation result; and adding the transformation result to the module information of the module for updating. By offsetting the called modules to perform flattening processing on the layout, the amount of data in the flattening processing is reduced.

Description

Technical Field

[0001] This application relates to the field of integrated circuit design, and particularly to a layout processing method, apparatus, and computer-readable storage medium. Background Art

[0002] EDA (Electronic Design Automation) tools in the field of integrated circuits process layer-to-layer Boolean operations or DRC (design rule check) checks in a flattened mode. Therefore, in actual graphic operations, the hierarchy level often needs to be flattened to obtain the relevant connections between graphics, that is, rapid flattening processing of layout layers is required.

[0003] However, in the design of ultra-large-scale integrated circuits in the prior art, the common method for flattening layout data files is mainly circular recursion. However, this method has a large amount of repeated calculation, resulting in a large amount of data during the flattening process.

[0004] Regarding the problem of a large amount of data during the layout flattening process in the related art, no effective solution has been proposed yet. Summary of the Invention

[0005] In this embodiment, a layout processing method, apparatus, and computer-readable storage medium are provided to solve the problem of a large amount of data during the layout flattening process in the related art.

[0006] In the first aspect, in this embodiment, a layout processing method is provided, and the method includes:

[0007] Obtain layout information, where the layout information includes a plurality of modules and the call information of the plurality of modules;

[0008] Based on the call information, sort the plurality of modules to obtain a sorting result;

[0009] Traverse to obtain the module information of each module;

[0010] According to the sorting result, traverse the plurality of modules in sequence for flattening processing to obtain a processing result;

[0011] Among them, the flattening processing includes: obtaining the sub-modules called by the module and the call information, performing transformation processing on the module information of the sub-modules based on the call information to obtain a transformation result; adding the transformation result to the module information of the module for updating.

[0012] In some of these embodiments, the module information includes the basic graphic elements within the module and the offset information corresponding to the basic graphic elements; the transformation processing of the module information of the sub-module based on the call information to obtain a transformation result includes:

[0013] Based on the call information of the module to the sub-module, perform corresponding transformations on the basic graphic elements and offset information of the sub-module to obtain transformed graphic elements and transformed offset information;

[0014] The transformation result includes the transformed graphic elements and the transformed offset information. In some of these embodiments, adding the transformation result to the module information of the module for update includes:

[0015] Add the transformed graphic elements to the basic graphic elements of the module to update the basic graphic elements;

[0016] Add the transformed offset information to the offset information of the module to update the offset information.

[0017] In some of these embodiments, obtaining the processing result includes:

[0018] Output the basic graphic elements and offset information of the module with the last sorting result in the sorting result as the processing result.

[0019] In some of these embodiments, traversing to obtain the module information of each module includes:

[0020] Traverse to obtain the module information of each module according to the sorting result.

[0021] In some of these embodiments, the call information includes the position information of the sub-module and the information on offset, rotation, magnification, and mirroring processing of the sub-module;

[0022] The basic graphic elements include at least one of a polygon, a path, a circle, and a rectangle;

[0023] The offset information includes at least one of offset, rotation, magnification, and mirroring processing information.

[0024] In some of these embodiments, sorting the multiple modules based on the call information to obtain a sorting result includes:

[0025] Sort the multiple modules according to a preset sorting strategy and the call information to determine the module vector of the layout;

[0026] Determine the sorting result according to the module vector.

[0027] In some of these embodiments, sorting the multiple modules to obtain a sorting result further includes:

[0028] Obtaining a first module and a second module; the second module invoking the first module;

[0029] Obtaining the invocation information of the first module, and determining the order of the first module according to the invocation information;

[0030] Determining the order of the second module according to the order of the first module and the invocation information of the second module to obtain a sorting result;

[0031] Wherein, the order of the first module in the sorting result is before the order of the second module.

[0032] In some of these embodiments, after obtaining the processing result, it further includes:

[0033] Based on different layout processing requirements, based on the processing result, performing at least one of design rule checking, layout parameter extraction, layout interface display, and layout layer operation on the layout.

[0034] In a second aspect, in this embodiment, a layout processing apparatus is provided, and the apparatus includes: a sorting module, a traversing module, and a processing module;

[0035] The sorting module is configured to obtain layout information, where the layout information includes multiple modules and the invocation information of the multiple modules; and is further configured to sort the multiple modules based on the invocation information to obtain a sorting result;

[0036] The traversing module is configured to traverse and obtain the module information of each module;

[0037] The processing module is configured to sequentially traverse the multiple modules for flattening processing according to the sorting result to obtain a processing result; wherein, the flattening processing includes: obtaining the sub-modules invoked by the module and the invocation information, performing transformation processing on the module information of the sub-modules based on the invocation information to obtain a transformation result; and adding the transformation result to the module information of the module for updating.

[0038] In a third aspect, in this embodiment, a computer storage medium is provided, on which a computer program is stored, and when the program is executed by a processor, it implements the layout processing method described in the first aspect above.

[0039] Compared with the related art, in an embodiment provided in the present application, a layout processing method, device, and computer-readable storage medium obtain layout information, sort modules according to the call information of the modules in the layout information, and obtain a sorting result; then traverse to obtain the module information of each module to establish an index of the basic graphic elements of the module and the corresponding offset information, and traverse multiple modules according to the sorting result; based on the sub-modules called by the module and the call information, perform transformation processing on the module information of the sub-modules to obtain a transformation result, and update the module information of multiple modules according to the transformation result to implement flattening processing of multiple modules, and then obtain the flattening processing result of the layout. By traversing and flattening multiple modules at one time, the number of repeated processes is reduced, and thus the amount of data in the flattening process is reduced.

[0040] Details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more concise and understandable. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The drawings described herein are used to provide a further understanding of the present application and form a part of the present application. The illustrative embodiments and descriptions thereof are used to explain the present application and do not constitute an improper limitation of the present application. In the drawings:

[0042] Figure 1 is a hardware structure block diagram of a terminal for the layout processing method of this embodiment;

[0043] Figure 2 is a flowchart of the layout processing method of an embodiment of the present application;

[0044] Figure 3 is a flowchart of the flattening method of the layout layer of this specific embodiment;

[0045] Figure 4 is a schematic diagram of a call hierarchy tree provided by this specific embodiment;

[0046] Figure 5 is a schematic diagram of a sorting result provided in an embodiment of the present application;

[0047] Figure 6 is a schematic diagram of module information transformation provided by this specific embodiment;

[0048] Figure 7 is a structure block diagram of the layout processing device of an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0049] To understand the purpose, technical solution, and advantages of the present application more clearly, the present application will be described and illustrated below with reference to the drawings and embodiments.

[0050] Unless otherwise defined, the technical terms or scientific terms involved in this application shall have the general meanings understood by those with ordinary skills in the technical field to which this application belongs. In this application, words such as "a", "an", "one kind", "the", "these", etc. do not indicate a limitation in quantity, and they can be singular or plural. The terms "comprising", "including", "having" and any variants thereof involved in this application are intended to cover non-exclusive inclusion; for example, a process, method, system, product or device comprising a series of steps or modules (units) is not limited to the listed steps or modules (units), but may include unlisted steps or modules (units), or may include other steps or modules (units) inherent in these processes, methods, products or devices. The terms "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether directly or indirectly connected. The term "plurality" involved in this application means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" may represent: A exists alone, A and B exist simultaneously, and B exists alone. Usually, the character " / " indicates that the objects associated before and after are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific order for the objects.

[0051] The method embodiments provided in this embodiment can be executed on a terminal, a computer or a similar computing device. For example, running on a terminal, Figure 1 is the hardware structure block diagram of the terminal of the layout processing method in this embodiment. As Figure 1 shown, the terminal may include one or more ( Figure 1 only one is shown in the figure) processors 102 and a memory 104 for storing data. Among them, the processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA. The above terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those of ordinary skill in the art can understand that Figure 1 the structure shown is only schematic and does not limit the structure of the above terminal. For example, the terminal may further include more or fewer components than those shown in Figure 1 the figure, or have a different configuration from that shown in Figure 1 the figure.

[0052] The memory 104 can be used to store computer programs, such as software programs and modules of application software, such as the computer program corresponding to the layout processing method in this embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, the above-mentioned method is implemented. The memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memories. In some instances, the memory 104 may further include a memory remotely provided with respect to the processor 102, and these remote memories can be connected to the terminal through a network. Examples of the above-mentioned network include but are not limited to the Internet, intranet, local area network, mobile communication network, and combinations thereof.

[0053] The transmission device 106 is used to receive or send data via a network. The above-mentioned network includes the wireless network provided by the communication provider of the terminal. In one instance, the transmission device 106 includes a network adapter (Network Interface Controller, abbreviated as NIC), which can be connected to other network devices through a base station and thus communicate with the Internet. In one instance, the transmission device 106 can be a radio frequency (Radio Frequency, abbreviated as RF) module, which is used to communicate with the Internet wirelessly.

[0054] In very large scale integrated circuit design, layout data files often adopt the hierarchical model - hierarchy mode for layout design to reduce the size of layout files, such as SREF (Structure Reference) and AREF (Array Reference) in GDSII (Graphic Design System), and Repetitions in OASIS; among them, OASIS is a file format used to represent lithography layouts, and Repetitions is a data type used to represent the positions of various repeatedly occurring graphics. Further, the AREF in GDSII obtains new primitives by referencing other basic primitives or primitives and arranging a large number of repeated structures in a regular array; the SREF in GDSII creates a large number of repeated structures by referencing other basic primitives or primitives to obtain new primitives. As can be seen from the above, in the design process, the hierarchy method is usually adopted to encapsulate the repeatedly occurring underlying element structures into modules (cells), and module calls are made at the top layer, reducing the overlap of graphic elements and improving the design efficiency.

[0055] Meanwhile, in actual layout processing operations, it is necessary to flatten the hierarchy level to obtain the relevant connections between the graphics, that is, it is necessary to perform a quick flattening process on the layout layers, that is, a flattening process. In this embodiment, a layout processing method is provided, specifically a method for flattening layout layers. Figure 2 is a flowchart of the layout processing method of the embodiment of the present application, as Figure 2 shown, this process includes the following steps:

[0056] Step S210, obtain layout information, where the layout information includes multiple modules and call information of multiple modules.

[0057] Among them, obtain the layout information to be processed by the integrated circuit design terminal, and determine the levels of the hierarchy mode in the layout. The levels correspond to multiple modules and call information between multiple modules.

[0058] Step S220, sort the multiple modules based on the call information to obtain a sorting result.

[0059] Exemplarily, when the multiple modules and the call information between the modules are determined, the call connection relationship of the multiple modules is abstracted into a directed acyclic graph (Directed Acyclic Graph, DAG) based on the call information between the multiple modules, and the multiple modules are sorted using the call information between the multiple modules in the directed acyclic graph to obtain a sorting result. Further, perform a topological sort on the directed acyclic graph to obtain the sorting result of the multiple modules. Topological sorting is a linear sorting of the vertices of a DAG such that for each directed edge (u, v), u (in the sorting record) appears before v. The principle of topological sorting is based on the characteristics of a DAG, that is, there is a partial order relationship between the nodes. The algorithm traverses the nodes in the directed acyclic graph, finds the nodes without precursor nodes (i.e., nodes with an in-degree of 0) and adds them to the sorting result, then removes the node and its related edges, and repeats this process until all nodes in the graph are added to the sorting result.

[0060] There are multiple implementation methods for topological sorting, such as depth-first search, breadth-first search, etc. Among them, the steps of depth-first search include: Select an arbitrary vertex without predecessors (i.e., in-degree is 0) from the DAG and output it; Delete this vertex and all directed edges starting from it from the graph. Repeat the above two steps until the current DAG is empty or there are no vertices without predecessors in the current graph. The steps of breadth-first search include: Create a queue Q and a result list S; Add all nodes with in-degree 0 to Q; When Q is not empty, repeatedly execute the following steps: a. Take out a node n from Q; b. Add n to the end of S; c. For each adjacent node m of n, if the in-degree of m becomes 0 after subtracting 1, then add m to Q. If the generated sequence S does not contain all the nodes in the graph, then there is a cycle in the graph, otherwise the graph has no cycle, and S is the topological sorting result.

[0061] Step S230, traverse to obtain the module information of each module.

[0062] Among them, by traversing multiple modules, the module information of each module can be obtained. Also, based on the sorting results of the multiple modules obtained above, the multiple modules can be traversed and queried to further obtain the module information of the multiple modules. Exemplarily, the module information includes the module name, the basic graphic elements in the module, and the offset information corresponding to the basic graphic elements. The offset information of the called module includes the offset information of the basic graphic elements.

[0063] Step S240, according to the sorting results, traverse multiple modules in sequence for flattening processing to obtain the processing results.

[0064] Among them, the flattening processing includes: Obtain the sub-modules called by the module and the call information, perform transformation processing on the module information of the sub-modules based on the call information to obtain the transformation results; Add the transformation results to the module information of the module for updating.

[0065] In this embodiment, after traversing all the modules, obtain the offset information of the called module, that is, obtain the sub-modules called by the module and the call information. Then, according to the sorting results, traverse and flatten multiple modules in sequence. Specifically, the process of flattening processing is: Perform transformation processing on the module information of the sub-modules according to the call information to obtain the transformation results, and then update the module information according to the transformation results, and determine the processing results after flattening multiple modules as the processing results after flattening the layout.

[0066] Further, output the basic graphic elements and offset information of the module with the last sorting in the sorting results. The module with the last sorting, that is, the top-level module, its basic graphic elements and offset information are all the graphic elements with offset points flattened to the top level, and they can be taken out and returned as the results.

[0067] In some of these embodiments, according to the sorting result, the module information of each module is traversed and obtained; the order of traversing the modules to obtain information is made consistent with the subsequent flattening processing order, providing the possibility of time overlap between traversing to obtain the module information and subsequent flattening processing, that is, providing that after obtaining the module information of the target module, it can be flattened immediately, realizing the possibility of parallel processing between different functional steps.

[0068] Through the above steps, after obtaining the layout information, the modules are sorted according to the call information of the modules in the layout information, and a sorting result is obtained; then, the module information of each module is traversed to establish an index of the basic graphic elements of the module and the corresponding offset information, and according to the sorting result, multiple modules are traversed; based on the sub-modules called by the module and the call information, the module information of the sub-modules is transformed to obtain a transformation result, and according to the transformation result, the module information of multiple modules is updated to implement the flattening processing of multiple modules, and then the flattening processing result of the layout is obtained. By traversing and flattening multiple modules at one time, the number of repeated processes is reduced, and thus the data volume in the flattening process is reduced.

[0069] In some of these embodiments, transforming the module information of the sub-module based on the call information to obtain a transformation result includes: corresponding transforming the basic graphic elements and offset information of the sub-module based on the call information of the module to the sub-module to obtain transformed graphic elements and transformed offset information; the transformation result includes the transformed graphic elements and the transformed offset information.

[0070] Further, the call information includes the position information of the sub-module, as well as the information on offset, rotation, magnification, and mirror processing of the sub-module; the basic graphic elements include at least one of polygon, path, circle, and rectangle; the offset information includes at least one of the information on offset, rotation, magnification, and mirror processing.

[0071] Among them, the module information of multiple modules includes the basic graphic elements within the module and the offset information corresponding to the basic graphic elements; when it is necessary to transform the module information of the sub-module, corresponding offset, rotation, magnification, and mirror processing and other transformations are performed on the basic graphic elements and offset information of the sub-module based on the call information.

[0072] In some of these embodiments, adding the transformation result to the module information of the module for updating includes: adding the transformed graphic elements to the basic graphic elements of the module to replace and update the basic graphic elements; adding the transformed offset information to the offset information of the module to replace and update the offset information. Until the module that is not called by other modules as a sub-module is updated, the basic graphic elements and offset information of this module are output as the processing result.

[0073] In step S210, based on the call information, multiple modules are sorted to obtain a sorting result, including steps S211 to S212.

[0074] Step S211, according to a preset sorting strategy and the call information, sort the multiple modules to determine the module vector of the layout.

[0075] Among them, read the call information between all modules in the layout. Further, establish a call hierarchy tree corresponding to the multiple modules according to the call information. The call hierarchy tree facilitates visually obtaining the call information between modules. Then, according to the preset sorting strategy, sort the multiple modules according to the call information in the multiple modules by means of topological sorting; the preset sorting strategy includes: when multiple modules are on the same layer of the call hierarchy tree, sort the multiple modules on the same layer according to actual processing requirements; after sorting the multiple modules, obtain the corresponding module vector of the layout; where the module vector includes the module information and module call information of the multiple modules.

[0076] Step S212, obtain the sorting result according to the module vector.

[0077] Among them, the processor determines the sorting result of the multiple modules of the layout according to the set of module vectors between the multiple modules.

[0078] Through the above steps, according to the call information between multiple modules in the layout, establish a corresponding call hierarchy tree, and perform topological sorting on the call information in the call hierarchy tree to obtain the corresponding module vector, and then determine the sorting result according to the module vector, and use topological sorting based on the actual situation to generate the corresponding sorting result, which is conducive to improving the efficiency and accuracy of processing the call relationship to obtain the module sorting result.

[0079] In some of the embodiments, sorting the multiple modules in step S210 to obtain a sorting result further includes steps S213 to S214.

[0080] Step S213, obtain a first module and a second module; the second module calls the first module; obtain the call information of the first module, and determine the order of the first module according to the call information.

[0081] Among them, respectively determine the calling module and the called module among the multiple modules of the layout, that is, in the call relationship between any two modules, define the calling module as the second module and the called module as the first module; and obtain the call information in the first module (representing the call information of the first module for the sub-modules it wants to call), so as to obtain the order restriction information of the first module in the sorting result based on the call information that the first module wants to call other modules, and then determine the order of the first module in the sorting result.

[0082] Step S214: Determine the order of the second module based on the order of the first module and the call information of the second module to obtain a sorting result. In the sorting result, the order of the first module is before the order of the second module.

[0083] Among them, based on the call relationships between all modules in the layout, determine the sorting order of each module respectively, that is, determine the order of the first module and the second module in each call relationship in turn, and then determine the sorting result.

[0084] Through the above steps, when traversing multiple modules, determine multiple called modules and the modules that call other modules, and then determine the sorting result of the multiple modules, which is beneficial to improving the accuracy of the sorting result. At the same time, it is beneficial to reduce the amount of data in the flattening process.

[0085] The following describes and illustrates this embodiment through specific examples.

[0086] Figure 3 is a flowchart of the flattening method for the layout layer of this specific embodiment. As Figure 3 shown, the flattening method for the layout layer includes the following steps:

[0087] Step S310: Sort the modules.

[0088] Specifically, during the process of reading the design file (i.e., the layout), count the call relationships between all modules and establish a corresponding call hierarchy tree (CellTree). Figure 4 is a schematic diagram of a call hierarchy tree provided by this specific embodiment; for common hierarchy levels, reference can be made to Figure 4 , there are 8 modules in this layout, and these multiple modules are respectively named module 1 (cell1), module 2 (cell2), module 3 (cell3), module 4 (cell4), module 5 (cell5), module 6 (cell6), module 7 (cell7), and module 8 (cell8). Figure 4 The arrow directions in represent the call relationships between modules. For example, among them, cell6 is called by cell4, and cell7 is called by cell4 and cell5.

[0089] The connection relationships between multiple modules in the layout can be abstracted into a directed acyclic graph. Using the relevant characteristics of the directed acyclic graph, its topological sorting can be performed to obtain its sorting result. Exemplarily, the relevant characteristics of the directed acyclic graph can be the partial order relationship between each node in the graph. Further, Figure 5 is a schematic diagram of a sorting result provided in an embodiment of this application. Refer to Figure 5, according to the call information between multiple modules, a sorting result is obtained. The order of the sorting result from left to right is module 6 (cell6), module 7 (cell7), module 8 (cell8), module 4 (cell4), module 5 (cell5), module 2 (cell2), module 3 (cell3), and module 1 (cell1). Among them, the order of cell6 - 8 can be swapped, the order of cell4 and cell5 can be swapped, and the order of cell2 and cell3 can be swapped. It only needs to be ensured that for the modules that appear later, all the basic modules they need to call have appeared and been processed. Therefore, the sorting result is not specifically limited here. This way transforms the loop - recursive process into a single traversal, and all the modules only need to be processed once. It can be understood as performing a topological sort on the call information of cells (cellTree) to obtain the sorted module vector cellLists. In this embodiment, the sorting result includes the top - level module 1 (top cell1), that is, it shows the module at the end of the sorting; in other embodiments, it can also only show the remaining modules except the top - level module (top cell), for example Figure 5 The module 1 may not be shown in the sorting result of

[0090] Step S320, traverse according to the sorting result to obtain the module information of each module.

[0091] Specifically, traverse and process multiple modules in cellLists according to the topological sorting order, establish an index structure cellPathMap between the module name (cellName) and its basic graphic elements, and an index structure cellPathOffMap between the module name (cellName) and the offset points of its basic graphic elements. Insert the basic graphic elements in each cell into cellPathMap[cellName], and insert the offset points corresponding to the graphic elements into cellPathOffMap. The offset points of the basic graphic elements here are the offset information corresponding to the basic graphic elements in the foregoing embodiments.

[0092] Exemplarily, the graphic elements here include polygons, paths, circles, rectangles, etc. The offset points corresponding to the graphic elements represent that there is such a graphic element at that offset point, and one graphic element can correspond to multiple offset points.

[0093] In this embodiment, an index structure cellPathMap between the module name (cellName) and its basic graphic elements, and an index structure cellPathOffMap between the module name (cellName) and the offset points of its basic graphic elements are established to store the module information of each module obtained by traversal, facilitating subsequent use. However, in other embodiments, other storage methods may also be adopted based on requirements, and the present application does not make specific limitations.

[0094] In this embodiment, traversing the module to obtain information and generating cellPathMap[refCellName] and cellPathOffMap[refCellName] are performed based on topological sorting, that is, in the same order as the subsequent flattening process. However, in other embodiments, other traversal orders or random orders may also be adopted based on requirements, and the present application does not make specific limitations.

[0095] Step S330, perform a flattening process on the module vector cellLists[i].

[0096] Specifically, for the sorted module vector cellLists[i], where i represents the i-th module name. The method for obtaining all the graphic elements in the cell is as follows: Obtain all the module call relationships of cellLists[i]. Traverse all the modules called by cellLists[i]. For multiple called modules with the module name refCellName, obtain the transformation information of the called module named refCellName called by cellLists[i], that is, position, rotation, magnification, and mirroring information. According to these transformation information, transform the graphic elements in cellPathMap[refCellName] and the corresponding offset points of the graphic elements in cellPathOffMap[refCellName]. Then, obtain the module name cellName of cellLists[i], add the obtained result graphic elements to cellPathMap[cellName], and add the offset points corresponding to the obtained result graphic elements to cellPathOffMap[cellName].

[0097] Step S340, determine the flattening result of the layout.

[0098] Specifically, according to the sorting result, after traversing cellLists, determine that the graphic elements corresponding to the cell at the end of cellLists in cellPathMap and the offset points corresponding to it in cellPathOffMap are all the graphic elements with offset points flattened to the top layer, and take them out and return them as the result.

[0099] This flattening method changes the call relationship into the traversal order by the topological sorting of the directed acyclic graph, and can process all subsequent required cell modules through one traversal, reducing the number of repeated processes; by using the method of basic graphics plus translation, the rotation, magnification, and translation of the graphics in the module call ref are optimized into the magnification, rotation of the basic graphics, and translation of points, reducing the amount of calculation.

[0100] Furthermore, Figure 6 is a schematic diagram of the module information transformation provided by this specific embodiment. Refer to Figure 6 , where, in the two-dimensional coordinate system with the basic graphic as the origin, the rectangle 0 with the coordinate point (0, 0) is the aforementioned basic graphic element, and rectangles 1 - 5 are all graphic elements obtained by referencing rectangle 0 and performing offsets (transformations). Further, the coordinate points of the rectangles can be determined by the intersection points of the two diagonals in the rectangle, or by the vertices between the two sides of the rectangle; exemplarily, here the coordinate points of the rectangle are represented by the coordinates of the vertices at the lower left corner of the rectangle. Specifically, as Figure 6 shown, rectangles 1, 2, 3, 4, 5 can be formed by adding multiple offset coordinates (a1, a2, a3, a4, a5) to the basic graphic 0 respectively, where a1 - a5 all represent the offset coordinates of different rectangles in the two-dimensional coordinate system. Exemplarily, the offset coordinate a1 is (1, 5), the offset coordinate a2 is (3, 5), the offset coordinate a3 is (5, 5), the offset coordinate a4 is (2, 2), and the offset coordinate a1 is (4, 2). Further, the graphics of rectangles 1 - 5 can be obtained by performing operations such as rotation, magnification, and mirroring on the basis of the basic graphic 0.

[0101] Therefore, the multiple references to rectangle 0 can be split into two steps: performing corresponding rotation and magnification processing on the basic graphic 0; thereafter, performing corresponding rotation and magnification processing on the offset points.

[0102] The above method changes the call relationship into the traversal order by the topological sorting of the directed acyclic graph, and then processes all subsequent required cell modules through one traversal, which is beneficial to reducing the number of repeated processes; at the same time, by using the method of basic graphics plus translation, the two-dimensional transformation information such as rotation, magnification, and translation of the graphics in the module call is optimized into the magnification, rotation of the basic graphics, and translation of points, that is, reducing the data storage amount and calculation amount in the layout processing through the graphic elements and offset points.

[0103] In some specific embodiments, after using the above layout processing method to complete the flattening process and obtaining the processing result, it further includes: based on different layout processing requirements, and based on the processing result, performing at least one of the following processes on the layout: design rule check (DRC) of the layout, layout parameter extraction, layout interface display, and layout layer operation. The flattening process to obtain the processing result is a prerequisite basic step for layout layer operation, DRC check, or parameter extraction, and is also a basic step for the layout to be displayed in an interface. For example, common layout layer operations include boolean operations between layers, such as not, or, and, etc.; layout parameter extraction includes extracting the width of a graphic, the distance between graphics, etc.

[0104] It should be noted that the steps shown in the above process or the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions.

[0105] In this embodiment, a layout processing device is also provided. This device is used to implement the above embodiments and preferred implementation manners, and those that have been described will not be repeated here. The following terms such as "module", "unit", "sub-unit", etc. can be a combination of software and / or hardware that can achieve a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware is also possible and contemplated.

[0106] Figure 7 is the structural block diagram of the layout processing device of the embodiment of the present application. As Figure 7 shown, the device includes: a sorting module 10, a traversing module 20, and a processing module 30.

[0107] The sorting module 10 is used to obtain layout information, where the layout information includes multiple modules and the call information of multiple modules; it is also used to sort the multiple modules based on the call information to obtain a sorting result.

[0108] The traversing module 20 is used to traverse and obtain the module information of each module.

[0109] The processing module 30, according to the sorting result, sequentially traverses the multiple modules to perform a flattening process to obtain a processing result; wherein, the flattening process includes: obtaining the sub-modules called by the module and the call information, performing transformation processing on the module information of the sub-modules based on the call information to obtain a transformation result; adding the transformation result to the module information of the module for update.

[0110] It should be noted that each of the above modules can be a functional module or a program module, and can be implemented either by software or by hardware. For the modules implemented by hardware, each of the above modules can be located in the same processor; or each of the above modules can be located in different processors in any combined form.

[0111] In this embodiment, an electronic device is further provided, including a memory and a processor. A computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0112] Optionally, the above electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the above processor, and the input / output device is connected to the above processor.

[0113] Optionally, in this embodiment, the above processor may be configured to execute the following steps through a computer program:

[0114] S1, obtain layout information, where the layout information includes a plurality of modules and call information of the plurality of modules.

[0115] S2, sort the plurality of modules based on the call information to obtain a sorting result.

[0116] S3, traverse to obtain the module information of each module.

[0117] S4, sequentially traverse the plurality of modules for flattening processing according to the sorting result to obtain a processing result. Among them, the flattening processing includes: obtaining the sub-modules called by the module and call information, performing transformation processing on the module information of the sub-modules based on the call information to obtain a transformation result; adding the transformation result to the module information of the module for updating.

[0118] It should be noted that specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementation manners, and will not be elaborated in this embodiment.

[0119] In addition, in combination with the layout processing method provided in the above embodiment, a storage medium can also be provided in this embodiment to implement it. A computer program is stored on the storage medium; when the computer program is executed by a processor, any one of the layout processing methods in the above embodiments is implemented.

[0120] It should be understood that the specific embodiments described here are only used to explain this application, rather than to limit it. According to the embodiments provided in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0121] Obviously, the accompanying drawings are only some examples or embodiments of the present application. For those of ordinary skill in the art, the present application can also be applied to other similar situations based on these drawings without creative efforts. Additionally, it can be understood that although the work done during the development process may be complex and time-consuming, for those of ordinary skill in the art, certain design, manufacturing, or production changes based on the technical content disclosed in the present application are only conventional technical means and should not be regarded as insufficient disclosure of the present application.

[0122] The term "embodiment" in the present application means that the specific features, structures, or characteristics described in connection with the embodiments can be included in at least one embodiment of the present application. The phrase appears in various positions in the specification and does not necessarily mean the same embodiment, nor does it mean being independent or alternative to other embodiments and mutually exclusive. Those of ordinary skill in the art can clearly or implicitly understand that the embodiments described in the present application can be combined with other embodiments without conflict.

[0123] The above-described embodiments only represent several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be construed as a limitation on the scope of patent protection. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all fall within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.

Claims

1. A layout processing method, characterized in that: The method comprises: Acquire layout information, wherein the layout information includes multiple modules and call information of the multiple modules; Based on the call information, the multiple modules are sorted to obtain a sorting result; Traverse and obtain the module information of each module; According to the sorting result, the plurality of modules are traversed in sequence to perform flattening processing, basic pixels and offset information of the top-level module sorted last in the sorting result are obtained, and the basic pixels and offset information of the top-level module are used as the processing result; Wherein, the flattening process includes: obtaining the submodule and call information called by the module, transforming the module information of the submodule based on the call information to obtain the transformation result; adding the transformation result to the module information of the module for updating; the sorting of the multiple modules based on the call information to obtain the sorting result includes: abstracting the call connection relationship of the multiple modules into a directed acyclic graph based on the call information between the multiple modules, using the call information between the multiple modules in the directed acyclic graph, and topologically sorting the multiple modules according to a preset sorting strategy to determine the module vector of the layout to ensure that each module is processed only once; determining the sorting result according to the module vector; wherein the preset sorting strategy includes: obtaining a first module and a second module; the second module calls the first module; obtaining the call information of the first module, and determining the order of the first module according to the call information; determining the order of the second module according to the order of the first module and the call information of the second module to obtain the sorting result; wherein, the order of the first module in the sorting result is before the order of the second module.

2. The layout processing method according to claim 1, characterized in that: The module information includes basic pixels in the module and offset information corresponding to the basic pixels; The transforming the module information of the submodule based on the calling information to obtain the transformation result includes: Based on the calling information of the module to the submodule, the basic pixels and offset information of the submodule are correspondingly transformed to obtain the transformed pixels and the transformed offset information; The transformation result includes the transformation pixel and the transformation offset information.

3. The layout processing method according to claim 2, characterized in that: Adding the transformation result to the module information of the module for updating includes: Adding the transformed pixel to the base pixel of the module to update the base pixel; The transformed offset information is added to the offset information of the module to update the offset information.

4. The layout processing method according to claim 1, characterized in that: The traversal obtains the module information of each module, including: According to the sorting result, the module information of each module is traversed and obtained.

5. The layout processing method according to claim 2, characterized in that: The calling information includes the position information of the submodule, and the information of offset, rotation, enlargement and mirroring processing of the submodule; The basic graphic element includes at least one of a polygon, a path, a circle and a rectangle; The offset information includes at least one of offset, rotation, magnification and mirror processing information.

6. The layout processing method according to claim 1, characterized in that: After obtaining the processing result, the method further includes: Based on different layout processing requirements and based on the processing results, at least one of design rule checking, layout parameter extraction, layout interface display and layout layer operation is performed on the layout.

7. A layout processing device, characterized in that: The device comprises: a sorting module, a traversal module and a processing module; The sorting module is used to obtain layout information, the layout information includes multiple modules and call information of the multiple modules; it is also used to sort the multiple modules based on the call information to obtain a sorting result; the sorting of the multiple modules based on the call information to obtain the sorting result includes: abstracting the call connection relationship of the multiple modules into a directed acyclic graph based on the call information between the multiple modules, using the call information between the multiple modules in the directed acyclic graph, and topologically sorting the multiple modules according to a preset sorting strategy to determine the module vector of the layout to ensure that each module is processed only once; determining the sorting result according to the module vector; wherein the preset sorting strategy includes: obtaining a first module and a second module; the second module calls the first module; obtaining the call information of the first module, and determining the order of the first module according to the call information; determining the order of the second module according to the order of the first module and the call information of the second module to obtain the sorting result; wherein the order of the first module in the sorting result is before the order of the second module; The traversal module is used to traverse and obtain module information of each module; The processing module is used to traverse the multiple modules in turn according to the sorting result to perform flattening processing, obtain the basic pixels and offset information of the top-level module sorted last in the sorting result, and use the basic pixels and offset information of the top-level module as the processing result; wherein, the flattening processing includes: obtaining the sub-module and calling information called by the module, transforming the module information of the sub-module based on the calling information to obtain the transformation result; and adding the transformation result to the module information of the module to update it.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the layout processing method according to any one of claims 1 to 6 are implemented.

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