A three-dimensional memory and a manufacturing method thereof

Abstract

The present invention relates to the field of semiconductor manufacturing technology, and in particular to a three-dimensional memory and a manufacturing method thereof. The manufacturing method of the three-dimensional memory comprises the following steps: forming a base, the base comprising a substrate, a first dielectric layer located above the substrate, and a first contact structure penetrating the first dielectric layer; forming a barrier layer located above the substrate and a convex structure located above the barrier layer; forming a storage hole at least penetrating the barrier layer and exposing the first contact structure on one side of the convex structure; forming a storage structure that continuously covers the inner wall of the storage hole, the exposed surface of the first contact structure, and the surface of the convex structure, and the storage structure is electrically connected to the first contact structure. The present invention not only forms a memory of a three-dimensional structure, but also enables the storage unit to have a larger polarization area under the same plane area, thereby improving the storage capacity of the storage structure.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a three-dimensional memory and a manufacturing method thereof. Background Art

[0002] Phase change memory or ferroelectric memory (FeRAM) and other memories are devices that integrate memory cells in the back end of line (BEOL), which are structures in which the memory cells are inserted between two adjacent metal layers. The memory cell is generally composed of an upper and lower electrode layer and a ferroelectric memory layer in the middle. The storage performance of the ferroelectric memory is proportional to the effective area of ​​the ferroelectric memory layer and the electrode layer in the memory cell. The traditional two-dimensional structure memory is composed of a vertically stacked upper electrode layer, a lower electrode layer, and a ferroelectric material layer or a phase change material layer located between the upper electrode layer and the lower electrode layer. However, as the size of the memory continues to shrink, the effective area of ​​the storage structure in the traditional two-dimensional structure memory continues to shrink, thereby limiting the further improvement of the memory performance.

[0003] Therefore, how to increase the polarization area of ​​the storage structure in the memory, thereby improving the storage capacity of the storage structure to achieve improvement in memory performance, is a technical problem that needs to be solved urgently. Summary of the invention

[0004] The present invention provides a three-dimensional memory and a manufacturing method thereof, which are used to increase the polarization area of ​​a storage structure in the memory, thereby improving the storage capacity of the storage structure to achieve improvement in the performance of the memory.

[0005] According to some embodiments, the present invention provides a method for manufacturing a three-dimensional memory, comprising the following steps:

[0006] forming a substrate, the substrate comprising a substrate, a first dielectric layer located above the substrate, and a first contact structure penetrating the first dielectric layer;

[0007] forming a barrier layer located above the substrate and a protrusion structure located above the barrier layer;

[0008] forming a storage hole at one side of the protruding structure, penetrating at least the barrier layer and exposing the first contact structure;

[0009] A storage structure is formed to continuously cover the inner wall of the storage hole, the exposed surface of the first contact structure, and the surface of the protrusion structure, and the storage structure is electrically connected to the first contact structure.

[0010] In some embodiments, the specific steps of forming the substrate include:

[0011] Providing a substrate, wherein the substrate includes an active region, and the substrate includes a top surface and a bottom surface that are relatively distributed;

[0012] forming a first dielectric layer covering the top surface of the substrate;

[0013] A first contact structure is formed along a first direction that penetrates the first dielectric layer and is electrically connected to the active region, wherein the first direction perpendicularly intersects with the top surface of the substrate.

[0014] In some embodiments, before forming a barrier layer located above the substrate and a protrusion structure located above the barrier layer, the method further includes the following steps:

[0015] A stacked dielectric layer is formed on a top surface of the first dielectric layer.

[0016] In some embodiments, the specific steps of forming a barrier layer located above the substrate and a protrusion structure located above the barrier layer include:

[0017] forming a barrier layer covering the top surface of the stacked dielectric layer;

[0018] forming a second dielectric layer covering the top surface of the barrier layer;

[0019] The second dielectric layer is patterned to form a plurality of protruding structures spaced apart along a second direction, wherein the second direction is parallel to the top surface of the substrate.

[0020] In some embodiments, the specific steps of patterning the second dielectric layer to form a plurality of the protrusion structures spaced apart along the second direction include:

[0021] The second dielectric layer is etched to form a storage groove located above the first contact structure along the first direction and penetrating the second dielectric layer, wherein the storage groove separates the second dielectric layer into a plurality of the protruding structures.

[0022] In some embodiments, the specific step of forming a storage hole at least penetrating the barrier layer and exposing the first contact structure on one side of the protrusion structure includes:

[0023] The barrier layer and the stacked dielectric layer are etched downward along the storage groove to form a storage hole that penetrates the barrier layer and the stacked dielectric layer along the first direction and exposes the top surface of the first contact structure.

[0024] In some embodiments, the specific step of forming a storage hole at least penetrating the barrier layer and exposing the first contact structure on one side of the protrusion structure includes:

[0025] The barrier layer, the stacked dielectric layer and the first dielectric layer are etched downward along the storage groove to form a storage hole that penetrates the barrier layer and the stacked dielectric layer along the first direction and extends into the first dielectric layer, wherein the storage hole exposes the top surface and sidewalls of the first contact structure.

[0026] In some embodiments, the specific steps of forming a storage structure that continuously covers the inner wall of the storage hole, the exposed surface of the first contact structure, and the surface of the protrusion structure, and electrically connecting the storage structure to the first contact structure include:

[0027] forming a lower electrode which continuously covers the inner wall of the storage hole, exposes the surface of the first contact structure and the surface of the protruding structure, and is electrically connected to the first contact structure;

[0028] forming a storage layer covering the lower electrode;

[0029] An upper electrode covering the storage layer is formed, and the upper electrode, the storage layer and the lower electrode together constitute the storage structure.

[0030] In some embodiments, after forming the storage structure that continuously covers the inner wall of the storage hole, the exposed surface of the first contact structure, and the surface of the protrusion structure, the following steps are further included:

[0031] forming a conductive filling layer that fills the storage hole and the storage groove and covers the upper electrode;

[0032] A first lead-out structure is formed above the storage structure and electrically connected to the conductive filling layer, and the first lead-out structure is aligned with the first contact structure along the first direction.

[0033] According to some other embodiments, the present invention further provides a three-dimensional memory, comprising:

[0034] A base, comprising a substrate, a first dielectric layer located above the substrate, and a first contact structure penetrating the first dielectric layer along a first direction, wherein the substrate comprises a top surface and a bottom surface that are relatively distributed, and the first direction intersects the top surface of the substrate perpendicularly;

[0035] a barrier layer located above the substrate along the first direction;

[0036] a protruding structure located above the barrier layer along the first direction;

[0037] a storage hole, located at one side of the protruding structure along a second direction, the storage hole at least passing through the barrier layer and exposing the first contact structure, the second direction being parallel to the top surface of the substrate;

[0038] A storage structure continuously covers the inner wall of the storage hole, the exposed surface of the first contact structure and the surface of the protruding structure, and the storage structure is electrically connected to the first contact structure.

[0039] In some embodiments, it also includes:

[0040] The stacked dielectric layer is located between the first dielectric layer and the barrier layer along the first direction, and the storage hole at least penetrates the barrier layer and the stacked dielectric layer.

[0041] In some embodiments, the storage hole penetrates the barrier layer and the stacked dielectric layer along the first direction and only exposes a top surface of the first contact structure.

[0042] In some embodiments, the storage hole penetrates the barrier layer and the stacked dielectric layer along the first direction and extends into the first dielectric layer, and the storage hole exposes a top surface and a sidewall of the first contact structure.

[0043] In some embodiments, a plurality of the protrusion structures are arranged along the second direction, and a storage groove communicating with the storage hole is provided between adjacent protrusion structures;

[0044] The storage structure includes a lower electrode continuously covering an inner wall of the storage hole, exposing a surface of the first contact structure and a surface of the protrusion structure and electrically connected to the first contact structure, a storage layer covering the lower electrode, and an upper electrode covering the storage layer.

[0045] In some embodiments, it also includes:

[0046] A conductive filling layer, filling the storage hole and the storage slot and covering the upper electrode;

[0047] A first lead-out structure is located above the storage structure and electrically connected to the conductive filling layer, and the first lead-out structure is aligned with the first contact structure along the first direction.

[0048] The present invention provides a three-dimensional memory and a method for forming the same. A barrier layer and a protruding structure located above the barrier layer are formed above a substrate, and a storage hole is formed on one side of the protruding structure, which at least penetrates the barrier layer and exposes the first contact structure, so that the storage structure can continuously cover the inner wall of the storage hole, the exposed surface of the first contact structure and the surface of the protruding structure. Not only a three-dimensional memory is formed, but also the storage unit has a larger polarization area under the same plane area, and can store more polarized charges under the same voltage, thereby increasing the storage capacity of the storage structure, greatly improving the sensitivity, stability and reliability of the three-dimensional memory, and achieving improvement in the performance of the three-dimensional memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 is a flow chart of a method for manufacturing a three-dimensional memory in a specific embodiment of the present invention;

[0050] Figure 2 is a schematic structural diagram of a substrate in a specific embodiment of the present invention;

[0051] Figure 3 is a schematic diagram of the structure after forming a barrier layer and a second dielectric layer in a specific embodiment of the present invention;

[0052] Figure 4 is a schematic diagram of a structure after a protruding structure is formed in a specific embodiment of the present invention;

[0053] Figure 5 is a schematic diagram of the structure after a photoresist layer is formed in a specific embodiment of the present invention;

[0054] Figure 6 is a schematic diagram of a structure after a storage hole is formed in a specific embodiment of the present invention;

[0055] Figure 7 is another structural schematic diagram after the storage hole is formed in a specific embodiment of the present invention;

[0056] Figure 8 is a structural schematic diagram after a storage structure is formed in a specific implementation manner of the present invention;

[0057] Fig. 9 is a schematic diagram of a structure after a conductive filling layer is formed in a specific embodiment of the present invention;

[0058] Fig.10 is a structural schematic diagram after adjacent storage structures are separated in a specific implementation manner of the present invention;

[0059] Fig.11 is a schematic diagram of a structure after forming a third dielectric layer, a fourth dielectric layer and a mask layer in a specific embodiment of the present invention;

[0060] Fig.12 It is a structural schematic diagram after the first lead-out structure is formed in a specific implementation manner of the present invention. DETAILED DESCRIPTION

[0061] The specific implementation of a three-dimensional memory and a manufacturing method thereof provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0062] This specific embodiment provides a method for manufacturing a three-dimensional memory. Figure 1 FIG. 1 is a flow chart of a method for manufacturing a three-dimensional memory in a specific embodiment of the present invention. Figure 1 As shown, the manufacturing method of the three-dimensional memory comprises the following steps:

[0063] Step S11, forming a base, wherein the base includes a substrate, a first dielectric layer located above the substrate, and a first contact structure penetrating the first dielectric layer;

[0064] Step S12, forming a barrier layer located above the substrate and a protruding structure located above the barrier layer;

[0065] Step S13, forming a storage hole at one side of the protruding structure, which at least penetrates the barrier layer and exposes the first contact structure;

[0066] Step S14, forming a storage structure that continuously covers the inner wall of the storage hole, the exposed surface of the first contact structure, and the surface of the protrusion structure, and the storage structure is electrically connected to the first contact structure.

[0067] Figure 2 Schematic diagram of the structure of the substrate in a specific embodiment of the present invention. In some embodiments, the specific steps of forming the substrate include:

[0068] Providing a substrate 20, wherein the substrate 20 includes an active region, and the substrate 20 includes a top surface and a bottom surface that are relatively distributed;

[0069] forming a first dielectric layer 21 covering the top surface of the substrate 20;

[0070] A first contact structure 25 is formed along a first direction D1 that penetrates the first dielectric layer 21 and is electrically connected to the active region. The first direction D1 intersects the top surface of the substrate 20 perpendicularly. Figure 2 shown.

[0071] Specifically, the substrate 20 may be, but is not limited to, a silicon substrate. This specific embodiment is described by taking the substrate 20 as a silicon substrate as an example. The substrate 20 includes at least a plurality of active regions spaced apart along the second direction D2. The active region includes a channel region and a source region and a drain region located on opposite sides of the channel region along the second direction D2. The base also includes a gate structure located on the substrate 20, the gate structure including a gate dielectric layer 22 located above the channel region, a gate conductive layer 23 covering the surface of the gate dielectric layer 22, and an isolation sidewall 24 covering the sidewalls of the gate dielectric layer 22 and the sidewalls of the gate conductive layer 23, as shown in FIG. Figure 2As shown. The first dielectric layer 21 covers the top surface of the substrate 20 and the gate structure. The material of the first dielectric layer 21 can be an oxide material, such as silicon dioxide. In one example, the first contact structure 25 penetrates the first dielectric layer 21 along the first direction D1 and is electrically connected to the drain region, and the second contact structure 26 penetrates the first dielectric layer 21 along the first direction D1 and is electrically connected to the source region. In one example, the substrate includes a plurality of memory cells, each of which includes the active region, a gate structure located above the active region, and the first contact structure 25 and the second contact structure 26 located on opposite sides of the gate structure along the second direction D2 and electrically connected to the active region. Figure 2 It is shown that two memory cells share the second contact structure 26 .

[0072] Figure 3 3 is a schematic diagram of a structure after forming a barrier layer and a second dielectric layer in a specific embodiment of the present invention. In some embodiments, before forming a barrier layer 32 located above the substrate and a protruding structure 42 located above the barrier layer 32, the following steps are also included:

[0073] A stacked dielectric layer is formed on the top surface of the first dielectric layer 21, such as Figure 3-Figure 4 shown.

[0074] Figure 4 3 is a schematic diagram of a structure after a protruding structure is formed in a specific embodiment of the present invention. In some embodiments, the specific steps of forming a barrier layer 32 located above the substrate and a protruding structure 42 located above the barrier layer 32 include:

[0075] forming a barrier layer 32 covering the top surface of the stacked dielectric layer;

[0076] forming a second dielectric layer covering the top surface of the barrier layer 32;

[0077] The second dielectric layer is patterned to form a plurality of protrusion structures 42 spaced apart along a second direction D2, wherein the second direction D2 is parallel to the top surface of the substrate 20. Figure 4 shown.

[0078] In some embodiments, the specific steps of patterning the second dielectric layer to form a plurality of the protruding structures 42 spaced apart along the second direction D2 include:

[0079] The second dielectric layer is etched to form a storage groove 40 located above the first contact structure 25 along the first direction D1 and penetrating the second dielectric layer. The storage groove 40 separates the second dielectric layer into a plurality of the protruding structures 42 .

[0080] In one example, the stacked dielectric layer includes a plurality of isolation layers stacked in sequence along the first direction D1, so that the inner wall area of ​​the storage hole formed subsequently can be further increased to further increase the polarization area of ​​the storage structure and improve the storage capacity of the storage structure. The plurality described in this specific embodiment refers to more than two. For example, silicon nitride material is deposited on the top surface of the first dielectric layer 21 (i.e., the surface of the first dielectric layer 21 facing away from the substrate 20) to form a first isolation layer 30. Silicon dioxide material is deposited on the surface of the first isolation layer 30 facing away from the first dielectric layer 21 to form a second isolation layer 31, and the first isolation layer 30 and the second isolation layer 31 are used together as the stacked dielectric layer. Then, silicon nitride material is deposited on the top surface of the stacked dielectric layer to form the barrier layer 32 covering the stacked dielectric layer. Silicon dioxide material is deposited on the top surface of the barrier layer 32 to form a first sub-dielectric layer 33 covering the barrier layer 32. A silicon oxynitride material is deposited on the top surface of the first sub-dielectric layer 33 to form a second sub-dielectric layer 34 covering the first sub-dielectric layer 33. The first sub-dielectric layer 33 and the second sub-dielectric layer 34 together constitute the second dielectric layer. Figure 3 In another example, the second dielectric layer may be a single-layer structure or a multi-layer structure with more than three layers.

[0081] The second sub-dielectric layer 34 and the first sub-dielectric layer 33 are etched along the first direction to form a separation groove 41 and a storage groove 40 that penetrate the first sub-dielectric layer 33 and the second sub-dielectric layer 34 along the first direction D1. The storage groove 40 is used to separate the second dielectric layer in the same storage unit into a plurality of independent protrusion structures 42, and the separation groove 41 is used to separate the protrusion structures in adjacent storage units. The protrusion structure 42 includes a first sub-protrusion structure 421 formed by separating the first sub-dielectric layer 33 and a second sub-protrusion structure 422 formed by separating the second sub-dielectric layer 34, as shown in FIG. Figure 3-Figure 4 As shown. By arranging a plurality of the protruding structures 42 in the same storage unit and arranging the storage groove 40 above the first contact structure 25, not only can the area used to form the storage structure be further increased to further improve the storage capacity of the storage structure, but it also helps to simplify the subsequent process of forming the storage hole. In the process of etching the second dielectric layer, the barrier layer 32 is used as an etching stop layer to avoid damage to the stacked dielectric layer during the etching process, so as to ensure the morphology of the storage hole formed subsequently, thereby further ensuring the stability of the performance of the three-dimensional memory.

[0082] Figure 5is a schematic diagram of the structure after the photoresist layer is formed in a specific embodiment of the present invention, Figure 6 3 is a schematic diagram of a structure after forming a storage hole in a specific embodiment of the present invention. In some embodiments, the specific steps of forming a storage hole 60 at least penetrating the barrier layer 32 and exposing the first contact structure 25 on one side of the protrusion structure 42 include:

[0083] The barrier layer 32 and the stacked dielectric layer are etched downward along the storage groove 40 to form a storage hole 60 that penetrates the barrier layer 32 and the stacked dielectric layer along the first direction D1 and exposes the top surface of the first contact structure 25. Figure 6 shown.

[0084] For example, a bottom anti-reflective coating (BARC) material is deposited on the substrate to form a cover layer 50 that fills the storage layer 40, the separation groove 41 and covers the second dielectric layer. Then, a patterned photoresist layer 51 is formed on the surface of the cover layer 50, and the photoresist layer 51 has an etching window 52 that exposes the cover layer 50, such as Figure 5 The capping layer 50, the second dielectric layer, the barrier layer and the stacked dielectric layer are etched downward along the etching window 52 to form a storage hole 60 that penetrates the barrier layer 32 and the stacked dielectric layer along the first direction D1 and exposes the top surface of the first contact structure 25, as shown in FIG. Figure 5-Figure 6 As shown. The bottom surface of the storage hole 60 is flush with the top surface of the first contact structure 25, thereby preventing the process of etching the storage hole 60 from causing damage to the first contact structure 25. Afterwards, the cover layer 50 and the photoresist layer 51 are removed. In an example, the width of the etching window 52 (for example, the width of the etching window 52 along the second direction D2) is smaller than the width of the storage groove 40 (for example, the width of the storage groove 40 along the second direction D2), thereby preventing the process of etching to form the storage hole 60 from causing damage to the protrusion structure 42.

[0085] Figure 7 2 is another structural schematic diagram after forming the storage hole in a specific embodiment of the present invention. In some other embodiments, the specific steps of forming the storage hole 60 at least penetrating the barrier layer 32 and exposing the first contact structure 25 on one side of the protrusion structure 42 include:

[0086] The barrier layer 32, the stacked dielectric layer and the first dielectric layer 21 are etched downward along the storage groove 40 to form a storage hole 60 that penetrates the barrier layer 32 and the stacked dielectric layer along the first direction D1 and extends into the first dielectric layer 21, wherein the storage hole 60 exposes the top surface and the side wall of the first contact structure 25. Figure 7 shown.

[0087] For example, a bottom anti-reflective coating (BARC) material is deposited on the substrate to form a cover layer 50 that fills the storage layer 40, the separation groove 41 and covers the second dielectric layer. Then, a patterned photoresist layer 51 is formed on the surface of the cover layer 50, and the photoresist layer 51 has an etching window 52 that exposes the cover layer 50, such as Figure 5 The cover layer 50, the second dielectric layer, the barrier layer, the stacked dielectric layer and the first dielectric layer 21 are etched downward along the etching window 52 to form a storage hole 60 that penetrates the barrier layer 32 and the stacked dielectric layer along the first direction D1 and extends into the first dielectric layer 21, as shown in FIG. Figure 5 and Figure 7 As shown. The storage hole 60 exposes the top surface and sidewalls of the first contact structure 25, which can not only further increase the polarization area of ​​the storage structure, but also increase the contact area between the storage structure and the first contact structure 25, so as to reduce the contact resistance between the storage structure and the first contact structure 25. Afterwards, the cover layer 50 and the photoresist layer 51 are removed. In one example, the width of the etching window 52 (for example, the width of the etching window 52 along the second direction D2) is smaller than the width of the storage groove 40 (for example, the width of the storage groove 40 along the second direction D2), so as to avoid the process of etching to form the storage hole 60 causing damage to the protrusion structure 42.

[0088] Figure 8 is a schematic diagram of a structure after forming a storage structure in a specific embodiment of the present invention. In some embodiments, the specific steps of forming a storage structure 70 that continuously covers the inner wall of the storage hole 60, the exposed surface of the first contact structure 25, and the surface of the protrusion structure 42, and the storage structure 70 is electrically connected to the first contact structure 25 include:

[0089] forming a lower electrode which continuously covers the inner wall of the storage hole 60, exposes the surface of the first contact structure 25 and the surface of the protruding structure 42, and is electrically connected to the first contact structure 25;

[0090] forming a storage layer covering the lower electrode;

[0091] An upper electrode covering the storage layer is formed, and the upper electrode, the storage layer and the lower electrode together constitute the storage structure 70 .

[0092] For example, TiN, metal material or polysilicon material is deposited on the substrate to form a lower electrode that continuously covers the inner wall of the storage hole 60, exposes the surface of the first contact structure 25 and the surface of the protruding structure 42, and is electrically connected to the first contact structure 25. Then, a phase change material or a ferroelectric material is deposited on the substrate to form a storage layer covering the lower electrode. After that, TiN, metal material or polysilicon material is deposited on the substrate to form an upper electrode covering the storage layer. The upper electrode, the storage layer and the lower electrode together constitute the storage structure 70, as shown in FIG. Figure 8 Wherein, the metal material may be metal copper or metal tungsten.

[0093] Fig. 9 is a schematic diagram of a structure after a conductive filling layer is formed in a specific embodiment of the present invention, Fig.10 is a structural diagram after the adjacent storage structures are separated in a specific implementation manner of the present invention, Fig.11 is a schematic diagram of a structure after forming a third dielectric layer, a fourth dielectric layer and a mask layer in a specific embodiment of the present invention, Fig.12 2 is a schematic diagram of a structure after the first lead-out structure is formed in a specific embodiment of the present invention. In some embodiments, after the storage structure 70 is formed to continuously cover the inner wall of the storage hole 60, the exposed surface of the first contact structure 25 and the surface of the protrusion structure 42, the following steps are also included:

[0094] A conductive filling layer 80 is formed to fill the storage hole 60 and the storage groove 40 and cover the upper electrode. Figure 8-Figure 9 As shown;

[0095] A first lead-out structure 120 is formed above the storage structure 70 and electrically connected to the conductive filling layer 80 , and the first lead-out structure 120 is aligned with the first contact structure 25 along the first direction D1 .

[0096] For example, after forming the storage structure 70, a conductive material such as metal tungsten is deposited on the substrate to form a conductive filling layer 80 that fills the storage hole 60 and the storage groove 40 and covers the upper electrode. Figure 8 and Fig. 9As shown. Then, the conductive filling layer 80 is planarized by a chemical mechanical polishing process to improve the flatness of the surface of the conductive filling layer 80, and the thickness of the conductive filling layer 80 is adjusted to a desired thickness. Then, a portion of the storage structure 70 and the conductive filling layer 80 on the top surface of the first dielectric layer 21 is removed by an etching process to form an opening 90 exposing the barrier layer 32, so as to disconnect the connection between the storage structures 70 in adjacent storage cells and the connection between the conductive filling layers 80 in adjacent storage cells, as shown. Fig.10 shown.

[0097] Next, a silicon nitride material is deposited on the substrate to form a third dielectric layer 110 that continuously covers the conductive filling layer 80 and exposes the barrier layer 32. Then, a silicon dioxide material is deposited on the substrate to form a fourth dielectric layer 111 that covers the third dielectric layer 110. After that, a silicon oxynitride material is deposited on the substrate to form a mask layer 112 that covers the fourth dielectric layer 111. The mask layer 112 is patterned to form an etching pattern. The fourth dielectric layer 111 and the third dielectric layer 110 are etched downward along the etching pattern to form a first lead-out hole that exposes the conductive filling layer 80. While etching to form the first lead-out hole, a second lead-out hole that penetrates the fourth dielectric layer 111, the third dielectric layer 110, the barrier layer 32 and the stacked dielectric layer along the first direction can also be simultaneously formed, and the bottom of the second lead-out hole exposes the second contact structure 26. At the same time, a conductive material such as metal tungsten is deposited in the first lead-out hole and the second lead-out hole to form the first lead-out structure 120 electrically connected to the conductive filling layer 80 and the second lead-out structure 121 electrically connected to the second contact structure 26. By aligning the first lead-out structure 120 with the first contact structure 25 along the first direction D1, it is possible to further avoid damage to the storage structure 70 caused by the process of etching the first lead-out hole.

[0098] This specific embodiment also provides a three-dimensional memory. The three-dimensional memory provided in this specific embodiment can be used as follows Figure 1-Figure 12 The manufacturing method of a three-dimensional memory is formed, and the structure of the three-dimensional memory can be seen in Fig.12 .like Figure 1-Figure 12 As shown, the three-dimensional memory comprises:

[0099] A base, comprising a substrate 20, a first dielectric layer 21 located above the substrate 20, and a first contact structure 25 penetrating the first dielectric layer 21 along a first direction D1, wherein the substrate 20 comprises a top surface and a bottom surface that are relatively distributed, and the first direction D1 intersects the top surface of the substrate 20 vertically;

[0100] A barrier layer 32, located above the substrate along the first direction D1;

[0101] A protruding structure 42, located above the barrier layer 32 along the first direction D1;

[0102] a storage hole 60, located at one side of the protruding structure 42 along the second direction D2, the storage hole 60 at least penetrates the barrier layer 32 and exposes the first contact structure 25, and the second direction D2 is parallel to the top surface of the substrate 20;

[0103] The storage structure 70 continuously covers the inner wall of the storage hole 60 , the exposed surface of the first contact structure 25 , and the surface of the protruding structure 42 , and the storage structure 70 is electrically connected to the first contact structure 25 .

[0104] In this specific embodiment, by setting the protruding structure 42 located above the substrate, the storage structure 70 continuously covers the inner wall of the storage hole 60, the exposed surface of the first contact structure 25 and the surface of the protruding structure 42, which not only forms a three-dimensional structure memory, but also enables the storage unit to have a larger polarization area under the same planar area, and can store more polarized charges under the same voltage, thereby improving the storage capacity of the storage structure, greatly improving the sensitivity, stability and reliability of the three-dimensional memory, and achieving improvement in the performance of the three-dimensional memory.

[0105] In order to further increase the polarization area of ​​the storage structure, thereby further improving the storage capacity of the three-dimensional memory, in some embodiments, the three-dimensional memory further includes:

[0106] The stacked dielectric layer is located between the first dielectric layer 21 and the barrier layer 32 along the first direction D1, and the storage hole 60 at least penetrates the barrier layer 32 and the stacked dielectric layer.

[0107] To further simplify the manufacturing process of the three-dimensional memory, in some embodiments, the storage hole 60 penetrates the barrier layer 32 and the stacked dielectric layer along the first direction D1 and only exposes the top surface of the first contact structure 25 .

[0108] In order to further increase the polarization area of ​​the storage structure, in other embodiments, the storage hole 60 penetrates the barrier layer 32 and the stacked dielectric layer along the first direction D1 and extends into the first dielectric layer 21 , and the storage hole 60 exposes the top surface and side walls of the first contact structure 25 .

[0109] In some embodiments, a plurality of the protruding structures 42 are arranged along the second direction D2, and a storage slot 40 communicating with the storage hole 60 is provided between adjacent protruding structures 42;

[0110] The storage structure 70 includes a lower electrode that continuously covers the inner wall of the storage hole 60, exposes the surface of the first contact structure 25 and the surface of the protruding structure 42 and is electrically connected to the first contact structure 25, a storage layer covering the lower electrode, and an upper electrode covering the storage layer.

[0111] In some embodiments, the three-dimensional memory further includes:

[0112] A conductive filling layer 80, filling the storage hole 60 and the storage slot 40 and covering the upper electrode;

[0113] The first lead-out structure 120 is located above the storage structure 70 and is electrically connected to the conductive filling layer 80 , and the first lead-out structure 120 is aligned with the first contact structure 25 along the first direction D1 .

[0114] The present specific embodiment provides a three-dimensional memory and a method for forming the same. By forming a barrier layer and a protruding structure located above the barrier layer above a substrate, a storage hole is formed on one side of the protruding structure, which at least penetrates the barrier layer and exposes the first contact structure, so that the storage structure can continuously cover the inner wall of the storage hole, the surface of the exposed first contact structure and the surface of the protruding structure. Not only a three-dimensional memory is formed, but also the storage unit has a larger polarization area under the same plane area, and can store more polarized charges under the same voltage, thereby increasing the storage capacity of the storage structure, greatly improving the sensitivity, stability and reliability of the three-dimensional memory, and achieving improvement in the performance of the three-dimensional memory.

[0115] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for manufacturing a three-dimensional memory, characterized in that: The steps include: forming a base, the base comprising a substrate, a first dielectric layer located above the substrate, and a first contact structure penetrating the first dielectric layer, the substrate comprising a top surface and a bottom surface that are relatively distributed; forming a stacked dielectric layer on a top surface of the first dielectric layer; forming a barrier layer covering the top surface of the stacked dielectric layer and a second dielectric layer covering the top surface of the barrier layer; The second dielectric layer is etched using the barrier layer as an etching stop layer to form a plurality of protrusion structures spaced apart along a second direction, wherein the second direction is parallel to the top surface of the substrate; A storage hole is formed on one side of the protruding structure, the storage hole penetrates the barrier layer and the stacked dielectric layer along a first direction and extends into the first dielectric layer, the storage hole exposes the top surface and sidewall of the first contact structure, and the first direction intersects perpendicularly with the top surface of the substrate; A storage structure is formed, the storage structure comprising a lower electrode that continuously covers the inner wall of the storage hole, exposes the surface of the first contact structure and the surface of the protruding structure and is electrically connected to the first contact structure, a storage layer covering the lower electrode, and an upper electrode covering the storage layer.

2. The method for manufacturing a three-dimensional memory according to claim 1, characterized in that: The specific steps of forming the substrate include: Providing a substrate, wherein the substrate includes an active region; forming a first dielectric layer covering the top surface of the substrate; A first contact structure is formed along a first direction, penetrating the first dielectric layer and electrically connected to the active region.

3. The method for manufacturing a three-dimensional memory according to claim 2, characterized in that: The specific steps of patterning the second dielectric layer to form a plurality of protrusion structures spaced apart along the second direction include: The second dielectric layer is etched to form a storage groove located above the first contact structure along the first direction and penetrating the second dielectric layer, wherein the storage groove separates the second dielectric layer into a plurality of the protruding structures.

4. The method for manufacturing a three-dimensional memory according to claim 3, characterized in that: The specific steps of forming a storage hole at least penetrating the barrier layer and exposing the first contact structure on one side of the protrusion structure include: The barrier layer, the stacked dielectric layer and the first dielectric layer are etched downward along the storage groove to form a storage hole that penetrates the barrier layer and the stacked dielectric layer along the first direction and extends into the first dielectric layer.

5. The method for manufacturing a three-dimensional memory according to claim 4, characterized in that: The specific steps of forming a storage structure that continuously covers the inner wall of the storage hole, the exposed surface of the first contact structure and the surface of the protrusion structure, and electrically connecting the storage structure to the first contact structure include: forming a lower electrode which continuously covers the inner wall of the storage hole, exposes the surface of the first contact structure and the surface of the protruding structure, and is electrically connected to the first contact structure; forming a storage layer covering the lower electrode; An upper electrode covering the storage layer is formed, and the upper electrode, the storage layer and the lower electrode together constitute the storage structure.

6. The method for manufacturing a three-dimensional memory according to claim 5, characterized in that: After forming the storage structure that continuously covers the inner wall of the storage hole, the exposed surface of the first contact structure and the surface of the protrusion structure, the following steps are further included: forming a conductive filling layer that fills the storage hole and the storage groove and covers the upper electrode; A first lead-out structure is formed above the storage structure and electrically connected to the conductive filling layer, and the first lead-out structure is aligned with the first contact structure along the first direction.

7. A three-dimensional memory, characterized in that: include: A base, comprising a substrate, a first dielectric layer located above the substrate, and a first contact structure penetrating the first dielectric layer along a first direction, wherein the substrate comprises a top surface and a bottom surface that are relatively distributed, and the first direction intersects the top surface of the substrate perpendicularly; a barrier layer located above the substrate along the first direction; a protruding structure located above the barrier layer along the first direction; a storage hole, located at one side of the protruding structure along a second direction, the storage hole at least passing through the barrier layer and exposing the first contact structure, the second direction being parallel to the top surface of the substrate; a storage structure, the storage structure comprising a lower electrode continuously covering an inner wall of the storage hole, exposing a surface of the first contact structure and a surface of the protrusion structure and electrically connected to the first contact structure, a storage layer covering the lower electrode, and an upper electrode covering the storage layer; The stacked dielectric layer is located between the first dielectric layer and the barrier layer along the first direction, and the storage hole penetrates the barrier layer and the stacked dielectric layer along the first direction and extends into the first dielectric layer, and the storage hole exposes the top surface and sidewalls of the first contact structure.

8. A three-dimensional memory according to claim 7, characterized in that: A plurality of the protrusion structures are arranged along the second direction, and a storage groove communicating with the storage hole is provided between adjacent protrusion structures; The three-dimensional memory further comprises: A conductive filling layer, filling the storage hole and the storage slot and covering the upper electrode; A first lead-out structure is located above the storage structure and electrically connected to the conductive filling layer, and the first lead-out structure is aligned with the first contact structure along the first direction.

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