Process chamber cleaning method, semiconductor etching method, and semiconductor processing apparatus

Abstract

The application provides a process chamber cleaning method, a semiconductor etching method and a semiconductor process equipment. The cleaning method comprises: etching at least a byproduct film layer on an inner surface of a dielectric window by using a first plasma, and controlling an etching rate of the first plasma on the byproduct film layer in a first region to be greater than an etching rate of the first plasma on the byproduct film layer in a second region; etching at least the byproduct film layer on the inner surface of the dielectric window by using the first plasma, and controlling the etching rate of the first plasma on the byproduct film layer in the first region to be less than the etching rate of the first plasma on the byproduct film layer in the second region, so that a thickness difference between a residual byproduct film layer in the first region and a residual byproduct film layer in the second region is less than a preset value. The application can effectively reduce the risk of the byproduct film layer falling off and prolong the maintenance period of the wet cleaning of the process chamber.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a process chamber cleaning method, a semiconductor etching method, and a semiconductor process equipment. BACKGROUND

[0002] In the process of etching metal, a large amount of by-products will be generated, part of which will be excluded to the outside of the process chamber, and the other part will be deposited on the inner surface of the process chamber to form a by-product film layer. As the number of etched wafers accumulates, the thickness of the by-product film layer gradually increases, and the by-product film layer will fall off due to the reasons such as the film layer being too thick and the film layer having defects, causing particle contamination to the wafer and resulting in defects on the wafer, which affects the yield. Therefore, the interior of the process chamber is usually cleaned by wet cleaning to remove the by-product film layer. However, when the by-product film layer reaches a certain thickness, the by-product film layer may fall off before being removed.

[0003] To solve the above problems, the related art uses a waferless auto clean (WAC) process to clean the by-product film layer after each wafer etching in the process chamber, so as to reduce the risk of the by-product film layer falling off. The waferless auto clean process includes: first removing carbon-containing by-products in the by-product film layer by using oxygen; then removing metal by-products in the by-product film layer by using chlorine; and then purging the interior of the process chamber by using an inert gas. SUMMARY

[0004] The present application provides a process chamber cleaning method, a semiconductor etching method, and a semiconductor process equipment to solve the technical problems existing in the related art.

[0005] The first aspect of the present application provides a process chamber cleaning method for cleaning a by-product film layer deposited on the inner surface of a process chamber, the cleaning method comprising: performing a first cleaning step, using a first plasma to etch at least the by-product film layer on the inner surface of a dielectric window, and controlling the etching rate of the first plasma on the by-product film layer in a first region to be greater than the etching rate on the by-product film layer in a second region; the dielectric window is arranged at the top of the process chamber, the first region is located in the middle of the dielectric window, and the second region surrounds the first region and is located outside the first region; performing a second cleaning step, using the first plasma to etch at least the by-product film layer on the inner surface of the dielectric window, and controlling the etching rate of the first plasma on the by-product film layer in the first region to be less than the etching rate on the by-product film layer in the second region, so that the thickness difference between the remaining by-product film layer in the first region and the remaining by-product film layer in the second region is less than a preset value.

[0006] In one embodiment, the outer surface of the media window is spaced apart with a first coil and a second coil, the first coil corresponds to the first region, and the second coil corresponds to the second region.

[0007] The process conditions of the first cleaning step include: controlling the current on the first coil to be greater than the current on the second coil, so that the distribution density of the first plasma in the first region is greater than the distribution density of the first plasma in the second region.

[0008] And / or, the process conditions of the second cleaning step include: controlling the current on the second coil to be greater than the current on the first coil, so that the distribution density of the first plasma in the second region is greater than the distribution density of the first plasma in the first region.

[0009] In one embodiment, the cleaning method further includes: controlling the pressure of the process chamber in the second cleaning step to be less than the pressure of the process chamber in the first cleaning step.

[0010] In one embodiment, the pressure of the process chamber in the first cleaning step ranges from 20 mTorr to 65 mTorr, and the pressure of the process chamber in the second cleaning step ranges from 5 mTorr to 20 mTorr.

[0011] In one embodiment, the first plasma is used to etch metal byproducts in the byproduct film layer, and the cleaning method further includes: after performing the second cleaning step, performing a third cleaning step, using a second plasma to etch carbon-containing byproducts in the remaining byproduct film layer.

[0012] In one embodiment, the cleaning method further includes: in the case that the idle time of the process chamber exceeds a preset time or is started, performing a warming-up processing step, using a third plasma to transfer energy to the internal components of the process chamber, so that the temperature of the internal components is warmed up to a preset temperature range.

[0013] In one embodiment, the process conditions of the warming-up processing step include: the third plasma is also used to etch the byproduct film layer on the internal components to pre-clean the surface of the byproduct film layer.

[0014] The second aspect of the present application provides a semiconductor etching method, which includes: after cleaning the byproduct film layer on the inner surface of the process chamber by using the cleaning method of any one of the above embodiments, and after the wafer to be etched is transmitted into the process chamber, controlling the process chamber to perform an etching step to etch the wafer to be etched.

[0015] In one embodiment, after cleaning the byproduct film layer on the inner surface of the process chamber, and before the wafer to be etched is transferred into the process chamber, an etching gas adsorption step is performed, and an etching gas is introduced into the process chamber, so that the surface of the internal components of the process chamber adsorbs the etching gas.

[0016] The third aspect of the present application provides a semiconductor process equipment, comprising a process chamber, a radio frequency coil and a controller, the radio frequency coil is located on the outer surface of the dielectric window of the process chamber, the radio frequency coil comprises a first coil and a second coil arranged at intervals, the first coil corresponds to a first region, and the second coil corresponds to a second region, the first region is located in the middle of the dielectric window, and the second region surrounds the first region and is located outside the first region, the controller comprises at least one processor and at least one memory, the memory stores a computer program, and the computer program is executed by the processor to implement the process chamber cleaning method of any one of the above embodiments; or, the semiconductor etching method of any one of the above embodiments.

[0017] The advantages or beneficial effects of the above technical solutions at least include: by controlling the etching rate of the first plasma on the byproduct film layer of the first region to be greater than the etching rate on the byproduct film layer of the second region in the first cleaning step, and controlling the etching rate of the first plasma on the byproduct film layer of the first region to be less than the etching rate on the byproduct film layer of the second region in the second cleaning step, the thickness difference between the residual byproduct film layer of the first region and the residual byproduct film layer of the second region can be reduced, which is beneficial to ensuring the thickness uniformity of the residual byproduct film layer on the inner surface of the dielectric window, avoiding the residual byproduct film layer on the inner surface of the dielectric window from falling off due to uneven thickness distribution, and prolonging the maintenance period of the process chamber for wet cleaning. BRIEF DESCRIPTION OF DRAWINGS

[0018] The drawings incorporated in the specification and constituting a part thereof illustrate embodiments consistent with the present application and together with the description serve to explain the principles of the application. In addition, the drawings and the description thereto are not intended to limit the scope of the present application in any way.

[0019] Figure 1A A cross-sectional view of the layout relationship between the process chamber and the radio frequency coil is shown.

[0020] Figure 1B A cross-sectional view of the layout relationship between the process chamber and the radio frequency coil is shown. Figure 1A A top view of the dielectric window is shown.

[0021] Figure 2 A flowchart of the process chamber cleaning method of an embodiment of the present application is shown.

[0022] Figure 3A Shown is a schematic diagram of setting marking lines at different positions on the outer surface of the dielectric window.

[0023] Figure 3B The figure shows the change in etching rate of the by-product film layer located within the third marking line under different current ratio conditions.

[0024] Figure 3C The figure shows the change in etching rate of the by-product film layer outside the third marking line under different current ratio conditions.

[0025] Figure 3D The figure shows the change in etching rate of the by-product film layer located within the third marking line under different pressure conditions.

[0026] Figure 3E The figure shows the change of the etching rate of the by-product film layer outside the third marking line under different pressure conditions.

[0027] Figure 4 FIG2 is a flow chart showing a process chamber cleaning method and a semiconductor etching method according to an embodiment of the present application.

[0028] Figure 5A Shown is a plane electron microscope effect diagram of the by-product film layer produced by the related technology.

[0029] Figure 5B Shown Figure 5A The local plane rendering within box A.

[0030] Figure 5C Shown Figure 5A The local cross-section rendering within box A.

[0031] Figure 6A Shown is a plane electron microscope effect diagram of the by-product film layer produced by the embodiment of the present application.

[0032] Figure 6B Shown is a cross-sectional electron microscope image of the by-product film layer produced by the embodiment of the present application.

[0033] Figure 7 The figure shows a comparison diagram of the key dimension deviation between the related art and the present application.

[0034] Figure 8 FIG. 1 is a schematic structural diagram of a semiconductor process equipment according to an embodiment of the present application. DETAILED DESCRIPTION

[0035] In the following, only certain exemplary embodiments are simply described. As those skilled in the art can recognize, the described embodiments can be modified in various different ways without departing from the spirit or scope of the present application. Therefore, the drawings and the description are considered to be exemplary in nature rather than limiting.

[0036] In the related art, the wafer-free automatic cleaning process usually ionizes the process gas into plasma, and uses the plasma to clean the surface of the byproduct film layer, so as to make the surface of the byproduct film layer smooth and the thickness of the byproduct film layer thin, thereby reducing the risk of peeling of the byproduct film layer. The inventors have found in the implementation process that, in the related art, due to the uneven distribution density of the plasma, the etching rate of the plasma on the byproduct film layers located in different regions inside the process chamber is different, which causes a large thickness difference between the byproduct film layers in different regions. This thickness difference causes uneven stress distribution of the byproduct film layer, which makes the byproduct film layer also prone to peeling, and is not conducive to prolonging the maintenance cycle of the process chamber for wet cleaning. For example, as shown in Figure 1A and Figure 1B , the distribution density of the plasma P inside the process chamber 10 usually decreases along the radial direction D1 of the dielectric window 20, so that the etching rate of the byproduct film layer 30A located in the first region 20A is greater than the etching rate of the byproduct film layer 30B located in the second region 20B, causing the thickness of the byproduct film layer 30B located in the second region 20B to be greater than the thickness of the byproduct film layer 30A located in the first region 20A, wherein the first region 20A is located in the middle of the dielectric window 20, and the second region 20B surrounds the first region 20A and is located on the outside of the first region 20A. As the number of wafers W etched by the process chamber 10 accumulates, this thickness difference will be exacerbated, causing uneven stress distribution of the byproduct film layer 30, which leads to peeling of the byproduct film layer 30 before it is cleaned. Moreover, since the dielectric window 20 is located directly above the wafer support device 51, the byproduct film layer 30 is prone to particle contamination of the wafer W, which causes defects in the wafer W and affects the yield.

[0037] In view of this, the embodiments of the present application provide a process chamber cleaning method, a semiconductor etching method, and a semiconductor process equipment, which can effectively solve the above technical problems. The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0038] Figure 2 As shown in the figure, it is a flowchart of a process chamber cleaning method according to an embodiment of the present application. Please refer to Figure 1A , Figure 1B and Figure 2 , the process chamber cleaning method is used to clean the byproduct film layer 30 deposited on the inner surface of the process chamber 10. The process chamber cleaning method includes the following steps S110 to S120.

[0039] In step S110, a first cleaning step is performed to etch at least the byproduct film layer 30 on the inner surface of the dielectric window 20 by using a first plasma, and to control the etching rate of the first plasma on the byproduct film layer 30A of the first region 20A to be greater than the etching rate of the first plasma on the byproduct film layer 30B of the second region 20B. The dielectric window 20 is arranged at the top of the process chamber 10, the first region 20A is located in the middle of the dielectric window 20, and the second region 20B surrounds the first region 20A and is located outside the first region 20A.

[0040] In step S120, a second cleaning step is performed to etch at least the byproduct film layer 30 on the inner surface of the dielectric window 20 by using the first plasma, and to control the etching rate of the first plasma on the byproduct film layer 30A of the first region 20A to be less than the etching rate of the first plasma on the byproduct film layer 30B of the second region 20B, so that the thickness difference between the residual byproduct film layer 30A of the first region 20A and the residual byproduct film layer 30B of the second region 20B is less than a preset value.

[0041] For example, after the cleaning method of the embodiment of the present application is used to clean the byproduct film layer 30 on the inner surface of the dielectric window 20, the thickness of the residual byproduct film layer 30A of the first region 20A is 46 nm, the thickness of the residual byproduct film layer 30B of the second region 20B is 28 nm, and the thickness difference between the residual byproduct film layer 30 of the first region 20A and the residual byproduct film layer 30 of the second region 20B is 18 nm. Compared with the related art, the thickness of the residual byproduct film layer 30A of the first region 20A can be reduced by 31%, the thickness of the residual byproduct film layer 30B of the second region 20B can be reduced by 42%, and the thickness of the residual byproduct film layer 30 is thinner.

[0042] Those skilled in the art should understand that the process chamber cleaning method of the embodiment of the present application can first perform step S110 and then perform step S120, or first perform step S120 and then perform step S110, and the present application does not limit the execution order of the first cleaning step and the second cleaning step.

[0043] The above scheme can reduce the thickness difference between the remaining byproduct film layer 30A of the first region 20A and the remaining byproduct film layer 30B of the second region 20B by controlling the etching rate of the first plasma on the byproduct film layer 30A of the first region 20A to be greater than the etching rate of the first plasma on the byproduct film layer 30B of the second region 20B in the first cleaning step and controlling the etching rate of the first plasma on the byproduct film layer 30A of the first region 20A to be less than the etching rate of the first plasma on the byproduct film layer 30B of the second region 20B in the second cleaning step, thereby facilitating to ensure the thickness uniformity of the remaining byproduct film layer 30 on the inner surface of the dielectric window 20, avoiding the remaining byproduct film layer 30 on the inner surface of the dielectric window 20 from falling off due to uneven stress distribution caused by uneven thickness, and facilitating to prolong the maintenance period of the process chamber 10 for wet cleaning, for example, the average maintenance period of the process chamber 10 for wet cleaning is prolonged to be greater than 350 radio frequency hours.

[0044] In one embodiment, as shown in Figure 1A and Figure 1B The outer surface of the dielectric window 20 is spaced apart from the first coil 41 and the second coil 42, the first coil 41 is located at the middle of the dielectric window 20 to correspond to the first region 20A, and the second coil 42 is located at the periphery of the dielectric window 20 to correspond to the second region 20B. Specifically, the shape of the dielectric window 20 is circular, and the first coil 41 and the second coil 42 are spaced apart on the outer surface of the dielectric window 20 along the radial direction D1 of the dielectric window 20, so that the first coil 41 is located at the middle of the dielectric window 20, and the second coil 42 is located at the periphery of the dielectric window 20.

[0045] The process conditions of the first cleaning step include controlling the current on the first coil 41 to be greater than the current on the second coil 42, so that the distribution density of the first plasma in the first region 20A is greater than the distribution density of the first plasma in the second region 20B. Wherein, the first region 20A includes the projection area of the middle of the dielectric window 20 in the process chamber 10, and the second region 20B at least includes the projection area of the periphery of the dielectric window 20 in the process chamber 10.

[0046] And / or, the process conditions of the second cleaning step include controlling the current on the second coil 42 to be greater than the current on the first coil 41, so that the distribution density of the first plasma in the second region 20B is greater than the distribution density of the first plasma in the first region 20A.

[0047] During the implementation of the present application, the inventors conducted the following experiments:

[0048] As shown in Figure 1A and Figure 3AAs shown, the first mark line D11, the second mark line D12, the third mark line D13 and the fourth mark line D14 are circularly marked on the dielectric window 20 along the radial direction D1 of the dielectric window 20, wherein the radius of the first mark line D11 is equal to 1 / 8 of the radius of the dielectric window 20, the radius of the second mark line D12 is equal to 1 / 4 of the radius of the dielectric window 20, the radius of the third mark line D13 is equal to 1 / 2 of the radius of the dielectric window 20, and the radius of the fourth mark line D14 is greater than 1 / 2 of the radius of the dielectric window 20 and the fourth mark line D14 is adjacent to the edge of the dielectric window 20; the first coil 41 is located between the second mark line D12 and the third mark line D13, so that the third mark line D13 is the middle part of the dielectric window 20 and corresponds to the first area 20A, and the second coil 42 is located adjacent to the fourth mark line D14, so that the third mark line D13 is the peripheral part of the dielectric window 20 and corresponds to the second area 20B.

[0049] As shown in Figure 1A and Figure 3A , the ratio of the current on the second coil 42 to the sum of the currents on the first coil 41 and the second coil 42 is the first ratio, the second ratio and the third ratio respectively, and the variation of the etching rate of the byproduct film layer 30 at each mark line, the support 11 at the top corner inside the process chamber 10 and the inner side wall 10A of the process chamber 10 is determined; wherein the first ratio < the second ratio < the third ratio, and the third ratio > 0.5, and the first ratio < 0.5.

[0050] From the determination result, as shown in Figure 3B , when the ratio of the current on the second coil 42 to the sum of the currents on the first coil 41 and the second coil 42 decreases to less than 0.5, that is, decreases to the first ratio, the current is mainly distributed on the first coil 41, and the etching rate of the byproduct film layer 30A located in the third mark line D13 of the dielectric window 20 by the first plasma increases significantly, that is, the etching rate of the byproduct film layer 30A of the first area 20A by the first plasma increases significantly, so that the cleaning efficiency of the byproduct film layer 30A within the third mark line D13 is significantly improved; as shown in Figure 3C , when the ratio of the current on the second coil 42 to the sum of the currents on the first coil 41 and the second coil 42 increases to more than 0.5, that is, increases to the third ratio, the current is mainly distributed on the second coil 42, and the etching rate of the byproduct film layer 30B located outside the third mark line D13 of the dielectric window 20 by the first plasma increases significantly, that is, the etching rate of the byproduct film layer 30B of the second area 20B by the first plasma increases significantly, so that the cleaning of the byproduct film layer 30 outside the third mark line D13 is more effective. Therefore, the etching rate of the byproduct film layer 30 in different areas by the first plasma can be controlled by controlling the current on the first coil 41 and the second coil 42.

[0051] In one example, the current on the first coil 41 being greater than the current on the second coil 42 can be that the ratio of the current on the second coil 42 to the sum of the currents on the first coil 41 and the second coil 42 is less than or equal to 0.5, so that the current is mainly distributed on the first coil 41. Since the first coil 41 corresponds to the first region 20A, the first coil 41 can excite the process gas inside the process chamber 10 to generate the first plasma mainly within the first region 20A, so that the distribution density of the first plasma within the first region 20A is greater than the distribution density of the first plasma within the second region 20B, and because the distribution density of the first plasma has a positive proportional relationship with the etching rate of the byproduct film layer 30, it can be achieved that the etching rate of the first plasma to the byproduct film layer 30A of the first region 20A is greater than the etching rate of the first plasma to the byproduct film layer 30B of the second region 20B.

[0052] In another example, the current on the second coil 42 being greater than the current on the first coil 41 can be that the ratio of the current on the second coil 42 to the sum of the currents on the first coil 41 and the second coil 42 is greater than or equal to 0.5, so that the current is mainly distributed on the second coil 42. Since the second coil 42 corresponds to the second region 20B, the second coil 42 can excite the process gas inside the process chamber 10 to generate the first plasma mainly within the second region 20B, so that the distribution density of the first plasma within the second region 20B is greater than the distribution density of the first plasma within the first region 20A, and because the distribution density of the first plasma has a positive proportional relationship with the etching rate of the byproduct film layer 30, it can be achieved that the etching rate of the first plasma to the byproduct film layer 30B of the second region 20B is greater than the etching rate of the first plasma to the byproduct film layer 30A of the first region 20A.

[0053] In one embodiment, referring to Figure 1A The cleaning method comprises at least one of the following:

[0054] The first cleaning step comprises: when the first cleaning step is started, monitoring the spectral intensity of the characteristic product generated by etching the byproduct film layer 30; and stopping the first cleaning step when the spectral intensity is monitored to reach a steady state.

[0055] The second cleaning step comprises: when the second cleaning step is started, monitoring the spectral intensity of the characteristic product generated by etching the byproduct film layer 30; and stopping the second cleaning step when the spectral intensity is monitored to reach a steady state.

[0056] Exemplarily, the material of the by-product film layer 30 includes aluminum, and the first plasma is formed by ionizing a chlorine-containing gas. The by-product film layer 30 is etched using the first plasma, and the characteristic product produced is aluminum trichloride (AlCl3). By monitoring the change in the spectral intensity of aluminum trichloride, the effectiveness of cleaning the by-product film layer 30 can be reflected. Specifically, when the first plasma begins to etch the by-product film layer 30, the reaction between the two is violent, and a large amount of aluminum trichloride is produced. The content of aluminum trichloride is high, and the spectral intensity of aluminum trichloride is strong. As the etching amount of the by-product film layer 30 increases, the thickness of the remaining by-product film layer 30 gradually becomes thinner, the amount of aluminum trichloride produced gradually decreases, and the spectral intensity of aluminum trichloride weakens and gradually reaches a stable state. When the spectral intensity of aluminum trichloride reaches a stable state, it reflects that the by-product film layer 30 is effectively cleaned.

[0057] Among them, monitoring the spectral intensity to reach a stable state can be: periodically collecting the spectral intensity of the characteristic product, and judging whether the difference between two adjacent spectral intensities is less than a preset spectral threshold; when it is judged that the difference between two adjacent spectral intensities is less than the preset threshold, determining that the spectral intensity has reached a stable state.

[0058] The above scheme monitors the spectral intensity of the characteristic products generated by the etching by-product film layer 30 when executing the first cleaning step and / or the second cleaning step, and stops executing the corresponding cleaning step when the spectral intensity is monitored to reach a stable state. It can monitor the effectiveness of cleaning the by-product film layer 30A in the first area 20A and / or the by-product film layer 30B in the second area 20B, and efficiently and accurately control the cleaning of the by-product film layer 30A in the first area 20A and / or the by-product film layer 30 in the second area 20B, which is beneficial to improving the cleaning efficiency and accuracy of the by-product film layer 30 in different areas.

[0059] In one embodiment, the cleaning method further includes: controlling the pressure of the process chamber in the second cleaning step to be lower than the pressure of the process chamber in the first cleaning step.

[0060] Among them, such as Figure 1A As shown, there is a negative correlation between the pressure of the process chamber 10 and the mean free path of the first plasma. Specifically, the lower the pressure of the process chamber 10 is, the longer the mean free path of the first plasma is, and the stronger the diffusion ability of the first plasma is.

[0061] For example, Figure 1AAs shown, a support 11 is further disposed outside the second region 20B, and the inner sidewall 10A of the process chamber 10 is also located outside the second region 20B. By controlling the pressure of the process chamber 10 during the second cleaning step to be lower than the pressure of the process chamber 10 during the first cleaning step, the first plasma can be diffused to the surface of the support 11 and the surface of the inner sidewall 10A of the process chamber 10, thereby etching the byproduct film layer 30 in the corresponding areas.

[0062] In the process of implementing this application, the inventors also conducted the following experiments:

[0063] Please refer to Figure 1A 、 Figure 3A 、 Figure 3D and Figure 3E , respectively controlling the pressure inside the process chamber 10 to be a first pressure, a second pressure, and a third pressure to determine the etching rate change of the byproduct film layer 30 in different areas; wherein, the first pressure < the second pressure < the third pressure, wherein the first pressure is a low pressure and the third pressure is a high pressure.

[0064] From the results, we can see that Figure 3D As shown in FIG. 1 , as the internal pressure of the process chamber 10 increases to the third pressure, the process chamber 10 is in a high-pressure condition, and the etching rate of the byproduct film 30 located within the third marking line D13 of the dielectric window 20 by the first plasma increases. The etching rate is the fastest under the high-pressure condition, and the cleaning efficiency becomes higher. Figure 3E As shown, as the pressure inside the process chamber 10 decreases to the first pressure, the process chamber 10 is in a low-pressure condition. Under low-pressure conditions, the first plasma increases the etching rate of the byproduct film 30 outside the third marking line D13. The etching rate is the fastest under low-pressure conditions, and the cleaning efficiency is improved. Therefore, by controlling the pressure inside the process chamber 10, the etching rate of the first plasma on different areas of the byproduct film 30 can be controlled.

[0065] The above scheme, by controlling the pressure of the process chamber 10 in the second cleaning step to be lower than the pressure of the process chamber 10 in the first cleaning step, can make the mean free path of the first plasma longer and the diffusion ability of the first plasma stronger, which is beneficial to control the first plasma to diffuse from the second area 20B to the bracket 11 located outside the second area 20B and the inner wall 10A of the process chamber 10, so that the first plasma etches the by-product film layer 30 on the bracket 11 and the inner wall 10A of the process chamber 10, thereby achieving effective cleaning of the by-product film layer 30 in the corresponding area.

[0066] In one embodiment, see Figure 1AThe pressure range of the process chamber 10 in the first cleaning step is 20 mTorr to 65 mTorr (inclusive of the end values), and the pressure range of the process chamber 10 in the second cleaning step is 5 mTorr to 20 mTorr (inclusive of the end values).

[0067] For example, in the first cleaning step, by controlling the pressure of the process chamber 10 between 20 mTorr and 65 mTorr, the process chamber 10 can be placed in a high-pressure state, which is beneficial for shortening the mean free path of the first plasma and weakening the diffusion ability of the first plasma, and controlling the first plasma to be mainly concentrated in the first region 20A, thereby achieving the cleaning of the byproduct film layer 30A mainly in the first region 20A.

[0068] In the second cleaning step, by controlling the pressure of the process chamber 10 between 5 mTorr and 20 mTorr, the process chamber 10 can be placed in a low-pressure state, which is beneficial to extending the mean free path of the first plasma and enhancing the diffusion ability of the first plasma, and controlling the first plasma to diffuse to the outside of the second region 20B, thereby mainly cleaning the by-product film layer 30B in the second region 20B, the bracket 11, and the by-product film layer 30 on the inner wall 10A of the process chamber 10.

[0069] In one embodiment, please refer to Figure 1A and Figure 4 As shown, the first plasma is used to etch the metal byproducts in the byproduct film layer 30. The cleaning method further includes: step S130, after performing the second cleaning step, performing a third cleaning step, using the second plasma to etch the carbon-containing byproducts in the remaining byproduct film layer 30.

[0070] For example, the metal byproducts in the byproduct film layer 30 include aluminum (Al) and / or titanium (Ti), and the process gas used to generate the first plasma is a chlorine-containing gas. The aluminum in the byproduct film layer 30 is etched using the first plasma to produce aluminum trichloride; and the titanium in the byproduct film layer 30 is etched using the first plasma to produce titanium tetrachloride (TiCl4). Both aluminum trichloride and titanium tetrachloride are gaseous substances and can be exhausted to the outside of the process chamber 10 by an exhaust assembly.

[0071] The chlorine-containing gas includes chlorine (Cl2) and boron trichloride (BCl3), and the flow ratio of chlorine to boron trichloride ranges from 1 to 1.5 (inclusive). The flow ratio of chlorine to boron trichloride ranges from 100 sccm to 200 sccm (inclusive). By selecting a flow ratio of chlorine to boron trichloride within the range of 1 to 1.5, the first plasma can efficiently etch the byproduct film layer 30, thereby improving cleaning efficiency.

[0072] For example, a mask layer, such as a photoresist layer, is typically provided on the metal layer to be etched. During the etching process of the metal layer to be etched, the mask layer is consumed, generating carbon-containing byproducts. The inventors have experimentally discovered that, with other process conditions remaining unchanged, increasing the flow rate of the chlorine-containing gas in the first and second cleaning steps can inhibit the carbon-containing byproducts in the byproduct film layer 30, reducing the cleaning rate of the carbon-containing byproducts by at least five times. Therefore, by performing a third cleaning step after the second cleaning step, and using the second plasma to etch the carbon-containing byproducts remaining in the byproduct film layer 30, the carbon-containing byproducts can be effectively cleaned, thereby helping to improve the cleaning efficiency of the byproduct film layer 30.

[0073] Specifically, the process conditions of the third cleaning step include: the process gas for generating the second plasma is oxygen (O2), the oxygen flow rate range is 100 sccm to 1000 sccm (inclusive), the upper electrode power range is 1000 W to 2000 W (inclusive), and the pressure range of the process chamber 10 is 5 mTorr to 50 mTorr (inclusive). The second plasma generated by ionizing the oxygen can be used to etch carbon-containing byproducts in the remaining byproduct film layer 30, thereby generating carbon monoxide (CO). The gaseous carbon monoxide can also be exhausted to the outside of the process chamber 10 by the exhaust assembly of the process chamber 10.

[0074] Preferably, the cleaning method further comprises: performing a process chamber purge step after the second cleaning step and before the third cleaning step, wherein the interior of the process chamber is purged with an inert gas to expel any remaining boron trichloride to the exterior of the process chamber. This prevents the formation of difficult-to-remove boron oxide (B2O3) due to the reaction of boron trichloride with oxygen caused by residual boron trichloride within the process chamber during the third cleaning step.

[0075] The inert gas includes at least one of nitrogen and argon, and other inert gases may also be used. The process conditions of the process chamber purge step also include: a process chamber pressure range of 0 mTorr to 5 mTorr (inclusive), and an inert gas flow rate range of 500 sccm to 1000 sccm (inclusive).

[0076] In one embodiment, the cleaning method further includes: when the idle time of the process chamber exceeds a preset time or is started, performing a temperature increase treatment step, using the third plasma to transfer energy to the internal components of the process chamber, so that the temperature of the internal components is increased to within a preset temperature range.

[0077] For example, Figure 4As shown, the cleaning method may include: step S140A, performing a temperature increase step when the process chamber 10 is started; and / or step S140B, performing a temperature increase step when the idle time of the process chamber 10 exceeds a preset time.

[0078] The internal components include the dielectric window 20, the bracket 11, and the inner wall 10A of the process chamber 10. The preset time may be 20 minutes, and the preset temperature range may be 90°C to 120°C (inclusive). The third plasma is a cloud of charged particles formed by gas molecules or atoms losing electrons, or gas molecules or atoms gaining electrons. Violent collisions occur between these charged particles, enabling rapid energy transfer and diffusion. When the internal components of the process chamber 10 come into contact with the third plasma, the third plasma rapidly transfers energy to the surfaces of the internal components of the process chamber 10, rapidly heating the internal components to within the preset temperature range, thereby ensuring that the internal components of the process chamber 10 have a relatively high temperature.

[0079] In related technologies, such as Figure 1A As shown, before etching the wafer W to be etched, the process chamber 10 is usually in a shutdown state, and the temperature inside the process chamber 10 is relatively low, so that the temperature of internal components such as the dielectric window 20, the support 11, and the inner wall 10A of the process chamber 10 is usually between 40°C and 75°C (including the end values). When etching the wafer W to be etched, the by-products generated by the etching will easily condense on the surface of the internal components when they come into contact with the lower temperature internal components, forming a thick by-product film 30, which increases the cleaning difficulty of the subsequent waferless automatic cleaning step; and, as shown in FIG. Figure 5A to Figure 5CAs shown in FIG, when the by-products produced by etching are condensed, a nucleus-like structure 31 protruding from the surface of the by-product film layer 30 is likely to appear. This nucleus-like structure 31 is very easy to fall off under the bombardment of plasma and produces a large number of suspended particles, which increases the risk of particle contamination of the wafer W. In addition, as the cumulative number of wafers W to be etched increases, the process chamber 10 will alternately cycle between heating and cooling, and the temperature inside the process chamber 10 generally shows an increasing trend. This temperature change will cause the properties of the by-product film layer 30 produced by etching two adjacent rounds of wafers W to be etched to be different. For example, when etching the wafer W in the first round, the temperature inside the process chamber 10 is relatively low, and the by-product film layer 30 is relatively high. The generated by-products are deposited on the inner surface of the process chamber 10 to form a first by-product film layer (not shown in the drawings). The thickness of the first by-product film layer is relatively thick and the stress it is subjected to is relatively small. During the second round of etching of the wafer W to be etched, the temperature inside the process chamber 10 is relatively high. The by-products generated by the etching are deposited on the surface of the first by-product film layer to form a second by-product film layer (not shown in the drawings). The thickness of the second by-product film layer is relatively thin and the stress it is subjected to is relatively large. As the cumulative number of wafers W to be etched increases, the stress on the by-product film layer 30 composed of the first by-product film layer and the second by-product film layer will continue to increase, thereby increasing the risk of the by-product film layer 30 falling off.

[0080] The above solution performs a temperature increase step when the idle time of the process chamber 10 exceeds a preset time or when the process chamber 10 is started, and uses the third plasma to transfer energy to the internal components of the process chamber 10, so that the temperature of the internal components is quickly increased to a preset temperature range. When etching the wafer W to be etched, the temperature difference between the by-products generated by the etching and the internal components of the process chamber 10 can be reduced, thereby preventing the by-products generated by the etching from condensing on the internal components of the process chamber 10 to form a thick by-product film layer 30 and a core structure 31, for example, Figure 6A and Figure 6B As shown, the surface of the by-product film layer 30 can be made smooth and the film layer flat without generating a protruding core structure 31, thereby reducing the difficulty of subsequent cleaning of the by-product film layer 30 and the risk of the core structure 31 falling off. It is also more helpful to reduce the rate of increase of the stress on the by-product film layer 30 when the cumulative number of etched wafers increases, thereby reducing the risk of the by-product film layer 30 falling off.

[0081] In one embodiment, please refer to Figure 1A and Figure 4 The process conditions of the temperature increasing step include: the third plasma is also used to etch the byproduct film layer 30 on the internal components of the process chamber 10 to pre-clean the surface of the byproduct film layer 30.

[0082] In one example, when the material of the dielectric window 20 is quartz, the process gas for generating the third plasma can be at least one of a chlorine-containing gas, oxygen, and an inert gas. The chlorine-containing gas is used to clean the metal byproducts in the byproduct film layer 30, the oxygen is used to clean the carbon-containing byproducts in the byproduct film layer 30, and the inert gas is used to reduce the ionization difficulty of the chlorine and oxygen.

[0083] It should be noted that the waferless automatic cleaning step in the related art usually uses a fluorine-containing gas to clean the metal byproducts in the byproduct film layer 30. However, in the present application, the material of the metal byproducts in the byproduct film layer 30 includes aluminum. If the aluminum is cleaned using a fluorine-containing gas, solid aluminum fluoride (AlF) will be generated, which cannot achieve the cleaning effect. Therefore, in this example, the chlorine-containing gas is used to clean the aluminum in the byproduct film layer 30 to achieve the cleaning effect.

[0084] In another example, when the material of the dielectric window 20 is ceramic and the material of the inner side wall 10A of the process chamber 10 and the bracket 11 is alumina, the process gas for generating the third plasma can be at least one of oxygen and an inert gas. In this example, if the material of the dielectric window 20 is ceramic and the material of the internal components of the process chamber 10 is alumina, the chlorine-containing gas will etch the dielectric window 20 and the internal components of the process chamber 10, which will shorten the service life of the internal components of the process chamber 10. Therefore, in this example, the chlorine-containing gas is not used, and only oxygen is used to clean the carbon-containing byproducts in the byproduct film layer 30.

[0085] In addition, the specific type of the third plasma can also be selected according to the material of the byproduct film layer 30. For example, if the material of the byproduct film layer 30 is mostly chlorine-containing and / or titanium-containing byproducts, chlorine and boron trichloride are used as the process gas. If the byproduct film layer 30 is mostly carbon-containing byproducts, oxygen is used as the process gas. In this way, different materials can be classified and cleaned.

[0086] The above scheme can delay the peeling of the byproduct film layer 30 and help to prolong the wet cleaning cycle of the process chamber 10 during the execution of the temperature rising treatment step by using the third plasma to etch the byproduct film layer 30 on the internal components of the process chamber 10.

[0087] The present application also provides a semiconductor etching method, which is shown in FIGS. 1 and 2. Figure 1A and Figure 4 The etching method includes the following step S220.

[0088] Step S220, after the byproduct film layer 30 on the inner surface of the process chamber 10 is cleaned by the cleaning method in any of the above embodiments, and before the wafer to be etched is transferred into the process chamber 10, the process chamber 10 is controlled to perform an etching step to etch the wafer to be etched.

[0089] For example, the material of the wafer to be etched includes aluminum, and the etching gas includes chlorine-containing gas, such as chlorine.

[0090] The above scheme can effectively reduce the thickness of the byproduct film layer 30 on the inner surface of the process chamber 10 and ensure the uniformity of the thickness of the byproduct film layer 30 before each wafer to be etched is etched, thereby avoiding the byproduct film layer 30 from falling off due to uneven stress distribution caused by uneven thickness, preventing particle contamination of the wafer to be etched, and facilitating improvement of product yield.

[0091] In one embodiment, referring to Figure 1A and Figure 4 after the byproduct film layer 30 on the inner surface of the process chamber 10 is cleaned, and before the wafer to be etched W is transferred into the process chamber 10, the semiconductor etching method further includes the following step S210.

[0092] Step S210, performing an etching gas adsorption step, introducing etching gas into the process chamber 10 to adsorb the etching gas on the surface of the internal components of the process chamber 10.

[0093] For example, the material of the wafer to be etched W includes aluminum, and the etching gas includes chlorine-containing gas, such as chlorine. The flow rate of the chlorine-containing gas can be in the range of 100sccm-1000sccm (including the end point value). The process conditions of the etching gas adsorption step further include: the upper electrode power is in the range of 1000W-2000W (including the end point value), and the pressure of the process chamber 10 is in the range of 5mTorr-50mTorr (including the end point value).

[0094] In the related art, during the process of etching the wafer to be etched W by using chlorine-containing gas, the chlorine-containing gas is ionized to generate chlorine plasma, and the atmosphere of the chlorine plasma in the process chamber 10 changes as follows: most of the chlorine plasma is first adsorbed on the surface of the internal components of the process chamber 10 until the adsorption of the chlorine plasma on the surface of the internal components reaches a saturation state, and the chlorine plasma ionized subsequently and the chlorine plasma released from the internal components form a balance state in the interior of the process chamber 10. This atmosphere change causes a large critical dimension deviation between the wafer to be etched W etched first and the wafer to be etched W etched later. For example, as shown in Figure 7As shown, the critical dimension deviation between the first round of etching of the wafer W to be etched and the twenty-fifth round of etching in the statistical related technology shows that the fluctuation range of the critical dimension deviation is about 5nm, the maximum deviation of the critical dimension is about 602nm, and the minimum deviation of the critical dimension is about 593nm.

[0095] In the above scheme, after executing the process chamber 10 cleaning method of any of the above embodiments and before the wafer W to be etched is introduced into the process chamber 10, the etching gas adsorption step is performed, so that the chlorine plasma is adsorbed on the surface of the internal components of the process chamber 10 and reaches a saturated state. This is beneficial for maintaining the equilibrium state of the chlorine plasma inside the process chamber 10 when etching the wafer W to be etched, and can reduce the atmosphere difference inside the process chamber 10 in each etching round, thereby effectively reducing the deviation range of the critical dimension. For example, Figure 7 As shown, statistics on the critical dimension deviations of wafers W to be etched in the first to twenty-fifth rounds of etching in this application show that the fluctuation range of the critical dimension deviation is approximately 3 nm, the maximum deviation of the critical dimension is approximately 604 nm, and the minimum deviation of the critical dimension is approximately 598 nm. Compared with related technologies, the above solution can reduce the fluctuation range of the critical dimension deviation and the difference between the maximum and minimum deviations.

[0096] It should be noted that since the semiconductor etching method of the embodiment of the present application adopts all the technical solutions of all the above-mentioned embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above-mentioned embodiments, which will not be described in detail here. Among them, the cleaning method of the process chamber 10 is performed after the etching is completed in step S230 and the wafer W to be etched is removed. The byproduct film layer 30 generated by each etching can be cleaned after each etching is completed.

[0097] Figure 8 FIG. 1 is a schematic structural diagram of a semiconductor process equipment according to an embodiment of the present application.

[0098] like Figure 8 As shown, the semiconductor process equipment 100 may include a process chamber 10, a radio frequency coil 40 and a controller ( Figure 8 (not shown) The RF coil 40 is located on the outer surface of the dielectric window 20 of the process chamber 10. The RF coil 40 includes a first coil 41 and a second coil 42 spaced apart. The first coil 41 corresponds to the first region 20A, and the second coil 42 corresponds to the second region 20B. The first region 20A is located in the middle of the dielectric window 20, and the second region 20B surrounds the first region 20A and is located outside the first region 20A. The controller includes at least one processor and at least one memory. The memory stores a computer program. When executed by the processor, the computer program implements the method of any of the above-described embodiments.

[0099] Exemplarily, the controller may be a host computer or a slave computer.

[0100] The semiconductor processing equipment 100 further includes an upper RF power supply 43 and an upper matching device 44. The controller is further configured to control the upper RF power supply 43 to provide RF power to the first coil 41 and the second coil 42 via the upper matching device 44, so that the first coil 41 and the second coil 42 excite the process gas inside the process chamber 1 to generate plasma.

[0101] The semiconductor processing equipment 100 may further include a lower electrode assembly 50. The lower electrode assembly 50 may include a wafer carrier 51, a lower RF power supply 52, and a lower matching device 53. The controller is further configured to control the lower RF power supply 52 to provide RF power to the wafer carrier 51 via the lower matching device 53 to provide an RF bias voltage. The wafer carrier 51 may be, for example, an electrostatic chuck, a mechanical chuck, or a vacuum chuck.

[0102] The semiconductor device 100 may further include an air inlet assembly 60 and an air extraction assembly 70. The controller may control the opening of the valve of the air inlet assembly 60 to introduce the corresponding process gas into the interior of the process chamber 10. The controller may also control the opening and closing of the valve of the air inlet assembly 60 to control the flow rate of the process gas. The controller may also control the air extraction assembly 70 to extract air from the interior of the process chamber 10, for example, by controlling the valve opening of the air extraction assembly 70 or the speed of the air extraction pump, thereby controlling the pressure inside the process chamber 10 and exhausting reaction byproducts.

[0103] The semiconductor process equipment 100 of the embodiment of the present application may be an inductively coupled plasma (ICP) device. The embodiment of the present application does not limit the type of the semiconductor process equipment 100.

[0104] It should be noted that, since the semiconductor process equipment of the embodiment of the present application adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described one by one here.

[0105] It should be understood that the processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc. It is worth noting that the processor may be a processor that supports the Advanced RISC Machines (ARM) architecture.

[0106] The above-mentioned memory may include read-only memory and random access memory, and may also include non-volatile random access memory. The memory may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Among them, non-volatile memory may include read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM) or flash memory. Volatile memory may include random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available. For example, static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct RAM bus random access memory (DR RAM).

[0107] In the above-described embodiments, all or part can be implemented by software, hardware, firmware, or any combination thereof. When implemented by software, all or part can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded on a computer, all or part generates a flow or function according to the present application. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another computer-readable storage medium.

[0108] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. Also, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples described in the present specification and the features of the different embodiments or examples without contradiction.

[0109] In addition, the terms "first", "second", etc. are used only for the purpose of description and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified.

[0110] Any process or method descriptions in flow charts or described elsewhere herein can be understood as representing code modules, segments, or portions of code that include one or more executable instructions for implementing specific logic functions or other processes. Also, the preferred embodiments of the present application can include additional implementation with respect to the order in which steps are performed, including the use of simultaneous processes, or the order of steps can be reversed between successive process steps depending on the functionality involved.

[0111] The logic and / or steps represented in flow charts or otherwise described herein, for example, can be considered as a list of executable instructions for implementing logic functions, which can be specifically embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus or device, such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, apparatus or device and execute the instructions, or in conjunction with these instructions execution system, apparatus or device.

[0112] It should be understood that each part of the present application can be realized by hardware, software, firmware or a combination thereof. In the above embodiments, a plurality of steps or methods can be realized by software or firmware stored in a memory and executed by a suitable instruction execution system. All or part of the steps of the above-mentioned embodiment methods can be completed by a program instructing the relevant hardware, which can be stored in a computer readable storage medium and includes one or a combination of the steps of the embodiment methods when executed.

[0113] In addition, each functional unit in each embodiment of the present application can be integrated in one processing module, or each unit can be physically present separately, or two or more units can be integrated in one module. The above-mentioned integrated module can be realized in the form of hardware or in the form of a software functional module. The above-mentioned integrated module, if realized in the form of a software functional module and sold or used as an independent product, can also be stored in a computer readable storage medium. The storage medium can be a read-only memory, a magnetic disk or an optical disk, etc.

[0114] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of various changes or replacements within the technical scope disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A process chamber cleaning method, characterized in that: The cleaning method is used to clean the byproduct film layer deposited on the inner surface of the process chamber, and the cleaning method includes: performing a first cleaning step, etching at least a byproduct film layer on an inner surface of a dielectric window using a first plasma, and controlling the etching rate of the byproduct film layer in a first region by the first plasma to be greater than the etching rate of the byproduct film layer in a second region; the dielectric window is disposed at a top of the process chamber, the first region is located in the middle of the dielectric window, and the second region surrounds the first region and is located outside the first region; A second cleaning step is performed to etch at least the byproduct film layer located on the inner surface of the dielectric window using the first plasma, and the etching rate of the byproduct film layer in the first region by the first plasma is controlled to be lower than the etching rate of the byproduct film layer in the second region, so that the difference in thickness between the byproduct film layer remaining in the first region and the byproduct film layer remaining in the second region is less than a preset value.

2. The cleaning method according to claim 1, wherein A first coil and a second coil are arranged on the outer surface of the dielectric window, the first coil corresponds to the first area, and the second coil corresponds to the second area; The process conditions of the first cleaning step include: controlling the current of the first coil to be greater than the current of the second coil, so that the distribution density of the first plasma in the first region is greater than the distribution density of the first plasma in the second region; And / or, the process conditions of the second cleaning step include: controlling the current on the second coil to be greater than the current on the first coil, so that the distribution density of the first plasma in the second region is greater than the distribution density of the first plasma in the first region.

3. The cleaning method according to claim 1, wherein: The cleaning method further includes controlling the pressure of the process chamber in the second cleaning step to be lower than the pressure of the process chamber in the first cleaning step.

4. The cleaning method according to claim 3, wherein: The pressure range of the process chamber in the first cleaning step is 20 mTorr to 65 mTorr, and the pressure range of the process chamber in the second cleaning step is 5 mTorr to 20 mTorr.

5. The cleaning method according to claim 1, wherein: The first plasma is used to etch the metal byproducts in the byproduct film layer. The cleaning method further includes: after performing the second cleaning step, performing a third cleaning step to use the second plasma to etch the remaining carbon-containing byproducts in the byproduct film layer.

6. The cleaning method according to claim 1, wherein: Also includes: When the idle time of the process chamber exceeds a preset time or the process chamber is started, a temperature raising step is performed to transfer energy to internal components of the process chamber using the third plasma, so that the temperature of the internal components is raised to a preset temperature range.

7. The cleaning method according to claim 6, characterized in that The process conditions of the temperature-raising treatment step include: the third plasma is also used to etch the by-product film layer on the internal component to pre-clean the surface of the by-product film layer.

8. A semiconductor etching method, characterized in that: include: After the by-product film layer on the inner surface of the process chamber is cleaned by the cleaning method described in any one of claims 1 to 7, and after the wafer to be etched is introduced into the process chamber, the process chamber is controlled to perform an etching step to etch the wafer to be etched.

9. The etching method according to claim 8, characterized in that: After cleaning the byproduct film layer on the inner surface of the process chamber and before the wafer to be etched is introduced into the process chamber, the etching method further includes: An etching gas adsorption step is performed to introduce etching gas into the process chamber so that surfaces of internal components of the process chamber adsorb the etching gas.

10. A semiconductor process equipment comprising a process chamber, a radio frequency coil and a controller, characterized in that: The radio frequency coil is located on the outer surface of the dielectric window of the process chamber, and includes a first coil and a second coil arranged at an interval, wherein the first coil corresponds to a first region, and the second coil corresponds to a second region, wherein the first region is located in the middle of the dielectric window, and the second region surrounds the first region and is located outside the first region. The controller includes at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the process chamber cleaning method according to any one of claims 1 to 7 is implemented; or, the semiconductor etching method according to claim 8 or 9 is implemented.

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