Structure of siC-based RC-IGBT and preparation method thereof
By using a SiC-based RC-IGBT structure and replacing the PN diode with SiC-MPS, the problems of large Vf and long reverse recovery time in traditional IGBT modules are solved, achieving low Vf and short reverse recovery time. This improves the stability and integration of the IGBT module, making it suitable for fields such as motor control, induction cookers, air conditioner frequency converters, and locomotive traction.
Patent Information
- Application Number
- CN202411034975.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-31
- Publication Date
- 2025-12-26
- Estimated Expiration
- 2044-07-31
AI Technical Summary
In existing IGBT modules, the fast recovery diodes integrated in traditional reverse-conducting IGBTs suffer from problems such as excessively large Vf and long reverse recovery time, making it difficult to meet the requirements of high integration and low noise.
An RC-IGBT structure is fabricated using SiC-based materials. SiC-MPS is used to replace the ordinary PN diode. By designing gate trenches, emitter structures, and collector structures in the SiC-based RC-IGBT structure, an ohmic contact is ensured between the metal layer and the SiC substrate, reducing the Vf of the built-in diode and shortening the reverse recovery time.
It achieves low built-in diode Vf and short reverse recovery time, improving the stability and integration of IGBT modules, and is suitable for switching speed applications in the medium frequency range.
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Figure CN118969829B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application relates to the technical field of semiconductors, in particular to a SiC-based RC-IGBT structure and a preparation method thereof. BACKGROUND
[0002] The IGBT gate is controlled similarly to the MOSFET, but the switching speed is slower than that of the MOSFET because the over-excess carriers in the drift region need to be extracted during the off process, and the IGBT is commonly applied to a medium frequency range. The applications include motor control, electromagnetic stoves, air conditioner frequency conversion, locomotive traction, high-voltage direct current transmission and various fields. Because many application scenarios are inductive loads, the energy stored in the inductor needs to be released through a freewheeling diode, and a freewheeling diode (FWD) is generally connected in parallel with the IGBT chip during packaging of the IGBT module. In the industry, the pursuit of stability, low noise and integration, and in some application scenarios, the external connection of the freewheeling diode has been difficult to meet the demand, and the RC-IGBT with higher integration has emerged as the times require.
[0003] At present, the fast recovery diode integrated with the traditional reverse-conducting IGBT is a common PN diode. The PN diode has a large Vf due to the existence of its own built-in potential, and the existence of the minority carrier storage problem of the PN diode leads to a long reverse recovery time. SUMMARY
[0004] The technical problem to be solved by the application is to provide a SiC-based RC-IGBT structure and a preparation method thereof, the built-in diode of the RC-IGBT structure has a small Vf and a short reverse recovery time.
[0005] To solve the above problems, the following technical solutions are provided:
[0006] The structure of the SiC-based RC-IGBT of the application comprises a semiconductor substrate of a first conductivity type; the front surface of the semiconductor substrate has a cell structure, and the back surface of the semiconductor substrate has a collector structure. The semiconductor substrate is prepared from a SiC material.
[0007] The cell structure comprises two gate trenches located on the front surface of the semiconductor substrate. A gate oxide layer is grown on the sidewall and bottom wall of the gate trench, the gate trench filled with gate polysilicon has the gate oxide layer grown thereon, and the gate polysilicon is insulated and separated from the metal layer deposited on the front surface of the semiconductor substrate through the interlayer oxide layer arranged at the gate trench opening. There is a potential barrier region of a second conductivity type between the two connected gate trenches, the depth of the potential barrier region is less than the depth of the gate trench, and the potential barrier region and the sidewall of the trench are not in contact. The metal layer deposited on the front surface of the semiconductor substrate is in ohmic contact with the second conductivity type region on the front surface; and the gate trench has an emitter structure outside.
[0008] The emitter structure contains a first emitter region of a first conductivity type and a second emitter region of a second conductivity type from top to bottom, both of which are in contact with the corresponding gate trench sidewall, and the depth of the second emitter region is less than the depth of the gate trench. The upper part of the second emitter region has a contact hole penetrating the first emitter region, and the contact hole is filled with a filling metal connected with the metal layer, and the filling metal is in ohmic contact with both the first emitter region and the second emitter region.
[0009] The back surface of the semiconductor substrate has a buffer layer, and the collector structure is located on the back surface of the buffer layer.
[0010] The collector structure contains a collector metal layer deposited on the back surface of the semiconductor substrate, and two collectors of the second conductivity type are implanted on both sides of the upper part of the collector metal layer, and a channel region of the first conductivity type is implanted between the two collectors.
[0011] The preparation method of the structure of the SiC-based RC-IGBT has the following steps:
[0012] In the first step, an oxide layer is selectively grown on a semiconductor substrate made of SiC material of the first conductivity type, a trench region is formed by etching, and after completion, the oxide layer is removed;
[0013] In the second step, a layer of oxide is grown on the semiconductor substrate with the trench region, the excess area is etched away by photolithography to form a gate oxide layer, and then polycrystalline silicon is deposited, and only the polycrystalline silicon in the trench region is retained by Etch Back to form a complete gate trench structure, and a blank containing a complete gate trench structure is obtained;
[0014] In the third step, a thin oxide layer is grown on the blank containing a complete gate trench structure as an implantation barrier layer, a photoresist is formed by photolithography as a barrier layer for the second emitter region, and a region of the second conductivity type is selectively implanted to obtain the second emitter region; the implantation window is the area outside the photoresist;
[0015] In the fourth step, the oxide layer on the surface is thinned due to the thickening of the oxide layer during the thermal process, a new thin oxide layer is formed as a barrier layer for the first emitter region, and a region of the first conductivity type is selectively implanted by photolithography to obtain the first emitter region; the implantation window is the area outside the photoresist;
[0016] In the fifth step, an interlayer dielectric layer is grown, a contact hole is etched out by photolithography, and a metal is filled to ensure that the metal forms a good ohmic contact with silicon carbide;
[0017] The sixth step is to select etching interlayer dielectric layer by photoetching, deposit metal on the surface, and ensure that the metal layer forms good Schottky contact with the front surface of the semiconductor substrate; after completion, remove the metal on the front surface of the second conductive type by selective etching; re-deposit metal on the surface to obtain the metal layer deposited on the front surface of the semiconductor substrate, which needs to ensure that the metal layer forms good ohmic contact with the second conductive type region and forms good electrical connection with the remaining metal; at this time, the front surface process is completed;
[0018] The seventh step is to perform back surface process to obtain the structure of the SiC-based RC-IGBT.
[0019] The seventh step is to perform back surface process to obtain the structure of the SiC-based RC-IGBT.
[0020] Firstly, the semiconductor substrate is thinned to the required thickness; then, the collector of the second conductive type and the channel region of the first conductive type are selected by photoetching on the back surface; finally, the collector metal layer is deposited on the back surface to ensure that the collector metal layer forms ohmic contact with the semi-conductive substrate.
[0021] The above scheme has the following advantages:
[0022] The SiC-based RC-IGBT structure semiconductor substrate of the present application is prepared from SiC material. When prepared, the metal layer deposited on the front surface needs to form ohmic contact with the SiC-based substrate, the filling metal forms Schottky contact with the first emitter region and ohmic contact with the second emitter region, and the collector metal layer forms ohmic contact with the semi-conductive substrate. By taking advantage of the advantages of SiC-based material, the ordinary PN diode is replaced by SiC-MPS, thereby reducing the built-in diode Vf and reverse recovery time. BRIEF DESCRIPTION OF DRAWINGS
[0023] Figure 1 is a schematic diagram of the SiC-based RC-IGBT structure of the present application;
[0024] Figure 2 is a schematic diagram of the SiC-based RC-IGBT structure of the present application after the first step of the preparation process is completed;
[0025] Figure 3 is a schematic diagram of the SiC-based RC-IGBT structure of the present application after the second step of the preparation process is completed;
[0026] Figure 4 is a schematic diagram of the SiC-based RC-IGBT structure of the present application after the third step of the preparation process is completed;
[0027] Figure 5 is a schematic diagram of the SiC-based RC-IGBT structure of the present application after the fourth step of the preparation process is completed;
[0028] Figure 6 This is a schematic diagram showing the completion of the fifth step in the fabrication process of the SiC-based RC-IGBT structure of the present invention;
[0029] Figure 7 This is a schematic diagram showing the completion of the sixth step in the fabrication process of the SiC-based RC-IGBT structure of the present invention. Detailed Implementation
[0030] In the context of "first conductivity type" and "second conductivity type," for N-type IGBT devices, the first conductivity type refers to N-type, and the second conductivity type refers to P-type; for P-type IGBT devices, the types referred to by the first and second conductivity types are exactly the opposite of those for N-type semiconductor devices. The following examples all use N-type IGBT devices in conjunction with the appendix. Figures 1-7 The present invention will be described in further detail below.
[0031] like Figure 1 As shown, the structure of the SiC-based RC-IGBT of the present invention includes a semiconductor substrate of a first conductivity type, namely an N-type substrate made of SiC material, which serves as the drift region 5 of the device. The front side of the semiconductor substrate has a cell structure, and the back side has a collector structure. By utilizing the advantages of SiC-based materials, SiC-MPS is used to replace a conventional PN diode, thereby reducing the built-in diode Vf and reverse recovery time.
[0032] like Figure 1 As shown, the cell structure contains two gate trenches located on the front side of the semiconductor substrate. Gate oxide layers 8 are grown on the sidewalls and bottom walls of the gate trenches. Gate polysilicon 9 is filled within the gate trenches with the gate oxide layers 8. The gate polysilicon 9 is insulated from the metal layer 12 deposited on the front side of the semiconductor substrate by an interlayer oxide layer 11 disposed at the trench opening. The metal layer deposited on the front side of the semiconductor substrate has an ohmic contact with the second conductivity type region on the front side of the semiconductor substrate, and a Schottky contact for the remaining portion. A second conductivity type barrier region, namely a P-type barrier region 10, exists between the two connected gate trenches. The depth of the P-type barrier region 10 is less than the depth of the gate trench, and the P-type barrier region 10 does not contact the sidewalls of the trenches. Emitter structures are located on the outer side of each gate trench.
[0033] like Figure 1 As shown, the emitter structure, from top to bottom, contains a first emitter region of a first conductivity type and a second emitter region of a second conductivity type, namely an N-type emitter region and a P-type emitter region. Both the N-type and P-type emitter regions are in contact with the corresponding gate trench sidewalls, and the depth of the P-type emitter region is less than the depth of the gate trench. The upper part of the P-type emitter region has a contact hole penetrating the N-type emitter region. The contact hole is filled with metal, which is connected to the metal layer 12. The filler metal makes ohmic contact with both the N-type and P-type emitter regions.
[0034] like Figure 1 As shown, a buffer layer 4 is located on the back side of the semiconductor substrate, and the collector structure is located on the back side of the buffer layer 4. The collector structure contains a collector metal layer 1 deposited on the back side of the semiconductor substrate. A second conductivity type collector, namely P-type collector 2, is implanted on both sides of the upper part of the collector metal layer 1. A first conductivity type channel region, namely N-type channel region 3, is implanted between the two P-type collectors 2.
[0035] The method for preparing the SiC-based RC-IGBT structure in this embodiment includes the following steps:
[0036] The first step involves selectively growing an oxide layer 102 on an N-type semiconductor substrate 101 made of SiC material, and then forming trench regions 103 by etching, such as... Figure 2 As shown, remove oxide layer 102 after completion.
[0037] The second step involves growing an oxide layer on the semiconductor substrate where the trench region 103 is formed. Excess areas are selectively etched away using photolithography to form the gate oxide layer 104. Polysilicon 105 is then deposited, and an etch-back process is used to retain only the polysilicon in the trench region, forming a complete gate trench structure. This yields a blank containing a complete gate trench structure. Figure 3 As shown.
[0038] The third step involves growing a thin oxide layer 106 on the blank containing the complete gate trench structure as an implantation barrier layer. A photoresist layer is then formed using photolithography to serve as the barrier layer for P-type implantation. The P-type implantation region is then selected to obtain the P-type emitter region. The implantation window is the area outside the photoresist layer, such as... Figure 4 As shown.
[0039] The fourth step involves thinning the oxide layer thickened by the thermal process to form a new thin oxide layer 108, which serves as a barrier layer for N-type implantation. Through photolithography, the N-type implantation region is selected to obtain the N-type emitting region. The implantation window is the area outside the photoresist, such as... Figure 5 As shown.
[0040] The fifth step involves growing an interlayer dielectric layer 109. Contact holes 110 are selectively etched using photolithography and filled with metal to ensure good ohmic contact between the metal and silicon carbide. Figure 6 As shown.
[0041] Step 6: Selectively etch the interlayer dielectric layer 109 using photolithography to deposit metal on its surface, ensuring a good Schottky contact between the metal layer and the front side of the semiconductor substrate. After completion, selective etching is used to remove metals other than the second conductivity type on the front side. Metal is then re-deposited on the surface to obtain the metal layer 12 deposited on the front side of the semiconductor substrate. It is necessary to ensure that the metal layer forms a good ohmic contact with the second conductivity type region and a good electrical connection with the remaining metals. At this point, the front side process is complete. Figure 7 As shown.
[0042] Step 7: First, thin the semiconductor substrate wafer to the required thickness. Next, using photolithography, selectively implant P+ type collector 2 and N+ type channel region 3 on the back side. Finally, deposit collector metal layer 1 on the back side, ensuring that collector metal layer 1 forms an ohmic contact with SiC, such as... Figure 1 As shown.
Claims
1. A structure of SiC-based RC-IGBT, comprising a semiconductor substrate of a first conductivity type; a cell structure is provided on the front surface of the semiconductor substrate, and a collector structure is provided on the back surface of the semiconductor substrate; characterized in that, The semiconductor substrate is made of SiC material; the cell structure contains two gate trenches on the front surface of the semiconductor substrate; a gate oxide layer is grown on the sidewall and bottom wall of the gate trench; the gate trench with the gate oxide layer is filled with gate polysilicon; the gate polysilicon is insulated and separated from the metal layer deposited on the front surface of the semiconductor substrate by the interlayer oxide layer arranged at the gate trench opening; there is a potential barrier region of the second conductive type between the two connected gate trenches; the depth of the potential barrier region is less than the depth of the gate trench; the potential barrier region is not in contact with the sidewall of the trench; the metal layer deposited on the front surface of the semiconductor substrate is in ohmic contact with the second conductive type region on the front surface of the semiconductor substrate, and the rest is in Schottky contact; There is an emitter structure outside the gate trench; the emitter structure contains a first emitter region of the first conductive type and a second emitter region of the second conductive type from top to bottom; the first emitter region and the second emitter region are in contact with the corresponding sidewall of the gate trench; the depth of the second emitter region is less than the depth of the gate trench; the upper part of the second emitter region has a contact hole penetrating the first emitter region; the contact hole is filled with metal; the metal is connected with the metal layer; the metal is in ohmic contact with the first emitter region and the second emitter region.
2. The structure of the SiC-based RC-IGBT according to claim 1, wherein The back surface of the semiconductor substrate has a buffer layer; the collector structure is located on the back surface of the buffer layer.
3. The structure of the SiC-based RC-IGBT according to claim 2, wherein The collector structure contains a collector metal layer deposited on the back surface of the semiconductor substrate; the upper part of the collector metal layer is injected with a collector of the second conductive type on both sides; the two collectors are injected with a channel region of the first conductive type.
4. The method of producing a structure of SiC-based RC-IGBT according to claim 1, wherein The method comprises the following steps: First, select and grow an oxide layer on a semiconductor substrate made of SiC material of the first conductive type; form a trench region by etching; remove the oxide layer after completion; Second, grow an oxide layer on the semiconductor substrate with the trench region; form a gate oxide layer by etching the excess area through photolithography; then deposit polysilicon; retain only the polysilicon in the trench region by Etch Back; form a complete gate trench structure; obtain a blank containing a complete gate trench structure; Third, grow a thin oxide layer as an injection barrier layer on the blank containing a complete gate trench structure; form a photoresist as a barrier layer for the second emitter region through photolithography; select and inject a region of the second conductive type to obtain a second emitter region; the injection window is the area outside the photoresist; Fourth, thin the oxide layer thickened due to the thermal process to form a new thin oxide layer as a barrier layer for the first emitter region; select and inject a region of the first conductive type through photolithography to obtain a first emitter region; the injection window is the area outside the photoresist; Fifth, grow an interlayer dielectric layer; etch out a contact hole through photolithography; and fill metal to ensure that the metal forms a good ohmic contact with silicon carbide; Sixth, etch the interlayer dielectric layer through photolithography; deposit metal on the surface to ensure that the metal layer is in ohmic contact with the semiconductor substrate The front surface forms a good Schottky contact; after completion, the metal on the front surface of the second conductive type is removed by selective etching; the metal is redeposited on the surface to obtain a metal layer deposited on the front surface of the semiconductor substrate, which needs to ensure that the metal layer forms a good ohmic contact with the second conductive type region and forms a good electrical connection with the remaining metal; at this point, the front surface process is completed; In the seventh step, the back surface process is performed to obtain the structure of the SiC-based RC-IGBT.
5. The method of producing a structure of SiC-based RC-IGBT according to claim 4, wherein The specific process of the back surface process in the seventh step is as follows: First, the semiconductor substrate is thinned to the required thickness; then, the collector of the second conductive type and the channel region of the first conductive type are selectively implanted on the back surface through photolithography; finally, the collector metal layer is deposited on the back surface to ensure that the collector metal layer forms an ohmic contact with the semi-conductive substrate.
Citation Information
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