Reverse polarity light emitting diode with improved light emitting efficiency and method of manufacturing the same

Abstract

The embodiment of the present disclosure provides an anti-polarity light emitting diode with improved light emitting efficiency and a preparation method thereof, and belongs to the technical field of semiconductors. The light emitting diode comprises an epitaxial layer, a plurality of conductive bumps, a dielectric layer, a first transparent conductive layer and a metal reflective layer. The plurality of conductive bumps are located on the surface of the epitaxial layer, and the conductive bumps comprise a transition layer, an ohmic contact layer and a second transparent conductive layer which are stacked in turn in the direction away from the epitaxial layer. The dielectric layer covers the surface of the epitaxial layer and the sidewalls of the plurality of conductive bumps. The first transparent conductive layer is located on the side of the dielectric layer away from the epitaxial layer and is connected with the conductive bumps. The surface of the first transparent conductive layer away from the epitaxial layer is a plane. The metal reflective layer is located on the surface of the first transparent conductive layer away from the epitaxial layer. The embodiment of the present disclosure can improve the light emitting efficiency of the LED.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and in particular to a reverse polarity light-emitting diode with improved luminous efficiency and a method for its fabrication. Background Technology

[0002] Light-emitting diodes (LEDs) are widely used in various light source fields such as backlighting, lighting, and landscaping due to their small size, long lifespan, rich and varied colors, and low energy consumption. Reverse-polarity LEDs are a type of LED that requires reverse bias to function properly. When a reverse voltage is applied to a reverse-polarity LED, the charge carriers at its PN junction recombine with impurity ions trapped within, releasing energy and causing the LED to emit light. Reverse-polarity LEDs typically employ a vertical structure.

[0003] In related technologies, a vertically structured reverse polarity LED includes an epitaxial layer, multiple conductive bumps, a dielectric layer, a transparent conductive layer, and a metal reflective layer. The multiple conductive bumps are located on the surface of the epitaxial layer. The dielectric layer covers the sidewalls of the conductive bumps, the surfaces of the conductive bumps away from the epitaxial layer, and the surface of the epitaxial layer without conductive bumps. The transparent conductive layer is located on the surface of the dielectric layer away from the epitaxial layer and is connected to the conductive bumps through vias in the dielectric layer. The metal reflective layer is located on the surface of the first transparent conductive layer away from the epitaxial layer. The transparent conductive layer is generally formed by deposition.

[0004] However, because the thickness of the deposited transparent conductive layer is uniform, it fills the vias in the dielectric layer and connects with the conductive protrusions. As a result, the transparent conductive layer at the vias will be recessed towards the side where the epitaxial layer is located, making the surface of the transparent conductive layer away from the epitaxial layer uneven. This leads to poor reflection at the interface between the transparent conductive layer and the metal reflective layer, thus affecting the luminous efficiency of the LED. Summary of the Invention

[0005] This disclosure provides an embodiment of a reverse-polarity light-emitting diode (LED) with improved luminous efficiency and a method for its fabrication, which can improve the luminous efficiency of LEDs. The technical solution is as follows:

[0006] On one hand, a light-emitting diode is provided, comprising an epitaxial layer, a plurality of conductive bumps, a dielectric layer, a first transparent conductive layer, and a metal reflective layer. The plurality of conductive bumps are located on the surface of the epitaxial layer, and each conductive bump includes a transition layer, an ohmic contact layer, and a second transparent conductive layer sequentially stacked along a direction away from the epitaxial layer. The dielectric layer covers the surface of the epitaxial layer and the sidewalls of the plurality of conductive bumps. The first transparent conductive layer is located on the side of the dielectric layer away from the epitaxial layer and is connected to the conductive bumps. The surface of the first transparent conductive layer away from the epitaxial layer is planar. The metal reflective layer is located on the surface of the first transparent conductive layer away from the epitaxial layer.

[0007] Optionally, the dielectric layer covers the plurality of conductive protrusions and has a plurality of through holes exposing the conductive protrusions, and the dielectric layer has a uniform thickness; the first transparent conductive layer is located on the surface of the dielectric layer away from the epitaxial layer and fills the space between the dielectric layers covering the sidewalls of the plurality of conductive protrusions, and the first transparent conductive layer is connected to the conductive protrusions through the through holes.

[0008] Optionally, the maximum thickness of the first transparent conductive layer is greater than or equal to the thickness of the conductive protrusion.

[0009] Optionally, the dielectric layer fills between the plurality of conductive protrusions and is connected to the surface of the epitaxial layer and the sidewalls of the plurality of conductive protrusions; the first transparent conductive layer is located on the surface of the dielectric layer away from the epitaxial layer and on the surface of the conductive protrusions away from the epitaxial layer, and the thickness of the first transparent conductive layer is uniform.

[0010] Optionally, the thickness of the dielectric layer is equal to the thickness of the conductive protrusion.

[0011] Optionally, the thickness of the second transparent conductive layer in the conductive protrusion is 20 nm to 300 nm.

[0012] Optionally, the light-emitting diode further includes a bonding layer, a substrate, a first electrode, and a second electrode. The substrate is connected to the surface of the metal reflective layer away from the epitaxial layer through the bonding layer. The first electrode is located on the surface of the epitaxial layer away from the conductive protrusion. The second electrode is located on the surface of the substrate away from the epitaxial layer.

[0013] On the other hand, a method for fabricating a light-emitting diode is provided, comprising: forming a plurality of conductive bumps on the surface of an epitaxial layer, the conductive bumps comprising a transition layer, an ohmic contact layer and a second transparent conductive layer sequentially stacked along a direction away from the epitaxial layer; forming a dielectric layer on the surface of the epitaxial layer, the dielectric layer covering the surface of the epitaxial layer and the sidewalls of the plurality of conductive bumps; forming a first transparent conductive layer on the side of the dielectric layer away from the epitaxial layer, the first transparent conductive layer being connected to the conductive bumps, the surface of the first transparent conductive layer away from the epitaxial layer being planar; and forming a metal reflective layer on the surface of the first transparent conductive layer away from the epitaxial layer.

[0014] Optionally, the dielectric layer covers the plurality of conductive protrusions and has a plurality of through holes exposing the conductive protrusions, and the dielectric layer has a uniform thickness; forming a first transparent conductive layer on the side of the dielectric layer away from the epitaxial layer includes: forming an initial first transparent conductive layer on the surface of the dielectric layer away from the epitaxial layer, the thickness of the initial first transparent conductive layer being greater than or equal to the thickness of the conductive protrusions; polishing the initial first transparent conductive layer to obtain the first transparent conductive layer, the first transparent conductive layer being located on the surface of the dielectric layer away from the epitaxial layer and filling the space between the dielectric layers covering the sidewalls of the plurality of conductive protrusions, and the first transparent conductive layer being connected to the conductive protrusions through the through holes.

[0015] Optionally, forming a dielectric layer on the surface of the epitaxial layer includes: forming an initial dielectric layer between the plurality of conductive bumps, the initial dielectric layer being connected to the surface of the epitaxial layer and the sidewalls of the plurality of conductive bumps, the thickness of the initial dielectric layer being greater than or equal to the thickness of the conductive bumps; polishing the initial dielectric layer to obtain the dielectric layer, the thickness of the dielectric layer being equal to the thickness of the conductive bumps; forming a first transparent conductive layer on the side of the dielectric layer away from the epitaxial layer includes: forming the first transparent conductive layer on the surface of the dielectric layer away from the epitaxial layer and on the surface of the conductive bumps away from the epitaxial layer, the thickness of the first transparent conductive layer being uniform.

[0016] The beneficial effects of the technical solutions provided in this disclosure are:

[0017] In this embodiment, the dielectric layer covers the surface of the epitaxial layer and the sidewalls of multiple conductive protrusions. The first transparent conductive layer is located on the side of the dielectric layer away from the epitaxial layer and is connected to the conductive protrusions. The surface of the first transparent conductive layer away from the epitaxial layer is a plane, and the metal reflective layer is located on the surface of the first transparent conductive layer away from the epitaxial layer. That is, the interface between the first transparent conductive layer and the metal reflective layer is a flat plane, which can make the reflection effect of the omnidirectional reflection (ODR) structure formed by the first transparent conductive layer and the metal reflective layer better, thereby improving the luminous efficiency of the LED. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a top view of an LED provided in an embodiment of this disclosure;

[0020] Figure 2 This is a schematic diagram of the structure of an LED provided in an embodiment of this disclosure;

[0021] Figure 3 This is a schematic diagram of another LED structure provided in an embodiment of this disclosure;

[0022] Figure 4 This is a flowchart of an LED manufacturing method provided in an embodiment of this disclosure;

[0023] Figure 5 This is a flowchart of another LED manufacturing method provided in this embodiment;

[0024] Figure 6 This is a schematic diagram of the structure in an LED manufacturing process provided by an embodiment of this disclosure;

[0025] Figure 7 This is a schematic diagram of the structure in an LED manufacturing process provided by an embodiment of this disclosure;

[0026] Figure 8 This is a flowchart of another LED manufacturing method provided in this disclosure embodiment;

[0027] Figure 9 This is a schematic diagram of another LED manufacturing process provided in this embodiment.

[0028] Figure label:

[0029] 10: Epitaxial layer; 20: Conductive bump; 21: Transition layer; 21a: Initial transition layer; 22: Ohmic contact layer; 22a: Initial ohmic contact layer; 23: Second transparent conductive layer; 30: Dielectric layer; 30a: Initial dielectric layer; 31: Via; 40: First transparent conductive layer; 40a: Initial first transparent conductive layer; 50: Metal reflective layer; 60: Bonding layer; 70: Substrate; 80: First electrode; 81: Second electrode. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0031] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” and similar terms mean that the element or object preceding “comprising” encompasses the element or object listed following “comprising” and its equivalents, and do not exclude other elements or objects. The terms “connection” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” etc., are used only to indicate relative positional relationships, which may change accordingly when the absolute position of the described object changes.

[0032] Figure 1 This is a top view of an LED provided in an embodiment of this disclosure. Figure 2 This is a schematic diagram of the structure of an LED provided in an embodiment of this disclosure. Figure 2 It can be Figure 1 A schematic diagram of the cross-sectional structure along the AA direction. (See diagram below.) Figure 1 and Figure 2 As shown, the LED includes an epitaxial layer 10, multiple conductive bumps 20, a dielectric layer 30, a first transparent conductive layer 40, and a metal reflective layer 50. The multiple conductive bumps 20 are located on the surface of the epitaxial layer 10. Each conductive bump 20 includes a transition layer 21, an ohmic contact layer 22, and a second transparent conductive layer 23, sequentially stacked along a direction away from the epitaxial layer 10. The dielectric layer 30 covers the surface of the epitaxial layer 10 and the sidewalls of the multiple conductive bumps 20. The first transparent conductive layer 40 is located on the side of the dielectric layer 30 away from the epitaxial layer 10 and is connected to the conductive bumps 20. The surface of the first transparent conductive layer 40 away from the epitaxial layer 10 is planar. The metal reflective layer 50 is located on the surface of the first transparent conductive layer 40 away from the epitaxial layer 10.

[0033] In this embodiment, the interface between the first transparent conductive layer 40 and the metal reflective layer 50 is a flat plane, which can make the reflection effect of the ODR structure formed by the first transparent conductive layer 40 and the metal reflective layer 50 better, thereby improving the luminous efficiency of the LED.

[0034] Furthermore, the conductive protrusion 20 includes a transition layer 21, an ohmic contact layer 22, and a second transparent conductive layer 23 sequentially stacked along the direction away from the epitaxial layer 10. Since the transition layer 21 and the ohmic contact layer 22 have strong light absorption effects, by setting the transition layer 21 and the ohmic contact layer 22 in the conductive protrusion 20, compared with a whole surface of the transition layer 21 and the ohmic contact layer 22, the light absorption effect of the transition layer 21 and the ohmic contact layer 22 can be reduced, which is beneficial to improving the luminous efficiency of the LED.

[0035] like Figure 2 As shown, the dielectric layer 30 covers a plurality of conductive protrusions 20 and has a plurality of through holes 31 exposing the conductive protrusions 20. The dielectric layer 30 has a uniform thickness. The first transparent conductive layer 40 is located on the surface of the dielectric layer 30 away from the epitaxial layer 10 and fills the dielectric layer 30 covering the sidewalls of the plurality of conductive protrusions 20. The first transparent conductive layer 40 is connected to the conductive protrusions 20 through the through holes 31.

[0036] Here, "covering" refers to covering both the surface and the sidewalls of the membrane. Figure 2 The intermediate dielectric layer 30 covers both the surface of the multiple conductive protrusions 20 away from the epitaxial layer 10 and the sidewalls of the multiple conductive protrusions 20; that is, the dielectric layer 30 encapsulates the multiple conductive protrusions 20. Uniform thickness means that the thickness of any location within the same film layer is essentially the same. For example, if the ratio of the thickness at any two different locations within the same film layer is in the range of 0.98 to 1.02, this can be considered as a case of uniform film thickness.

[0037] Since the dielectric layer 30 covers multiple conductive protrusions 20 and has a uniform thickness, the portion of the dielectric layer 30 covering the sidewalls of the multiple conductive protrusions 20, that is, the portion of the dielectric layer 30 located between the multiple conductive protrusions 20, will form a groove. Figure 2 The first transparent conductive layer 40 fills the groove.

[0038] The dielectric layer 30 has a uniform thickness, which facilitates its formation by deposition and is beneficial for manufacturing. The first transparent conductive layer 40 is connected to the conductive protrusion 20 through the via 31. That is, the first transparent conductive layer 40 is electrically connected to the epitaxial layer 10 through the conductive protrusion 20, rather than making ohmic contact with the epitaxial layer 10 directly. This allows current to be transmitted to all areas of the epitaxial layer 10, improving the uniformity of current flow in the LED and thus increasing the luminous efficiency of the LED.

[0039] Optionally, the maximum thickness H1 of the first transparent conductive layer 40 is greater than or equal to the thickness H2 of the conductive protrusion 20.

[0040] Since the surface of the epitaxial layer 10 has multiple conductive protrusions 20, and the dielectric layer 30 covers the multiple conductive protrusions 20, and the dielectric layer 30 has a uniform thickness, and the surface of the first transparent conductive layer 40 away from the epitaxial layer 10 is flat, the maximum thickness H1 of the first transparent conductive layer 40 is also the thickness of the first transparent conductive layer 40 where no conductive protrusions 20 are provided. H1 is greater than or equal to H2, which ensures that the first transparent conductive layer 40 effectively fills the grooves between the dielectric layers 30 covering the sidewalls of the multiple conductive protrusions 20. This is beneficial for making the surface of the first transparent conductive layer 40 away from the epitaxial layer 10 smoother without affecting the current spreading capability of the first transparent conductive layer 40 during the fabrication process, thereby effectively improving the luminous efficiency of the LED.

[0041] Optionally, the thickness of the first transparent conductive layer 40 located between the metal reflective layer 50 and the conductive protrusion 20 is greater than 0 nm.

[0042] Optionally, the maximum thickness H1 of the first transparent conductive layer 40 is 200 nm to 300 nm.

[0043] For example, the maximum thickness H1 of the first transparent conductive layer 40 is 250 nm, 270 nm, or 300 nm, etc.

[0044] Optionally, the thickness of the transition layer 21 in the conductive bump 20 is 20 nm to 40 nm.

[0045] For example, the thickness of the transition layer 21 in the conductive bump 20 can be 20 nm, 30 nm or 40 nm, etc.

[0046] Optionally, the thickness of the ohmic contact layer 22 in the conductive bump 20 is 150 nm to 250 nm.

[0047] For example, the thickness of the ohmic contact layer 22 in the conductive bump 20 can be 150 nm, 200 nm or 250 nm, etc.

[0048] Optionally, the thickness of the second transparent conductive layer 23 in the conductive protrusion 20 is 20 nm to 300 nm.

[0049] For example, the thickness of the second transparent conductive layer 23 in the conductive bump 20 is 20 nm to 50 nm. For instance, the thickness of the second transparent conductive layer 23 in the conductive bump 20 can be 20 nm, 35 nm, or 50 nm, etc.

[0050] In order to make the surface of the first transparent conductive layer 40 away from the epitaxial layer 10 smoother during the preparation process, an initial first transparent conductive layer is first formed by sputtering deposition. Then, the initial first transparent conductive layer is thinned by polishing to obtain the first transparent conductive layer 40. After polishing, it is necessary to ensure that the first transparent conductive layer 40 is connected to the second transparent conductive layer 23 in the conductive protrusion 20 through the via 31. In related technologies, the thickness of the second transparent conductive layer 23 is generally greater than or equal to 5nm and less than 20nm. If there is an error in the polishing process, it may polish down to the second transparent conductive layer 23 or even completely remove the second transparent conductive layer 23.

[0051] In this embodiment, the thickness of the second transparent conductive layer 23 is within this range, which can reduce the probability that the second transparent conductive layer 23 will be discarded at the same time due to process errors, thus affecting the driving voltage of the LED and improving the reliability of the LED.

[0052] It should be noted that the thickness values ​​of the above layers must satisfy the condition that the maximum thickness H1 of the first transparent conductive layer 40 is greater than or equal to the thickness H2 of the conductive protrusion 20.

[0053] Optionally, the epitaxial layer 10 includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially, wherein the second semiconductor layer is connected to a plurality of conductive bumps 20.

[0054] Optionally, one of the first semiconductor layer and the second semiconductor layer is an N-type layer, and the other of the first semiconductor layer and the second semiconductor layer is a P-type layer.

[0055] For example, the first semiconductor layer is an N-type layer and the second semiconductor layer is a P-type layer.

[0056] In other embodiments, the first semiconductor layer may be a P-type layer and the second semiconductor layer may be an N-type layer.

[0057] Optionally, the first semiconductor layer includes an N-type roughening layer, an N-type current spreading layer and an N-type confinement layer stacked sequentially, with the N-type confinement layer connected to the light-emitting layer.

[0058] For example, the N-type roughening layer can be an N-type AlGaInP layer.

[0059] For example, the N-type current spreading layer can be an N-type AlGaInP layer.

[0060] For example, the N-type confinement layer can be an N-type AlInP layer.

[0061] Optionally, the light-emitting layer is a multi-quantum-well layer, comprising multiple pairs of alternating AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0062] For example, the light-emitting layer may include 3 to 8 pairs of alternating AlGaInP quantum well layers and AlGaInP quantum barrier layers. For instance, it may be 5 pairs of alternating AlGaInP quantum well layers and AlGaInP quantum barrier layers, or any other number of pairs, which is not limited in this disclosure.

[0063] Optionally, the second semiconductor layer includes a P-type confinement layer and a P-type current spreading layer stacked sequentially, the P-type current spreading layer being connected to a plurality of conductive bumps 20.

[0064] For example, the P-type confinement layer can be a P-type AlInP layer.

[0065] For example, the P-type current spreading layer can be a P-type AlGaInP layer.

[0066] Optionally, the transition layer 21 is a P-type AlGaInP layer. In this way, the transition layer 21 can reduce the lattice mismatch between the epitaxial layer 10 and the ohmic contact layer 22, ensuring better LED quality.

[0067] Optionally, the ohmic contact layer 22 is a P-type GaP layer. In this way, the ohmic contact layer 22 is conducive to forming an ohmic contact with the second transparent conductive layer 23, which can improve the conduction efficiency of charge carriers at the conductive protrusion 20, thereby improving the luminous efficiency of the LED.

[0068] Optionally, the second transparent conductive layer 23 is an indium zinc oxide (IZO) layer or an indium tin oxide (ITO) layer. IZO and ITO have good transmittance and low resistivity. Therefore, making the second transparent conductive layer 23 an IZO layer or an ITO layer can ensure good light output of the LED and also facilitate carrier conduction, thereby improving carrier injection efficiency.

[0069] Optionally, the dielectric layer 30 is a SiO2 layer or a MgF2 layer. The SiO2 layer and the MgF2 layer have good light transmittance and do not absorb light. They also have good insulation properties, which can form effective insulation between the first transparent conductive layer 40 and the epitaxial layer 10, preventing direct ohmic contact between the first transparent conductive layer 40 and the epitaxial layer 10 and ensuring good uniformity of current flow.

[0070] In other embodiments, the dielectric layer 30 may include a plurality of SiO2 layers and a plurality of TiO2 layers stacked alternately. Thus, different optical properties can be achieved by alternatingly stacking the plurality of SiO2 layers and the plurality of TiO2 layers. For example, a distributed Bragg reflection (DBR) layer can be formed, which has a high reflectivity to light. The dielectric layer 30 can be a DBR layer, thereby improving the luminous efficiency of the LED.

[0071] Optionally, the first transparent conductive layer 40 and the second transparent conductive layer 23 may be made of the same or different materials.

[0072] For example, the first transparent conductive layer 40 and the second transparent conductive layer 23 are made of different materials. For instance, the first transparent conductive layer 40 can be an IZO layer, and the second transparent conductive layer 23 can be an ITO layer.

[0073] Optionally, the metal reflective layer 50 is an Au layer, an Ag layer, or a Cu layer. These materials have high light reflectivity, which can ensure that the ODR formed by the metal reflective layer 50 and the first transparent conductive layer 40 has a good reflection effect, allowing more light to be emitted from the surface of the epitaxial layer 10 away from the metal reflective layer 50, which is beneficial to improving the luminous efficiency of the LED.

[0074] like Figure 2 As shown, the light-emitting diode also includes a bonding layer 60, a substrate 70, a first electrode 80, and a second electrode 81. The substrate 70 is connected to the surface of the metal reflective layer 50 away from the epitaxial layer 10 through the bonding layer 60. The first electrode 80 is located on the surface of the epitaxial layer 10 away from the conductive protrusion 20, and the second electrode 81 is located on the surface of the substrate 70 away from the epitaxial layer 10.

[0075] Optionally, the bonding layer 60 is an Au layer.

[0076] Optionally, the substrate 70 is a silicon substrate or a silicon carbide substrate.

[0077] For example, the first electrode 80 is an N-type electrode and the second electrode 81 is a P-type electrode.

[0078] like Figure 1 As shown, multiple conductive bumps 20 are arranged in an array on the surface of the epitaxial layer 10, and the orthographic projection of the conductive bumps 20 on the epitaxial layer 10 does not overlap with the orthographic projection of the first electrode 80 on the epitaxial layer 10. Since the surface of the epitaxial layer 10 away from the metal reflective layer 50 is the light-emitting surface in this embodiment, the first electrode 80 will block the light. Therefore, by making the conductive bumps 20 and the first electrode 80 not overlap, more current can be transferred to the area of ​​the epitaxial layer 10 that is not blocked by the first electrode 80, thereby improving the luminous efficiency of the LED.

[0079] In other embodiments, the substrate 70 may also be directly bonded to the metal reflective layer 50, and this disclosure does not limit this.

[0080] Figure 3 This is a schematic diagram of another LED structure provided in an embodiment of this disclosure. Figure 3 It can be Figure 1 A schematic diagram of the cross-sectional structure along the AA direction. Figure 3 and Figure 2 The difference lies in the dielectric layer 30 and the first transparent conductive layer 40.

[0081] like Figure 3 As shown, the dielectric layer 30 fills between the plurality of conductive bumps 20 and is connected to the surface of the epitaxial layer 10 and the sidewalls of the plurality of conductive bumps 20. The first transparent conductive layer 40 is located on the surface of the dielectric layer 30 away from the epitaxial layer 10 and on the surfaces of the conductive bumps 20 away from the epitaxial layer 10, and the thickness of the first transparent conductive layer 40 is uniform. Since the plurality of conductive bumps 20 are located on the surface of the epitaxial layer 10, grooves are formed between the plurality of conductive bumps 20. Figure 3 The intermediate dielectric layer 30 fills the groove, and the first transparent conductive layer 40 is directly connected to the conductive protrusion 20, thereby improving the uniformity of current flow in the LED.

[0082] like Figure 3 As shown, the thickness H3 of the dielectric layer 30 is equal to the thickness H2 of the conductive bumps 20. That is, the surface of the dielectric layer 30 located between the multiple conductive bumps 20 that is away from the epitaxial layer 10 is flush with the surface of the conductive bumps 20 that is away from the epitaxial layer 10. This facilitates the formation of the first transparent conductive layer 40 by deposition, making the thickness of the first transparent conductive layer 40 uniform and the surface of the first transparent conductive layer 40 that is away from the epitaxial layer 10 smoother, thereby effectively improving the luminous efficiency of the LED.

[0083] Optionally, the thickness H3 of the dielectric layer 30 is 200 nm to 300 nm.

[0084] For example, the thickness H3 of the dielectric layer 30 can be 250nm, 270nm or 300nm, etc.

[0085] Figure 4 This is a flowchart illustrating a method for manufacturing an LED according to an embodiment of this disclosure. Figure 4 As shown, the preparation method includes:

[0086] In step S101, a plurality of conductive protrusions are formed on the surface of the epitaxial layer.

[0087] The conductive bump includes a transition layer, an ohmic contact layer, and a second transparent conductive layer, which are sequentially stacked in a direction away from the epitaxial layer.

[0088] In step S102, a dielectric layer is formed on the surface of the epitaxial layer.

[0089] The dielectric layer covers the surface of the epitaxial layer and the sidewalls of multiple conductive protrusions.

[0090] In step S103, a first transparent conductive layer is formed on the side of the dielectric layer away from the epitaxial layer.

[0091] The first transparent conductive layer is connected to the conductive protrusion, and the surface of the first transparent conductive layer away from the epitaxial layer is planar.

[0092] In step S104, a metal reflective layer is formed on the surface of the first transparent conductive layer away from the epitaxial layer.

[0093] In this embodiment, the dielectric layer covers the surface of the epitaxial layer and the sidewalls of multiple conductive protrusions. The first transparent conductive layer is located on the side of the dielectric layer away from the epitaxial layer and is connected to the conductive protrusions. The surface of the first transparent conductive layer away from the epitaxial layer is a plane, and the metal reflective layer is located on the surface of the first transparent conductive layer away from the epitaxial layer. That is, the interface between the first transparent conductive layer and the metal reflective layer is a flat plane, which can make the reflection effect of the ODR structure formed by the first transparent conductive layer and the metal reflective layer better, thereby improving the luminous efficiency of the LED.

[0094] Figure 5 This is a flowchart of another LED fabrication method provided in this disclosure. Figure 5 As shown, the preparation method includes:

[0095] In step S201, an epitaxial layer is formed on the growth substrate.

[0096] For example, the growth substrate can be placed in a metal-organic chemical vapor deposition (MOCVD) reaction chamber to form an N-type roughening layer, an N-type current spreading layer, an N-type confinement layer, a light-emitting layer, a P-type confinement layer, and a P-type current spreading layer stacked sequentially on the growth substrate to obtain an epitaxial layer.

[0097] In step S202, a plurality of conductive protrusions are formed on the surface of the epitaxial layer.

[0098] Optionally, step S202 may include the following steps:

[0099] The first step is to form an initial transition layer and an initial ohmic contact layer that are stacked sequentially on the surface of the epitaxial layer.

[0100] Figure 6 This is a structural schematic diagram of an LED manufacturing process provided in an embodiment of this disclosure. Figure 6 As shown, an initial transition layer 21a and an initial ohmic contact layer 22a, which are stacked sequentially on the surface of the epitaxial layer 10, can be formed first.

[0101] The second step is to form a plurality of second transparent conductive layers 23 on the initial ohmic contact layer 22a.

[0102] For example, an initial second transparent conductive layer can be deposited on the entire surface of the initial ohmic contact layer 22a by vapor deposition. A photoresist structure is obtained on the initial second transparent conductive layer by photoresist coating, exposure, development and other processes. The initial second transparent conductive layer is then etched by wet etching process using the photoresist structure as a mask. After removing the photoresist structure, multiple second transparent conductive layers 23 are formed.

[0103] The third step involves etching the initial transition layer 21a and the initial ohmic contact layer 22a to obtain multiple conductive protrusions.

[0104] For example, a photoresist structure can be obtained on the initial ohmic contact layer 22a through processes such as photoresist coating, exposure, and development. Using this photoresist structure as a mask, the surface of the initial ohmic contact layer 22a away from the epitaxial layer 10 can be etched using wet or dry etching processes. The etching depth extends from the surface of the initial ohmic contact layer 22a away from the epitaxial layer 10 towards the epitaxial layer 10. After removing the photoresist structure, a structure is formed as shown below. Figure 2 The plurality of conductive bumps 20 shown include a transition layer 21, an ohmic contact layer 22 and a second transparent conductive layer 23, which are sequentially stacked in a direction away from the epitaxial layer 10.

[0105] In step S203, a dielectric layer is formed on the surface of the epitaxial layer.

[0106] For example, an initial dielectric layer can be deposited on the entire surface of the epitaxial layer 10. A photoresist structure is obtained on the initial dielectric layer through processes such as photoresist coating, exposure, and development. The initial dielectric layer is etched using the photoresist structure as a mask. After removing the photoresist structure, a dielectric layer 30 is formed. The dielectric layer 30 covers multiple conductive bumps 20 and has multiple vias 31 that expose the conductive bumps 20. The thickness of the dielectric layer 30 is uniform.

[0107] In step S204, an initial first transparent conductive layer is formed on the surface of the dielectric layer away from the epitaxial layer.

[0108] Figure 7 This is a structural schematic diagram of an LED manufacturing process provided in an embodiment of this disclosure. Figure 7 As shown, an initial first transparent conductive layer 40a can be formed on the surface of the dielectric layer 30 away from the epitaxial layer 10 by sputtering deposition. The thickness H4 of the initial first transparent conductive layer 40a is greater than or equal to the thickness H2 of the conductive protrusion 20.

[0109] For example, the thickness H4 of the initial first transparent conductive layer 40a is greater than or equal to 350 nm.

[0110] In step S205, the initial first transparent conductive layer is polished to obtain the first transparent conductive layer.

[0111] For example, the initial first transparent conductive layer 40a can be polished using chemical mechanical polishing (CMP) technology.

[0112] For example, the thickness of the initial first transparent conductive layer 40a removed by polishing is 50 nm to 150 nm, such that the surface of the first transparent conductive layer away from the epitaxial layer is planar. Figure 2 As shown, the first transparent conductive layer 40 is located on the surface of the dielectric layer 30 away from the epitaxial layer 10 and fills the space between the dielectric layers 30 that cover the sidewalls of the plurality of conductive protrusions 20. The first transparent conductive layer 40 is connected to the conductive protrusions 20 through the through-hole 31.

[0113] Through the above steps S204 to S205, a transparent conductive layer 40 can be formed on the side of the dielectric layer 30 away from the epitaxial layer 10.

[0114] In step S206, a metal reflective layer is formed on the surface of the first transparent conductive layer away from the epitaxial layer.

[0115] For example, a metal reflective layer 50 may be formed by deposition on the surface of the first transparent conductive layer 40 away from the epitaxial layer 10.

[0116] In step S207, the metal reflective layer is bonded to the substrate through a bonding layer.

[0117] In step S208, the growth substrate is removed.

[0118] In step S209, a first electrode is formed on the surface of the epitaxial layer away from the conductive protrusion.

[0119] Optionally, after completing step S209, a passivation layer can be formed to cover the epitaxial layer 10.

[0120] In step S210, a second electrode is formed on the surface of the substrate away from the epitaxial layer.

[0121] The first electrode 80 is located on the surface of the epitaxial layer 10 away from the conductive protrusion 20, and the second electrode 81 is located on the surface of the substrate 70 away from the epitaxial layer 10.

[0122] The light output power (LOP) of the LEDs provided in the embodiments of this disclosure will be described by way of example below. In the following text, the experimental group LEDs refer to... Figure 2 The LED in the relevant embodiments adopts... Figure 5The preparation method described in the relevant embodiments is as follows. The control group LED refers to the LED in the relevant technology. The only difference between the control group LED and the experimental group LED is that the transparent conductive layer of the control group LED is formed by deposition and is not polished, and the surface of the transparent conductive layer away from the epitaxial layer is uneven.

[0123] The LOP (Level of Explosion) of multiple control group LEDs and multiple experimental group LEDs were tested separately. Table 1 shows the LOP test results of the control group LEDs and experimental group LEDs.

[0124] Table 1 LOP Test Results

[0125]

[0126] Tests revealed that the LOP (Light Efficiency) of the experimental LEDs was higher than that of the control group LEDs, with the average LOP of the experimental LEDs being approximately 13.4% higher than that of the control group LEDs. Therefore, the LEDs provided in this embodiment improve the luminous efficiency of LEDs.

[0127] Figure 8 This is a flowchart illustrating another LED fabrication method provided in this disclosure. Figure 8 As shown, the preparation method includes:

[0128] In step S301, an epitaxial layer is formed on the growth substrate.

[0129] In step S302, a plurality of conductive protrusions are formed on the surface of the epitaxial layer.

[0130] In step S303, an initial dielectric layer is formed between the plurality of conductive bumps.

[0131] Figure 9 This is a schematic diagram of another LED manufacturing process provided in this disclosure. Figure 9 As shown, an initial dielectric layer 30a can be formed between multiple conductive bumps 20 by deposition. The initial dielectric layer 30a is connected to the surface of the epitaxial layer 10 and the sidewalls of the multiple conductive bumps 20. The thickness H5 of the initial dielectric layer 30a is greater than or equal to the thickness H2 of the conductive bumps 20.

[0132] For example, the thickness H5 of the initial dielectric layer 30a is greater than or equal to 350 nm.

[0133] In step S304, the initial dielectric layer is polished to obtain the dielectric layer.

[0134] For example, the thickness of the initial dielectric layer 30a is removed by polishing from 50 nm to 150 nm, such that the thickness of the dielectric layer is equal to the thickness of the conductive bump.

[0135] Through the above steps S303 to S304, a dielectric layer can be formed on the surface of the epitaxial layer.

[0136] In step S305, a first transparent conductive layer is formed on the surface of the dielectric layer away from the epitaxial layer and on the surface of the conductive protrusion away from the epitaxial layer.

[0137] like Figure 3 As shown, a first transparent conductive layer 40 can be formed on the surface of the dielectric layer 30 away from the epitaxial layer 10 and on the surface of the conductive protrusion 20 away from the epitaxial layer 10 by sputtering deposition. The thickness of the first transparent conductive layer 40 is uniform.

[0138] In step S306, a metal reflective layer is formed on the surface of the first transparent conductive layer away from the epitaxial layer.

[0139] In step S307, the metal reflective layer is bonded to the substrate through a bonding layer.

[0140] In step S308, the growth substrate is removed.

[0141] In step S309, a first electrode is formed on the surface of the epitaxial layer away from the conductive protrusion.

[0142] In step S310, a second electrode is formed on the surface of the substrate away from the epitaxial layer.

[0143] It should be noted that, Figure 8 The preparation method shown is the same as Figure 5 The difference between the preparation methods shown lies only in steps S303 to S305 and steps S203 to S205; for the remaining steps, please refer to [link to relevant documentation]. Figure 5 Related embodiments are omitted in detail here.

[0144] Optionally, for details regarding the structure, materials, and thickness of each layer, please refer to [link / reference]. Figures 1 to 3 Related embodiments are omitted in detail here.

[0145] The above description is not intended to limit this disclosure in any way. Although this disclosure has been disclosed above through embodiments, it is not intended to limit this disclosure. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this disclosure. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this disclosure without departing from the content of the technical solution of this disclosure shall still fall within the scope of the technical solution of this disclosure.

Claims

1. A light-emitting diode, characterized in that, It includes an epitaxial layer (10), multiple conductive bumps (20), a dielectric layer (30), a first transparent conductive layer (40), and a metal reflective layer (50). The plurality of conductive bumps (20) are located on the surface of the epitaxial layer (10), and the conductive bumps (20) include a transition layer (21), an ohmic contact layer (22) and a second transparent conductive layer (23) stacked sequentially in a direction away from the epitaxial layer (10). The dielectric layer (30) covers the surface of the epitaxial layer (10) and the sidewalls of the plurality of conductive bumps (20); the dielectric layer (30) also covers the surface of the plurality of conductive bumps (20) away from the epitaxial layer (10) and has a plurality of through holes (31) exposing the conductive bumps (20). The first transparent conductive layer (40) is located on the side of the dielectric layer (30) away from the epitaxial layer (10) and is connected to the conductive protrusion (20). The surface of the first transparent conductive layer (40) away from the epitaxial layer (10) is planar. The first transparent conductive layer (40) is located on the surface of the dielectric layer (30) away from the epitaxial layer (10) and fills the dielectric layer (30) covering the sidewalls of the plurality of conductive protrusions (20). The first transparent conductive layer (40) is connected to the conductive protrusion (20) through the through hole (31). The metal reflective layer (50) is located on the surface of the first transparent conductive layer (40) away from the epitaxial layer (10).

2. The light-emitting diode according to claim 1, characterized in that, The thickness of the dielectric layer (30) is uniform.

3. The light-emitting diode according to claim 2, characterized in that, The maximum thickness of the first transparent conductive layer (40) is greater than or equal to the thickness of the conductive protrusion (20).

4. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The thickness of the second transparent conductive layer (23) in the conductive protrusion (20) is 20 nm to 300 nm.

5. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The light-emitting diode also includes a bonding layer (60), a substrate (70), a first electrode (80), and a second electrode (81). The substrate (70) is connected to the surface of the metal reflective layer (50) away from the epitaxial layer (10) via the bonding layer (60); The first electrode (80) is located on the surface of the epitaxial layer (10) away from the conductive protrusion (20); The second electrode (81) is located on the surface of the substrate (70) away from the epitaxial layer (10).

6. A method for fabricating a light-emitting diode, characterized in that, include: Multiple conductive bumps (20) are formed on the surface of the epitaxial layer (10). The conductive bumps (20) include a transition layer (21), an ohmic contact layer (22), and a second transparent conductive layer (23) stacked sequentially in a direction away from the epitaxial layer (10). A dielectric layer (30) is formed on the surface of the epitaxial layer (10), the dielectric layer (30) covering the surface of the epitaxial layer (10) and the sidewalls of the plurality of conductive protrusions (20); the dielectric layer (30) also covers the surfaces of the plurality of conductive protrusions (20) away from the epitaxial layer (10) and has a plurality of through holes (31) exposing the conductive protrusions (20). A first transparent conductive layer (40) is formed on the side of the dielectric layer (30) away from the epitaxial layer (10). The first transparent conductive layer (40) is connected to the conductive protrusions (20). The surface of the first transparent conductive layer (40) away from the epitaxial layer (10) is planar. The first transparent conductive layer (40) is located on the surface of the dielectric layer (30) away from the epitaxial layer (10) and fills the space between the dielectric layers (30) covering the sidewalls of the plurality of conductive protrusions (20). The first transparent conductive layer (40) is connected to the conductive protrusions (20) through the through-hole (31). A metal reflective layer (50) is formed on the surface of the first transparent conductive layer (40) away from the epitaxial layer (10).

7. The preparation method according to claim 6, characterized in that, The thickness of the dielectric layer (30) is uniform; The formation of a first transparent conductive layer (40) on the side of the dielectric layer (30) away from the epitaxial layer (10) includes: An initial first transparent conductive layer (40a) is formed on the surface of the dielectric layer (30) away from the epitaxial layer (10), and the thickness of the initial first transparent conductive layer (40a) is greater than or equal to the thickness of the conductive protrusion (20). The initial first transparent conductive layer (40a) is polished to obtain the first transparent conductive layer (40).

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