Epitaxial wafer and preparation method thereof

Abstract

The present invention provides an epitaxial wafer and a method for preparing the same. The epitaxial wafer comprises a substrate, a composite silicon-aluminum-nitride (SiAlN) buffer layer, and an epitaxial layer, which are sequentially stacked. The composite SiAlN buffer layer comprises, from the substrate surface outward, a periodically arranged SiN patterned structure layer and a diffusion layer. The diffusion layer comprises a stacked AlSiN diffusion layer and a SiAlN diffusion layer. A non-uniform interdiffusion region is formed at the interface between the AlSiN diffusion layer and the SiAlN diffusion layer. The non-uniform interdiffusion region comprises a SiN diffusion microstructure and an AlN diffusion microstructure. The epitaxial wafer provided by the present invention can reduce internal stress within the epitaxial wafer, improve the crystal quality of the epitaxial layer, improve the performance of optoelectronic devices, increase the yield of optoelectronic products, and save production costs.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, in particular to the field of epitaxial wafer technology, and in particular to an epitaxial wafer and a preparation method thereof. Background Art

[0002] Currently, the more mature hydride vapor phase epitaxy (HVPE) and metal-organic chemical vapor deposition (MOCVD) for preparing GaN materials are both epitaxial growth technologies on heterogeneous substrates. Due to the lattice and thermal expansion mismatch between the substrate and the epitaxial layer, the epitaxially grown crystal material has a high dislocation density and high stress, which is prone to warping and cracking, affecting the working efficiency and life of the device, and restricting its application in the field of semiconductor electronics.

[0003] In this regard, homoepitaxial growth of GaN single crystal substrate materials can greatly improve the crystal quality of epitaxial films, reduce dislocation density, and increase device service life and luminous efficiency. However, the preparation of GaN single crystal materials is very difficult. Due to the lack of matching substrates, the growth of GaN epitaxial materials is very difficult. In addition, with the development of markets such as semiconductor lighting and display, the demand for substrates is increasingly shifting to larger substrates of 4 inches or above. The warping cracks caused by residual stress in GaN thick films on large-sized heterogeneous substrates are also difficult to overcome by GaN heteroepitaxial technology, which poses greater difficulties and challenges to the growth of GaN materials.

[0004] Therefore, it is necessary to develop new epitaxial structures to reduce the warping and cracking problems of GaN epitaxial materials. Summary of the Invention

[0005] In view of the problems existing in the prior art, the present invention provides an epitaxial wafer and a preparation method thereof. The epitaxial wafer includes, from the substrate surface to the outside, a periodically arranged SiN graphic structure layer and a diffusion layer, and the diffusion layer has a diffusion microstructure, which can alleviate the phenomenon of cracks or even splits on the epitaxial layer surface caused by excessive stress during the epitaxial growth process, reduce the scrap rate of the epitaxial wafer, and improve the production yield of the epitaxial wafer.

[0006] To achieve this object, the present invention adopts the following technical solutions:

[0007] In a first aspect, the present invention provides an epitaxial wafer, comprising a substrate, a composite silicon aluminum nitride buffer layer, and an epitaxial layer stacked in sequence, wherein the composite silicon aluminum nitride buffer layer comprises, from the surface of the substrate outward, a periodically arranged SiN graphic structure layer and a diffusion layer;

[0008] The diffusion layer includes an aluminum silicon nitrogen diffusion layer and a silicon aluminum nitrogen diffusion layer which are stacked;

[0009] A non-uniform interdiffusion zone is formed at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer. The non-uniform interdiffusion zone includes a SiN diffusion microstructure and an AlN diffusion microstructure.

[0010] The composite silicon aluminum nitrogen buffer layer of the present invention has a diffusion microstructure, which can, on the one hand, scatter light and change the light path from the nitride light-emitting layer to the substrate, thereby improving the forward light output and the brightness of the epitaxial wafer; on the other hand, the microstructure can be used to relieve the stress of the epitaxial layer thereon during the growth process, thereby ensuring that the phenomenon of cracks or even splits on the surface of the epitaxial layer caused by excessive stress during the large-scale epitaxial growth process is avoided, thereby reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0011] Preferably, the aluminum-silicon-nitrogen diffusion layer includes an AlN layer and the SiN diffusion microstructure, and the silicon-aluminum-nitrogen diffusion layer includes a SiN layer and the AlN diffusion microstructure.

[0012] Wherein, in the direction outward from the surface of the substrate, the sizes of the SiN diffusion microstructure and the AlN diffusion microstructure gradually decrease, and / or the densities of the SiN diffusion microstructure and the AlN diffusion microstructure gradually increase.

[0013] The present invention is designed so that the size of the diffusion microstructure gradually decreases or the density gradually increases in the direction outward from the surface of the substrate, thereby forming a gradient difference in microstructure size in the thickness direction of the composite silicon aluminum nitrogen buffer layer, and can make good use of the stress relaxation and stress release advantages brought about by the microstructure size difference.

[0014] Preferably, the SiN diffusion microstructure includes: at least one SiN micro-convex structure arranged along the interface between the aluminum silicon nitride diffusion layer and the silicon aluminum nitride diffusion layer; wherein, along the interface between the aluminum silicon nitride diffusion layer and the silicon aluminum nitride diffusion layer toward the epitaxial layer, the cross-sectional size of the SiN micro-convex structure gradually decreases.

[0015] The AlN diffusion microstructure includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitride diffusion layer and the silicon-aluminum-nitride diffusion layer; wherein, along the interface between the aluminum-silicon-nitride diffusion layer and the silicon-aluminum-nitride diffusion layer toward the epitaxial layer, the cross-sectional size of the AlN micro-convex structure gradually decreases.

[0016] The AlN micro-convex structure of the present invention can be, for example, an inverted V-shaped structure, and the SiN micro-convex structure can be, for example, a V-shaped structure. These AlN micro-convex structures and SiN micro-convex structures can scatter light and change the path of light emitted from the nitride light-emitting layer to the substrate, thereby improving the forward light output and the brightness of the epitaxial wafer; they can also relieve the stress of the epitaxial layer thereon during the growth process and improve the production yield of the epitaxial wafer.

[0017] Preferably, the SiN graphic structure layer has a micro-nanopore structure.

[0018] Preferably, the pore diameter of the micro-nanopore structure in the SiN graphic structure layer in contact with the substrate is 10 to 150 nm, for example, it can be 10 nm, 26 nm, 42 nm, 57 nm, 73 nm, 88 nm, 104 nm, 119 nm, 135 nm or 150 nm.

[0019] The present invention utilizes a micro-nano pore structure to terminate the continuity of atomic distribution in the two-dimensional direction of the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer, and can form a two-dimensional periodic interruption structure of the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer. The density of the micro-nano pore structure gradually increases during the periodic cycle, that is, the density of the micro-nano pore structure filled after the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer are formed increases during the periodic cycle, thereby realizing small-sized and high-density SiN diffusion microstructures and AlN diffusion microstructures as the density of the micro-nano pore structure increases during the periodic cycle.

[0020] Since the pore size of the micro-nanopore structure is too large, the micro-nanopore structure has a poor effect on limiting the size of Al atoms and Si atoms during the formation of the composite silicon aluminum nitrogen buffer layer, affecting the uniformity of atomic distribution and causing the problem of uneven buffer stress distribution; if the pore size of the micro-nanopore structure is too small, there is an inability to form a gradient difference in the thickness direction of the diffusion microstructure size, and it is impossible to make good use of the stress relaxation caused by the microstructure size difference to release stress. Therefore, the present invention preferably has a pore size of 10 to 150 nm for the micro-nanopore structure in the SiN graphic structure layer in contact with the substrate, which can better alleviate the growth pressure of the epitaxial wafer.

[0021] Preferably, the micro-nanoporous structure penetrates at least into the aluminum silicon nitride diffusion layer and separates the adjacent SiN diffusion microstructures, or the micro-nanoporous structure penetrates into the aluminum silicon nitride diffusion layer and the silicon aluminum nitride diffusion layer at the same time and separates the adjacent SiN diffusion microstructures and the adjacent AlN diffusion microstructures.

[0022] It is worth noting that in the present invention, the SiN graphic structure layer and the diffusion layer are not arranged alternately, but overlapped. When the thickness of the SiN graphic structure layer is the same as the thickness of the diffusion layer, the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer are provided in the micro-nanoporous structure, and the adjacent SiN diffusion microstructures and the adjacent AlN diffusion microstructures are separated; when the thickness of the SiN graphic structure layer is greater than the thickness of the diffusion layer, the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer are provided in the micro-nanoporous structure, and the adjacent SiN diffusion microstructures and the adjacent AlN diffusion microstructures are separated, and there is still residual space on the surface of the silicon-aluminum-nitrogen diffusion layer; when the thickness of the SiN graphic structure layer is less than the thickness of the diffusion layer, it is generally required that the thickness of the SiN graphic structure layer is at least equal to the aluminum-silicon-nitrogen diffusion layer, so that the aluminum-silicon-nitrogen diffusion layer is provided in the micro-nanoporous structure and the adjacent SiN diffusion microstructures are separated.

[0023] The present invention utilizes micro-nanopore structures to separate SiN diffusion microstructures, or also to separate AlN diffusion microstructures, thereby obtaining uniformly distributed surface potential energy, effectively confining Al atoms and Si atoms in the composite silicon-aluminum-nitrogen buffer layer in a micro-nano size space, and having the advantages of improving atomic distribution uniformity and reducing stress.

[0024] Preferably, the number of cycles of the SiN graphic structure layer and the diffusion layer in the composite silicon aluminum nitride buffer layer is 2 to 10, for example, it can be 2, 3, 4, 5, 6, 7, 8, 9 or 10.

[0025] Preferably, as the number of cycles increases, the diameter of the micro-nano pores in the SiN graphic structure layer decreases successively.

[0026] The present invention preferably reduces the pore size of the micro-nanopores in the SiN graphic structure layer in sequence, thereby enabling the size of the SiN diffusion microstructure and the AlN diffusion microstructure to gradually decrease, and / or the density of the SiN diffusion microstructure and the AlN diffusion microstructure to gradually increase, thereby simultaneously achieving a better brightness of the epitaxial wafer and alleviating stress during the growth process.

[0027] Preferably, the difference in pore size between any two adjacent periods of the SiN graphic structure layer is 2 to 30 nm, for example, 2 nm, 3 nm, 5 nm, 8 nm, 9 nm, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 25 nm, 28 nm, 29 nm or 30 nm.

[0028] Preferably, the thickness of the aluminum silicon nitrogen diffusion layer is 2 to 20 nm, for example, 2 nm, 3 nm, 5 nm, 8 nm, 10 nm, 12 nm, 15 nm, 18 nm, 19 nm or 20 nm.

[0029] Preferably, the thickness of the silicon aluminum nitrogen diffusion layer is 2 to 20 nm, for example, 2 nm, 3 nm, 5 nm, 8 nm, 10 nm, 12 nm, 15 nm, 18 nm, 19 nm or 20 nm.

[0030] Preferably, the total thickness of the diffusion layer is 5 to 200 nm, for example, it can be 5 nm, 6 nm, 7 nm, 8 nm, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 50 nm, 100 nm, 120 nm, 130 nm, 150 nm, 180 nm, 190 nm or 200 nm.

[0031] Preferably, the thickness of the SiN graphic structure layer is 5 to 50 nm, for example, 5 nm, 8 nm, 13 nm, 18 nm, 24 nm, 29 nm, 34 nm, 40 nm, 45 nm or 50 nm.

[0032] Preferably, the epitaxial layer includes: a nitride buffer layer arranged on the composite silicon aluminum nitride buffer layer; a first doping layer arranged on the nitride buffer layer; a light-emitting layer arranged on the first doping layer; and a second doping layer arranged on the light-emitting layer.

[0033] Preferably, the size of the epitaxial wafer is larger than 4 inches.

[0034] It is worth noting that the warping cracks caused by the residual stress in the GaN thick film on the large-sized heterogeneous substrate are also a difficult problem that is difficult to overcome in GaN heteroepitaxial technology. Therefore, the present invention has an excellent effect of alleviating growth stress, especially for epitaxial wafers with a size of 4 inches or more.

[0035] In a second aspect, the present invention provides a method for preparing an epitaxial wafer, the method comprising at least:

[0036] providing a substrate;

[0037] growing a composite silicon-aluminum-nitrogen buffer layer on the substrate;

[0038] growing an epitaxial layer on the composite silicon aluminum nitrogen buffer layer;

[0039] Wherein, the composite silicon aluminum nitrogen buffer layer includes, from the surface of the substrate outwards: a periodically arranged SiN graphic structure layer and a diffusion layer;

[0040] The diffusion layer includes an aluminum silicon nitrogen diffusion layer and a silicon aluminum nitrogen diffusion layer which are stacked;

[0041] A non-uniform interdiffusion zone is formed at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer. The non-uniform interdiffusion zone includes a SiN diffusion microstructure and an AlN diffusion microstructure.

[0042] The epitaxial wafer preparation method of the present invention can prepare an epitaxial wafer with a diffuse microstructure. On the one hand, it can scatter light and change the path of light emitted from the nitride light-emitting layer to the substrate, thereby improving forward light emission and increasing the brightness of the epitaxial wafer. On the other hand, the microstructure can be used to relieve the stress of the epitaxial layer thereon during the growth process, thereby ensuring that cracks or even splits on the surface of the epitaxial layer caused by excessive stress during the large-scale epitaxial growth process are avoided, thereby reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0043] Preferably, the growing of a composite silicon-aluminum-nitride buffer layer on the substrate comprises:

[0044] S21: growing a SiN pattern structure layer to obtain a first semiconductor device;

[0045] S22: performing Al thermal surface treatment on the first semiconductor component to form an Al deposition layer on the SiN pattern structure layer to obtain a second semiconductor component;

[0046] S23: performing Si thermal surface treatment on the second semiconductor component to form a Si deposition layer on the Al deposition layer to obtain a third semiconductor component;

[0047] S24: performing N thermal surface treatment on the third semiconductor component, so that the Al deposited layer and the Si deposited layer form an aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer, respectively, and a non-uniform interdiffusion region is formed at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer, wherein the non-uniform interdiffusion region includes a SiN diffusion microstructure and an AlN diffusion microstructure;

[0048] Wherein, steps S21 to S24 are repeated to obtain the composite silicon aluminum nitrogen buffer layer.

[0049] It is worth noting that the growth of the composite SiAlN buffer layer in the present invention has the following two special features: 1. First, a SiN patterned structure layer must be grown on the substrate. SiN has the characteristic of discontinuous film formation at micro-nano thicknesses during epitaxial growth, and conventional chemical vapor deposition processes can be used to grow the SiN patterned structure layer, thereby forming micro-nanopore diameters. 2. Al thermal surface treatment, Si thermal surface treatment, and N thermal surface treatment are sequentially performed to form an AlSiN diffusion layer and a SiAlN diffusion layer on the basis of the SiN patterned structure layer. A non-uniform interdiffusion zone is formed at the interface of the AlSiN and SiAlN diffusion layers, comprising SiN and AlN diffusion microstructures. This non-uniform interdiffusion zone comprises SiN diffusion microstructures and AlN diffusion microstructures. Only by adopting this specific sequence of growth steps can epitaxial wafers with higher yields and better brightness be achieved.

[0050] Preferably, steps S21 to S24 are repeated 2 to 10 times, for example, 2 times, 3 times, 4 times, 5 times, 6 times, 7 times, 8 times, 9 times or 10 times.

[0051] Preferably, the growing of the SiN graphic structure layer comprises: introducing a Si source and an N source to form the SiN graphic structure layer under a first growth condition, wherein the first growth condition comprises a temperature of 900-1400° C. and a pressure of 50-500 Torr.

[0052] The temperature is 900-1400° C., for example, it can be 900° C., 956° C., 1012° C., 1067° C., 1123° C., 1178° C., 1234° C., 1289° C., 1345° C. or 1400° C.; the pressure is 50-500 Torr, for example, it can be 50 Torr, 100 Torr, 150 Torr, 200 Torr, 250 Torr, 300 Torr, 350 Torr, 400 Torr, 450 Torr or 500 Torr.

[0053] Preferably, the flow rate of the Si source is in the range of 10 to 300 sccm, for example, 10 sccm, 43 sccm, 75 sccm, 107 sccm, 139 sccm, 172 sccm, 204 sccm, 236 sccm, 268 sccm or 300 sccm.

[0054] When the flow range of the Si source of the present invention is low, it is easy to cause the number of Si atoms on the surface to be too low, making it difficult to form a uniform distribution of Si atoms, affecting the uniformity of the microstructure distribution of the composite silicon aluminum nitrogen buffer layer, and causing uneven stress distribution; when the flow range of the Si source is high, it is easy to cause Si atoms to aggregate on the surface, which will also affect the uniformity of the microstructure distribution of the composite silicon aluminum nitrogen buffer layer, causing uneven stress distribution, and too many Si atoms will become light absorption centers as impurities and affect the front light output. Therefore, the flow range of the Si source is controlled within 10 to 300 sccm, so that the aperture of the micro-nanopores can be controlled within a specific range, and ultimately the stress relief effect of the epitaxial wafer is better.

[0055] Preferably, the flow rate of the N source is in the range of 1 to 100 slm, for example, 1 slm, 12 slm, 23 slm, 34 slm, 45 slm, 56 slm, 67 slm, 78 slm, 89 slm or 100 slm.

[0056] Preferably, as the number of cycles increases, the flow rate of the Si source in step S21 increases successively. As the number of cycles increases, the flow rate of the Si source in step S21 increases successively, so as to obtain a composite silicon aluminum nitrogen buffer layer with gradually increasing microstructure density or gradually decreasing size, which has a better production yield and better device performance of the epitaxial wafer.

[0057] Preferably, in any two adjacent cycles, the difference in flow rate of the Si source in step S21 is 2 to 50 sccm, for example, it can be 2 sccm, 5 sccm, 8 sccm, 10 sccm, 12 sccm, 15 sccm, 18 sccm, 20 sccm, 25 sccm, 30 sccm, 35 sccm, 40 sccm, 45 sccm or 50 sccm, etc.

[0058] Preferably, the Al thermal surface treatment in step S22 includes:

[0059] Under the second growth condition, an aluminum source is introduced to perform Al thermal surface treatment on the first semiconductor component, wherein the second growth condition includes a temperature of 500-900° C. and a pressure of 50-200 Torr.

[0060] The temperature is 500-900°C, for example, it can be 500°C, 545°C, 589°C, 634°C, 678°C, 723°C, 767°C, 812°C, 856°C or 900°C; the pressure is 50-200 torr, for example, it can be 50 torr, 67 torr, 84 torr, 100 torr, 117 torr, 134 torr, 150 torr, 167 torr, 184 torr or 200 torr.

[0061] Preferably, the flow rate of the aluminum source is 10 to 300 sccm, for example, 10 sccm, 43 sccm, 75 sccm, 107 sccm, 139 sccm, 172 sccm, 204 sccm, 236 sccm, 268 sccm or 300 sccm.

[0062] Preferably, the Al thermal surface treatment time is 5 to 15 seconds, for example, it can be 5 seconds, 7 seconds, 8 seconds, 9 seconds, 10 seconds, 11 seconds, 12 seconds, 13 seconds, 14 seconds or 15 seconds.

[0063] Preferably, the Si thermal surface treatment in step S23 includes:

[0064] Under the third growth condition, a silicon source is introduced to perform Si thermal surface treatment on the second semiconductor component, wherein the third growth condition includes a temperature of 500-900° C. and a pressure of 50-200 Torr.

[0065] The temperature is 500-900°C, for example, it can be 500°C, 545°C, 589°C, 634°C, 678°C, 723°C, 767°C, 812°C, 856°C or 900°C; the pressure is 50-200 torr, for example, it can be 50 torr, 67 torr, 84 torr, 100 torr, 117 torr, 134 torr, 150 torr, 167 torr, 184 torr or 200 torr.

[0066] Preferably, the flow rate of the Si source is 10 to 300 sccm, for example, 10 sccm, 43 sccm, 75 sccm, 107 sccm, 139 sccm, 172 sccm, 204 sccm, 236 sccm, 268 sccm or 300 sccm.

[0067] Preferably, the time for the Si thermal surface treatment is 10 to 20 seconds, for example, it can be 10 seconds, 12 seconds, 13 seconds, 14 seconds, 15 seconds, 16 seconds, 17 seconds, 18 seconds, 19 seconds or 20 seconds.

[0068] Preferably, the N thermal surface treatment in step S24 includes: introducing a nitrogen source under a fourth growth condition to perform N thermal surface treatment on the third semiconductor component; wherein the fourth growth condition includes a temperature of 500-1400° C. and a pressure of 50-200 torr.

[0069] Among them, the temperature is 500-1400°C, for example, it can be 500°C, 600°C, 700°C, 800°C, 900°C, 1000°C, 1100°C, 1200°C, 1300°C or 1400°C; the pressure is 50-200 Torr, for example, it can be 50 Torr, 67 Torr, 84 Torr, 100 Torr, 117 Torr, 134 Torr, 150 Torr, 167 Torr, 184 Torr or 200 Torr.

[0070] Preferably, the flow rate of the nitrogen source is 20 to 100 slm, for example, 20 slm, 25 slm, 28 slm, 30 slm, 32 slm, 33 slm, 35 slm, 38 slm, 40 slm, 45 slm, 48 slm, 50 slm, 60 slm, 70 slm, 80 slm, 85 slm, 90 slm or 100 slm, etc.

[0071] Preferably, the N thermal surface treatment time is 15 to 30 seconds, for example, it can be 15 seconds, 17 seconds, 19 seconds, 20 seconds, 22 seconds, 24 seconds, 25 seconds, 27 seconds, 29 seconds or 30 seconds.

[0072] When the N thermal surface treatment time is too short, a large number of N vacancy defects may form in the composite buffer layer, resulting in poor composite buffer layer quality. When the N thermal surface treatment time is too long, polarity reversal may occur on the surface of the diffusion microstructure, resulting in large variations in the surface roughness of the composite buffer layer and unstable performance. The present invention further preferably controls the N thermal surface treatment time to 15 to 30 seconds. This not only ensures stable composite buffer performance and improves surface consistency and uniformity, but also fully N-converts the Al atoms from the Al thermal surface treatment and the Si atoms from the Si thermal surface treatment, reducing N vacancy defects, preventing N vacancy defects from absorbing light from the light-emitting layer, and improving the brightness of the epitaxial wafer.

[0073] Preferably, the epitaxial layer includes a nitride buffer layer, a first doped layer, a light-emitting layer, and a second doped layer stacked in sequence, and the preparation method further includes:

[0074] growing a nitride buffer layer on the composite silicon-aluminum-nitride buffer layer;

[0075] growing a first doping layer on the nitride buffer layer;

[0076] growing a light-emitting layer on the first doped layer;

[0077] A second doping layer is grown on the light emitting layer.

[0078] Preferably, the growing the nitride buffer layer comprises: forming the nitride buffer layer under a fifth growth condition, wherein the fifth growth condition comprises a temperature of 1050-1150° C. and a pressure of 100-500 Torr.

[0079] Among them, the temperature is 1050-1150°C, for example, it can be 1050°C, 1062°C, 1073°C, 1084°C, 1095°C, 1106°C, 1117°C, 1128°C, 1139°C or 1150°C; the pressure is 100-500 Torr, for example, it can be 100 Torr, 145 Torr, 189 Torr, 234 Torr, 278 Torr, 323 Torr, 367 Torr, 412 Torr, 456 Torr or 500 Torr.

[0080] Preferably, the thickness of the nitride buffer layer is 1-5 μm, for example, 1 μm, 1.5 μm, 1.9 μm, 2.4 μm, 2.8 μm, 3.3 μm, 3.7 μm, 4.2 μm, 4.6 μm or 5 μm.

[0081] Preferably, growing the first doping layer comprises: forming a first doping layer having a first doping concentration under a sixth growth condition, wherein the sixth growth condition comprises a temperature of 1040-1140° C. and a pressure of 100-500 Torr, and the first doping concentration is 1×10 18 cm -3 ~8×10 18 cm -3 .

[0082] The temperature is 1040-1140° C., for example, 1040° C., 1052° C., 1063° C., 1074° C., 1085° C., 1096° C., 1107° C., 1118° C., 1129° C., or 1140° C.; the pressure is 100-500 Torr, for example, 100 Torr, 145 Torr, 189 Torr, 234 Torr, 278 Torr, 323 Torr, 367 Torr, 412 Torr, 456 Torr, or 500 Torr; the first doping concentration is 1×10 18 cm -3 ~8×10 18 cm -3 , for example, it can be 1×10 18 cm -3 , 1.8×10 18 cm -3 , 2.6×10 18 cm -3 , 3.4×10 18 cm-3 , 4.2×10 18 cm -3 , 4.9×10 18 cm -3 , 5.7×10 18 cm -3 , 6.5×10 18 cm -3 , 7.3×10 18 cm -3 or 8×10 18 cm -3 wait.

[0083] Preferably, the thickness of the first doping layer is 2-8 μm, for example, 2 μm, 2.7 μm, 3.4 μm, 4 μm, 4.7 μm, 5.4 μm, 6 μm, 6.7 μm, 7.4 μm or 8 μm.

[0084] Preferably, the growing the light-emitting layer comprises: forming the light-emitting layer under a seventh growth condition, wherein the seventh growth condition comprises a temperature of 700-1200° C. and a pressure of 100-500 Torr.

[0085] The temperature is 700-1200°C, for example, it can be 700°C, 756°C, 812°C, 867°C, 923°C, 978°C, 1034°C, 1089°C, 1145°C or 1200°C; the pressure is 100-500 torr, for example, it can be 100 torr, 145 torr, 189 torr, 234 torr, 278 torr, 323 torr, 367 torr, 412 torr, 456 torr or 500 torr.

[0086] Preferably, the light-emitting layer includes at least a nitride quantum well layer and a nitride quantum barrier layer that are periodically repeated and overlapped; wherein the number of periodic repeated overlaps is 2 to 15, for example, it can be 2, 4, 5, 7, 8, 10, 11, 13, 14 or 15, etc.

[0087] The growing of the nitride quantum well layer includes: forming the nitride quantum well layer under an eighth growth condition, wherein the eighth growth condition includes a temperature of 700-1150° C. and a pressure of 100-500 Torr.

[0088] Among them, the temperature is 700-1150°C, for example, it can be 700°C, 750°C, 800°C, 850°C, 900°C, 950°C, 1000°C, 1050°C, 1100°C or 1150°C; the pressure is 100-500 torr, for example, it can be 100 torr, 145 torr, 189 torr, 234 torr, 278 torr, 323 torr, 367 torr, 412 torr, 456 torr or 500 torr.

[0089] The growing of the nitride quantum barrier layer includes: forming the nitride quantum barrier layer under a ninth growth condition, wherein the ninth growth condition includes a temperature of 750-1200° C. and a pressure of 100-500 Torr.

[0090] The temperature is 750-1200°C, for example, it can be 750°C, 800°C, 850°C, 900°C, 950°C, 1000°C, 1050°C, 1100°C, 1150°C or 1200°C; the pressure is 100-500 torr, for example, it can be 100 torr, 145 torr, 189 torr, 234 torr, 278 torr, 323 torr, 367 torr, 412 torr, 456 torr or 500 torr.

[0091] Preferably, the growing of the second doping layer comprises: forming a second doping layer having a second doping concentration under a tenth growth condition, wherein the tenth growth condition comprises a temperature of 950-1050° C. and a pressure of 100-600 Torr, and the second doping concentration is 1×10 19 cm -3 ~1×10 21 cm -3 .

[0092] The temperature is 950-1050° C., for example, 950° C., 962° C., 973° C., 984° C., 995° C., 1006° C., 1017° C., 1028° C., 1039° C., or 1050° C.; the pressure is 100-600 torr, for example, 100 torr, 156 torr, 212 torr, 267 torr, 323 torr, 378 torr, 434 torr, 489 torr, 545 torr, or 600 torr; the second doping concentration is 1×10 19 cm -3 ~1×10 21 cm -3 , for example, it can be 1×10 19 cm -3 , 1.2×10 19cm -3 , 3×10 19 cm -3 , 5×10 19 cm -3 , 6×10 19 cm -3 , 1×10 20 cm -3 , 2×10 20 cm -3 , 4×10 20 cm -3 , 5×10 20 cm -3 , 7×10 20 cm -3 , 9×10 20 cm -3 or 1×10 21 cm -3 wait.

[0093] Preferably, the thickness of the second doping layer is 20-300 nm, for example, 20 nm, 52 nm, 83 nm, 114 nm, 145 nm, 176 nm, 207 nm, 238 nm, 269 nm or 300 nm.

[0094] Compared with the prior art, the present invention has at least the following beneficial effects:

[0095] (1) The epitaxial wafer provided by the present invention includes, from the substrate surface to the outside, a periodically arranged SiN graphic structure layer and a diffusion layer, and the diffusion layer has a diffusion microstructure, which can alleviate the phenomenon of cracks or even splits on the surface of the epitaxial layer caused by excessive stress during the epitaxial growth process, thereby reducing the internal stress of the epitaxial wafer, improving the crystal quality of the epitaxial layer, reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0096] (2) The diffusion microstructure in the epitaxial wafer provided by the present invention preferably has a size that gradually decreases or a density that gradually increases along the outward direction from the substrate surface, which can scatter light and change the path of light emitted from the nitride light-emitting layer to the substrate, thereby improving the forward light output and the brightness of the epitaxial wafer.

[0097] (3) The method for preparing epitaxial wafers provided by the present invention is particularly suitable for the preparation of large-size epitaxial wafers, which significantly improves the yield of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0098] Figure 1 It is a schematic structural diagram of the epitaxial wafer prepared in Example 1 of the present invention.

[0099] Figure 2 It is a schematic structural diagram of the composite silicon aluminum nitrogen buffer layer in Example 1 of the present invention.

[0100] Figure 3 It is a schematic structural diagram of the composite silicon aluminum nitrogen buffer layer in Example 2 of the present invention.

[0101] Figure 4 Schematic diagram of the structure of the composite silicon aluminum nitrogen buffer layer in Example 3 of the present invention.

[0102] In the figure: 1-substrate; 2-composite silicon aluminum nitrogen buffer layer; 21-aluminum silicon nitrogen diffusion layer; 211-AlN layer; 212-SiN diffusion microstructure; 22-silicon aluminum nitrogen diffusion layer; 221-SiN layer; 222-AlN diffusion microstructure; 23-SiN graphic structure layer; 3-epitaxial layer; 31-nitride buffer layer; 32-first doping layer; 33-light-emitting layer; 34-second doping layer. DETAILED DESCRIPTION

[0103] The technical solution of the present invention will be further described below with reference to the accompanying drawings and through specific implementation methods.

[0104] The present invention is further described in detail below. However, the following examples are merely simplified examples of the present invention and do not represent or limit the scope of protection of the present invention. The scope of protection of the present invention shall be subject to the claims.

[0105] It should be understood that, in the description of the present invention, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0106] The technical solution of the present invention will be further described below with reference to the accompanying drawings and through specific implementation methods.

[0107] See also Figure 1 , Figure 1 3 is a schematic structural diagram of an epitaxial wafer prepared in Example 1 of the present invention, wherein the epitaxial wafer comprises a substrate 1, a composite silicon aluminum nitrogen buffer layer 2 and an epitaxial layer 3 stacked in sequence.

[0108] The thickness of the substrate 1 is 300 to 2500 μm. The material of the substrate 1 is not particularly limited and can be a sapphire substrate 1, a silicon carbide substrate 1, a silicon substrate 1, an aluminum nitride substrate 1, a gallium nitride substrate 1 or a diamond substrate 1.

[0109] The composite silicon aluminum nitride buffer layer 2 includes, from the surface of the substrate 1 outward, a periodically arranged SiN graphic structure layer 23 and a diffusion layer; the diffusion layer includes a stacked aluminum silicon nitride diffusion layer 21 and a silicon aluminum nitride diffusion layer 22; a non-uniform interdiffusion zone is formed at the interface between the aluminum silicon nitride diffusion layer 21 and the silicon aluminum nitride diffusion layer 22, and the non-uniform interdiffusion zone includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 222.

[0110] In one embodiment, the Al-Si-N diffusion layer 21 includes an AlN layer 211 and a SiN diffusion microstructure 212 , and the Si-Al-N diffusion layer 22 includes a SiN layer 221 and an AlN diffusion microstructure 222 .

[0111] Furthermore, the size of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually decreases along the outward direction from the surface of the substrate 1. Alternatively, the density of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually increases along the outward direction from the surface of the substrate 1. Alternatively, the size of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually decreases along the outward direction from the surface of the substrate 1, and the density of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually increases.

[0112] Furthermore, the SiN diffusion microstructure 212 includes: at least one SiN micro-convex structure arranged along the interface between the aluminum silicon nitride diffusion layer 21 and the silicon aluminum nitride diffusion layer 22; wherein, along the interface between the aluminum silicon nitride diffusion layer 21 and the silicon aluminum nitride diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the SiN micro-convex structure gradually decreases.

[0113] The AlN diffusion microstructure 222 includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the AlN micro-convex structure gradually decreases.

[0114] Furthermore, the SiN pattern structure layer 23 has a micro-nano pore structure, and the pore diameter of the micro-nano pore structure in the SiN pattern structure layer 23 in contact with the substrate is 10-150 nm.

[0115] Furthermore, the micro-nano pore structure penetrates at least into the aluminum silicon nitride diffusion layer 21 and separates adjacent SiN diffusion microstructures 212 , or the micro-nano pore structure penetrates into both the aluminum silicon nitride diffusion layer 21 and the silicon aluminum nitride diffusion layer 22 and separates adjacent SiN diffusion microstructures 212 and adjacent AlN diffusion microstructures 222 .

[0116] Furthermore, the number of cycles of the SiN pattern structure layer 23 and the diffusion layer in the composite silicon aluminum nitride buffer layer 2 is 2 to 10.

[0117] Furthermore, as the number of cycles increases, the pore diameters of the micro-nano pores in the SiN pattern structure layer 23 decrease successively.

[0118] Furthermore, the difference in pore diameters of the micro-nano pores in any two adjacent periods of the SiN pattern structure layer 23 is 2-30 nm.

[0119] Furthermore, the thickness of the aluminum-silicon-nitrogen diffusion layer 21 is 2-20 nm.

[0120] Furthermore, the thickness of the SiAlN diffusion layer 22 is 2-20 nm.

[0121] Furthermore, the total thickness of the diffusion layer is 5 to 200 nm.

[0122] Furthermore, the thickness of the SiN pattern structure layer 23 is 5-50 nm.

[0123] In one embodiment, the epitaxial layer 3 includes: a nitride buffer layer 31 disposed on the composite silicon aluminum nitride buffer layer 2, a first doping layer 32 disposed on the nitride buffer layer 31, a light-emitting layer 33 disposed on the first doping layer 32, and a second doping layer 34 disposed on the light-emitting layer 33.

[0124] As a specific example of this embodiment, the thickness of the nitride buffer layer 31 is 1 to 5 μm, for example, it can be 1 μm, 1.5 μm, 2 μm, 3 μm, 4 μm or 5 μm, etc.; as this embodiment or another specific example, the material of the nitride buffer layer 31 is GaN, AlN, AlGaN, InN, InGaN, AlInGaN or AlInN, etc.

[0125] As a specific example of this embodiment, the thickness of the first doping layer 32 is 2 to 8 μm, for example, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm or 8 μm; the material of the first doping layer 32 is GaN; the doping element in the first doping layer 32 is Si, and the doping concentration is 1 to 8×10 18 cm -3 , for example, it can be 1×10 18 cm -3 , 2×10 18 cm -3 , 3×10 18 cm -3 , 4×10 18 cm -3 , 5×10 18 cm -3 , 6×10 18 cm -3 , 7×10 18 cm -3 or 8×1018 cm -3 wait.

[0126] As a specific example of this embodiment, the light-emitting layer 33 includes at least a quantum well layer and a quantum barrier layer that are periodically repeated and overlapped. The quantum well layer has a thickness of 1 to 10 nm, such as 1 nm, 1.5 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, or 10 nm, and is made of InGaN. The quantum barrier layer has a thickness of 5 to 20 nm, such as 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, 12 nm, 13 nm, 14 nm, 15 nm, 18 nm, or 20 nm, and is made of GaN. The number of periods in the light-emitting layer 33 is 2 to 15, such as 2, 3, 4, 5, 8, 10, 11, 12, 13, 14, or 15.

[0127] As a specific example of this embodiment, the thickness of the second doping layer 34 is 20 to 300 nm, for example, 20 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 250 nm or 300 nm. The material of the second doping layer 34 is GaN, and the doping element in the second doping layer 34 is Mg, with a doping concentration of 1×10 19 cm -3 ~1×10 21 cm -3 , for example, it can be 1×10 19 cm -3 , 1.5×10 19 cm -3 , 2×10 19 cm -3 , 3×10 19 cm -3 , 3.5×10 19 cm -3 , 4.0×10 19 cm -3 , 4.2×10 19 cm -3 , 4.5×10 19 cm -3 , 5.0×10 19 cm -3 , 5.5×10 19 cm -3 , 6×10 19 cm -3 , 7×10 19 cm -3 , 8×10 19cm -3 , 1×10 20 cm -3 , 2×10 20 cm -3 , 3×10 20 cm -3 , 4×10 20 cm -3 , 5×10 20 cm -3 , 8×10 20 cm -3 or 1×10 21 cm -3 wait.

[0128] Furthermore, the size of the epitaxial wafer is larger than 4 inches, for example, it can be 5 inches or 6 inches.

[0129] The epitaxial wafer provided in this embodiment includes, from the surface of the substrate 1 outward, a periodically arranged SiN graphic structure layer 23 and a diffusion layer, and the diffusion layer has a diffusion microstructure, which can alleviate the phenomenon of cracks or even splits on the surface of the epitaxial layer 3 caused by excessive stress during the epitaxial growth process, reduce the scrap rate of the epitaxial wafer, and is particularly suitable for large-size epitaxial wafers, thereby improving the production yield of large-size epitaxial wafers; and the diffusion microstructure preferably gradually decreases in size or increases in density in the direction outward from the surface of the substrate 1, which can scatter light and change the path of light emitted from the nitride light-emitting layer 33 to the substrate 1, thereby improving the forward light output and improving the brightness of the epitaxial wafer.

[0130] Based on the above epitaxial structure, the present invention also provides a method for preparing the epitaxial structure, which comprises the following steps:

[0131] Step S1: providing a substrate 1.

[0132] Step S2: growing a composite silicon aluminum nitrogen buffer layer 2 on the substrate 1.

[0133] The composite silicon aluminum nitride buffer layer 2 includes, from the surface of the substrate 1 outward, a periodically arranged SiN graphic structure layer 23 and a diffusion layer; the diffusion layer includes a stacked aluminum silicon nitride diffusion layer 21 and a silicon aluminum nitride diffusion layer 22; a non-uniform interdiffusion zone is formed at the interface between the aluminum silicon nitride diffusion layer 21 and the silicon aluminum nitride diffusion layer 22, and the non-uniform interdiffusion zone includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 222.

[0134] In one embodiment, to grow the composite silicon aluminum nitride buffer layer 2 on the substrate 1, the following steps may be employed:

[0135] S21: growing a SiN pattern structure layer 23 to obtain a first semiconductor component.

[0136] Under the first growth condition, 10-300 sccm of Si source and 1-100 slm of N source are introduced to form a SiN pattern structure layer 23 with a thickness of 5-30 nm. The first growth condition includes a temperature of 900-1400° C. and a pressure of 50-500 torr.

[0137] Since the surface of the growth substrate 1 and Si atoms will gather with the steps distributed on the surface as nucleation points, under the action of the N thermal surface treatment in step S24, SiN will form a graphic structure layer with a layered micro-nanopore structure on the surface of the substrate 1, and the pore size of the micro-nanopores in the SiN graphic structure layer in contact with the substrate is 10 to 150 nm.

[0138] S22: performing Al thermal surface treatment on the first semiconductor component to form an Al deposition layer on the SiN pattern structure layer 23 to obtain a second semiconductor component.

[0139] Under the second growth conditions, an aluminum source is introduced at a flow rate of 10 to 300 sccm to perform an Al thermal surface treatment on the first semiconductor element to form an Al deposition layer. Specifically, the Al deposition layer has a thickness of 2 to 30 nm, and the Al thermal surface treatment lasts for 5 to 15 seconds. The second growth conditions include a temperature of 500 to 900°C and a pressure of 50 to 200 Torr.

[0140] In step S22 of the present invention, the poor migration activity of Al atoms can be utilized to form a uniform coverage on the surface of the substrate 1, thereby avoiding atomic aggregation caused by the difference in formation energy in different areas of the substrate 1 surface, and ultimately forming a surface with high surface consistency.

[0141] S23: performing Si thermal surface treatment on the second semiconductor component to form a Si deposition layer on the Al deposition layer to obtain a third semiconductor component.

[0142] Under the third growth condition, a silicon source is introduced at a flow rate of 10 to 300 sccm, and a Si thermal surface treatment is performed on the second semiconductor element to form a Si deposited layer. Specifically, the Si deposited layer has a thickness of 2 to 30 nm, and the Si thermal surface treatment lasts for 10 to 20 seconds. The third growth condition includes a temperature of 500 to 900°C and a pressure of 50 to 200 torr.

[0143] After the order of S22 and S23 of the present invention is swapped, an overlapping structure of the SiN layer 221 and the AlN layer will be directly formed, and a composite silicon aluminum nitrogen buffer layer 2 with a diffusion microstructure cannot be formed. The diffusion microstructure of the present invention can relieve the stress of the epitaxial layer 3 during the growth process, thereby avoiding cracks and warping in the large-scale epitaxial growth process, and improving the product yield of the epitaxial wafer.

[0144] S24: Performing N thermal surface treatment on the third semiconductor component so that the Al deposition layer and the Si deposition layer form an aluminum silicon nitrogen diffusion layer 21 and a silicon aluminum nitrogen diffusion layer 22 respectively, and forming a non-uniform interdiffusion zone at the interface between the aluminum silicon nitrogen diffusion layer 21 and the silicon aluminum nitrogen diffusion layer 22, the non-uniform interdiffusion zone including the SiN diffusion microstructure 212 and the AlN diffusion microstructure 222.

[0145] Under the fourth growth condition, a nitrogen source with a flow rate of 20 to 100 slm is introduced to perform a N thermal surface treatment on the third semiconductor element for 15 to 30 seconds. The fourth growth condition includes a temperature of 500 to 1400° C. and a pressure of 50 to 200 torr.

[0146] In the process of N thermal surface treatment of the present invention, part of the Al deposited layer in step S22 is nitrided to form an AlN layer 211, and part of the Si deposited layer in step S23 is nitrided to form a SiN layer 221. In addition, during the process of N thermal surface treatment, the Al deposited layer formed in step S22 and the Si deposited layer formed in step S23 diffuse with each other. Since the diffusion rate of atoms close to the interface is faster than the diffusion rate of atoms far from the interface, the diffusion of atoms on both sides of the interface is uneven, and finally a V-type SiN diffusion microstructure is formed in the nitrided AlN layer 211, and an inverted V-shaped AlN diffusion microstructure is formed in the nitrided SiN layer 221.

[0147] In the present invention, because the solubility of Si in Al is higher than the solubility of Al in Si, Si will form a deeper diffusion depth. Therefore, the diffusion of Al in the Si layer will form an AlN diffusion microstructure 222 after N thermal surface treatment, which can provide a buffer for the internal stress of the composite silicon aluminum nitrogen buffer layer 2, thereby providing a low-stress nitride buffer layer 31 growth template.

[0148] Wherein, steps S21 to S24 are repeated to obtain a composite silicon-aluminum-nitrogen buffer layer 2 .

[0149] Furthermore, steps S21 to S24 are repeated 2 to 10 times.

[0150] Furthermore, as the number of cycles increases, the flow rate of the Si source in step S21 increases successively, and the distribution density of Si atoms on the surface increases, thereby achieving the growth of the SiN graphic structure layer 23 with gradually decreasing pore size.

[0151] The present invention utilizes the SiN nanopores in the SiN graphic structure layer 23 to terminate the atomic distribution continuity of the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 in the two-dimensional direction, thereby forming a periodic interrupted structure of the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 in the two-dimensional direction; as the number of growth cycles of the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 increases, the density of the SiN nanopores gradually increases, that is, the density of the SiN nanopores filled after the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 are formed during the cycle process, ultimately resulting in an increase in the density of the SiN nanopores as the number of cycles increases, thereby achieving an AlN diffusion microstructure 222 and a SiN diffusion microstructure 212 with a reduced size and a gradually increased density.

[0152] Furthermore, in any two adjacent cycles, the difference in the flow rate of the Si source in step S21 is 2 to 50 sccm.

[0153] As the number of cycles increases, the flow rate of the Si source in step S21 increases successively, so that under the action of the N thermal surface treatment, the size of the V-type SiN diffusion microstructure formed in the aluminum-silicon-nitrogen diffusion layer 21 and the inverted V-type AlN diffusion microstructure formed in the silicon-aluminum-nitrogen diffusion layer 22 decreases and the density increases; on the one hand, the diffusion microstructure formed in the small-size and high-density composite buffer structure layer can scatter light and change the light path from the nitride light-emitting layer 33 to the substrate 1, thereby improving the forward light output and improving the brightness of the epitaxial wafer; on the other hand, the diffusion microstructure can be used to relieve the stress of the epitaxial layer 3 during the growth process, thereby avoiding the phenomenon of surface cracks or even splits of the epitaxial layer 3 caused by excessive stress during large-size epitaxial growth, reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0154] Step S3: growing an epitaxial layer 3 on the composite silicon aluminum nitride buffer layer 2 .

[0155] The epitaxial layer 3 includes a nitride buffer layer 31, a first doped layer 32, a light-emitting layer 33, and a second doped layer 34, which are stacked in sequence. The preparation of the epitaxial layer 3 includes the following steps:

[0156] S31 : growing a nitride buffer layer 31 on the composite silicon aluminum nitride buffer layer 2 .

[0157] Under the sixth growth condition, a nitride buffer layer 31 with a thickness of 1-5 μm is formed, wherein the fifth growth condition includes a temperature of 1050-1150° C. and a pressure of 100-500 Torr.

[0158] S32 : growing a first doping layer 32 on the nitride buffer layer 31 .

[0159] Under the sixth growth condition, a first doping layer 32 with a thickness of 2 to 8 μm and a first doping concentration is formed, wherein the sixth growth condition includes a temperature of 1040 to 1140° C. and a pressure of 100 torr to 500 torr, and the first doping concentration is 1×10 18 cm -3 ~8×10 18 cm -3 .

[0160] S33 : growing a light emitting layer 33 on the first doping layer 32 .

[0161] Under the sixth growth condition, the light emitting layer 33 is grown. The sixth growth condition includes a temperature of 700-1200° C. and a pressure of 100-500 Torr.

[0162] Furthermore, the light-emitting layer 33 includes at least a nitride quantum well layer and a nitride quantum barrier layer that are periodically overlapped and repeated. The number of the periodic overlapping periods is 2 to 15. The growth of the light-emitting layer 33 includes the following steps:

[0163] S331: Under the eighth growth condition, forming a nitride quantum well layer.

[0164] The eighth growth condition includes a temperature of 700-1150° C. and a pressure of 100-500 torr.

[0165] S332: Under the ninth growth condition, a nitride quantum barrier layer is formed.

[0166] The ninth growth condition includes a temperature of 750-1200° C. and a pressure of 100-500 torr.

[0167] Steps S331 - S332 are repeated 2 to 15 times to obtain the light-emitting layer 33 .

[0168] S34 : growing a second doping layer 34 on the light emitting layer 33 .

[0169] Under the tenth growth condition, a second doping layer 34 with a thickness of 20 to 300 nm and a second doping concentration is formed, wherein the tenth growth condition includes a temperature of 950 to 1050° C. and a pressure of 100 torr to 600 torr, and the second doping concentration is 1×10 19 cm -3 ~1×10 21 cm -3 .

[0170] The following describes the technical solution of the present application in more detail with reference to the accompanying drawings and several examples. However, it should be understood that the following examples are merely for the purpose of explaining and illustrating the technical solution and do not limit the scope of the present application. Furthermore, unless otherwise specified, the various raw materials, reaction equipment, detection equipment, and methods used in the following examples are all known in the art.

[0171] Example 1

[0172] Please refer to Figure 1 and Figure 2 This embodiment provides an epitaxial wafer, which includes a substrate 1, a composite silicon aluminum nitrogen buffer layer 2 and an epitaxial layer 3 stacked in sequence.

[0173] The thickness of the substrate 1 is 1200 μm, the size of the substrate 1 is 6 inches, and the material of the substrate 1 is sapphire.

[0174] See also Figure 2 The composite silicon aluminum nitride buffer layer 2 includes, from the surface of the substrate 1 to the outside, a periodically arranged SiN graphic structure layer 23 and a diffusion layer, and the thickness of the SiN graphic structure layer 23 and the diffusion layer are equal; the diffusion layer includes a stacked aluminum silicon nitride diffusion layer 21 and a silicon aluminum nitride diffusion layer 22; a non-uniform interdiffusion zone is formed at the interface between the aluminum silicon nitride diffusion layer 21 and the silicon aluminum nitride diffusion layer 22, and the non-uniform interdiffusion zone includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 222.

[0175] The Al-Si-N diffusion layer 21 includes an AlN layer 211 and a SiN diffusion microstructure 212 . The Si-Al-N diffusion layer 22 includes a SiN layer 221 and an AlN diffusion microstructure 222 .

[0176] Along the outward direction from the surface of the substrate 1 , the sizes of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually decrease, and the densities of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually increase.

[0177] The SiN diffusion microstructure 212 includes: at least one SiN micro-convex structure arranged along the interface between the aluminum-silicon-nitride diffusion layer 21 and the silicon-aluminum-nitride diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitride diffusion layer 21 and the silicon-aluminum-nitride diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the SiN micro-convex structure gradually decreases.

[0178] The AlN diffusion microstructure 222 includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the AlN micro-convex structure gradually decreases.

[0179] The SiN patterned structure layer 23 has a micro-nanopore structure. The pore size of the micro-nanopore structure in the SiN patterned structure layer in contact with the substrate is 20 nm. The micro-nanopore structure includes an aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22, separating adjacent SiN diffusion microstructures 212 and adjacent AlN diffusion microstructures 222.

[0180] The number of cycles between the SiN patterned structure layer 23 and the diffusion layer in the composite SiAlN buffer layer 2 is five. As the number of cycles increases, the diameter of the micro-nanopores in the SiN patterned structure layer 23 decreases. The differences in the diameters of the micro-nanopores in two adjacent cycles of the SiN patterned structure layer 23 in the thickness direction are 8 nm, 4.8 nm, 2.9 nm, and 1.7 nm, respectively.

[0181] The thickness of the aluminum-silicon-nitrogen diffusion layer 21 is 10 nm. The thickness of the silicon-aluminum-nitrogen diffusion layer 22 is 10 nm. The total thickness of the diffusion layer is 20 nm. The thickness of the SiN patterned structure layer 23 is 20 nm.

[0182] The epitaxial layer 3 includes: a nitride buffer layer 31 disposed on the composite silicon aluminum nitride buffer layer 2; a first doping layer 32 disposed on the nitride buffer layer 31; a light emitting layer 33 disposed on the first doping layer 32; and a second doping layer 34 disposed on the light emitting layer 33.

[0183] The thickness of the nitride buffer layer 31 is 3 μm, and the material of the nitride buffer layer 31 is GaN.

[0184] The thickness of the first doping layer 32 is 2.5 μm, and the material is GaN. The doping element in the first doping layer 32 is Si, and the doping concentration is 2×10 18 cm -3 .

[0185] The light-emitting layer 33 comprises at least a periodically overlapping arrangement of quantum well layers and quantum barrier layers. The quantum well layers are 3 nm thick and made of InGaN. The quantum barrier layers are 12 nm thick and made of GaN. The number of periods in the light-emitting layer 33 is 10.

[0186] The thickness of the second doping layer 34 is 120 nm, and the material is GaN. The doping element in the second doping layer 34 is Mg, and the doping concentration is 5×10 19 cm -3 .

[0187] This embodiment also provides a method for preparing the epitaxial wafer, which comprises:

[0188] S101: providing a substrate 1.

[0189] S102: Under the conditions of a temperature of 900° C. and a pressure of 500 torr, a Si source with a flow rate of 300 sccm and an N source with a flow rate of 25 slm are introduced to form a SiN pattern structure layer 23 to obtain a first semiconductor device.

[0190] S103: Under the conditions of a temperature of 600°C and a pressure of 100 torr, an aluminum source with a flow rate of 100 sccm is introduced to perform Al thermal surface treatment on the first semiconductor component. The Al thermal surface treatment time is 10 seconds to form an Al deposition layer on the SiN graphic structure layer 23 to obtain a second semiconductor component.

[0191] S104: Under the conditions of a temperature of 600°C and a pressure of 200 torr, a silicon source with a flow rate of 200 sccm is introduced to perform Si thermal surface treatment on the second semiconductor component. The Si thermal surface treatment time is 12 seconds to form a Si deposition layer on the Al deposition layer to obtain a third semiconductor component.

[0192] S105: Under the conditions of a temperature of 1100°C and a pressure of 100 torr, a nitrogen source with a flow rate of 60 sccm is introduced to perform N thermal surface treatment on the third semiconductor component. The N thermal surface treatment time is 20 seconds, so that the Al deposition layer and the Si deposition layer form an aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22, respectively, and a non-uniform interdiffusion zone is formed at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22. The non-uniform interdiffusion zone includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 222.

[0193] S106: Steps S102 to S105 are repeated five times to obtain a composite silicon aluminum nitrogen buffer layer 2.

[0194] As the number of cycles increases, the flow rate of the Si source in step S21 increases successively; wherein the flow rates of the Si source in the five cycles are 10 sccm, 65 sccm, 108 sccm, 180 sccm and 300 sccm respectively.

[0195] S107 : Under the conditions of a temperature of 1100° C. and a pressure of 200 torr, a nitride buffer layer 31 with a thickness of 3 μm and made of GaN is formed on the composite SiAlN buffer layer 2 .

[0196] S108: Under the conditions of temperature of 1080°C and pressure of 200 torr, a Si doping concentration of 2×10 18 cm -3 , a first doping layer 32 with a thickness of 2.5 μm and made of GaN.

[0197] S109: forming a nitride quantum well layer with a thickness of 3 nm and made of InGaN at a temperature of 810° C. and a pressure of 300 Torr.

[0198] S110 : forming a nitride quantum barrier layer with a thickness of 12 nm and made of GaN at a temperature of 900° C. and a pressure of 300 Torr.

[0199] S111: Steps S109 to S110 are repeated 10 times to obtain a grown light-emitting layer 33.

[0200] S112: Under the conditions of temperature of 1020°C and pressure of 500 torr, a Mg doping concentration of 5×10 19 cm -3 , a second doping layer 34 with a thickness of 120 nm and made of GaN.

[0201] Example 2

[0202] Please refer to Figure 1 and Figure 3 This embodiment provides an epitaxial wafer, which includes a substrate 1, a composite silicon aluminum nitrogen buffer layer 2 and an epitaxial layer 3 stacked in sequence.

[0203] The thickness of the substrate 1 is 1200 μm, the size is 6 inches, and the material of the substrate 1 is sapphire.

[0204] See also Figure 3 The composite silicon aluminum nitride buffer layer 2 includes, from the surface of the substrate 1 to the outside, a periodically arranged SiN graphic structure layer 23 and a diffusion layer, and the thickness of the SiN graphic structure layer 23 is greater than the thickness of the diffusion layer; the diffusion layer includes a stacked aluminum silicon nitride diffusion layer 21 and a silicon aluminum nitride diffusion layer 22; a non-uniform interdiffusion zone is formed at the interface between the aluminum silicon nitride diffusion layer 21 and the silicon aluminum nitride diffusion layer 22, and the non-uniform interdiffusion zone includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 222.

[0205] The Al-Si-N diffusion layer 21 includes an AlN layer 211 and a SiN diffusion microstructure 212 . The Si-Al-N diffusion layer 22 includes a SiN layer 221 and an AlN diffusion microstructure 222 .

[0206] In the outward direction along the surface of the substrate 1 , the sizes of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually decrease, and the densities of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually increase.

[0207] The SiN diffusion microstructure 212 includes: at least one SiN micro-convex structure arranged along the interface between the aluminum-silicon-nitride diffusion layer 21 and the silicon-aluminum-nitride diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitride diffusion layer 21 and the silicon-aluminum-nitride diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the SiN micro-convex structure gradually decreases.

[0208] The AlN diffusion microstructure 222 includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the AlN micro-convex structure gradually decreases.

[0209] The SiN patterned structure layer 23 has a micro-nanopore structure. The pore size of the micro-nanopore structure in the SiN patterned structure layer in contact with the substrate is 15 nm. The micro-nanopore structure is provided with an aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22, which separate adjacent SiN diffusion microstructures 212 and adjacent AlN diffusion microstructures 222.

[0210] The number of cycles between the SiN patterned structure layer 23 and the diffusion layer in the composite SiAlN buffer layer 2 is 8. As the number of cycles increases, the diameter of the micro-nanopores in the SiN patterned structure layer 23 decreases. Specifically, the differences in the diameters of the micro-nanopores in two adjacent cycles of the SiN patterned structure layer 23 in the thickness direction are 3 nm, 2.4 nm, 1.9 nm, 1.5 nm, 1.2 nm, 1.0 nm, 0.8 nm, 0.6 nm, and 0.5 nm, respectively.

[0211] The thickness of the aluminum-silicon-nitrogen diffusion layer 21 is 15 nm. The thickness of the silicon-aluminum-nitrogen diffusion layer 22 is 15 nm. The total thickness of the diffusion layer is 30 nm. The thickness of the SiN patterned structure layer 23 is 50 nm.

[0212] The epitaxial layer 3 includes: a nitride buffer layer 31 disposed on the composite silicon aluminum nitride buffer layer 2; a first doping layer 32 disposed on the nitride buffer layer 31; a light emitting layer 33 disposed on the first doping layer 32; and a second doping layer 34 disposed on the light emitting layer 33.

[0213] The thickness of the nitride buffer layer 31 is 5 μm, and the material of the nitride buffer layer 31 is GaN.

[0214] The thickness of the first doping layer 32 is 8 μm, and the material is GaN. The doping element in the first doping layer 32 is Si, and the doping concentration is 8×10 18 cm -3 .

[0215] The light-emitting layer 33 comprises at least a periodically overlapping arrangement of quantum well layers and quantum barrier layers. The quantum well layers are 3 nm thick and made of InGaN. The quantum barrier layers are 12 nm thick and made of GaN. The number of periods in the light-emitting layer 33 is 12.

[0216] The thickness of the second doping layer 34 is 200 nm, and the material is GaN. The doping element in the second doping layer 34 is Mg, and the doping concentration is 1×10 20 cm -3 .

[0217] This embodiment also provides a method for preparing the epitaxial wafer, which comprises:

[0218] S1: providing a substrate 1.

[0219] S102: Under the conditions of a temperature of 100° C. and a pressure of 150 torr, a Si source with a flow rate of 180 sccm and an N source with a flow rate of 120 slm are introduced to form a SiN graphic structure layer 23, and the SiN graphic structure layer 23 is grown to obtain a first semiconductor device.

[0220] S103: Under the conditions of a temperature of 900°C and a pressure of 50 torr, an aluminum source with a flow rate of 10 sccm is introduced to perform Al thermal surface treatment on the first semiconductor component. The Al thermal surface treatment time is 15 seconds to form an Al deposition layer on the SiN graphic structure layer 23 to obtain a second semiconductor component.

[0221] S104: Under the conditions of a temperature of 1400°C and a pressure of 500 torr, a silicon source with a flow rate of 10 sccm is introduced to perform Si thermal surface treatment on the second semiconductor component. The Si thermal surface treatment time is 15 seconds to form a Si deposition layer on the Al deposition layer to obtain a third semiconductor component.

[0222] S105: Under the conditions of a temperature of 1400°C and a pressure of 500 torr, a nitrogen source with a flow rate of 50 sccm is introduced to perform N thermal surface treatment on the third semiconductor component. The N thermal surface treatment time is 30 seconds, so that the Al deposition layer and the Si deposition layer form an aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22, respectively, and a non-uniform interdiffusion zone is formed at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22. The non-uniform interdiffusion zone includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 222.

[0223] S106: Steps S102 to S105 are repeated 8 times to obtain a composite silicon aluminum nitrogen buffer layer 10.

[0224] As the number of cycles increases, the flow rate of the Si source in step S21 increases successively; in any two adjacent cycles, the flow rate of the Si source in step S21 increases successively, among which the flow rates of the Si source in 5 cycles are 24 sccm, 30 sccm, 37 sccm, 47 sccm, 58 sccm, 73 sccm, 92 sccm, 115 sccm and 180 sccm respectively.

[0225] S107 : Under the conditions of a temperature of 1100° C. and a pressure of 200 torr, a nitride buffer layer 31 with a thickness of 5 μm and made of GaN is formed on the composite SiAlN buffer layer 2 .

[0226] S108: Under the conditions of temperature of 1080°C and pressure of 200 torr, a Si doping concentration of 8×10 18 cm -3 , a first doping layer 32 with a thickness of 8 μm and made of GaN.

[0227] S109: forming a nitride quantum well layer with a thickness of 3 nm and made of InGaN at a temperature of 750° C. and a pressure of 200 Torr.

[0228] S110 : forming a nitride quantum barrier layer with a thickness of 12 nm and made of GaN at a temperature of 1100° C. and a pressure of 400 torr.

[0229] S111: Steps S109 to S110 are repeated 12 times to produce a grown light-emitting layer 33.

[0230] S112: Under the conditions of temperature of 1000°C and pressure of 300 torr, a Mg doping concentration of 1×10 20 cm -3 , a second doping layer 34 with a thickness of 200 nm and made of GaN.

[0231] Example 3

[0232] Please refer to Figure 1 and Figure 4 This embodiment provides an epitaxial wafer, which includes a substrate 1, a composite silicon aluminum nitrogen buffer layer 2 and an epitaxial layer 3 stacked in sequence.

[0233] The thickness of the substrate 1 is 1000 μm, the size of the substrate 1 is 6 inches, and the material of the substrate 1 is sapphire.

[0234] See also Figure 4The composite silicon aluminum nitride buffer layer 2 includes, from the surface of the substrate 1 to the outside, a periodically arranged SiN graphic structure layer 23 and a diffusion layer; the diffusion layer includes a stacked aluminum silicon nitride diffusion layer 21 and a silicon aluminum nitride diffusion layer 22; a non-uniform interdiffusion zone is formed at the interface between the aluminum silicon nitride diffusion layer 21 and the silicon aluminum nitride diffusion layer 22, and the non-uniform interdiffusion zone includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 222.

[0235] Furthermore, the thickness of the SiN pattern structure layer 23 is equal to the thickness of the aluminum-silicon-nitrogen diffusion layer 21 .

[0236] The Al-Si-N diffusion layer 21 includes an AlN layer 211 and a SiN diffusion microstructure 212 . The Si-Al-N diffusion layer 22 includes a SiN layer 221 and an AlN diffusion microstructure 222 .

[0237] In the outward direction along the surface of the substrate 1 , the sizes of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually decrease, and the densities of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 222 gradually increase.

[0238] The SiN diffusion microstructure 212 includes: at least one SiN micro-convex structure arranged along the interface between the aluminum-silicon-nitride diffusion layer 21 and the silicon-aluminum-nitride diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitride diffusion layer 21 and the silicon-aluminum-nitride diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the SiN micro-convex structure gradually decreases.

[0239] The AlN diffusion microstructure 222 includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the AlN micro-convex structure gradually decreases.

[0240] The SiN patterned structure layer 23 has a micro-nanopore structure. The pore size of the micro-nanopore structure in the SiN patterned structure layer in contact with the substrate is 10 nm. An aluminum-silicon-nitrogen diffusion layer 21 is provided in the micro-nanopore structure, separating adjacent SiN diffusion microstructures 212.

[0241] The number of cycles between the SiN patterned structure layer 23 and the diffusion layer in the composite SiAlN buffer layer 2 is 2. As the number of cycles increases, the diameter of the micro-nanopores in the SiN patterned structure layer 23 decreases. Specifically, the difference in diameter between the micro-nanopores in two adjacent cycles of the SiN patterned structure layer 23 in the thickness direction is 6 nm.

[0242] The thickness of the aluminum-silicon-nitrogen diffusion layer 21 is 12 nm. The thickness of the silicon-aluminum-nitrogen diffusion layer 22 is 12 nm. The total thickness of the diffusion layer is 24 nm. The thickness of the SiN patterned structure layer 23 is 12 nm.

[0243] The epitaxial layer 3 includes: a nitride buffer layer 31 disposed on the composite silicon aluminum nitride buffer layer 2; a first doping layer 32 disposed on the nitride buffer layer 31; a light emitting layer 33 disposed on the first doping layer 32; and a second doping layer 34 disposed on the light emitting layer 33.

[0244] The thickness of the nitride buffer layer 31 is 5 μm, and the material of the nitride buffer layer 31 is AlGaN. The thickness of the first doping layer 32 is 2 μm, and the material is GaN. The doping element in the first doping layer 32 is Si, and the doping concentration is 1×10 18 cm -3 .

[0245] The light-emitting layer 33 comprises at least a periodically overlapping arrangement of quantum well layers and quantum barrier layers. The quantum well layers are 3 nm thick and made of InGaN. The quantum barrier layers are 20 nm thick and made of GaN. The number of periods in the light-emitting layer 33 is 15.

[0246] The thickness of the second doping layer 34 is 20 nm, and the material is GaN. The doping element in the second doping layer 34 is Mg, and the doping concentration is 1×10 21 cm -3 .

[0247] This embodiment also provides a method for preparing the epitaxial wafer, which comprises:

[0248] S101: providing a substrate 1.

[0249] S102: Under the conditions of a temperature of 1400° C. and a pressure of 500 torr, a Si source with a flow rate of 10 sccm and an N source with a flow rate of 1 slm are introduced to form a SiN pattern structure layer 23 to obtain a first semiconductor device.

[0250] S103: Under the conditions of a temperature of 1400°C and a pressure of 500 torr, an aluminum source with a flow rate of 300 sccm is introduced to perform Al thermal surface treatment on the first semiconductor component. The Al thermal surface treatment time is 5 seconds to form an Al deposition layer on the SiN graphic structure layer 23 to obtain a second semiconductor component.

[0251] S104: Under the conditions of a temperature of 500°C and a pressure of 50 torr, a silicon source with a flow rate of 300 sccm is introduced to perform Si thermal surface treatment on the second semiconductor component. The Si thermal surface treatment time is 10 seconds to form a Si deposition layer on the Al deposition layer to obtain a third semiconductor component.

[0252] S105: Under the conditions of a temperature of 500°C and a pressure of 200 torr, a nitrogen source with a flow rate of 1 sccm is introduced to perform N thermal surface treatment on the third semiconductor component. The N thermal surface treatment time is 30 seconds, so that the Al deposition layer and the Si deposition layer form an aluminum silicon nitrogen diffusion layer 21 and a silicon aluminum nitrogen diffusion layer 22, respectively, and a non-uniform interdiffusion zone is formed at the interface between the aluminum silicon nitrogen diffusion layer 21 and the silicon aluminum nitrogen diffusion layer 22. The non-uniform interdiffusion zone includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 222.

[0253] S106: Steps S21 to S24 are repeated 10 times to obtain a composite silicon aluminum nitrogen buffer layer 2.

[0254] As the number of cycles increases, the flow rate of the Si source in step S21 increases successively; wherein, the flow rates of the Si source in the two cycles are 4 sccm and 10 sccm respectively.

[0255] S107 : Under the conditions of a temperature of 1150° C. and a pressure of 100 torr, a nitride buffer layer 31 with a thickness of 5 μm and made of AlGaN is formed on the composite SiAlN buffer layer 2 .

[0256] S108: Under the conditions of temperature of 1040°C and pressure of 500 torr, a Si doping concentration of 1×10 18 cm -3 , a first doping layer 32 with a thickness of 2 μm and made of GaN.

[0257] S109: Under the conditions of a temperature of 700° C. and a pressure of 100 Torr, a nitride quantum well layer with a thickness of 3 nm and made of InGaN is formed.

[0258] S110: forming a nitride quantum barrier layer with a thickness of 20 nm and made of GaN under conditions of a temperature of 750° C. and a pressure of 100 Torr.

[0259] S111: Steps S109 to S110 are repeated 15 times to obtain a grown light-emitting layer 33.

[0260] S112: Under the conditions of temperature of 1050°C and pressure of 100 torr, a Mg doping concentration of 1×10 21 cm -3 , a second doping layer 34 with a thickness of 20 nm and made of GaN.

[0261] Example 4

[0262] This embodiment provides an epitaxial wafer. The method for preparing the epitaxial wafer of this embodiment is the same as that of Embodiment 1 except that the order of step S22 and step S23 is swapped, and thus will not be described in detail here.

[0263] Example 5

[0264] This embodiment provides an epitaxial wafer. The preparation method of the epitaxial wafer of this embodiment is the same as that of Example 1 except that the time of the N thermal surface treatment in step S24 is 10 seconds, and the details are not repeated here.

[0265] Example 6

[0266] This embodiment provides an epitaxial wafer. The preparation method of the epitaxial wafer of this embodiment is the same as that of Example 1 except that the time of the N thermal surface treatment in step S24 is 40 seconds, and will not be repeated here.

[0267] Example 7

[0268] This embodiment provides an epitaxial wafer. In the method for preparing the epitaxial wafer of this embodiment, except that the flow rate of the Si source in step S21 remains unchanged as the cycle increases, the rest is the same as that of Example 1 and will not be repeated here.

[0269] Example 8

[0270] This embodiment provides an epitaxial wafer. In the method for preparing the epitaxial wafer of this embodiment, as the cycle increases, the flow rate of the Si source in step S21 gradually increases from 100 sccm to 400 sccm. The rest is the same as in Example 1 and will not be repeated here.

[0271] Example 9

[0272] This embodiment provides an epitaxial wafer. In the method for preparing the epitaxial wafer of this embodiment, as the cycle increases, the flow rate of the Si source in step S21 is gradually reduced from 300 sccm to 100 sccm. Others are the same as in Example 1.

[0273] Comparative Example 1

[0274] This comparative example provides an epitaxial wafer, which is identical to Example 1 except that it does not contain a SiN patterned structural layer. Accordingly, step S21 is not performed in the preparation method of the epitaxial wafer of this comparative example, and the rest is identical to Example 1, which will not be described in detail.

[0275] Comparative Example 2

[0276] This comparative example provides an epitaxial wafer, which is identical to Example 1 except that it does not include a diffusion layer. Accordingly, steps S22 to S24 are omitted from the method for preparing the epitaxial wafer in this comparative example, and the remaining steps are identical to Example 1, which will not be described in detail.

[0277] Comparative Example 3

[0278] This comparative example provides an epitaxial wafer. Except for not performing step S22 in the preparation method of the epitaxial wafer of this comparative example, the rest is the same as that of Example 1, which will not be described again.

[0279] Comparative Example 4

[0280] This comparative example provides an epitaxial wafer. Except for not performing step S23 in the preparation method of the epitaxial wafer of this comparative example, the rest is the same as that of Example 1, which will not be described again.

[0281] The surface cracks and splinters of the epitaxial wafers prepared in the above embodiments and comparative examples were counted, and those without cracks and splinters were recorded as good wafers. The yield of 50 produced wafers was counted.

[0282] The nitride LED epitaxial wafers with a luminous wavelength of 460±1 nm obtained by Examples 1-9 and Comparative Examples 1-4 were tested for wavelength uniformity std by photoluminescence spectrum scanning, and the half-peak width of the (102) crystal plane diffraction peak was tested by X-ray diffractometer (XRD). Then, chips with a size of 4mil*6mil were prepared by the same chip preparation process, and the brightness and leakage yield performance tests were carried out using a chip point tester, respectively, to obtain the test results of the above embodiments and comparative examples as shown in Table 1.

[0283] Table 1

[0284]

[0285]

[0286] Where WLD is the wavelength.

[0287] From Table 1 we can see the following points:

[0288] (1) Examples 1-3 have the best wavelength uniformity, the lowest (102) crystal plane half-width, the highest brightness and leakage yield, and no cracking phenomenon occurs, indicating that the present invention can alleviate the phenomenon of cracks or even cracks on the surface of the epitaxial layer caused by excessive stress during the epitaxial growth process, thereby reducing the internal stress of the epitaxial wafer, improving the crystal quality of the epitaxial layer, reducing the scrap rate of the epitaxial wafer, and improving the production yield of the epitaxial wafer. The diffusion microstructure in the epitaxial wafer preferably gradually decreases in size or increases in density in the direction outward from the substrate surface, which can scatter light and change the path of light emitted from the nitride light-emitting layer to the substrate, thereby improving the forward light output and improving the brightness of the epitaxial wafer.

[0289] (2) Examples 4-9 have a relatively high crack yield, but the wavelength uniformity, (102) crystal plane half-width, maximum brightness and leakage yield performance are reduced to a certain extent. In Example 4, the Al thermal surface treatment and Si thermal surface treatment process steps are interchanged. Since Si atoms have higher migration activity than Al atoms, and Si atoms tend to gather near the dislocation center, the uniformity of the diffusion microstructure in the composite silicon aluminum nitrogen buffer layer is affected, resulting in uneven stress distribution in the composite silicon aluminum nitrogen buffer layer, and reducing the crystal quality of the composite silicon aluminum nitrogen buffer layer; In Example 5, the N thermal surface treatment time is insufficient, and a large number of N vacancy defects are formed in the composite buffer layer, resulting in poor quality of the composite buffer layer. In Example 6, the N thermal surface treatment time is too long, and polarity reversal occurs on the surface of the diffusion microstructure, which will cause a large difference in the surface roughness of the composite buffer layer. Both Examples 5 and 6 affect the composite silicon aluminum nitrogen. The crystal quality of the buffer layer; the flow rate of the Si source in Example 7 remains unchanged, and the composite silicon aluminum nitrogen buffer layer cannot form a gradient difference in the size of the diffusion microstructure in the thickness direction, and cannot make good use of the stress relaxation brought by the difference in microstructure size to release stress; the flow rate of the Si source in Example 8 is set too large, which will cause Si atoms to aggregate in the composite silicon aluminum nitrogen buffer layer. The Si atom itself acts as a defect to affect the crystal quality of the composite silicon aluminum nitrogen buffer layer and cause greater light absorption; the flow rate of the Si source in the Si thermal surface treatment process in Example 9 is successively reduced, which will lead to an excessive proportion of Si in the composite silicon aluminum nitrogen buffer layer close to the substrate, resulting in an increase in the stress of the composite silicon aluminum nitrogen buffer layer. At the same time, the flow rate of the Si source is successively reduced, resulting in an increase in the surface roughness of the epitaxial layer close to the light-emitting layer, resulting in more dislocations extending into the light-emitting layer; these will cause the wavelength uniformity to deteriorate, and the brightness and leakage yield performance of the epitaxial wafer will be reduced.

[0290] (3) Comparative Examples 1-4 have the lowest crack yield and the worst wavelength uniformity, (102) crystal plane half-width, the highest brightness and leakage yield performance. Comparative Example 1 does not have the SiN nano-graphic structure to limit the continuity of atomic distribution in the two-dimensional direction of the Al and Si layers in the composite silicon aluminum nitrogen buffer layer process, and cannot form a uniform diffusion microstructure in the plane, resulting in uneven stress distribution and inability to effectively scatter light through the microstructure; similarly, Comparative Examples 2-4 will reduce the relaxation of stress and light scattering effect of the diffusion microstructure, resulting in poor wavelength uniformity and reduced brightness and leakage yield performance of the epitaxial wafer.

[0291] While the present invention is described through the above-described embodiments to illustrate the detailed structural features of the present invention, the present invention is not limited to these detailed structural features, nor does it necessarily rely on these detailed structural features for implementation. Those skilled in the art should understand that any improvements to the present invention, equivalent replacements for selected components, additions of auxiliary components, and selection of specific embodiments, etc., fall within the scope of protection and disclosure of the present invention.

Claims

1. An epitaxial wafer, characterized in that: The epitaxial wafer includes a substrate, a composite silicon aluminum nitride buffer layer and an epitaxial layer stacked in sequence, wherein the composite silicon aluminum nitride buffer layer includes, from the surface of the substrate outwards, a periodically arranged SiN graphic structure layer and a diffusion layer; The diffusion layer includes an aluminum silicon nitrogen diffusion layer and a silicon aluminum nitrogen diffusion layer which are stacked; A non-uniform interdiffusion zone is formed at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer, wherein the non-uniform interdiffusion zone includes a SiN diffusion microstructure and an AlN diffusion microstructure; The aluminum-silicon-nitrogen diffusion layer includes an AlN layer and the SiN diffusion microstructure, and the silicon-aluminum-nitrogen diffusion layer includes a SiN layer and the AlN diffusion microstructure.

2. The epitaxial wafer according to claim 1, characterized in that In an outward direction along the surface of the substrate, the sizes of the SiN diffusion microstructure and the AlN diffusion microstructure gradually decrease; and / or the densities of the SiN diffusion microstructure and the AlN diffusion microstructure gradually increase.

3. The epitaxial wafer according to claim 1, characterized in that The SiN diffusion microstructure comprises: at least one SiN micro-convex structure arranged along the interface between the Al-Si-N diffusion layer and the Si-Al-N diffusion layer; wherein the cross-sectional dimensions of the SiN micro-convex structure gradually decrease along the interface between the Al-Si-N diffusion layer and the Si-Al-N diffusion layer toward the epitaxial layer; The AlN diffusion microstructure includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitride diffusion layer and the silicon-aluminum-nitride diffusion layer; wherein, along the interface between the aluminum-silicon-nitride diffusion layer and the silicon-aluminum-nitride diffusion layer toward the epitaxial layer, the cross-sectional size of the AlN micro-convex structure gradually decreases.

4. The epitaxial wafer according to any one of claims 1 to 3, characterized in that: The SiN graphic structure layer has a micro-nanopore structure.

5. The epitaxial wafer according to claim 4, characterized in that The pore diameter of the micro-nano pore structure in the SiN graphic structure layer in contact with the substrate is 10-150 nm.

6. The epitaxial wafer according to claim 4, characterized in that The micro-nano pore structure penetrates at least into the aluminum silicon nitride diffusion layer and separates adjacent SiN diffusion microstructures, or the micro-nano pore structure penetrates into both the aluminum silicon nitride diffusion layer and the silicon aluminum nitride diffusion layer and separates adjacent SiN diffusion microstructures and adjacent AlN diffusion microstructures.

7. The epitaxial wafer according to claim 4, characterized in that: The number of cycles of the SiN graphic structure layer and the diffusion layer in the composite silicon aluminum nitrogen buffer layer is 2 to 10.

8. The epitaxial wafer according to claim 7, characterized in that: As the number of cycles increases, the pore diameters of the micro-nano pores in the SiN graphic structure layer decrease successively.

9. The epitaxial wafer according to claim 8, characterized in that: The difference in pore diameters of the micro-nano pores in any two adjacent periods of the SiN graphic structure layer is 2-30 nm.

10. The epitaxial wafer according to claim 1, characterized in that: The thickness of the aluminum-silicon-nitrogen diffusion layer is 2-20 nm.

11. The epitaxial wafer according to claim 1, characterized in that: The thickness of the silicon aluminum nitrogen diffusion layer is 2 to 20 nm.

12. The epitaxial wafer according to claim 1, wherein: The total thickness of the diffusion layer is 5 to 200 nm.

13. The epitaxial wafer according to claim 1, characterized in that The thickness of the SiN graphic structure layer is 5 to 50 nm.

14. The epitaxial wafer according to claim 1, wherein: The epitaxial layer comprises: a nitride buffer layer disposed on the composite silicon aluminum nitride buffer layer; a first doping layer disposed on the nitride buffer layer; a light-emitting layer disposed on the first doped layer; A second doping layer is provided on the light emitting layer.

15. The epitaxial wafer according to claim 1, characterized in that The size of the epitaxial wafer is larger than 4 inches.

16. A method for preparing an epitaxial wafer, characterized in that: The preparation method at least comprises: providing a substrate; growing a composite silicon-aluminum-nitrogen buffer layer on the substrate; growing an epitaxial layer on the composite silicon aluminum nitrogen buffer layer; Wherein, the composite silicon aluminum nitrogen buffer layer includes, from the surface of the substrate outwards: a periodically arranged SiN graphic structure layer and a diffusion layer; The diffusion layer includes an aluminum silicon nitrogen diffusion layer and a silicon aluminum nitrogen diffusion layer which are stacked; A non-uniform interdiffusion zone is formed at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer, wherein the non-uniform interdiffusion zone includes a SiN diffusion microstructure and an AlN diffusion microstructure; The aluminum-silicon-nitrogen diffusion layer includes an AlN layer and the SiN diffusion microstructure, and the silicon-aluminum-nitrogen diffusion layer includes a SiN layer and the AlN diffusion microstructure.

17. The preparation method according to claim 16, characterized in that The method of growing a composite silicon-aluminum-nitrogen buffer layer on the substrate comprises: S21: growing a SiN pattern structure layer to obtain a first semiconductor device; S22: performing Al thermal surface treatment on the first semiconductor component to form an Al deposition layer on the SiN pattern structure layer to obtain a second semiconductor component; S23: performing Si thermal surface treatment on the second semiconductor component to form a Si deposition layer on the Al deposition layer to obtain a third semiconductor component; S24: performing N thermal surface treatment on the third semiconductor component, so that the Al deposited layer and the Si deposited layer form an aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer, respectively, and a non-uniform interdiffusion region is formed at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer, wherein the non-uniform interdiffusion region includes a SiN diffusion microstructure and an AlN diffusion microstructure; Wherein, steps S21 to S24 are repeated to obtain the composite silicon aluminum nitrogen buffer layer.

18. The preparation method according to claim 17, characterized in that: Steps S21 to S24 are repeated 2 to 10 times.

19. The preparation method according to claim 17, characterized in that The growing of the SiN graphic structure layer includes: introducing a Si source and an N source to form the SiN graphic structure layer under a first growth condition, wherein the first growth condition includes a temperature of 900-1400° C. and a pressure of 50-500 Torr.

20. The preparation method according to claim 19, characterized in that The flow rate of the Si source ranges from 10 to 300 sccm.

21. The preparation method according to claim 19, characterized in that The flow rate of the N source ranges from 1 to 100 slm.

22. The preparation method according to claim 19, characterized in that As the number of cycles increases, the flow rate of the Si source in step S21 increases successively.

23. The preparation method according to claim 22, characterized in that In any two adjacent cycles, the difference in flow rate of the Si source in step S21 is 2 to 50 sccm.

24. The preparation method according to claim 17, characterized in that The Al thermal surface treatment in step S22 includes: Under the second growth condition, an aluminum source is introduced to perform Al thermal surface treatment on the first semiconductor component, wherein the second growth condition includes a temperature of 500-900° C. and a pressure of 50-200 Torr.

25. The preparation method according to claim 24, characterized in that The flow rate of the aluminum source is 10 to 300 sccm.

26. The preparation method according to claim 24, characterized in that The Al thermal surface treatment time is 5 to 15 seconds.

27. The preparation method according to claim 17, characterized in that The Si thermal surface treatment in step S23 includes: Under the third growth condition, a silicon source is introduced to perform Si thermal surface treatment on the second semiconductor component; wherein the third growth condition includes a temperature of 500-900° C. and a pressure of 50-200 torr.

28. The preparation method according to claim 27, characterized in that The flow rate of the silicon source is 10 to 300 sccm.

29. The preparation method according to claim 27, characterized in that The time for the Si thermal surface treatment is 10 to 20 seconds.

30. The preparation method according to claim 27, characterized in that The N thermal surface treatment in step S24 includes: introducing a nitrogen source under a fourth growth condition to perform N thermal surface treatment on the third semiconductor component; wherein the fourth growth condition includes a temperature of 500-1400° C. and a pressure of 50-200 Torr.

31. The preparation method according to claim 30, characterized in that The flow rate of the nitrogen source is 20 to 100 slm.

32. The preparation method according to claim 30, characterized in that The time of the N thermal surface treatment is 15 to 30 seconds.

33. The method for preparing an epitaxial wafer according to claim 16, wherein: The epitaxial layer includes a nitride buffer layer, a first doping layer, a light-emitting layer, and a second doping layer stacked in sequence, and the preparation method further includes: growing a nitride buffer layer on the composite silicon-aluminum-nitride buffer layer; growing a first doping layer on the nitride buffer layer; growing a light-emitting layer on the first doped layer; A second doping layer is grown on the light emitting layer.

34. The method for preparing an epitaxial wafer according to claim 33, wherein: The growing of the nitride buffer layer includes forming the nitride buffer layer under a fifth growing condition, wherein the fifth growing condition includes a temperature of 1050-1150° C. and a pressure of 100-500 Torr.

35. The method for preparing an epitaxial wafer according to claim 33, wherein: The thickness of the nitride buffer layer is 1-5 μm.

36. The method for preparing an epitaxial wafer according to claim 33, wherein: The growing of the first doping layer comprises: forming a first doping layer having a first doping concentration under a sixth growth condition, wherein the sixth growth condition comprises a temperature of 1040-1140° C. and a pressure of 100-500 Torr, and the first doping concentration is 1×10 18 cm -3 ~8×10 18 cm -3 .

37. The method for preparing an epitaxial wafer according to claim 33, wherein: The thickness of the first doping layer is 2-8 μm.

38. The method for preparing an epitaxial wafer according to claim 33, wherein: The growing of the light emitting layer includes: forming the growing light emitting layer under a seventh growing condition, wherein the seventh growing condition includes a temperature of 700-1200° C. and a pressure of 100-500 Torr.

39. The method for preparing an epitaxial wafer according to claim 33, wherein: The light-emitting layer at least includes a nitride quantum well layer and a nitride quantum barrier layer that are periodically and repeatedly overlapped; wherein the number of periods of the periodic and repeated overlap is 2 to 15.

40. The method for preparing an epitaxial wafer according to claim 39, wherein: Growing the nitride quantum well layer includes: forming the nitride quantum well layer under an eighth growth condition, wherein the eighth growth condition includes a temperature of 700-1150° C. and a pressure of 100-500 Torr.

41. The method for preparing an epitaxial wafer according to claim 39, wherein: Growing the nitride quantum barrier layer includes: forming the nitride quantum barrier layer under a ninth growth condition, wherein the ninth growth condition includes a temperature of 750-1200° C. and a pressure of 100-500 Torr.

42. The method for preparing an epitaxial wafer according to claim 33, wherein: The growing of the second doping layer comprises: forming a second doping layer having a second doping concentration under a tenth growth condition, wherein the tenth growth condition comprises a temperature of 950-1050° C. and a pressure of 100-600 Torr, and the second doping concentration is 1×10 19 cm -3 ~1×10 21 cm -3 .

43. The method for preparing an epitaxial wafer according to claim 33, wherein: The thickness of the second doping layer is 20-300 nm.

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