Display panel and preparation method thereof

Abstract

The application discloses a display panel, which comprises a driving substrate layer and a light-emitting element layer stacked in the thickness direction, wherein the light-emitting element layer comprises a plurality of Micro LEDs arranged in multiple rows and multiple columns; the light-emitting element layer further comprises a seed layer, a plurality of first openings are formed on the seed layer, the cross section of the first opening is configured as a multi-angle star shape, the first opening has a sharp bottom, and the opening of the first opening faces the driving substrate layer; each Micro LED corresponds to at least one first opening, a part of the Micro LED corresponding to the first opening is formed with a second opening, and a plurality of first openings are arranged in multiple rows and multiple columns. The application further provides a preparation method of the display panel. The application has the advantages of controllable yield and high production efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, and in particular to a display panel and a preparation method of the display panel. BACKGROUND

[0002] The Micro LED display panel displays by using Micro LED as light-emitting pixels. The Micro LED display panel has the advantages of self-emission, high efficiency, low power consumption, high integration, high stability, and all-weather work.

[0003] How to improve the production efficiency of the Micro LED display panel has been pursued in the field. SUMMARY

[0004] The present application aims to solve one of the problems in the related art to some extent. To this end, the present application provides a display panel and a preparation method of the display panel. The preparation method of the display panel has the advantages of controllable yield and high production efficiency.

[0005] In order to achieve the above-mentioned purpose, as a first aspect of the present application, a display panel is provided, the display panel comprising a driving substrate layer and a light-emitting element layer stacked in a thickness direction, the light-emitting element layer comprising a plurality of Micro LEDs arranged in multiple rows and multiple columns, wherein the display panel further comprises a seed layer, a plurality of first openings are formed on the seed layer, the first openings have a cross-sectional structure of a multi-angle star, the first openings have sharp bottoms, and the openings of the first openings face the driving substrate layer, each of the Micro LEDs corresponds to at least one of the first openings, a second opening is formed on the part of the Micro LED corresponding to the first opening, and a plurality of the first openings are arranged in multiple rows and multiple columns.

[0006] Optionally, the light-emitting element layer comprises a plurality of pixel units, each of the pixel units comprises a plurality of Micro LEDs, and the Micro LEDs in the same pixel unit can emit light of multiple different colors.

[0007] Optionally, the pixel unit comprises a red Micro LED, a blue Micro LED, and a green Micro LED.

[0008] Optionally, the pixel unit comprises two green Micro LEDs, and the two green Micro LEDs in the same pixel unit are located in the same column.

[0009] Optionally, the driving substrate layer comprises a thin film transistor array layer and an anode pattern layer stacked along the thickness direction, the light emitting element layer is arranged on the anode pattern layer, the anode pattern layer comprises a plurality of anodes, each of the plurality of anodes corresponds to one of the plurality of Micro LEDs, and the anode is electrically connected to a corresponding thin film transistor in the thin film transistor array layer.

[0010] Optionally, the anode pattern layer further comprises a dielectric material layer, and the dielectric material layer is formed with anode vias corresponding to the plurality of anodes, and the anodes are filled in the corresponding anode vias.

[0011] Optionally, the first opening is hexagonal in cross-section.

[0012] Optionally, the sidewall of the first opening is covered with a material for forming the light emitting element layer.

[0013] Optionally, the first opening is filled with a dielectric material.

[0014] As a second aspect of the present application, a preparation method of a display panel is provided, wherein the preparation method comprises:

[0015] providing a substrate layer;

[0016] forming a seed layer on the substrate layer;

[0017] forming a mask layer on the seed layer;

[0018] patterning the mask layer to obtain a first mask pattern having a plurality of circular openings;

[0019] etching the seed layer with the first mask pattern as a mask to form a plurality of first openings on the seed layer, the first opening is polygonal in cross-section, and from top to bottom, the cross-sectional area of the first opening gradually decreases, and the first opening has a sharp bottom, and a plurality of the first openings are arranged in multiple rows and multiple columns;

[0020] epitaxially growing on the side of the seed layer away from the substrate layer to obtain a light emitting chip comprising a plurality of Micro LEDs, each of the Micro LEDs corresponds to at least one of the first openings, and a second opening is formed on the Micro LED corresponding to the first opening, and a plurality of the first openings are arranged in multiple rows and multiple columns;

[0021] binding the light emitting chip with a driving substrate.

[0022] Optionally, the epitaxial growth on the side of the seed layer away from the substrate layer to obtain a light emitting chip comprising a plurality of Micro LEDs comprises:

[0023] forming a first light emitting element mask pattern on the seed layer, the first light emitting element mask pattern having a plurality of first light emitting element openings formed thereon, the first light emitting element openings corresponding to the plurality of first openings;

[0024] depositing a first light emitting material to form Micro LEDs in the first light emitting element openings, the Micro LEDs in the first light emitting element openings having a light emitting color matching the first light emitting material;

[0025] removing the first light emitting element mask pattern to form a first dielectric material layer;

[0026] performing patterning on the first dielectric material layer to obtain a second light emitting element mask pattern, the second light emitting element mask pattern having a plurality of second light emitting element openings formed thereon, the second light emitting element openings corresponding to the plurality of first openings;

[0027] depositing a second light emitting material to form Micro LEDs in the second light emitting element openings, the Micro LEDs in the second light emitting element openings having a light emitting color matching the second light emitting material;

[0028] removing the second light emitting element mask pattern to form a second dielectric material layer;

[0029] performing patterning on the second dielectric material layer to obtain a third light emitting element mask pattern, the third light emitting element mask pattern having a plurality of third light emitting element openings formed thereon, the third light emitting element openings corresponding to the plurality of first openings;

[0030] depositing a third light emitting material to form Micro LEDs in the third light emitting element openings, the Micro LEDs in the third light emitting element openings having a light emitting color matching the third light emitting material.

[0031] Optionally, the binding of the light emitting chip and the driving substrate comprises:

[0032] forming an anode pattern layer, the anode pattern layer comprising a dielectric material layer and a plurality of anodes, the dielectric material layer having a plurality of anode vias formed thereon, the plurality of anode vias being arranged in the plurality of anode vias one by one, and the plurality of anode vias corresponding to the plurality of Micro LEDs one by one;

[0033] The thin film transistor array chip is attached, wherein the thin film transistor array chip comprises a thin film transistor array layer, and the anode is electrically connected with a corresponding thin film transistor in the thin film transistor array layer, and the driving substrate comprises the anode pattern layer and the thin film transistor array layer.

[0034] Optionally, the preparation method further comprises:

[0035] The substrate layer is removed;

[0036] A transparent electrode layer is formed, wherein the transparent electrode layer is attached to the seed layer.

[0037] In the embodiment of the present application, the light emitting element layer is formed on the seed layer by epitaxial growth.

[0038] Before the step of epitaxial growth, a plurality of first openings with a polygonal star shape in cross section are formed on the seed layer, and each corner is a V-shaped defect for releasing stress accumulated in the material system. The stress in the region of the seed layer 211 where the first openings are not formed has been released, so that more In can be doped. Specifically, after the stress generated at the interface is released through the first openings and the second openings, In atoms are more easily doped into the quantum well and grow into InGaN material with high In content, thereby enabling the Micro LED to emit light with the required light emitting wavelength and efficiency and emit light of the corresponding color.

[0039] Since the first openings are polygonal star-shaped, the formation process is easier to control, that is, when preparing the Micro LED provided in the embodiment of the present application, the number, position and density of V-shaped defects in the seed layer are controlled by forming the first openings with a polygonal star shape, so that the epitaxial growth process can be better controlled, the doping rate of In can be improved, and finally the yield of manufacturing the Micro LED can be improved.

[0040] These features and advantages of the present application will be disclosed in detail in the following specific embodiments and drawings. The best embodiment or means of the present application will be fully represented in conjunction with the drawings, but it is not a limitation on the technical solutions of the present application. In addition, these features, elements and components appearing in each of the following text and drawings are multiple, and different symbols or numbers are marked for convenience of representation, but all represent the same or similar structure or function parts. BRIEF DESCRIPTION OF DRAWINGS

[0041] The present application will be further described below in conjunction with the drawings:

[0042] Figure 1 Structure schematic diagram of the display panel provided in the embodiment of the present application;

[0043] Figure 2This is a schematic diagram illustrating the pixel unit arrangement in the display panel provided in an embodiment of the present invention;

[0044] Figure 3 This is a partial structural diagram of the display panel provided in an embodiment of the present invention;

[0045] Figure 4 This is a top view diagram showing the formation of the first mask pattern on the seed layer.

[0046] Figure 5 yes Figure 4 A top-down view;

[0047] Figure 6 This is a schematic diagram showing the formation of the first opening on the seed layer;

[0048] Figure 7 This is a top view showing the shape of the first opening;

[0049] Figure 8 This is a schematic diagram showing the opening of the first light-emitting element in the mask pattern of the first light-emitting element;

[0050] Figure 9 This is a top view showing the opening of the first light-emitting element;

[0051] Figure 10 This is a schematic diagram showing the formation of the blue light-emitting element;

[0052] Figure 11 This is a top-view diagram showing the blue light-emitting element;

[0053] Figure 12 This is a schematic diagram showing the opening of the second light-emitting element in the mask pattern of the second light-emitting element;

[0054] Figure 13 This is a top view showing the opening of the second light-emitting element;

[0055] Figure 14 This is a schematic diagram showing the formation of the green light-emitting element;

[0056] Figure 15 This is a top-down view showing the green light-emitting element;

[0057] Figure 16 This is a schematic diagram after removing the mask pattern of the second light-emitting element;

[0058] Figure 17 This is a top view diagram after removing the mask pattern of the second light-emitting element;

[0059] Figure 18 This is a schematic diagram after the dielectric material layer has been formed;

[0060] Figure 19is a schematic view showing an anode via hole;

[0061] Figure 20 is a schematic view after forming an anode;

[0062] Figure 21 is a schematic view after attaching a driving circuit board chip;

[0063] Figure 22 is a schematic view after removing a substrate. DETAILED DESCRIPTION

[0064] Embodiments of the present application are described in detail below with reference to examples illustrated in the accompanying drawings, in which the same or like reference numerals represent the same or like elements throughout. Based on the embodiments in the embodiments, it is intended to explain the present application, and cannot be understood as a limitation of the present application.

[0065] In this specification, "one embodiment" or "an embodiment" or "example" or "exemplary" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment.

[0066] In the preparation of red light Micro LED, epitaxial growth of red light InGaN quantum well is a difficulty. The main reason is that the volume of In atom is large, and when there is a large stress in the material system, it is difficult for In atom to be doped into the quantum well. In the related art, at most 30% of In content can be achieved. However, red light LED needs more than 35% of In content to achieve it.

[0067] Therefore, how to increase the In content in the InGaN quantum well has become a technical problem to be solved in the field.

[0068] V-type defects are a kind of bulk defects commonly existing in gallium nitride materials, which are mainly derived from lattice mismatch and other factors. Especially in the preparation process of LED epitaxial structure, due to the low growth temperature, the growth between layers is destroyed, and V-type defects are easily formed in the quantum well region. After the formation of such V-type defects, when the light emitting element layer is formed, In atoms are more likely to be doped into the quantum well, so as to realize the generation of red light.

[0069] However, the process of forming V-type defects in the prior art is completely uncontrollable, resulting in uncontrollable size and density of the formed V-type defects, and therefore cannot be applied to large-scale production.

[0070] Therefore, as a first aspect of the present application, as Figure 1As shown, a display panel is provided, which includes a driving substrate layer 100 and a light emitting element layer 200 stacked in a thickness direction, and the light emitting element layer 200 includes a plurality of Micro LEDs arranged in multiple rows and multiple columns, wherein the light emitting element layer further includes a seed layer 211, and a plurality of first openings 210 are formed on the seed layer 211, as shown. Figure 2 As shown, the first opening 210 has a cross-sectional structure of a multi-angle star shape. As shown, Figure 1 As shown, the first opening 210 has a sharp bottom, and the opening of the first opening 210 faces the driving substrate layer 100, and each of the Micro LEDs corresponds to at least one first opening 210, as shown, Figure 3 As shown, a second opening 221 is formed on the Micro LED corresponding to the first opening 210, and a plurality of the first openings are arranged in multiple rows and multiple columns.

[0071] In the embodiment of the present application, the light emitting element layer (for example, a red light emitting element layer, a green light emitting element layer, and a blue light emitting element layer) is formed on the seed layer 211 by epitaxial growth.

[0072] Before the step of epitaxial growth, a plurality of first openings 210 with a cross-sectional structure of a multi-angle star shape are formed on the seed layer 211, and each of the V-shaped defects at each angle is used to release the stress accumulated in the material system. The stress in the region of the seed layer 211 where the first opening 210 is not formed has been released, so that more In can be doped. Specifically, after the stress generated at the interface is released through the first opening 210 and the second opening 221, In atoms are more easily doped into the quantum well and grow into InGaN material with high In content, thereby enabling the Micro LED (for example, a red light Micro LED) to emit light with a required light emitting wavelength and efficiency, and emit light of a corresponding color (for example, red light with a wavelength of 620-625 nm).

[0073] Since the first opening 210 is a multi-angle star shape, its formation process is easier to control, that is, when preparing the Micro LED provided in the embodiment of the present application, the number, position and density of V-shaped defects in the seed layer 211 are controlled by forming the first opening 210 with a multi-angle star shape, so that the process of epitaxial growth can be better controlled, and the doping rate of In is improved, and finally the yield of manufacturing the Micro LED is improved.

[0074] The cross section of the first opening 210 is designed as a multi-angle star shape, and the configuration of the multi-angle star shape means that the edge of the first opening 210 has multiple vertices and edges, so that the second opening 221 formed by epitaxial growth is also configured to have multiple vertices and edges. This structure helps to disperse stress to multiple points instead of concentrating in a single location, further reducing stress concentration phenomenon, thereby improving the quality and light emitting efficiency of the Micro LED.

[0075] The plurality of first openings 210 form a first opening array, and the plurality of second openings 221 form a second opening array, further enhancing the stress release effect. The first openings 210 in the present application also adopt a relatively regular array layout, so that the stress distribution is more uniform, and the accuracy and repeatability of each process in the manufacturing process can be ensured, thereby improving the manufacturing efficiency and making the Micro LED chip easier to mass produce.

[0076] In the embodiments of the present application, the specific shape of the first opening 210 is not specially limited, as long as it has multiple acute angles on the cross section to form a V-shaped defect for releasing stress.

[0077] In the embodiments of the present application, the first opening 210 can be formed on the seed layer 211 by an etching process. By controlling the process parameters in the etching process, different etching ratios in different directions can be achieved to form the first opening 210 on the seed layer 211.

[0078] Optionally, the material of the seed layer 211 can be a metal material or a semiconductor material, and such material is easy to form a hole with a hexagonal star-shaped cross section. Therefore, as an optional embodiment, the cross section of the first opening 210 is hexagonal star-shaped. It should be noted that the shape of the first opening 210 mainly depends on the material of the seed layer 211 and the determination of appropriate etching process conditions, and combines with real-time monitoring and feedback adjustment mechanism, and then a regular opening shape is prepared on the seed layer 211.

[0079] In the embodiments of the present application, the type of material in the first opening 210 is not specially limited. As an optional embodiment, the sidewall of the first opening 210 is covered with a material for forming a light emitting element layer. That is, after the first opening 210 is formed, the light emitting element layer is directly formed by an epitaxial growth process, so as to reduce the process difficulty and improve the efficiency of preparing the Micro LED.

[0080] For the display panel, the light emitting element layer includes a plurality of pixel units, the pixel unit includes a plurality of Micro LEDs, and the Micro LEDs in the same pixel unit can emit light of multiple different colors.

[0081] The pixel unit can include a red Micro LED, a green Micro LED, and a blue Micro LED.

[0082] In the embodiment shown in Figure 2 , the pixel unit includes a red Micro LED 220R, two green Micro LEDs 220G, and a blue Micro LED 220B, and the two green Micro LEDs 220G of the same pixel unit are located in the same column to enhance the display effect of the display panel.

[0083] It should be noted that, although in the embodiment shown in Figure 2 , each Micro LED corresponds to four first openings 210, the present application is not limited thereto.

[0084] In the embodiment of the present application, the specific structure of the driving substrate layer 100 is not specially limited. The driving substrate layer includes a thin film transistor array layer 110 and an anode pattern layer 120 stacked in the thickness direction, and the light emitting element layer is arranged on the anode pattern layer 120. As shown in Figure 20 , the anode pattern layer 120 includes a plurality of anodes 122, each of which corresponds to a plurality of Micro LEDs one-to-one, and the anode 122 is electrically connected to the corresponding thin film transistor in the thin film transistor array layer.

[0085] In the embodiment of the present application, the anode 122 is formed of a metal material. Alternatively, the material of the anode 122 can be selected from at least one of Al, Cu, Ti, Ni, Au, and Ag.

[0086] The thin film transistor array layer can include a plurality of pixel circuits corresponding to a plurality of Micro LEDs one-to-one, and the corresponding Micro LED can be driven to emit light by the pixel circuit.

[0087] In order to facilitate manufacturing, the anode pattern layer 120 can also include a dielectric material layer 121, as shown in Figure 20 , the dielectric material layer 121 has anode vias corresponding to a plurality of anodes 122 one-to-one, and the anode 122 is filled in the corresponding anode via.

[0088] In the embodiment of the present application, the specific material of the dielectric material layer 121 is not specially limited, as long as it can play the role of insulation and spacing. For example, the material of the dielectric material layer 121 can be selected from one or more of SiO2, SiNx, SiOCN, SiOC, and other dielectric materials.

[0089] The dielectric material layer 121 can be a single-layer structure or a multilayer structure composed of multiple sublayers. Optionally, the thickness of the dielectric material layer 121 is between 500 nm and 2500 nm.

[0090] In this embodiment of the invention, the type of material within the first opening 210 is not specifically limited. As an optional implementation, the sidewalls of the first opening 210 are covered with a material for forming the light-emitting element layer. That is, after the first opening 210 is formed, the light-emitting element layer is directly formed through an epitaxial growth process, thereby reducing the process difficulty and improving the efficiency of Micro LED fabrication.

[0091] like Figure 20 As shown, light-emitting element layers are grown on both the sidewalls of the first aperture 210 and the top surface of the seed layer 211. However, during the epitaxial growth process, the growth rate of the sidewalls of the first aperture 210 is much lower than the growth rate of the top surface of the seed layer 211. Therefore, the thickness of the light-emitting element layer 3 grown on the sidewalls of the first aperture 210 is much smaller than the thickness of the light-emitting element layer grown on the top surface of the seed layer 211. The light-emitting element layer grown on the sidewalls of the first aperture 210 can inject more holes into the quantum well, change the emission angle, and reduce the influence of total internal reflection angle on light emission, thereby improving luminous efficiency and luminous intensity.

[0092] Of course, the embodiments of the present invention are not limited to this, and the material forming the light-emitting element layer may not be provided in the first opening. In this embodiment, the first opening 210 may be filled with a dielectric material first.

[0093] In this embodiment, the first opening 210 is filled with dielectric material, that is, the inside of the first opening 21 is occupied by dielectric material. Therefore, the light-emitting element layer cannot grow in the first opening 210, but grows on the plane (top surface) of the seed layer 211 which is not covered by dielectric material. Thus, the Micro LED produced reduces leakage channels, improves electric field distribution, and improves device reliability.

[0094] The following section will describe how to fill the first opening 210 with dielectric material; details will not be elaborated here.

[0095] In this embodiment of the invention, the depth of the first opening 210 is not specifically limited. Optionally, the depth of the first opening is between 200 nm and 10000 nm.

[0096] When the depth of the first opening 210 is less than 200 nm, the injection path of the holes is limited, making it difficult for the holes to be effectively transmitted from the electrode to the light-emitting layer, thereby affecting the light-emitting efficiency and brightness of the chip. Moreover, the shallow first opening 210 is not convenient for releasing interface stress. When the depth of the first opening 210 is less than 1000 nm, the leakage path inside the Micro LED is not increased, and the current is more likely to pass through the intended path, avoiding the occurrence of the leakage phenomenon.

[0097] In the embodiments of the present application, the specific structure and material of the light-emitting element layer are not specially limited. As an optional implementation, the light-emitting element layer includes a superlattice layer, an n-type semiconductor layer, a barrier layer, a quantum well layer, and a p-type semiconductor layer arranged in sequence, and the superlattice layer is formed on the seed layer.

[0098] In the present embodiment, the superlattice layer is usually composed of thin layers of two or more different materials grown alternately, with a thickness usually in the nanometer scale. This structure can introduce a periodic potential barrier and potential well to improve the injection efficiency and transport characteristics of carriers. The n-type semiconductor layer is an electron-rich layer mainly formed by donor impurity doping. In an LED, the n-type semiconductor layer serves as an electron injection layer, responsible for injecting electrons from an external circuit into the light-emitting region. This layer usually has a high electron mobility and a low resistivity to ensure that electrons can be efficiently transmitted to the quantum well layer. The barrier layer is usually located between the n-type semiconductor layer and the quantum well layer, or between the quantum well layers (if there are multiple quantum wells), and its main function is to limit the recombination of carriers (electrons and holes) in the quantum well layer, thereby improving the radiative recombination efficiency and reducing non-radiative recombination losses. The barrier layer has a high bandgap energy and can form a potential barrier for carriers, making them more likely to recombine and emit light in the quantum well layer. The quantum well layer is the core light-emitting region, formed by thin semiconductor layers (usually low-bandgap materials) sandwiched between wider barrier layers. Due to the quantum size effect, the carriers (electrons and holes) in the quantum well layer are confined in two-dimensional space, increasing the probability of their mutual collision and recombination to emit light. By adjusting the thickness, material, and composition of the quantum well layer, the wavelength and spectral characteristics of the LED can be precisely controlled. The p-type semiconductor layer is a hole-rich layer mainly formed by acceptor impurity doping. In an LED, the p-type semiconductor layer serves as a hole injection layer, responsible for injecting holes from an external circuit into the light-emitting region. Similar to the n-type semiconductor layer, the p-type semiconductor layer also needs to have a high hole mobility and a low resistivity to ensure that holes can be efficiently transmitted to the quantum well layer and recombine with electrons to emit light.

[0099] As a second aspect of the present application, a method for manufacturing a display panel is provided, wherein the method comprises:

[0100] In step S210, a substrate layer is provided;

[0101] In step S220, a seed layer is formed on the substrate layer;

[0102] In step S230, a mask layer is formed on the seed layer;

[0103] In step S240, the mask layer is patterned to obtain a first mask pattern having a plurality of circular openings;

[0104] In step S250, the seed layer is etched with the first mask pattern as a mask to form a plurality of first openings on the seed layer, the first openings have a polygonal star shape in cross section, and from top to bottom, the cross-sectional area of the first openings gradually decreases, and the first openings have a sharp bottom, and a plurality of the first openings are arranged in multiple rows and multiple columns;

[0105] In step S260, epitaxial growth is performed on the side of the seed layer away from the substrate layer to obtain a light-emitting chip including a plurality of Micro LEDs, each of the Micro LEDs corresponds to at least one of the first openings, and a second opening is formed on the Micro LED corresponding to the first opening, and a plurality of the first openings are arranged in multiple rows and multiple columns;

[0106] In step S270, the light-emitting chip is bonded with a driving substrate.

[0107] The preparation method provided by the embodiment of the present application can prepare the display panel provided by the first aspect of the present application.

[0108] As described above, because the first opening is a polygonal star shape, its formation process is easier to control, that is, when preparing the Micro LED in the light-emitting layer provided by the embodiment of the present application, the number, position and density of V-type defects in the seed layer are controlled by forming the first opening in the polygonal star shape, so that the epitaxial growth process can be better controlled, and the doping rate of In can be improved, and finally the yield of manufacturing Micro LED can be improved.

[0109] In the embodiment of the present application, the substrate layer can be a sapphire substrate, a silicon substrate or a silicon carbide substrate, etc.

[0110] In the embodiment of the present application, the material of the seed layer is not specially limited. The material of the seed layer can be a metal material such as copper or titanium, or a semiconductor material such as zinc oxide. The seed layer is the basis for epitaxial growth, and is usually a thin film prepared on the surface of the substrate layer by physical vapor deposition, chemical vapor deposition or other methods, which provides a starting point and guidance for the growth of subsequent new crystal materials.

[0111] As an optional implementation, the mask layer is made of SiO2; in other embodiments, the mask layer material may also be selected from SiN. X One or more of SiCN, SiOCN, and SiOC are used. The function of the mask layer is to isolate and protect specific areas in the seed layer. The appropriate process is selected based on the type of mask layer chosen to form the mask layer on the seed layer.

[0112] The mask layer can be formed by any of the following deposition methods: chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD). As an optional implementation method, the thickness of the mask layer can be between 50 nm and 500 nm, and the process temperature of the deposition process can be between 200 °C and 750 °C.

[0113] like Figure 4 and Figure 5 As shown, a seed layer 211 is formed on a substrate layer 500, and a mask pattern 400 is formed on the seed layer 211. A circular opening 410 extending through the mask pattern 400 along its thickness direction is formed on the mask pattern 400. In this embodiment of the invention, the number of first openings corresponding to each light-emitting element is not specifically limited. Since the light-emitting element is a MicroLED, the size of the first opening is determined. As an optional implementation, the diameter of the circular opening 410 can be between 100 nm and 2000 nm, thereby allowing each MicroLED to correspond to at least four first openings.

[0114] The mask layer can be patterned using photolithography to obtain a mask pattern 400 with multiple circular openings. Specifically, an exposure machine can be used to project the desired pattern onto the mask layer, or a laser can be used to directly etch the desired pattern onto the mask layer, followed by an etching process to form multiple circular openings on the mask layer. It should be noted that after patterning, the circular openings should penetrate the mask layer along its thickness direction, but the etching depth should be controlled to avoid etching into the seed layer.

[0115] like Figure 6 and Figure 7As shown, by controlling the process parameters in the etching process, different etching ratios in different directions can be achieved to form the first openings 210 in the shape of a star on the seed layer 211. The seed layer 211 is etched by using the mask pattern as a mask, and a plurality of first openings 210 are formed on the seed layer 211 by precisely controlling the etching process parameters. Specifically, the cross section of the first openings 210 in this embodiment is in the shape of a hexagonal star. In this embodiment, KOH is selected for wet etching of the seed layer 211. In other embodiments, one or more of NaOH, NH3OH, DHF, BOE, HCl, and HNO3 can be selected for wet etching. As described above, the depth of the deepest part of the first openings 210 can be between 200 nm and 1000 nm.

[0116] After the first openings are formed, the mask pattern 400 can be removed. In embodiments of the present application, the mask pattern 400 on the seed layer can be removed by dry etching, wet etching, or the like.

[0117] In embodiments of the present application, how to specifically perform step S260 is not particularly limited, as long as a plurality of Micro LEDs can be grown. Alternatively, as shown in Figure 8 to Figure 17 In embodiments of the present application, how to specifically perform step S260 is not particularly limited, as long as a plurality of Micro LEDs can be grown. Alternatively, as shown in

[0118] A first light emitting element mask pattern 410 is formed on the seed layer, and a plurality of first light emitting element openings 411 are formed on the first light emitting element mask pattern 410, the first light emitting element openings 411 corresponding to the plurality of first openings 210 (see Figure 8 and Figure 9 );

[0119] A first light emitting material is deposited to form Micro LEDs in the first light emitting element openings, the light emitting color of the Micro LEDs in the first light emitting element openings matching the first light emitting material;

[0120] The first light emitting element mask pattern is removed to form a first dielectric material layer;

[0121] The first dielectric material layer is patterned to obtain a second light emitting element mask pattern 420 (see Figure 12 ), and a plurality of second light emitting element openings 421 are formed on the second light emitting element mask pattern, the second light emitting element openings 421 corresponding to the plurality of first openings (see Figure 13 );

[0122] depositing a second light emitting material to form a Micro LED in the second light emitting element opening, the light emitting color of the Micro LED in the second light emitting element opening matching the second light emitting material;

[0123] as shown in Figure 16 and Figure 17 removing the second light emitting element mask pattern to form a third dielectric material layer;

[0124] patterning the third dielectric material layer to obtain a third light emitting element mask pattern, the third light emitting element mask pattern having a plurality of third light emitting element openings formed thereon, the third light emitting element openings corresponding to the plurality of first openings;

[0125] depositing a third light emitting material to form a Micro LED in the third light emitting element opening, the light emitting color of the Micro LED in the third light emitting element opening matching the third light emitting material.

[0126] The material of the first light emitting element mask pattern 410 can be selected from one or more of SiO2, SiN X , SiCN, SiOCN, SiOC.

[0127] The first light emitting element mask pattern 410 can be formed by any one of chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD). As an optional embodiment, the thickness of the first light emitting element mask pattern 410 can be between 50 nm and 500 nm, and the process temperature of the deposition process can be between 200°C and 750°C.

[0128] Epitaxial growth is performed on the side of the seed layer 211 away from the substrate layer 500 to obtain a light emitting element layer. Epitaxial growth is the growth of a single crystal film, such as a red Micro LED, on a seed layer 211 (single crystal substrate). The red Micro LED 220R grows in the crystal phase of the seed layer 211, and its crystal structure is an extension of the crystal structure of the seed layer 211. By selecting a substrate with a specific crystal orientation and orientation, the epitaxial layer can be guided to grow in a specific direction. The crystalline quality, thickness, and uniformity of the seed layer 211 have an important influence on epitaxial growth. A seed layer 211 with good crystalline quality can guide the growth of new crystal materials in a specific direction to obtain high-quality crystals. In addition, growth parameters such as temperature, pressure, and atmosphere need to be precisely controlled to ensure that the growth rate and morphology of the crystal meet the requirements. For example, too high a temperature can cause an increase in crystal defects, while too low a temperature can result in a slow growth rate. During crystal growth, measures need to be taken to reduce the introduction of impurities and defects. These impurities and defects can adversely affect the electrical, optical, and magnetic properties of the crystal.

[0129] The epitaxial growth mechanism of green Micro LED 220G and blue Micro LED 220B is the same as that of red Micro LED 220R, and will not be elaborated here.

[0130] As an alternative implementation, after depositing the material of the first light-emitting element mask pattern, the formed material layer can be smoothed using a CMP process to obtain the first light-emitting element mask layer. Subsequently, a patterning process (e.g., using a patterning process combining photolithography and dry etching) can be performed on the first light-emitting element mask layer to obtain the first light-emitting element mask pattern 410.

[0131] Specifically, in Figure 10 and Figure 11 In the embodiments described herein, the Micro LED in the opening of the first light-emitting element is a blue Micro LED 220B. The blue Micro LED 220B is formed by an epitaxial growth process. The structure of the blue Micro LED 220B includes, but is not limited to, a superlattice layer (AlGaN / GaN, 10nm-500nm), an n-type (In)GaN layer (200nm-800nm), a carrier barrier layer AlGaN (5nm-20nm), a high In composition quantum well layer InGaN (2nm-10nm), a p-type (In)GaN layer (50-300nm), etc., and the epitaxial growth process temperature is between 600℃ and 1100℃.

[0132] exist Figure 14 and Figure 15 In the embodiment shown, the Micro LED in the opening of the second light-emitting element is a green Micro LED 220G. The green Micro LED 220G is formed by epitaxial growth. The structure of the green Micro LED 220G includes, but is not limited to, a superlattice layer (AlGaN / GaN, 10nm-500nm), an n-type (In)GaN layer (200nm-800nm), a carrier barrier layer AlGaN (5nm-20nm), a high In composition quantum well layer InGaN (2nm-10nm), a p-type (In)GaN layer (50-300nm), etc., and the epitaxial growth process temperature is between 600℃ and 1100℃.

[0133] After forming the green Micro LED 220G, the mask pattern 420 of the second light-emitting element can be removed by wet etching.

[0134] The material of the third dielectric layer is selected from SiO2 and SiN. XOne or more of SiCN, SiOCN, and SiOC.

[0135] The third dielectric material layer can be formed by any one of chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD). As an optional implementation, the thickness of the third dielectric material layer can be between 50 nm and 500 nm, and the deposition process temperature can be between 200 °C and 750 °C.

[0136] As an alternative implementation, a third dielectric material can be deposited first, and then smoothed using a CMP process to obtain a third dielectric material layer.

[0137] In this embodiment, the substrate layer 500 is a silicon substrate. In other embodiments, the substrate may also be a sapphire substrate or a silicon carbide substrate, etc.

[0138] In this embodiment of the invention, no special limitation is placed on how the light-emitting chip is bonded to the driving substrate. For example, bonding can be achieved by mass transfer of the Micro LED on the light-emitting chip to the driving substrate. As an optional implementation method, such as... Figure 20 As shown, the bonding of the light-emitting chip to the driving substrate includes:

[0139] An anode pattern layer is formed, the anode pattern layer including a dielectric material layer 121 and a plurality of anodes 122. A plurality of anode vias are formed on the dielectric material layer 121, penetrating the dielectric material layer along the thickness direction. The plurality of anode vias are disposed in the plurality of anode vias in a one-to-one correspondence, and the plurality of anode vias correspond to the plurality of Micro LEDs in a one-to-one correspondence.

[0140] like Figure 21 As shown, a thin-film transistor array chip is attached, wherein the thin-film transistor array chip includes a thin-film transistor array layer 110, and the anode is electrically connected to the corresponding thin-film transistor in the thin-film transistor array layer. The driving substrate includes the anode pattern layer and the thin-film transistor array layer.

[0141] As an optional implementation, forming the anode pattern layer may include:

[0142] like Figure 18 As shown, a dielectric material layer 121 is formed;

[0143] like Figure 19 As shown, a plurality of anode vias are formed on the dielectric material layer 121;

[0144] like Figure 20 As shown, multiple anodes 122 are formed.

[0145] The dielectric material layer is selected from SiO2 and SiN. X One or more of SiCN, SiOCN, and SiOC.

[0146] The dielectric material layer can be formed by any of the following methods: chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD). As an optional implementation, the thickness of the third dielectric material layer can be between 50 nm and 500 nm, and the deposition process temperature can be between 200 °C and 750 °C.

[0147] As an alternative implementation, a dielectric material can be deposited first, and then smoothed using a CMP process to obtain a dielectric material layer.

[0148] It should be noted that the display panel needs to be encapsulated; accordingly, the manufacturing method further includes:

[0149] like Figure 22 As shown, the substrate layer is removed;

[0150] like Figure 1 As shown, a transparent electrode layer 300 is formed, which is bonded to the seed layer.

[0151] As an alternative implementation, the substrate layer can be removed by grinding and / or CMP processes. The transparent electrode layer 300 can be made of ITO.

[0152] In this embodiment of the invention, edge metal electrodes and a protective layer may be further formed and then encapsulated.

[0153] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Those skilled in the art should understand that the present invention includes, but is not limited to, the contents described in the accompanying drawings and the specific embodiments above. Any modifications that do not depart from the functional and structural principles of the present invention will be included within the scope of the claims.

Claims

1. A display panel, the display panel comprising a driving substrate layer and a light-emitting element layer stacked along its thickness direction, the light-emitting element layer comprising a plurality of Micro LEDs arranged in multiple rows and columns, characterized in that, The light-emitting element layer further includes a seed layer, on which a plurality of first openings are formed. The cross-sectional structure of the first opening is a polygonal star shape. The first opening has a pointed bottom and the opening of the first opening faces the driving substrate layer. Each Micro LED corresponds to at least one first opening. A second opening is formed on the portion of the Micro LED corresponding to the first opening. The plurality of first openings are arranged in multiple rows and columns. The plurality of MicroLEDs are formed after the plurality of first openings are formed.

2. The display panel according to claim 1, characterized in that, The light-emitting element layer includes multiple pixel units, each pixel unit includes multiple Micro LEDs, and the Micro LEDs in the same pixel unit can emit light of multiple different colors.

3. The display panel according to claim 2, characterized in that, The pixel unit includes red Micro LED, blue Micro LED and green Micro LED.

4. The display panel according to claim 3, characterized in that, The pixel unit includes two green Micro LEDs, and the two green Micro LEDs in the same pixel unit are located in the same column.

5. The display panel according to claim 1, characterized in that, The driving substrate layer includes a thin-film transistor array layer and an anode pattern layer stacked along the thickness direction. The light-emitting element layer is disposed on the anode pattern layer. The anode pattern layer includes multiple anodes, each of which corresponds to one of the multiple Micro LEDs. The anodes are electrically connected to the corresponding thin-film transistors in the thin-film transistor array layer.

6. The display panel according to claim 5, characterized in that, The anode pattern layer also includes a dielectric material layer, on which anode vias corresponding to the plurality of anodes are formed, and the anodes are filled in the corresponding anode vias.

7. The display panel according to any one of claims 1 to 6, characterized in that, The cross-sectional structure of the first opening is hexagonal.

8. The display panel according to any one of claims 1 to 6, characterized in that, The sidewalls of the first opening are covered with a material used to form the light-emitting element layer.

9. The display panel according to any one of claims 1 to 6, characterized in that, The first opening is filled with a medium material.

10. A method for manufacturing a display panel, characterized in that, The preparation method includes: Provide a substrate layer; A seed layer is formed on the substrate layer; A mask layer is formed on the seed layer; The mask layer is patterned to obtain a first mask pattern with multiple circular openings; Using the first mask pattern as a mask, the seed layer is etched to form a plurality of first openings on the seed layer. The cross-section of the first opening is a polygonal star shape, and the cross-sectional area of ​​the first opening gradually decreases from top to bottom. The first opening has a pointed bottom, and the plurality of first openings are arranged in multiple rows and columns. Epitaxial growth is performed on the side of the seed layer away from the substrate layer to obtain a light-emitting chip including multiple Micro LEDs. Each Micro LED corresponds to at least one first opening. A second opening is formed on the portion of the Micro LED corresponding to the first opening. The multiple first openings are arranged in multiple rows and columns. The light-emitting chip is bonded to the driving substrate.

11. The preparation method according to claim 10, characterized in that, The epitaxial growth is performed on the side of the seed layer away from the substrate layer to obtain a light-emitting chip including multiple Micro LEDs, comprising: A first light-emitting element mask pattern is formed on the seed layer, and a plurality of first light-emitting element openings are formed on the first light-emitting element mask pattern, and the first light-emitting element openings correspond to a plurality of first apertures; A first light-emitting material is deposited to form a Micro LED in the opening of the first light-emitting element, wherein the emission color of the Micro LED in the opening of the first light-emitting element matches the first light-emitting material; Remove the mask pattern of the first light-emitting element to form a first dielectric material layer; The first dielectric material layer is patterned to obtain a second light-emitting element mask pattern. Multiple second light-emitting element openings are formed on the second light-emitting element mask pattern, and the second light-emitting element openings correspond to multiple first openings. A second light-emitting material is deposited to form a Micro LED in the opening of the second light-emitting element, wherein the emission color of the Micro LED in the opening of the second light-emitting element matches the second light-emitting material; Remove the mask pattern of the second light-emitting element to form a second dielectric material layer; The second dielectric material layer is patterned to obtain a third light-emitting element mask pattern, on which a plurality of third light-emitting element openings are formed, and the third light-emitting element openings correspond to a plurality of first openings; A third luminescent material is deposited to form a Micro LED in the opening of the third luminescent element, wherein the emission color of the Micro LED in the opening of the third luminescent element matches that of the third luminescent material.

12. The preparation method according to claim 10, characterized in that, The step of bonding the light-emitting chip to the driving substrate includes: An anode pattern layer is formed, the anode pattern layer including a dielectric material layer and a plurality of anodes, a plurality of anode vias are formed on the dielectric material layer and penetrate the dielectric material layer along the thickness direction, the plurality of anode vias are disposed in the plurality of anode vias in a one-to-one correspondence, and the plurality of anode vias correspond to the plurality of Micro LEDs in a one-to-one correspondence; A thin-film transistor array chip is attached, wherein the thin-film transistor array chip includes a thin-film transistor array layer, and the anode is electrically connected to a corresponding thin-film transistor in the thin-film transistor array layer, wherein the driving substrate includes the anode pattern layer and the thin-film transistor array layer.

13. The preparation method according to any one of claims 10 to 12, characterized in that, The preparation method further includes: Remove the substrate layer; A transparent electrode layer is formed, wherein the transparent electrode layer is bonded to the seed layer.

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