A bus interface layered implementation device, method, equipment and medium

Abstract

The present invention relates to the field of integrated circuit technology, and discloses a bus interface layered implementation device, method, equipment, and medium. The device includes: application layer logic, a bus control layer, and a bus protocol layer, wherein: the application layer logic is used to receive and analyze user operation instructions; the bus control layer includes at least one read / write channel for performing read / write data operations that match the user operation instructions; and the bus protocol layer connects the bus control layer and an external bus and is used to convert at least one read / write channel in the bus control layer into an external bus protocol interface. The present invention can improve the versatility of self-developed IP.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a device, method, equipment and medium for implementing layered bus interfaces. Background Art

[0002] In SoC (System on Chip) design, the bus is the key communication architecture connecting different functional modules and processors.

[0003] In related technologies, self-developed IP usually uses a bus with a specific standard, which will limit the performance, application scenarios, etc. of the self-developed IP.

[0004] In view of this, a bus interface layering implementation device with strong versatility is needed. Summary of the Invention

[0005] In view of this, the present invention provides a bus interface layered implementation device, which can improve the versatility of self-developed IP.

[0006] In a first aspect, the present invention provides a bus interface layered implementation device, the device comprising: application layer logic, a bus control layer and a bus protocol layer, wherein: the application layer logic is used to receive and analyze user operation instructions; the bus control layer includes at least one read / write channel, which is used to perform read / write data operations matching the user operation instructions; the bus protocol layer connects the bus control layer and the external bus, and is used to convert at least one read / write channel in the bus control layer into an external bus protocol interface.

[0007] In the disclosed embodiment, the device is divided into application layer logic, bus control layer and bus protocol layer. The bus protocol layer converts the bus control layer into an external bus protocol interface, which can reduce the complexity of application layer development and improve the maintainability and scalability of the system.

[0008] In an optional embodiment, when the device is used to process a bus read request, the read channel includes: a read request processing unit, used to identify the identity ID of the read request and pass the read request to the read request information cache unit and the bus protocol layer; a read data processing unit, used to receive response information from the bus protocol layer and perform data processing on the cache information according to the read request; and a read request information cache unit, used to receive request information sent by the read request processing unit.

[0009] In the embodiment of the present disclosure, the read request is processed by the read request processing unit and sent to the read data processing unit and the bus protocol layer to complete the data reading, which can improve the efficiency of data transmission and the scalability of the device.

[0010] In an optional implementation, the read channel further includes: a read request data cache unit, configured to cache data returned by the read data processing unit.

[0011] In the embodiment of the present disclosure, by providing a read request data cache unit, access delay can be reduced and the speed of data access can be improved.

[0012] In an optional embodiment, when the device is used to process a bus write request, the write channel includes: a write request processing unit, used to identify the identity ID of the write request and pass the write request to the write request information cache unit and the bus protocol layer; a write data processing unit, used to process the cache information according to the write request, and pass the processed data to the bus protocol layer and the write data information cache unit; a write request information cache unit, used to receive the request information sent by the write request processing unit; a response processing unit, used to receive the response information of the bus protocol layer; and a write data information cache unit, used to receive the data sent by the write data processing unit.

[0013] In the embodiment of the present disclosure, the write request is processed by the write request processing unit and sent to the write data processing unit and the bus protocol layer to complete the data reading, which can improve the efficiency of data transmission and the scalability of the device.

[0014] In an optional implementation, the write channel further includes: a write request data cache unit for storing data returned by the write data processing unit; and a response data cache unit for storing received data.

[0015] In the disclosed embodiment, by providing a write request data cache unit, access delay can be reduced and data access speed can be increased. By providing a response data cache unit, it is possible to determine whether the data is written through based on the received data.

[0016] In an optional embodiment, when the device is used for routing, the bus control layer also includes: a monitoring unit for obtaining the status of the read / write channel in the bus control layer; a routing unit for receiving request information of the read / write channel and forwarding the request information to the corresponding bus interface in the bus protocol layer.

[0017] In the disclosed embodiment, by setting up a monitoring unit, the status of the read / write channels in the bus control layer can be monitored in real time, improving the reliability and security of the device. Setting up a routing unit can realize bus domain allocation of data, etc., improving the efficiency of data transmission.

[0018] In a second aspect, the present invention provides a method for reading data, which is applied to a bus interface layered implementation device of the first aspect or any corresponding embodiment thereof, and the method includes: obtaining a read request sent by the application layer logic and performing identity identification on the read request; after successful identity identification, sending the read request to the bus protocol layer; receiving the read data returned by the bus protocol layer, performing identity identification on the read data and saving it in a data cache area; and sending the read data in the data cache area to the application layer logic.

[0019] In a third aspect, the present invention provides a data writing method, which is applied to the bus interface layered implementation device of the above-mentioned first aspect or any corresponding embodiment, and the method includes: obtaining a write request sent by the application layer logic, and performing identity identification on the write request; after successful identity identification, sending the write request to the bus protocol layer; receiving a write response from the bus protocol layer, and identifying the identity and response result of the write response; after the identification results of the identity and response result are correct, saving the response result in a response buffer area; and transmitting the response result in the response buffer area to the application layer logic.

[0020] In a fourth aspect, the present invention provides a computer device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the data reading method of the second aspect or the data writing method of the third aspect by executing the computer instructions.

[0021] In a fifth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the above-mentioned data reading method of the second aspect or the data writing method of the third aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0023] Figure 1 This is a structural block diagram of a bus interface layered implementation device according to an embodiment of the present invention;

[0024] Figure 2 This is a structural block diagram of another bus interface layered implementation device according to an embodiment of the present invention.

[0025] Figure 3 is a structural block diagram of a read channel according to an embodiment of the present invention;

[0026] Figure 4 is a structural block diagram of a write channel according to an embodiment of the present invention;

[0027] Figure 5 is a flow chart of a data reading method according to an embodiment of the present invention;

[0028] Figure 6 is a flowchart of a data writing method according to an embodiment of the present invention;

[0029] Figure 7 Schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0030] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present invention.

[0031] Self-developed IP often interacts extensively with third-party IP, requiring integration into the SoC bus system and utilizing a large number of request-response buses. Bus performance and dynamic control capabilities can limit the performance of self-developed IP. The bus type can also restrict the application scenarios of self-developed IP, impacting the efficiency of self-developed IP development.

[0032] In the embodiment of the present invention, the bus interface is hierarchically implemented into application layer logic, bus control layer and bus protocol layer. The bus control layer provides a unified internal bus interface for the application layer logic, and the bus protocol layer converts the bus control layer into a specific external bus protocol interface.

[0033] In this embodiment, a bus interface layering implementation device is provided. Figure 1 FIG. 1 is a structural diagram of a device for implementing a layered bus interface according to an embodiment of the present invention. Figure 1 As shown, the device includes: application layer logic, bus control layer and bus protocol layer, wherein:

[0034] Application layer logic, used to receive and analyze user operation instructions.

[0035] The user's operation instructions are not restricted and can be read operations, write operations, refresh operations, synchronization operations, etc. If the user's operation instruction is a read operation, a request can be initiated to the read channel in the bus control layer. After the read channel receives the data returned by the bus, the application layer logic can read the expected data from the read channel.

[0036] When the user's operation instruction is a write operation, a request can be initiated to the write channel of the bus control layer and the data to be written is prepared. When the application layer logic receives a response from the write channel, it indicates that the write channel has completed the write operation.

[0037] The bus control layer includes at least one read / write channel for executing read / write data operations that match user operation instructions.

[0038] The number of read / write channels is not limited, and the corresponding number of read / write channels can be set according to actual conditions.

[0039] The bus protocol layer connects the bus control layer and the external bus and is used to convert at least one read / write channel in the bus control layer into an external bus protocol interface.

[0040] Among them, the unified read / write channel interface can be converted into different types of standard SOC bus interfaces through different modules. The type of bus interface is not restricted and can be AXI (Advanced eXtensible Interface), AHB (Advanced High Performance Bus), etc.

[0041] The bus interface layered implementation device provided in this embodiment is divided into application layer logic, bus control layer, and bus protocol layer. The bus protocol layer converts the bus control layer into an external bus protocol interface, which can reduce the complexity of application layer development and improve the maintainability and scalability of the system.

[0042] In this embodiment, a bus interface layering implementation device is provided. Figure 2 FIG. 1 is a structural diagram of a device for implementing a layered bus interface according to an embodiment of the present invention. Figure 2 As shown, the device includes: application layer logic, bus control layer and bus protocol layer, wherein:

[0043] Application layer logic, used to receive and analyze user operation instructions.

[0044] The user's operation instructions are not restricted and can be read operations, write operations, refresh operations, synchronization operations, etc. If the user's operation instruction is a read operation, a request can be initiated to the read channel in the bus control layer. After the read channel receives the data returned by the bus, the application layer logic can read the expected data from the read channel.

[0045] When the user's operation instruction is a write operation, a request can be initiated to the write channel of the bus control layer and the data to be written is prepared. When the application layer logic receives a response from the write channel, it indicates that the write channel has completed the write operation.

[0046] The bus control layer includes at least one read / write channel for executing read / write data operations that match user operation instructions.

[0047] The number of read / write channels is not limited, and the corresponding number of read / write channels can be set according to actual conditions.

[0048] The bus control layer also includes:

[0049] The monitoring unit is used to obtain the status of the read / write channel in the bus control layer.

[0050] The monitoring unit can obtain real-time status information for multiple read / write channels within the bus control layer, providing a unified monitoring, debugging, and tracing window. Monitoring metrics can be determined first, and then the monitoring metric data for the read / write channels can be obtained. After obtaining the monitoring metric data, relevant monitoring tools can be used to visualize the monitoring data, allowing users to review, debug, and trace. The monitoring metrics can be set freely, including channel connection status, data transmission rate, error rate, and more.

[0051] The routing unit is used to receive the request information of the read / write channel and forward the request information to the corresponding bus interface in the bus protocol layer.

[0052] After receiving a read / write channel request, the router can route the request and data to different bus protocol layers based on the request information, thus achieving bus domain allocation of data. It can also route to different bus protocol layers simultaneously, achieving dual data transmission.

[0053] The number of routing units is not limited. Multiple routes can be set according to actual conditions to transmit data through multiple routes to meet the bus frequency requirements.

[0054] The bus protocol layer connects the bus control layer and the external bus and is used to convert at least one read / write channel in the bus control layer into an external bus protocol interface.

[0055] Among them, the unified read / write channel interface can be converted into different types of standard SOC bus interfaces through different modules. The type of bus interface is not restricted and can be AXI (Advanced eXtensible Interface), AHB (Advanced High Performance Bus), etc.

[0056] The bus interface layering implementation device provided in this embodiment can monitor the status of the read / write channels within the bus control layer in real time by providing a monitoring unit, thereby improving the reliability and security of the device. The routing unit can also be provided to implement bus domain allocation for data, thereby improving data transmission efficiency.

[0057] In this embodiment, a read channel is provided. Figure 3 is a structural diagram of a read channel according to an embodiment of the present invention, such as Figure 3 As shown, the read channel includes:

[0058] The read request processing unit is used to identify the identity ID of the read request and pass the read request to the read request information cache unit and the bus protocol layer.

[0059] The identification method is not limited. The device IP or IP address can be used as the ID. After successful identification, the read request is passed to the read request information cache unit and the bus protocol layer. The read request processing unit can also perform transmission type identification, address processing, request splitting, and abnormal space shielding on the read request.

[0060] The read data processing unit is used to receive the response information of the bus protocol layer and perform data processing on the cache information according to the read request.

[0061] After receiving the response information returned by the bus protocol layer, the read data processing unit performs identity ID recognition on the data according to the read request.

[0062] The read request information cache unit is used to receive the request information sent by the read request processing unit.

[0063] After receiving the request information from the read request processing unit, the read request information cache unit can reversely control the number of first addresses of the read request processing unit through the cache watermark, where the first address number is the number of addresses that have been sent but not completed. The content stored in the read request information cache unit is not restricted and can include transmission IDs, transmission request addresses, data destination addresses, etc. In an actual application, the read request information cache unit can store debugging information for a single request.

[0064] In an actual application, the read request information cache unit can dynamically extract characteristic data based on the response information of the read data processing unit and send the characteristic data to the application layer logic or software, so that the application layer logic or software can process the read request differently according to different bus responses.

[0065] In some optional embodiments, the read channel further includes:

[0066] The read request data cache unit is used to cache the data returned by the read data processing unit.

[0067] The application layer logic can directly read the requested data from the read request data cache unit.

[0068] By setting a read request data cache unit, access delay can be reduced and data access speed can be improved.

[0069] The read channel provided in this embodiment processes the read request through the read request processing unit and sends it to the read data processing unit and the bus protocol layer to complete the data reading, thereby improving the efficiency of data transmission.

[0070] In this embodiment, a write channel is provided. Figure 4 is a structural diagram of a write channel according to an embodiment of the present invention, such as Figure 4 As shown, the write channel includes:

[0071] The write request processing unit is used to identify the identity ID of the write request and pass the write request to the write request information cache unit and the bus protocol layer.

[0072] The method for identifying the ID is not limited; the device IP or IP address can be used as the ID. After successful identification, the write request is passed to the write request information cache unit and the bus protocol layer. The write request processing unit can also perform transmission type identification, address processing, request splitting, and exception space shielding on the write request.

[0073] The write data processing unit is used to process the cache information according to the write request and transfer the processed data to the bus protocol layer and the write data information cache unit.

[0074] Among them, data processing is not restricted, and identity ID recognition, identity ID shifting, and identity ID normalization and order preservation can be added to the cache information.

[0075] In an actual application, after identifying junk data in the application layer logic, the write request processing unit may send write request information to the write request information cache unit. The write data processing unit reads the junk data according to the write request information and discards the junk data.

[0076] In an actual application, after identifying the tracing data in the application layer logic, the write request processing unit may send write request information to the write request information cache unit. The write data processing unit reads the tracing data according to the write request information and writes the tracing data into the memory space.

[0077] The write request information buffer unit is used to receive the request information sent by the write request processing unit.

[0078] After receiving the request information from the write request processing unit, the write request information cache unit can reversely control the number of first addresses of the write request processing unit through the cache watermark, where the first address number is the number of addresses that have been sent but not yet completed. The content stored in the write request information cache unit is not limited and can include transmission IDs, transmission request addresses, data destination addresses, etc. In an actual application, the write request information cache unit can store debugging information for a single request.

[0079] The response processing unit is used to receive the response information of the bus protocol layer.

[0080] After receiving the response information from the bus protocol layer, the response processing unit can obtain the identity ID and response result based on the response information. If the response result is correct, the response result is passed to the application layer logic. If the response result is an error, the information of the write data information cache unit can be recorded.

[0081] The write data information cache unit is used to receive data sent by the write data processing unit.

[0082] After receiving the request information from the write data processing unit, the write data information cache unit can reversely control the second address quantity of the write data processing unit through the cache waterline, wherein the second address quantity is the number of addresses that have been sent but not completed.

[0083] In an actual application, the write request information cache unit and the write data information cache unit can dynamically extract characteristic data based on the response information of the write data processing unit and send the characteristic data to the application layer logic or software. This allows the application layer logic or software to process the write request differently based on different bus responses.

[0084] In some optional implementations, the write channel further includes:

[0085] The write request data cache unit is used to store the data returned by the write data processing unit.

[0086] The application layer logic may directly read the requested data from the write request data cache unit.

[0087] The response data buffer unit is used to store the received data.

[0088] The application layer logic can determine whether the data is written through based on the data stored in the response data cache unit. In an actual application, if the response information received by the response processing unit is correct, it will pass the response information to the response data cache unit. The response data cache unit will return the response information to the application layer logic. After receiving the returned response information, the application layer logic can determine whether the data is written through.

[0089] By setting up a write request data cache unit, access delay can be reduced and data access speed can be increased. By setting up a response data cache unit, it is possible to determine whether the data is written through based on the received data.

[0090] The write request processing unit processes the write request and sends it to the write data processing unit and the bus protocol layer to complete the data reading, which can improve the efficiency of data transmission and the scalability of the device.

[0091] In this embodiment, a method for reading data is provided. Figure 5 FIG. 1 is a flow chart of a method for reading data according to an embodiment of the present invention. Figure 5 As shown, the method includes:

[0092] Step S101: Obtain a read request sent by the application layer logic and perform identity identification on the read request.

[0093] The identification method is not limited and can be based on the IP address of the read request, device ID, etc. If the identification is unsuccessful, the read request will not be processed.

[0094] Step S102: After the identity recognition is successful, a read request is sent to the bus protocol layer.

[0095] After successful identification, the read request can be processed through various methods, including transmission type identification, address processing, request splitting, and exception space shielding. After identifying the data transmission type, a data processing method can be selected based on the transmission type to improve processing efficiency. Address processing of read requests can increase device flexibility. Splitting read requests can optimize resource management. Exception space shielding can improve security.

[0096] Step S103: receiving the read data returned by the bus protocol layer, performing identity recognition on the read data, and storing the data in a data buffer area.

[0097] Among them, after receiving the read data, the read data is processed accordingly according to the read request, and then the processed data is saved in the data cache area. The data processing is not restricted and can be identity ID shifting, identity ID splicing, identity ID anomaly detection, identity ID normalization and order preservation, etc.

[0098] The location of the data buffer is not restricted and can be within the read channel or within the application layer logic.

[0099] Step S104: sending the read data in the data buffer to the application layer logic.

[0100] The data reading method provided in this embodiment can improve the security of data transmission by performing local identification on the read request and can improve the efficiency of data transmission by caching the read data in the data cache area.

[0101] In this embodiment, a data writing method is provided. Figure 6 : is a flow chart of a method for writing data according to an embodiment of the present invention. Figure 6 As shown, the method includes:

[0102] Step S201: Obtain a write request sent by the application layer logic and perform identity identification on the write request.

[0103] The identification method is not limited and can be based on the IP address of the write request, device ID, etc. If the identification is unsuccessful, the write request will not be processed.

[0104] Step S202: After the identity recognition is successful, a write request is sent to the bus protocol layer.

[0105] After successful identification, the write request can be processed through various processes, including transmission type identification, address processing, request splitting, and exception space shielding. After identifying the data transmission type, a data processing method can be selected based on the transmission type to improve processing efficiency. Address processing of the write request can increase device flexibility. Splitting the write request can optimize resource management. Exception space shielding can improve security. After processing is complete, the write request is sent to the bus protocol layer.

[0106] In an actual application, after the identity recognition is successful, the write request is passed to the bus protocol layer and the write request information cache unit.

[0107] Step S203: receiving a write response from the bus protocol layer, and identifying the identity of the write response and the response result.

[0108] There is no restriction on the identification method, and an identification algorithm can be set according to actual conditions to identify the identity of the person writing the response and the response result.

[0109] In an actual application, when the response result of a write response is erroneous, data information corresponding to the write response may be recorded for subsequent debugging.

[0110] Step S204: After the identification results of the identity and the response result are correct, the response result is stored in the response buffer.

[0111] The location of the response buffer is not restricted and can be within the write channel or within the application layer logic.

[0112] Step S205: Transmit the response result in the response buffer to the application layer logic.

[0113] When the application layer logic receives the response result, it indicates that the write channel has completed the write operation corresponding to the write request and the data has been written through.

[0114] The data writing method provided in this embodiment can improve the security of data transmission by performing identity recognition on the write request and determine whether the write operation is completed based on the recognition result, thereby improving the effectiveness and accuracy of data transmission.

[0115] The embodiment of the present invention also provides a computer device having the above Figure 1 The bus interface layered implementation device is shown.

[0116] See also Figure 7 , Figure 7 is a structural diagram of a computer device provided by an optional embodiment of the present invention, such as Figure 7 As shown, the computer device includes: one or more processors 10, memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components utilize different buses to communicate with each other and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in the memory or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Equally, multiple computer devices can be connected, and each device provides part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 7 A processor 10 is taken as an example.

[0117] The processor 10 may be a central processing unit, a network processor, or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic, or any combination thereof.

[0118] The memory 20 stores instructions that can be executed by at least one processor 10, so as to enable at least one processor 10 to execute the method shown in the above embodiment.

[0119] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0120] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0121] The computer device further includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means. Figure 7 The bus connection is taken as an example.

[0122] The input device 30 can receive input digital or character information and generate key signal input related to user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a trackpad, a touch pad, an indicator stick, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 can include a display device, an auxiliary lighting device (e.g., an LED), and a tactile feedback device (e.g., a vibration motor). The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display, and a plasma display. In some optional embodiments, the display device can be a touch screen.

[0123] The embodiment of the present invention also provides a computer-readable storage medium. The above-mentioned method according to the embodiment of the present invention can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memory. It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the method shown in the above embodiment is implemented.

[0124] A portion of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the form in which the computer program instruction exists in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc. Accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium that can be accessed by the computer.

[0125] Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention. Such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A bus interface layering implementation device, characterized in that: The device comprises: an application layer logic, a bus control layer and a bus protocol layer, wherein: The application layer logic is used to receive and analyze user operation instructions; The bus control layer includes at least one read / write channel for executing read / write data operations matching the user operation instructions; The bus protocol layer connects the bus control layer and the external bus and is used to convert at least one read / write channel in the bus control layer into an external bus protocol interface; The routing unit is used to route the request and data to different bus protocol layers according to the request information after receiving the read / write channel request; When the apparatus is used to process a bus read request, the read channel includes: A read request processing unit, configured to identify an identity ID of a read request and transmit the read request to a read request information cache unit and a bus protocol layer; a read data processing unit, configured to receive response information from the bus protocol layer and perform data processing on the cache information according to the read request; a read request information caching unit, configured to receive the request information sent by the read request processing unit; When the apparatus is used to process a bus write request, the write channel includes: A write request processing unit, configured to identify an identity ID of a write request and transmit the write request to a write request information cache unit and a bus protocol layer; a write data processing unit, configured to process the cache information according to the write request and transfer the processed data to the bus protocol layer and the write data information cache unit; a write request information buffer unit, configured to receive request information sent by the write request processing unit; A response processing unit, used for receiving response information from the bus protocol layer; The write data information cache unit is used to receive the data sent by the write data processing unit.

2. The device according to claim 1, characterized in that The read channel further includes: The read request data cache unit is used to cache the data returned by the read data processing unit.

3. The device according to claim 1, characterized in that The write channel also includes: A write request data cache unit, used to store data returned by the write data processing unit; The response data buffer unit is used to store the received data.

4. The device according to claim 1, characterized in that The bus control layer also includes: The monitoring unit is used to obtain the status of the read / write channel in the bus control layer.

5. A data reading method, applied to the bus interface layering implementation device according to any one of claims 1 to 4, characterized in that: The method comprises: Obtaining a read request sent by the application layer logic and performing identity identification on the read request; After the identity recognition is successful, sending the read request to the bus protocol layer; Receive the read data returned by the bus protocol layer, identify the read data and save it in a data buffer area; The read data in the data buffer area is sent to the application layer logic.

6. A data writing method, applied to the bus interface layering implementation device according to any one of claims 1 to 4, characterized in that: The method comprises: Obtaining a write request sent by the application layer logic and performing identity identification on the write request; After the identity recognition is successful, sending the write request to the bus protocol layer; receiving a write response from the bus protocol layer, and identifying the identity and response result of the write response; After the identification results of the identity and the response result are correct, the response result is stored in the response buffer; The response result in the response buffer is transmitted to the application layer logic.

7. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the data reading method according to claim 5 or the data writing method according to claim 6 by executing the computer instructions.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the data reading method according to claim 5 or the data writing method according to claim 6.

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