Electronic tag and identification system

Abstract

The invention provides an electronic tag and an identification system. The electronic tag comprises a substrate; the electric base layer is arranged on the first surface of the substrate; the antenna layer is formed on the surface, deviating from the substrate, of the electric base layer and is suitable for responding to an external electromagnetic field to form an electric signal; the chip is arranged in the middle of the antenna layer and is suitable for outputting a radio frequency signal in response to the electric signal; and the coupling ring is configured to surround the chip by taking the chip as a center, and is suitable for responding to an electromagnetic field to enable a circuit formed by the antenna layer and the chip to perform impedance matching so as to tune the resonant frequency of the electronic tag. The identification system comprises a reader and an electronic tag, wherein the reader is configured to generate electromagnetic waves; the electronic tag is configured to respond to electromagnetic wave backscatter coupling generated by the reader so as to output a radio frequency signal to the reader, so that the electronic tag is identified by the reader.

Description

Technical Field

[0001] At least one embodiment of the present disclosure relates to a communication device, and more specifically, to an electronic tag and an identification system. Background Art

[0002] Radio Frequency Identification (RFID) is a contactless identification technology that uses magnetic field coupling and electromagnetic wave propagation. It is widely used in logistics, medical care, retail and other fields. As an important part of Radio Frequency Identification (RFID), electronic tags are suitable for configuration (such as bonding) on ​​the surface of objects that need to be identified. However, due to the working principle of radio frequency identification technology, electronic tags are easily affected by the external environment in complex metal environments.

[0003] For example, in the use scenario where the electronic tag is configured on a metal surface (such as being bonded to the surface of metal shelves, passenger vehicles, tools and office equipment), a large parasitic capacitance is introduced between the metal surface and the electronic tag, destroying the impedance coupling conjugate matching relationship between the chip and the antenna of the electronic tag, thereby causing the resonant frequency of the electronic tag to change, causing the resonant frequency of the electronic tag to shift out of the operating frequency band of the reader and the configured chip, resulting in the electronic tag being unable to be read.

[0004] In existing designs, artificial magnetic conductors (AMC) or electronic bandgap structures (EBG) antennas are often used to at least partially overcome the above problems. However, when using artificial magnetic conductors, a sufficiently large artificial magnetic conductor surface is configured to offset the influence of the metal environment; while the electronic bandgap structure antenna will result in a narrow bandwidth of the electronic tag, and the process is complex and the cost is high. Therefore, how to provide an electronic tag that can at least partially offset the influence of the metal environment and has a small size and a wide bandwidth has become a technical problem that needs to be solved urgently. Summary of the invention

[0005] In order to solve at least one technical problem in the prior art and other aspects, the electronic tag and identification system provided by the present invention form a conjugate matching relationship between the antenna layer and the chip over a wider frequency band, thereby reducing the impact of the external environment on the input impedance of the electronic tag and tuning the resonant frequency of the electronic tag.

[0006] One aspect of an embodiment of the present disclosure provides an electronic tag, comprising: a substrate; an electrical base layer, arranged on a first surface of the above-mentioned substrate; an antenna layer, formed on a surface of the above-mentioned electrical base layer opposite to the above-mentioned substrate, and suitable for forming an electrical signal in response to an external electromagnetic field; a chip, arranged in the middle of the above-mentioned antenna layer, and suitable for outputting a radio frequency signal in response to the above-mentioned electrical signal; and a coupling ring, which is constructed to be centered on the above-mentioned chip and arranged around the above-mentioned chip, and is suitable for responding to the above-mentioned electromagnetic field to make the circuit formed by the above-mentioned antenna layer and the above-mentioned chip perform impedance matching so as to tune the resonant frequency of the above-mentioned electronic tag.

[0007] According to an embodiment of the present disclosure, the coupling ring is disposed on a surface of the electrical base layer that faces the substrate.

[0008] According to an embodiment of the present disclosure, the antenna layer and / or the coupling loop are configured to protrude from the substrate.

[0009] According to an embodiment of the present disclosure, the coupling ring is disposed in the substrate, and a plane where the coupling ring is located is parallel to the first surface of the substrate.

[0010] According to an embodiment of the present disclosure, the coupling ring is configured as a circle-centered symmetrical ring structure.

[0011] According to an embodiment of the present disclosure, the substrate is configured as a columnar structure.

[0012] According to an embodiment of the present disclosure, the antenna layer includes at least one pair of dipole antennas, and the two dipole antennas in each pair of dipole antennas are symmetrically arranged.

[0013] According to an embodiment of the present disclosure, each of the above-mentioned dipole antennas includes a trapezoidal structure; the length of the first side of one dipole antenna in each pair of the above-mentioned dipole antennas facing the other dipole antenna is less than the length of the second side opposite to the above-mentioned first side, and the above-mentioned second side extends to the side edge of the above-mentioned substrate layer and is constructed to be approximately the same as the length of the side edge of the above-mentioned substrate layer, so that the impedance of the above-mentioned antenna layer is gradually changed.

[0014] According to an embodiment of the present disclosure, the chip is disposed between a pair of dipole antennas.

[0015] According to an embodiment of the present disclosure, the electronic tag also includes a grounding layer disposed on a second surface of the substrate opposite to the first surface, and configured to be electrically connected to the antenna layer so that the antenna layer and the grounding layer have zero potential, suitable for grounding the electronic tag.

[0016] According to an embodiment of the present disclosure, the ground layer is configured to at least partially overlap with the second surface of the substrate.

[0017] According to an embodiment of the present disclosure, the electronic tag further comprises two connection layers symmetrically arranged on the third and fourth surfaces facing each other between the first and second surfaces of the substrate to electrically connect the antenna layer and the ground layer.

[0018] According to an embodiment of the present disclosure, the ground layer and the connection layer are configured to be integrally formed.

[0019] Another aspect of an embodiment of the present disclosure provides an identification system, including: a reader configured to generate electromagnetic waves; and an electronic tag configured to respond to backscatter coupling of the electromagnetic waves generated by the reader to output a radio frequency signal to the reader, so that the electronic tag can be identified by the reader.

[0020] According to the electronic tag and identification system provided by the present disclosure, the coupling ring is configured on the substrate, and the inductive reactance formed by the coupling ring is suitable for conjugate matching with the impedance of the chip, so that the antenna layer and the chip form a conjugate matching relationship in a wider frequency band, so as to reduce the difficulty of conjugate matching between the antenna layer and the chip. In this way, on the one hand, the operating frequency of the antenna layer of the electronic tag is lowered to tune the resonant frequency of the electronic tag so that the resonant frequency of the electronic tag is within the operating frequency band of the chip and / or the external reader; on the other hand, the operating bandwidth of the antenna layer is expanded. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is the directional diagram of the electronic tag attached to the metal surface without a coupling ring;

[0022] Figure 2 is a curve diagram of the return loss of an electronic tag without a coupling loop;

[0023] Figure 3 is a schematic diagram of the impedance curve of the electronic tag without a coupling ring;

[0024] Figure 4 is a three-dimensional diagram of an electronic tag according to an exemplary embodiment of the present disclosure;

[0025] Figure 5 yes Figure 4 A partial enlarged view of the layered structure of the electronic tag of the exemplary embodiment shown;

[0026] Figure 6 is based on Figure 4 Directional diagram of the electronic tag attached to a metal surface;

[0027] Figure 7 is based on Figure 4 A schematic diagram of a curve showing the return loss of the electronic tag shown;

[0028] Figure 8 is based on Figure 4 The impedance curve diagram of the electronic tag shown; and

[0029] Fig. 9 is based on Figure 4 The figure shows a curve diagram of the return loss of coupling loops of different sizes in the configuration of the electronic tag.

[0030] In the accompanying drawings, the meanings of the reference numerals are as follows:

[0031] 1. Coupling ring;

[0032] 2. Antenna layer;

[0033] 3. Electrical base layer;

[0034] 4. Substrate;

[0035] 5. Ground layer;

[0036] 6. Connection layer; and

[0037] 7. Chip. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0039] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. The terms "comprise", "include", etc. used herein indicate the existence of features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0040] All terms used herein, including technical and scientific terms, have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification, and should not be interpreted in an idealized or overly rigid manner.

[0041] When using expressions such as "at least one of A, B, and C, etc.", it should generally be interpreted as the meaning of the expression generally understood by those skilled in the art. For example, "a system having at least one of A, B, and C" should include but not be limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc. When using expressions such as "at least one of A, B, or C, etc.", it should generally be interpreted as the meaning of the expression generally understood by those skilled in the art. For example, "a system having at least one of A, B, or C" should include but not be limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.

[0042] In the related art, the chip of the first electronic tag can be represented as an equivalent circuit formed by a series resistor and a capacitor (such as an RC circuit, where R represents the resistor and C represents the capacitor). In detail, based on the equivalent circuit, the complex impedance of the chip can be expressed as shown in the following formula 1:

[0043] Z c =Z 1 +jZ 2 (Formula 1)

[0044] In formula 1, Z 1 Characterized as the real part of the chip's impedance (i.e. resistance), Z 2 It is represented by the imaginary part of the impedance of the chip (ie reactance), and j is represented by a complex number.

[0045] The complex impedance of the antenna layer assembled with the chip can be expressed as follows:

[0046] Z a =Z 3 +jZ 4 (Formula 2)

[0047] In formula 2, Z 3 Characterized as the real part of the impedance (i.e. resistance) of the antenna layer, Z 4 It is represented as the imaginary part of the impedance (ie reactance) of the antenna layer, and j is represented as a complex number.

[0048] When the chip and antenna layer are assembled to form the first electronic tag, the complex impedance of the chip (i.e., Z c ) should be consistent with the complex impedance of the antenna layer (i.e., Z a ) coupling to form impedance coupling conjugate matching. By coupling the impedance power of the antenna layer and the chip, the first electronic tag can obtain a larger reading range.

[0049] However, based on the relevant technology, in the use scenario where the first electronic tag is placed on the surface of a metal object, a large parasitic capacitance is introduced between the metal surface and the first electronic tag, which will cause the impedance coupling conjugation of the chip and the antenna layer to be destroyed, thereby causing the impedance value and resonant frequency of the antenna layer to change, resulting in the shift of the resonant frequency of the first electronic tag. Once the resonant frequency shifts out of the working frequency band of the reader, the reader will fail to recognize the electronic tag, and then the first electronic tag will fail.

[0050] For example, the related art provides a first electronic tag (not shown in the figure), including a substrate, an antenna layer, a chip and a ground layer. In detail, the antenna layer and the ground layer are respectively arranged on the upper surface and the lower surface of the substrate, and the chip is arranged in the middle of the antenna layer. Among them, the model of the chip used is Qstar7U.

[0051] Figure 1 It is the directional diagram of the tag attached to the metal surface without the coupling ring electronics; Figure 2 is a curve diagram of the return loss of an electronic tag without a coupling loop; Figure 3 It is a schematic diagram of the impedance curve of the electronic tag without a coupling ring.

[0052] Based on the above first electronic tag, when the first electronic tag is attached to a metal surface, the performance of the first electronic tag can be referred to as Figures 1 to 3 shown.

[0053] Reference Figure 1 As shown, the first electronic tag is attached to the metal surface, and the gain of the antenna layer of the first electronic tag is located on the negative radiation surface, and the gain is -4dB.

[0054] Figure 2 The vertical axis (i.e. Figure 2 The axis extending in the left-right direction in the middle) is characterized as the S11 parameter, and the unit is dB; the horizontal axis (i.e. Figure 2 The axis extending in the vertical direction in the middle) is characterized as the operating frequency, and the unit is GHz;

[0055] Reference Figure 2 As shown, the return loss of the first electronic tag in the use scenario of being attached to a metal surface, the resonant frequency of the antenna layer is 2.4 GHz (i.e. Figure 2 Shown 1 The corresponding horizontal axis value), and the operating frequency of the above-mentioned chip (i.e. Qstar7U) (i.e. the frequency covered by the -10dB bandwidth) should be configured around 900MHz (generally 902-928MHz is used as a reference). It can be seen that when the first electronic tag is attached to a metal surface, the resonant frequency of the antenna layer of the electronic tag has seriously deviated from the operating frequency of the chip.

[0056] Figure 3 The vertical axis (i.e. Figure 3 The axis extending in the left-right direction in the middle) is characterized by impedance, and the horizontal axis (i.e. Figure 3 The axis extending in the up-down direction in the middle) is characterized as the operating frequency;

[0057] Reference Figure 3 As shown, at the operating frequency (for example, 915MHz) of the chip of the above model (i.e., Qstar 7U), the complex impedance of the antenna layer of the above first electronic tag is j18 ohms, while the complex impedance of the chip of the above first electronic tag is 6-j137 ohms. It can be seen that the impedance of the chip of the above first electronic tag is out of harmony with the impedance of the antenna layer (i.e., impedance coupling conjugate matching is not formed).

[0058] Therefore, when the first electronic tag is attached to a metal surface, the parasitic capacitance destroys the conjugate matching relationship between the chip and the antenna layer of the first electronic tag, causing the first electronic tag to deviate from the working frequency band of the reader and the configured chip, resulting in the problem that the tag cannot be read.

[0059] Figure 4is a stereoscopic diagram of an electronic tag according to an exemplary embodiment of the present disclosure. Figure 5 yes Figure 4 A partial enlarged view of the layered structure of the electronic tag of the exemplary embodiment is shown.

[0060] According to the second electronic tag provided by the present disclosure, Figure 4 and Figure 5 As shown, it includes a substrate 4, a substrate layer 3, an antenna layer 2, a chip 7 and a coupling ring 1. The substrate layer 3 is arranged on the first surface of the substrate 4. The antenna layer 2 is formed on the surface of the substrate layer 3 that is away from the substrate 4, and is suitable for forming an electrical signal in response to an external electromagnetic field. The chip 7 is arranged in the middle of the antenna layer 2, and is suitable for outputting a radio frequency signal in response to the electrical signal. The coupling ring 1 is constructed to be centered on the chip 7, and is arranged around the chip 7 on the surface of the substrate layer 3 that faces the substrate 4, and is suitable for impedance matching the circuit formed by the antenna layer 2 and the chip 7 in response to the electromagnetic field to tune the resonant frequency of the second electronic tag.

[0061] In an illustrative embodiment, the coupling loop 1 includes but is not limited to an inductive coupling loop, which is suitable for obtaining inductive reactance in response to an external electromagnetic field.

[0062] In such an implementation, the coupling loop configured by the electronic tag introduces inductance to the second electronic tag in response to the external electromagnetic field and obtains inductive reactance, and the inductive reactance formed by the coupling loop is suitable for conjugate matching with the impedance of the chip. On the basis of not changing the design and structure of the antenna layer, the antenna layer and the chip can form a conjugate matching relationship over a wider frequency band by setting a coupling loop of suitable size and / or shape, which is conducive to keeping the impedance of the antenna layer of the second electronic tag stable within a wider frequency band. In this way, the resonant frequency of the second electronic tag can be tuned so that the resonant frequency of the second electronic tag is within the working frequency band of the chip, and the working bandwidth of the antenna layer is expanded, reducing the influence of the external metal environment on the input impedance of the antenna layer.

[0063] In an exemplary embodiment, the antenna layer 2 and the coupling ring 1 are both made of conductive materials (such as metal materials, such as copper). Specifically, the antenna layer 2 and the coupling ring 1 are disposed on the electrical base layer 3 by, but not limited to, printing, electroplating, etching, spraying, or any other method.

[0064] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, the coupling ring 1 is constructed as a circle-centered symmetrical ring structure.

[0065] In an illustrative embodiment, Figure 4As shown, the coupling ring 1 includes but is not limited to being configured as a circular ring structure. Further, in the vertical projection, the extension direction of the chip and the center of the coupling ring coincide. It should be understood that the embodiments of the present disclosure are not limited thereto.

[0066] For example, the coupling ring may be configured as any one of a square ring structure and other regular polygonal ring structures.

[0067] According to an embodiment of the present disclosure, Figure 4 and Figure 5 As shown, the coupling ring 1 is arranged on the surface of the substrate 3 facing the base plate 4 .

[0068] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, the antenna layer 2 and / or the coupling loop 1 are designed to protrude from the base layer 3 .

[0069] In an exemplary embodiment, the antenna layer 2 and the coupling loop 1 are formed on two opposite surfaces of the substrate 3 by etching. Figure 5 Further, the coupling ring 1 protrudes from the substrate 3 and is connected to the first surface of the substrate 4 (such as Figure 5 The upper surface shown) is abutted.

[0070] According to another embodiment of the present disclosure, which is not shown in the figures, the coupling ring 1 is disposed in the substrate 4 , and the plane where the coupling ring 1 is located is parallel to the first surface of the substrate 4 .

[0071] In an exemplary embodiment, the coupling loop 1 is disposed in the middle of the substrate 4 (not shown). Specifically, the coupling loop 1 is wrapped inside the substrate 4 and is configured to be parallel to the first surface of the substrate and the extension direction of the antenna layer on the first surface.

[0072] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, the base plate 4 is configured as a columnar structure.

[0073] In an illustrative embodiment, the substrate 4 includes but is not limited to being configured as any one of a cylindrical structure, an elliptical cylindrical structure, a cubic structure, and other regular polygonal column structures, so as to meet the design requirements of the electronic tag (such as the shape and / or size of the coupling ring, the shape and / or area of ​​the configured antenna layer, etc.). Further, the substrate 4 includes but is not limited to being made of a foam medium material. It should be understood that the embodiments of the present disclosure are not limited thereto. For example, it also includes any one of paper, polyester fiber, and other insulating materials.

[0074] In such an implementation, the substrate serves as the installation base for various parts of the electronic tag, and it is preferable to meet the design requirements of other parts of the electronic tag (including but not limited to size, shape, thickness, etc.) in the design. In addition, based on the dielectric constant of the material selected for the substrate, the inductance introduced by the coupling loop and the obtained inductive reactance can be changed by configuring the thickness of the substrate to meet the conjugate matching requirements of different configured chips and antenna layers.

[0075] In an illustrative embodiment, Figure 4 As shown, the electrical base layer 3 is configured as a ring structure arranged around the substrate 4. In detail, the electrical base layer 3 covers the first surface (such as Figure 4 The upper surface shown), and the second surface opposite to the first surface ( Figure 4 is blocked in the figure and not shown), the third surface (such as Figure 4 The right side surface shown) and the fourth side ( Figure 4 Further, the electrical base layer 3 includes but is not limited to being made of PET (polyethylene terephthalate) material.

[0076] It should be noted that any material that can be used for the electrical base layer of the second electronic tag in the art (such as FR4, PTFE, etc.) can be selected and applied, and no further details will be given. The specific material selected is preferably conducive to reducing the interference between the second electronic tag and the attached metal surface.

[0077] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, the second electronic tag also includes a grounding layer 5 disposed on a second surface of the substrate 4 opposite to the first surface, and is configured to be electrically connected to the antenna layer 2 so that the antenna layer 2 and the grounding layer 5 have zero potential, which is suitable for grounding the second electronic tag.

[0078] In such an embodiment, the antenna layer and the ground layer are connected by the connection layer so that the antenna layer and the ground layer maintain a zero potential. In this way, the ground layer can be used as a shielding ground and can form a radiation element together with the antenna layer. The antenna layer, the connection layer and the ground layer are formed by integral etching, which can reduce the difficulty of manufacturing the second electronic tag.

[0079] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, the ground layer 5 is configured to substantially coincide with the second surface of the substrate 4 .

[0080] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, the second electronic tag further includes two connection layers 6 symmetrically arranged between the first surface and the second surface of the substrate 4 to electrically connect the antenna layer 2 and the ground layer 5 .

[0081] In an illustrative embodiment, Figure 4 As shown, the grounding layer 5 is constructed to have the same shape and size as the second surface of the substrate 4 and the electrical base layer 3 attached to the second surface of the substrate 4, so as to completely cover the electrical base layer 3 located on the second surface. Further, two connecting layers 6 are symmetrically formed on the outside of the portion of the electrical base layer 3 located on the third surface and the fourth surface of the substrate 4.

[0082] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, the ground layer 5 and the connection layer 6 are integrally formed.

[0083] In an illustrative embodiment, Figure 4 As shown, the antenna layer 2, the connection layer 6 and the ground layer 5 are all formed on the outer surface of the substrate 3 by etching.

[0084] In such an implementation, the antenna layer, the connection layer and the ground layer are sequentially disposed along the outer surface of the substrate by etching, which is beneficial to simplify the manufacturing process of the electronic tag and improve the structural strength between the layers. It should be understood that the embodiments of the present disclosure are not limited thereto.

[0085] For example, a through hole penetrating along the thickness direction may be provided in the substrate 4. Furthermore, a grounding pin (not shown in the figure) connecting the antenna layer 2 and the grounding layer 5 may be provided in the through hole.

[0086] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, the antenna layer 2 includes at least one pair of dipole antennas, and the two dipole antennas in each pair of dipole antennas are symmetrically arranged.

[0087] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, each dipole antenna is constructed into a trapezoidal structure. The length of the first side of one dipole antenna in each pair of dipole antennas facing the other dipole antenna is shorter than the length of the second side away from the first side, and the second side extends to the side edge of the substrate 3 and is constructed to be substantially the same as the side edge of the substrate 3, so that the impedance of the antenna layer 2 is gradually changed.

[0088] According to the embodiments of the present disclosure, Figure 4 and Figure 5 As shown, the chip 7 is arranged between the paired dipole antennas.

[0089] In an illustrative embodiment, Figure 4 and Figure 5 As shown, the chip 7 is, but not limited to, soldered on the electrical base layer 3. In detail, the chip 7 is arranged at the geometric center of the electrical base layer 3.

[0090] In an illustrative embodiment, Figure 4 and Figure 5 As shown, the two dipole antennas of the antenna layer 2 are symmetrically arranged on both sides of the upper surface of the substrate 3 with the chip 7 as the center, and are constructed to be both centrally symmetrical and axially symmetrical. It should be understood that the embodiments of the present disclosure are not limited thereto.

[0091] For example, the antenna layer 2 may be configured as a plurality of monopole antennas arranged around the chip.

[0092] For another example, the dipole antenna of the antenna layer 2 may be configured in a U-shape, a strip shape, a spiral shape, or any other shape suitable for being used as an antenna of an electronic tag.

[0093] In an illustrative embodiment, the electrical base layer 3 of the second electronic tag is made of PET (polyethylene terephthalate), the dielectric constant of PET is 3.2, the loss tangent value is 0.003, and the thickness of the electrical base layer 3 includes but is not limited to being constructed as 0.05 mm. Further, the substrate 4 of the second electronic tag is made of a foam dielectric material, the dielectric parameter of the dielectric foam is 1.003, the loss tangent value is 0.002, and the size of the substrate 4 includes but is not limited to being constructed as 20 (length) * 18 (width) * 1.6 (thickness) mm 3 .

[0094] In an exemplary embodiment, the antenna layer 2 includes two symmetrically arranged dipole antennas. In detail, each dipole antenna is configured as a regular trapezoidal structure, wherein the narrow side of the trapezoid includes but is not limited to being configured as 14 mm, and the long side includes but is not limited to being configured as 18 mm.

[0095] In an exemplary embodiment, the coupling ring 1 includes but is not limited to being configured as a circular ring structure. Specifically, the inner diameter of the coupling ring is configured to be 10 mm, and the outer diameter is configured to be 12 mm.

[0096] In an exemplary embodiment, the size of the ground layer 5 includes but is not limited to being configured to be 20 (length) * 18 (width) mm. 2 , so as to completely cover the second surface of the substrate. Further, the connection layers located on both sides of the ground layer 5 are configured to be connected to the long sides of the two dipole antennas, and the size includes but is not limited to being configured to be 8 (height) * 1.6 (width) mm 2 .

[0097] In an illustrative embodiment, the second electronic chip adopts the same model as the first electronic tag (without a coupling ring) in the above-mentioned related art, namely, Qstar 7U.

[0098] Based on the second electronic tag provided in the above embodiment, the second electronic tag is attached to the same metal surface as the first electronic tag (without a coupling ring). The performance parameters of the second electronic tag can be referred to Figures 6 to 8 shown.

[0099] Figure 6 is based on Figure 4 Directional diagram of an electronic tag attached to a metal surface. Figure 7 is based on Figure 4 A schematic diagram of the return loss curve of the electronic tag is shown. Figure 8 is based on Figure 4 Schematic diagram of the impedance curve of the electronic tag shown.

[0100] Reference Figure 6 As shown, the second electronic tag is attached to the metal surface, and the gain of the antenna layer of the electronic tag is located on the positive radiation surface, and the gain is 0.8 dB.

[0101] Figure 7 The vertical axis (i.e. Figure 7 The axis extending in the left-right direction in the middle) is characterized as the S11 parameter, and the unit is dB; the horizontal axis (i.e. Figure 7 The axis extending in the up-down direction in the middle) is characterized as the operating frequency, and the unit is MHz;

[0102] Reference Figure 7 As shown, in the return loss of the above electronic tag on the metal surface, the resonant frequency of the antenna layer is 916MHz (i.e. Figure 7 Shown 1 ). Furthermore, the frequency width covered by the antenna layer in the -10dB bandwidth is approximately [870,940] MHz. It can be seen that when the second electronic tag is attached to a metal surface, the resonant frequency of the antenna layer of the second electronic tag covers the operating frequency of the above-mentioned chip model (i.e., Qstar 7U) (i.e., about 900 MHz, such as 902-928 MHz).

[0103] Figure 8 The vertical axis (i.e. Figure 8 The axis extending in the left-right direction in the middle) is characterized by impedance, and the horizontal axis (i.e. Figure 8 The axis extending in the up-down direction in the figure is represented as the operating frequency.

[0104] Reference Figure 8 As shown, at the operating frequency (for example, 916MHz) of the chip of the above model (i.e., Qstar 7U), the complex impedance of the antenna layer of the above electronic tag is 5-j137 ohms, while the complex impedance of the chip of the above electronic tag is 6-j137 ohms. It can be seen that the impedance of the chip of the above electronic tag forms a good impedance coupling conjugate match with the antenna layer.

[0105] In such an implementation, in the use scenario where the second electronic tag is attached to a metal surface, the configured coupling ring reduces the difficulty of conjugate matching of the antenna layer and the chip impedance, so that the antenna layer of the second electronic tag and the chip form a conjugate matching relationship over a wider frequency band. The resonant frequency of the second electronic tag is lowered, so that the resonant frequency of the second electronic tag is within the operating frequency band of the chip and / or the reader, and the operating bandwidth of the antenna layer is expanded, thereby reducing the impact of the external metal environment on the input impedance of the antenna layer.

[0106] Fig. 9 is based on Figure 4 The figure shows a curve diagram of the return loss of coupling loops of different sizes in the configuration of the electronic tag.

[0107] Fig. 9 The vertical axis (i.e. Fig. 9 The axis extending in the left-right direction in the middle) is characterized as the S11 parameter, and the unit is dB; the horizontal axis (i.e. Fig. 9 The axis extending along the up-down direction in the figure is represented as the operating frequency, and the unit is MHz.

[0108] In an illustrative embodiment, Fig. 9 As shown, under the condition that the width of the coupling loop remains unchanged (such as the difference between the inner diameter and the outer diameter of the coupling loop is 2 mm), the outer diameter of the coupling loop is adjusted, including but not limited to any value of 18 mm, 16 mm, 14 mm, 12 mm and 8 mm. It can be observed that as the outer diameter (including the inner diameter) of the coupling loop decreases, the resonant frequency of the antenna layer generally shifts to the higher frequency side (from around 916 MHz to around 943 MHz).

[0109] In such an implementation, the purpose of adjusting the resonant frequency of the electronic tag can be achieved by adjusting the outer diameter (including the inner diameter) of the coupling ring without changing the port impedance of the antenna layer of the electronic tag and the matching state of the electronic tag and the chip. Therefore, it is applicable to tuning coupling rings of different sizes used in electronic tags, so as to simplify the design and manufacturing process of the electronic tag.

[0110] According to the identification system provided by the present disclosure, not shown in the figure, it includes a reader and an electronic tag. The reader is configured to generate electromagnetic waves. The electronic tag is configured to respond to the electromagnetic waves generated by the reader by backscatter coupling to output a radio frequency signal to the reader, so that the electronic tag is recognized by the reader.

[0111] In an exemplary embodiment, the electronic tag includes an active electronic tag or a passive electronic tag. The chip of the electronic tag is configured with a logic control unit, a memory unit and a transceiver unit, so that the chip has computing functions such as decoding, decryption and signal transceiver.

[0112] It should also be noted that the directional terms mentioned in the embodiments, such as "upper", "lower", "front", "back", "left", "right", etc., are only reference directions of the drawings and are not intended to limit the scope of protection of the present disclosure. Throughout the drawings, the same elements are represented by the same or similar reference numerals. Conventional structures or configurations will be omitted when they may cause confusion in the understanding of the present disclosure.

[0113] The embodiments of the present disclosure are described above. However, these embodiments are only for illustrative purposes and are not intended to limit the scope of the present disclosure. Although the embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage. The scope of the present disclosure is defined by the attached claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. An electronic tag, characterized in that: include: base(4); An electrical base layer (3) is arranged on the first surface of the substrate (4); An antenna layer (2) is formed on a surface of the electrical base layer (3) which is away from the substrate (4) and is suitable for forming an electrical signal in response to an external electromagnetic field; A chip (7), arranged in the middle of the antenna layer (2), adapted to output a radio frequency signal in response to the electrical signal; as well as The coupling ring (1) is constructed to be arranged around the chip (7) with the chip (7) as the center, and is suitable for responding to the electromagnetic field to make the circuit formed by the antenna layer (2) and the chip (7) perform impedance matching to tune the resonant frequency of the electronic tag.

2. The electronic tag according to claim 1, characterized in that: The coupling ring (1) is arranged on a surface of the electrical base layer (3) facing the substrate (4).

3. The electronic tag according to claim 2, characterized in that: The antenna layer (2) and / or the coupling loop (1) are configured to protrude from the substrate (3).

4. The electronic tag according to claim 1, characterized in that: The coupling ring (1) is arranged in the substrate (4), and the plane where the coupling ring (1) is located is parallel to the first surface of the substrate (4).

5. The electronic tag according to claim 1, characterized in that: The coupling ring (1) is constructed as a circle-centered symmetrical ring structure.

6. The electronic tag according to any one of claims 1 to 5, characterized in that: The substrate (4) is configured as a columnar structure.

7. The electronic tag according to any one of claims 1 to 5, characterized in that: The antenna layer (2) comprises at least one pair of dipole antennas, and the two dipole antennas in each pair of dipole antennas are symmetrically arranged.

8. The electronic tag according to claim 7, characterized in that: Each of the dipole antennas comprises a structure configured as a trapezoid; The length of a first side of one dipole antenna in each pair of the dipole antennas, which faces the other dipole antenna, is shorter than the length of a second side which is away from the first side, and the second side extends to the side edge of the substrate (3) and is configured to be substantially the same as the length of the side edge of the substrate (3), so that the impedance of the antenna layer (2) changes gradually.

9. The electronic tag according to claim 7, characterized in that: The chip (7) is arranged between the paired dipole antennas.

10. The electronic tag according to claim 1, characterized in that: It also includes a grounding layer (5) arranged on a second surface of the substrate (4) opposite to the first surface, and configured to be electrically connected to the antenna layer (2) so that the antenna layer (2) and the grounding layer (5) have zero potential, which is suitable for grounding the electronic tag.

11. The electronic tag according to claim 10, characterized in that: The ground layer (5) is configured to substantially coincide with the second surface of the substrate (4).

12. The electronic tag according to claim 10 or 11, characterized in that: It also includes two connection layers (6) symmetrically arranged between the first surface and the second surface of the substrate (4) to electrically connect the antenna layer (2) and the ground layer (5).

13. The electronic tag according to claim 12, characterized in that: The ground layer (5) and the connection layer (6) are constructed to be integrally formed.

14. A recognition system, characterized in that: include: a reader configured to generate electromagnetic waves; as well as The electronic tag according to any one of claims 1 to 13 is configured to respond to backscatter coupling of the electromagnetic wave generated by the reader to output a radio frequency signal to the reader, so that the electronic tag is recognized by the reader.

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