LED chip and manufacturing method thereof

Abstract

An LED chip and a method for manufacturing the same, the LED chip comprising a conductive substrate, a bonding layer, an epitaxial structure, a first electrode pad, and a second electrode pad. The epitaxial structure is provided with a first surface facing the conductive substrate and a cutting groove and a conduction groove opening on the first surface; the cutting groove extends along a first direction and at least penetrates the second-type semiconductor layer, and the conduction groove exposes a portion of the surface of the second-type semiconductor layer; the first direction is perpendicular to the conductive substrate and points from the conductive substrate to the epitaxial structure. The bonding layer bonds the conductive substrate and the epitaxial structure, and the portion of the bonding layer embedded in the cutting groove and the conduction groove is insulated from the epitaxial structure. The cutting groove and the conduction groove are provided on the epitaxial structure so that both sides of the bonding layer are embedded in the groove, thereby reducing the height difference between the two sides of the bonding layer, reducing the bonding void rate, and increasing the reliability of the chip.

Description

Technical Field

[0001] The present invention relates to the technical field of light emitting diodes, and more particularly to an LED chip and a manufacturing method thereof. Background Art

[0002] Light-emitting diodes (LEDs) offer advantages such as high luminous intensity, high efficiency, compact size, and long lifespan, making them considered one of the most promising light sources. In recent years, LEDs have been widely used in daily life, such as lighting, signal displays, backlights, automotive lighting, and large-screen displays.

[0003] Existing light-emitting diodes include horizontal and vertical types. Vertical light-emitting diodes are obtained by transferring the epitaxial structure to other substrates such as silicon, silicon carbide or metal substrates, and removing the original epitaxial growth substrate. Compared with the horizontal type, it can effectively improve the technical problems of light absorption, current crowding or poor heat dissipation caused by the epitaxial growth substrate. The transfer of the substrate generally adopts a bonding process, and the bonding is mainly achieved through metal-metal high-temperature and high-pressure bonding, that is, a metal bonding layer is formed between one side of the epitaxial structure and the substrate. However, due to the height difference on the surface of the epitaxial structure, bonding voids are easily generated during bonding. The presence of bonding voids will lead to large thermal resistance of the chip, poor heat dissipation, high junction temperature, and affect the reliability of the LED chip. In order to solve the above problems, this case was created. Summary of the Invention

[0004] In view of this, the present invention provides an LED chip and a manufacturing method thereof, which can reduce the bonding void rate and increase the reliability of the LED chip.

[0005] To achieve the above-mentioned object, the technical solution adopted by the present invention is as follows: an LED chip, comprising: a conductive substrate, a bonding layer, an epitaxial structure, a first electrode pad and a second electrode pad; the epitaxial structure at least comprises a first-type semiconductor layer, an active layer and a second-type semiconductor layer arranged in sequence along a first direction; the first direction is perpendicular to the conductive substrate and points from the conductive substrate to the epitaxial structure; the epitaxial structure is provided with a cutting groove and a conduction groove facing a first surface of the conductive substrate and opening at the first surface; the cutting groove extends along the first direction and at least penetrates the second-type semiconductor layer, and the conduction groove exposes a portion of the surface of the second-type semiconductor layer; the epitaxial structure also includes a first layer stacked on the first surface of the conductive substrate; the first layer is provided with a first layer and an active layer; the first layer is provided with a second layer and an active layer ... The second current expansion electrode of the first-type semiconductor layer, the second current expansion electrode is insulated from the first-type semiconductor layer, the active layer and the bonding layer and is electrically connected to the portion of the surface of the second-type semiconductor layer exposed by the conduction groove; the bonding layer is bonded to the conductive substrate and the epitaxial structure, and the portion of the bonding layer embedded in the cutting groove and the conduction groove is insulated from the epitaxial structure; the first electrode pad is provided on the side of the conductive substrate away from the epitaxial structure, and is electrically connected to the first-type semiconductor layer through the conductive substrate and the bonding layer, and the second electrode pad is provided on the side of the epitaxial structure away from the conductive substrate, and is electrically connected to the second current expansion electrode.

[0006] Furthermore, the opening size of the cutting groove and / or the conducting groove decreases along the first direction, and forms at least one first step surface arranged along the first direction toward the conductive substrate, and the first step surface reduces the surface area of ​​the bonding layer facing the bottom of the cutting groove and / or the conducting groove.

[0007] Furthermore, it also includes a second electrode; the second-type semiconductor layer is provided with a high-concentration doping region, and the high-concentration doping region is spaced apart from the active layer in the first direction; the conduction groove includes a first groove and a second groove; the first groove extends from the first surface to a side of the second-type semiconductor layer close to the active layer, and the second groove opens at the bottom of the first groove and extends to the high-concentration doping region to expose the high-concentration doping region; the bottom of the first groove constitutes the first step surface; the second electrode fills the second groove, and the surface facing the first groove is flush with the bottom of the first groove; the second electrode conducts the second-type semiconductor layer and the second electrode pad.

[0008] Furthermore, the cutting groove extends from the first surface and ends at a surface of the second-type semiconductor layer facing away from the active layer; the cutting groove at least has the first step surface located on a side of the second-type semiconductor layer close to the active layer.

[0009] Furthermore, the epitaxial structure also includes a reflective electrode and a first insulating layer; the epitaxial structure is provided with a light-emitting layer group, the light-emitting layer group including the first-type semiconductor layer, the active layer and the second-type semiconductor layer; the cutting groove and the conduction groove are provided in the light-emitting layer group to form a light-emitting mesa; the reflective electrode has independent first and second regions; the first region at least covers the side walls of the light-emitting mesa and the surface of the light-emitting mesa facing the conductive substrate, and the second region covers the second electrode; the reflective electrode is insulated from at least the side walls of the light-emitting mesa by a first insulating layer, and forms an omnidirectional reflector (ODR) structure with the first insulating layer; the first electrode pad is electrically connected to the first-type semiconductor layer through the first region of the reflective electrode, and the second electrode pad is electrically connected to the second-type semiconductor layer through the second region of the reflective electrode.

[0010] Furthermore, the epitaxial structure also includes a first current expansion electrode; the first current expansion electrode covers the reflective electrode in the first region to conduct the first electrode pad and the first type semiconductor layer; the second current expansion electrode also covers the reflective electrode in the second region and is electrically connected to the second electrode pad to conduct the second electrode pad and the second type semiconductor layer.

[0011] Furthermore, the band gap of the first-type semiconductor layer is greater than the energy of the wavelength of photons emitted by the active layer.

[0012] Furthermore, a first hole exposing the second current spreading electrode is provided on a side of the epitaxial structure facing away from the conductive substrate; the second electrode pad is located in the first hole and electrically connected to the second current spreading electrode.

[0013] Furthermore, the light-emitting mesa is divided into a plurality of sub-mesas; and the sub-mesas are electrically connected to each other through the first current spreading electrode.

[0014] Furthermore, the side wall of each sub-table is an inclined surface, and the angle between the side wall of each sub-table and a plane perpendicular to the first direction is A, and 15°≤A≤60°.

[0015] The present application also provides a method for manufacturing an LED chip, which comprises the following steps:

[0016] A growth substrate is provided; an epitaxial structure is grown on a surface of one side of the growth substrate; the epitaxial structure comprises at least a second-type semiconductor layer, an active layer, and a first-type semiconductor layer arranged in sequence along a direction away from the growth substrate; a cutting groove and a conduction groove are formed on the epitaxial structure, the cutting groove and the conduction groove opening on a surface of the epitaxial structure away from the growth substrate; the cutting groove extends along a first direction and penetrates at least the second-type semiconductor layer, the conduction groove exposes a portion of the surface of the second-type semiconductor layer; the formation of the epitaxial structure further comprises forming a second current spreading electrode stacked on the first-type semiconductor layer, the second current spreading electrode being electrically connected to the portion of the surface of the second-type semiconductor layer exposed by the conduction groove; the second current spreading electrode is insulated from the first-type semiconductor layer and the active layer; a conductive substrate is provided; Making a bonding layer; making the bonding layer includes making a first bonding sublayer on the surface of the conductive substrate facing the epitaxial structure and making a second bonding sublayer on the side of the epitaxial structure facing the conductive substrate; the first bonding sublayer and the second bonding sublayer are bonded to connect the conductive substrate and the epitaxial structure; the portion of the bonding layer embedded in the cutting groove and the conduction groove is insulated from the epitaxial structure; the second current expansion electrode is insulated from the bonding layer; peeling off the growth substrate; making a first electrode pad and a second electrode pad; the first electrode pad is provided on the side of the conductive substrate away from the epitaxial structure, and is electrically connected to the first type semiconductor layer through the conductive substrate and the bonding layer, and the second electrode pad is provided on the side of the epitaxial structure away from the conductive substrate, and is electrically connected to the second current expansion electrode.

[0017] Furthermore, the opening size of the cutting groove and / or the conducting groove decreases along the first direction, and forms at least one first step surface arranged along the first direction toward the conductive substrate, and the first step surface reduces the surface area of ​​the bonding layer facing the bottom of the cutting groove and / or the conducting groove.

[0018] Furthermore, the second-type semiconductor layer is provided with a high-concentration doping region, and the high-concentration doping region is spaced from the active layer in a first direction; the first direction is perpendicular to the conductive substrate and points from the conductive substrate to the epitaxial structure; the conduction groove includes a first groove and a second groove; the first groove extends from the surface of the epitaxial structure away from the growth substrate to the side of the second-type semiconductor layer close to the active layer, and the second groove opens at the bottom of the first groove and extends to the high-concentration doping region to expose the high-concentration doping region; the bottom of the first groove constitutes the first step surface; before forming the bonding layer, it also includes forming a second electrode in the second groove; the second electrode fills the second groove, and the surface facing the first groove is flush with the bottom of the first groove; the second electrode conducts the second-type semiconductor layer and the second electrode pad.

[0019] Furthermore, the cutting groove extends from the first surface and ends at a surface of the second-type semiconductor layer facing away from the active layer; the cutting groove at least has the first step surface located on a side of the second-type semiconductor layer close to the active layer.

[0020] Compared with the existing technology, the technical solution provided by the present invention has at least the following advantages:

[0021] 1. An LED chip comprises a conductive substrate, a bonding layer, an epitaxial structure, a first electrode pad, and a second electrode pad; the epitaxial structure comprises at least a first-type semiconductor layer, an active layer, and a second-type semiconductor layer sequentially arranged along a first direction; the first direction is perpendicular to the conductive substrate and points from the conductive substrate to the epitaxial structure; the epitaxial structure is provided with a first surface facing the conductive substrate and a cutting groove and a conduction groove opening on the first surface; the cutting groove extends along the first direction and at least penetrates the second-type semiconductor layer, and the conduction groove exposes a portion of the surface of the second-type semiconductor layer; the epitaxial structure further comprises a first-type semiconductor layer stacked on the first-type semiconductor layer. The second current expansion electrode of the semiconductor layer is insulated from the first-type semiconductor layer, the active layer, and the bonding layer, and is electrically connected to the portion of the surface of the second-type semiconductor layer exposed by the conductive groove; the bonding layer is bonded to the conductive substrate and the epitaxial structure, and the portion of the bonding layer embedded in the cutting groove and the conductive groove is insulated from the epitaxial structure; the first electrode pad is provided on the side of the conductive substrate facing away from the epitaxial structure, and is electrically connected to the first-type semiconductor layer through the conductive substrate and the bonding layer; the second electrode pad is provided on the side of the epitaxial structure facing away from the conductive substrate, and is electrically connected to the second current expansion electrode. Due to the above-mentioned structural arrangement, the cutting groove and the conductive groove are provided on the epitaxial structure, so that both sides of the bonding layer are embedded in the groove, reducing the height difference between the two sides of the bonding layer, reducing the bonding void rate, and increasing the reliability of the chip.

[0022] 2. The opening size of the cutting groove and / or the conductive groove decreases along a first direction, forming at least one first step surface arranged along the first direction and facing the conductive substrate. When the bonding layer is embedded in the cutting groove and / or the conductive groove, the bonding layer within the groove has the largest height difference only in the area directly opposite the groove bottom, and the height difference of the remaining areas is smaller than the maximum height difference. This method reduces the height difference of the bonding layer in the portion of the groove, reduces the bonding void rate, and improves the reliability of the LED chip.

[0023] 3. The high-concentration doped region and the active layer are spaced apart in the first direction, which can prevent the high-concentration doped region from affecting the light extraction rate of the active layer. The high-concentration doped region of the second-type semiconductor layer is exposed through the second groove, so that the high-concentration doped region of the second-type semiconductor layer can be electrically connected to the second electrode pad. The bottom of the first groove constitutes a first step surface, so that when the bonding layer is embedded in the conductive groove, only the area corresponding to the second groove forms the maximum height difference, and the height differences of the remaining areas are all smaller than the maximum height difference. In this way, the height difference of some areas in the conductive groove is reduced, the bonding void rate is reduced, and the reliability of the LED chip is increased. Furthermore, the second groove is filled with the second electrode, and the surface facing the first groove is flush with the bottom of the first groove, thereby reducing the overall height difference of the conductive groove, thereby reducing the overall height difference of the bonding layer embedded in the conductive groove, reducing the bonding void rate, and increasing the reliability of the LED chip.

[0024] 4. Since the cutting groove has at least the first step surface located on the side of the second-type semiconductor layer close to the active layer, it is possible to reduce the height difference of some areas in the cutting groove, reduce the bonding void rate, increase the reliability of the LED chip, and improve the cutting yield of the later stage. Furthermore, when most chips are grown, auxiliary functional layers such as a buffer layer are set under the N-type semiconductor layer, and the existing cutting groove generally extends to penetrate the auxiliary functional layer. In this case, the cutting groove of the present application extends to penetrate the second-type semiconductor layer, and the remaining auxiliary functional layers can be divided after the epitaxial structure is bonded to the conductive substrate to achieve the separation of the epitaxial structure of a single LED chip; by etching the front and back sides of the epitaxial structure, the overall height difference of the cutting groove is further reduced, and the bonding void rate is reduced.

[0025] 5. The first region of the reflective electrode covers the sidewalls of the light-emitting mesa and the surface of the light-emitting mesa facing the conductive substrate, and together with the first insulating layer, forms an omnidirectional reflector (ODR) structure, which reflects light from the surface and sidewalls of the light-emitting mesa, thereby increasing the light output of the LED chip. The second region of the reflective electrode covers the second electrode, thereby increasing the current spreading capability of the second electrode. In addition, the first region of the reflective electrode also serves as the first electrode, simplifying the structure and reducing the manufacturing process.

[0026] 6. The first current expansion electrode and the second current expansion electrode respectively increase the current expansion capability of the first electrode pad and the second electrode pad, reduce the voltage of the LED, and ensure high current drive.

[0027] 7. The band gap of the first-type semiconductor layer is greater than the energy of the wavelength of the photons emitted by the active layer, so that the light generated by the active layer can pass through the first-type semiconductor layer, which can reduce the light absorption of the first-type semiconductor layer and further reduce the reflection effect of the reflective electrode affected by the light absorption of the first-type semiconductor layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0029] Figure 1 This is a schematic diagram of the cross-sectional structure of the LED chip of this application;

[0030] Figure 2-15 This is a schematic diagram of the LED chip manufacturing process for this application;

[0031] Figure 16 This is a structural diagram of the light-emitting table divided into sub-tables in this application.

[0032] Figure 1: Conductive substrate 1; bonding layer 2; first bonding sublayer 3; second bonding sublayer 4; first electrode pad 5; second electrode pad 6; first-type semiconductor layer 7; active layer 8; second-type semiconductor layer 9; high-concentration doped region 10; conduction groove 11; first groove 111; second groove 112; cutting groove 13; first step surface 14; second electrode 15; buffer layer 16; first insulating layer 17; reflecting electrode 18; first current spreading electrode 19; second current spreading electrode 20; second insulating layer 21; first hole 22; growth substrate 23; first direction D. DETAILED DESCRIPTION

[0033] To make the content of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0034] In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can also be implemented in other ways different from those described herein. Those skilled in the art can make similar generalizations without violating the connotation of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below. Secondly, the present application is described in detail with reference to schematic diagrams. When describing the embodiments of the present application, for ease of explanation, the cross-sectional views showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present application. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0035] This application provides an LED chip, such as Figure 1 、 4 As shown, it includes a conductive substrate 1, a bonding layer 2, an epitaxial structure, a first electrode pad 5, and a second electrode pad 6. The epitaxial structure includes at least a first-type semiconductor layer 7, an active layer 8, and a second-type semiconductor layer 9, arranged in sequence along a first direction D. The first direction D is perpendicular to the conductive substrate 1 and extends from the conductive substrate 1 to the epitaxial structure. The epitaxial structure is provided with a cutting groove 13 and a conductive groove 11, which face the first surface of the conductive substrate 1 and open on the first surface. The cutting groove 13 extends along the first direction D and penetrates at least the second-type semiconductor layer 9. The conductive groove 11 exposes a portion of the surface of the second-type semiconductor layer 9. The epitaxial structure also includes a second current spreading electrode 20 stacked on the first-type semiconductor layer 7. The second current spreading electrode 20 is insulated from the first-type semiconductor layer 7, the active layer 8, and the bonding layer 2, and is electrically connected to the portion of the surface of the second-type semiconductor layer 9 exposed by the conductive groove 11. The bonding layer 2 bonds the conductive substrate 1 to the epitaxial structure, and the portion of the bonding layer 2 embedded in the cutting groove 13 and the conductive groove 11 is insulated from the epitaxial structure. The first electrode pad 5 is arranged on the side of the conductive substrate 1 away from the epitaxial structure, and is electrically connected to the first type semiconductor layer 7 through the conductive substrate 1 and the bonding layer 2. The second electrode pad 6 is arranged on the side of the epitaxial structure away from the conductive substrate 1, and is electrically connected to the second current spreading electrode 20.

[0036] Due to the aforementioned structural arrangement, the LED chip is provided with two grooves, cutting groove 13 and conducting groove 11, on the epitaxial structure. This allows both sides of the bonding layer 2 to be embedded within the grooves, reducing the height difference between the two sides of the bonding layer 2, reducing the bonding void ratio, and improving the chip's reliability. Furthermore, by bonding the epitaxial structure to the conductive substrate 1, the growth substrate 23 used during fabrication can be removed, forming a thin-film LED chip. This thin-film LED chip has a surface-emitting light source that conforms to the Lambertian distribution and is easy to distribute.

[0037] like Figure 4 As shown, the opening size of the cutting groove 13 and / or the conductive groove 11 decreases along the first direction D, and forms at least one first step surface 14 arranged along the first direction D and facing the conductive substrate 1. The first step surface 14 reduces the surface area of ​​the bonding layer 2 facing the bottom of the cutting groove 13 and / or the conductive groove 11. The opening size of the cutting groove 13 and / or the conductive groove 11 refers to its opening size along the second direction, which is perpendicular to the first direction D.

[0038] The opening size of the cutting groove 13 and / or the conductive groove 11 decreases along the first direction D, forming at least one first step surface 14 arranged along the first direction D and facing the conductive substrate 1. When the bonding layer 2 is embedded in the cutting groove 13 and / or the conductive groove 11, the bonding layer 2 within the groove has the largest height difference only in the area directly opposite the groove bottom, while the height difference of the remaining areas is smaller than the maximum height difference. In this way, the height difference of the bonding layer 2 within the groove is reduced, the bonding void rate is reduced, and the reliability of the LED chip is improved.

[0039] Among them, one of the first-type semiconductor layer 7 and the second-type semiconductor layer 9 is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In this application, the first-type semiconductor layer 7 is a P-type semiconductor layer, and the second-type semiconductor layer 9 is an N-type semiconductor layer. The first-type semiconductor layer 7 can be P-AlGaN, and the second-type semiconductor layer 9 can be N-AlGaN. Among them, the P-type semiconductor layer is a region where heat generation is serious. The conductive substrate 1 is arranged on one side of the P-type semiconductor layer to facilitate heat dissipation.

[0040] like Figure 1 As shown, the bonding layer 2 includes a first bonding sublayer 3 located on the surface of the conductive substrate 1 facing the epitaxial structure and a second bonding sublayer 4 located on the side of the epitaxial structure facing the conductive substrate 1. The first bonding sublayer 3 and the second bonding sublayer 4 are bonded to each other to bond the conductive substrate 1 to the epitaxial structure.

[0041] In a preferred embodiment, if Figure 4 As shown, at least one first step surface 14 is located on a side of the second-type semiconductor layer 9 close to the active layer 8. That is, the at least one first step surface 14 can be the surface of the second-type semiconductor layer 9 close to the active layer 8, or can be formed by etching to the side of the second-type semiconductor layer 9 close to the active layer 8 during fabrication.

[0042] In a preferred embodiment, if Figure 1 and 5 As shown, the LED chip further includes a second electrode 15. The second type semiconductor layer 9 is provided with a high concentration doping region 10 ( Figure 2 The high-concentration doped region 10 is spaced apart from the active layer 8 in the first direction D. Figure 1 、 2As shown in Figures 4 and 5, the conductive trench 11 includes a first trench 111 and a second trench 112. The first trench 111 extends from the first surface to the side of the second-type semiconductor layer 9 near the active layer 8. The second trench 112 opens at the bottom of the first trench 111 and extends to the highly doped region 10, exposing the highly doped region 10. The bottom of the first trench 111 forms a first step surface 14. The second electrode 15 fills the second trench 112, and the surface facing the first trench 111 is flush with the bottom of the first trench 111. The second electrode 15 conducts electrical conduction between the second-type semiconductor layer 9 and the second electrode pad 6.

[0043] The high-concentration doped region 10 is spaced apart from the active layer 8 in the first direction D, thereby preventing the high-concentration doped region 10 from affecting the light extraction efficiency of the active layer 8. The high-concentration doped region 10 of the second-type semiconductor layer 9 is exposed through the second groove 112, so that the high-concentration doped region 10 of the second-type semiconductor layer 9 can be electrically connected to the second electrode pad 6. The bottom of the first groove 111 forms a first step surface 14, so that when the bonding layer 2 is embedded in the conductive groove 11, only the area corresponding to the second groove 112 forms the maximum height difference of the bonding layer 2, and the height difference of the remaining areas is less than the maximum height difference. In this way, the height difference of some areas within the conductive groove 11 is reduced, the bonding void rate is reduced, and the reliability of the LED chip is increased. Furthermore, the second electrode 15 is used to fill the second groove 112, and the surface facing the first groove 111 is flush with the bottom of the first groove 111, reducing the overall height difference of the conductive groove 11, thereby reducing the overall height difference of the bonding layer 2 embedded in the conductive groove 11, reducing the bonding void rate, and increasing the reliability of the LED chip.

[0044] In a preferred embodiment, if Figure 1 、 4As shown, the cutting groove 13 extends from the first surface and terminates at the surface of the second-type semiconductor layer 9 facing away from the active layer 8; the cutting groove 13 has at least a first step surface 14 located on the side of the second-type semiconductor layer 9 close to the active layer 8. That is, at least one first step surface 14 of the cutting groove 13 can be the surface of the second-type semiconductor layer 9 close to the active layer 8, or it can be formed by etching into the interior of the second-type semiconductor layer 9 close to the active layer 8 during manufacturing. Among them, because the cutting groove 13 has at least a first step surface 14 located on the side of the second-type semiconductor layer 9 close to the active layer 8, it can reduce the height difference of some areas within the cutting groove 13, reduce the bonding void rate, increase the reliability of the LED chip, and improve the cutting yield of the subsequent stage. Furthermore, when most chips are grown, auxiliary functional layers such as a buffer layer 16 are provided below the N-type semiconductor layer. The existing cutting groove 13 generally extends until it penetrates the auxiliary functional layer. In this case, the cutting groove 13 of the present application extends until it penetrates the second-type semiconductor layer 9. The remaining auxiliary functional layers can be separated after the epitaxial structure is bonded to the conductive substrate 1, thereby achieving the separation of the epitaxial structure of a single LED chip. By etching the front and back sides of the epitaxial structure, the overall height difference of the cutting groove 13 is further reduced, thereby reducing the bonding void rate.

[0045] Preferably, if Figure 1 As shown, a buffer layer 16 is further provided below the second-type semiconductor layer 9 . The buffer layer 16 may be an AlN layer, a superlattice layer, or an AlGaN layer with a graded composition.

[0046] In a preferred embodiment, if Figure 1 As shown, the epitaxial structure further includes a reflective electrode 18 and a first insulating layer 17. Figure 4 As shown, the epitaxial structure includes a light-emitting layer group, which includes a first-type semiconductor layer 7, an active layer 8, and a second-type semiconductor layer 9. Cutting grooves 13 and conductive grooves 11 are provided in the light-emitting layer group to form a light-emitting mesa. In this application, the light-emitting mesa is located between the cutting grooves 13 and the conductive grooves 11. The first surface of the epitaxial structure is the surface of the first-type semiconductor layer 7 facing the conductive substrate 1.

[0047] like Figure 1 、 7As shown, the reflective electrode 18 has independent first and second regions. The first region covers at least the sidewalls of the light-emitting mesa and the surface of the light-emitting mesa facing the conductive substrate 1, while the second region covers the second electrode 15. The reflective electrode 18 is insulated from at least the sidewalls of the light-emitting mesa by a first insulating layer 17 and forms an omnidirectional reflector (ODR) structure with the first insulating layer 17. The first electrode pad 5 is electrically connected to the first-type semiconductor layer 7 via the first region of the reflective electrode 18, and the second electrode pad 6 is electrically connected to the second-type semiconductor layer 9 via the second region of the reflective electrode 18. The first region of the reflective electrode 18 covers the sidewalls of the light-emitting mesa and the surface of the light-emitting mesa facing the conductive substrate 1, and forms an omnidirectional reflector (ODR) structure with the first insulating layer 17. This structure reflects light from the surface and sides of the light-emitting mesa, increasing light output from the LED chip. In particular, for LED chips with a high proportion of side light output, the provision of the reflective electrode 18 significantly increases light output. The second region of the reflective electrode 18 covers the second electrode 15, which increases the current spreading capability of the second electrode 15. In addition, the first region of the reflective electrode 18 also serves as the first electrode, which has a simple structure and reduces the manufacturing process. Figure 1 、 6 As shown, the first insulating layer 17 covers the exposed surface of the light emitting layer group close to the conductive substrate 1 and has a first through hole exposing the first-type semiconductor layer 7 and a second through hole exposing the second electrode 15 .

[0048] In a preferred embodiment, if Figure 1 、 8 As shown, the epitaxial structure also includes a first current spreading electrode 19; the first current spreading electrode 19 covers the first region of the reflective electrode 18 to conduct the first electrode pad 5 and the first-type semiconductor layer 7. The second current spreading electrode 20 covers the second region of the reflective electrode 18 and is electrically connected to the second electrode to conduct the second electrode pad 6 and the second-type semiconductor layer 9. Specifically, the first region of the reflective electrode 18 is wrapped by the first insulating layer 17 and the first current spreading electrode 19. The second current spreading electrode 20 covers the surface and sidewalls of the second region of the reflective electrode 18, and also covers the groove wall facing the light-emitting mesa in the conductive groove 11 and the mesa of the epitaxial structure away from the light-emitting mesa. Among them, the first current spreading electrode 19 and the second current spreading electrode 20 respectively increase the current spreading capability of the first electrode pad 5 and the second electrode pad 6, reduce the voltage of the LED, and ensure high current drive.

[0049] Further, if Figure 1 、 9As shown, the epitaxial structure further includes a second insulating layer 21, which covers the first insulating layer 17, the first current spreading electrode 19, and the second current spreading electrode 20, and exposes a portion of the first current spreading electrode 19. The second insulating layer 21 insulates the second current spreading electrode 20 from the first current spreading electrode 19. Except for the area in contact with the first current spreading electrode 19, the remaining areas of the bonding layer 2 are insulated by the second insulating layer 21.

[0050] The film layers covering the walls of the cutting groove 13 all have step surfaces corresponding to the first step surfaces 14 of the cutting groove 13. This arrangement further reduces the area of ​​the bonding layer 2 within the cutting groove 13 where the height difference is the maximum. That is, the areas of the first insulating layer 17, the reflective electrode 18, the first current spreading electrode 19, and the second insulating layer 21 covering the walls of the cutting groove 13 all have step surfaces corresponding to the first step surfaces 14 of the cutting groove 13.

[0051] In a preferred embodiment, the band gap of the first-type semiconductor layer 7 is greater than the energy of the wavelength of the photons emitted by the active layer 8; so that the light generated by the active layer 8 can pass through the first-type semiconductor layer 7, which can reduce the light absorption of the first-type semiconductor layer 7, and further reduce the reflection effect of the reflective electrode 18 affected by the light absorption of the first-type semiconductor layer 7. For example, the P-AlGaN of the present application can be selected to have a high Al component and a high hole concentration, so that the band gap of the P-AlGaN is greater than the energy of the wavelength of the photons emitted by the active layer 8; wherein the Al component is selected according to the wavelength of the photons emitted by the active layer 8, and the hole concentration can be greater than or equal to 10 17 cm -3 .

[0052] In a preferred embodiment, if Figure 1 、 15 As shown, a first hole 22 exposing the second current spreading electrode 20 is provided on the side of the epitaxial structure facing away from the conductive substrate 1 ; the second electrode pad 6 is located in the first hole 22 and is electrically connected to the second current spreading electrode 20 .

[0053] In a preferred embodiment, Figure 16 As shown, the light-emitting mesa is divided into several sub-mesas. The sub-mesas are electrically connected to each other via a first current spreading electrode 19. Preferably, the sub-mesas are arranged in an array, and the sub-mesas can be square, circular, or other structures. The array arrangement can be a square lattice arrangement or a hexagonal honeycomb arrangement. Preferably, the sidewalls of each sub-mesa are inclined, and the angle between the sidewalls of each sub-mesa and the plane perpendicular to the first direction D is A, 15°≤A≤60°; this arrangement ensures that the side light emitted from each sub-mesa has a good reflection effect through the reflective electrode 18.

[0054] In a preferred embodiment, a roughened structure (not shown) can be provided on the surface of the epitaxial structure facing away from the conductive substrate 1 to further improve the light extraction efficiency of the LED chip. In a preferred embodiment, the LED chip also includes a passivation layer (not shown), which covers the surface and sidewalls of the epitaxial structure facing away from the conductive substrate 1 and exposes the second electrode pad 6.

[0055] like Figure 1-15 As shown, the present application also provides a method for manufacturing an LED chip, which specifically includes the following steps:

[0056] A growth substrate 23 is provided. The growth substrate 23 includes but is not limited to a sapphire substrate.

[0057] An epitaxial structure is grown on the surface of one side of the growth substrate 23; the epitaxial structure includes at least a second-type semiconductor layer 9, an active layer 8 and a first-type semiconductor layer 7 arranged in sequence along a direction away from the growth substrate 23; a cutting groove 13 and a conduction groove 11 are made on the epitaxial structure, and the cutting groove 13 and the conduction groove 11 are open on the surface of the epitaxial structure away from the growth substrate 23; the cutting groove 13 extends along a first direction D and at least passes through the second-type semiconductor layer 9, and the conduction groove 11 exposes a portion of the surface of the second-type semiconductor layer 9; the production of the epitaxial structure also includes producing a second current expansion electrode 20 stacked on the first-type semiconductor layer 7, the second current expansion electrode 20 is electrically connected to the portion of the surface of the second-type semiconductor layer 9 exposed by the conduction groove 11; the second current expansion electrode 20 is insulated from the first-type semiconductor layer 7 and the active layer 8.

[0058] A conductive substrate 1 is provided.

[0059] Make bonding layer 2; Figure 10 As shown, fabricating the bonding layer 2 includes fabricating a first bonding sublayer 3 on the surface of the conductive substrate 1 facing the epitaxial structure and a second bonding sublayer 4 on the side of the epitaxial structure facing the conductive substrate 1. The first bonding sublayer 3 and the second bonding sublayer 4 are bonded to connect the conductive substrate 1 and the epitaxial structure. The portion of the bonding layer 2 embedded in the cutting groove and the conductive groove is insulated from the epitaxial structure. The second current spreading electrode 20 is insulated from the bonding layer 2.

[0060] The growth substrate 23 is peeled off.

[0061] A first electrode pad 5 and a second electrode pad 6 are produced; the first electrode pad 5 is arranged on the side of the conductive substrate 1 away from the epitaxial structure, and is electrically connected to the first type semiconductor layer 7 through the conductive substrate 1 and the bonding layer 2, and the second electrode pad 6 is arranged on the side of the epitaxial structure away from the conductive substrate 1, and is electrically connected to the second current expansion electrode 20.

[0062] One of the first-type semiconductor layer 7 and the second-type semiconductor layer 9 is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In this application, the first-type semiconductor layer 7 is a P-type semiconductor layer, and the second-type semiconductor layer 9 is an N-type semiconductor layer. The first-type semiconductor layer 7 can be P-AlGaN, and the second-type semiconductor layer 9 can be N-AlGaN.

[0063] Preferably, the opening size of the cutting groove 13 and / or the conducting groove 11 decreases along the first direction, and forms at least one first step surface 14 arranged along the first direction D toward the conductive substrate 1, and the first step surface 14 reduces the surface area of ​​the bonding layer 2 facing the bottom of the cutting groove 13 and / or the conducting groove 11.

[0064] Preferably, if Figure 4 As shown, at least one first step surface 14 is located on a side of the second-type semiconductor layer 9 close to the active layer 8 .

[0065] Preferably, if Figure 2 、 4 As shown, the second-type semiconductor layer 9 is provided with a highly doped region 10, which is spaced apart from the active layer 8 in a first direction D. The first direction D is perpendicular to the conductive substrate 1 and extends from the conductive substrate 1 toward the epitaxial structure. The conductive trench 11 includes a first trench 111 and a second trench 112. The first trench 111 extends from the surface of the epitaxial structure facing away from the growth substrate 23 to a side of the second-type semiconductor layer 9 near the active layer 8. The second trench 112 opens at the bottom of the first trench 111 and extends to the highly doped region 10, thereby exposing the highly doped region 10. The bottom of the first trench 111 forms a first step surface 14.

[0066] like Figure 5 As shown, before forming the bonding layer 2, a second electrode 15 is also formed in the second trench 112. The second electrode 15 fills the second trench 112, and the surface facing the first trench 111 is flush with the bottom of the first trench 111. The second electrode 15 conducts electricity between the second-type semiconductor layer 9 and the second electrode pad 6. After forming the second electrode 15, a high-temperature alloy is added to form an ohmic contact between the second electrode 15 and the second-type semiconductor layer 9.

[0067] Preferably, if Figure 4 As shown, the cutting groove 13 extends from the first surface and ends at the surface of the second-type semiconductor layer 9 facing away from the active layer 8 ; the cutting groove 13 has at least a first step surface 14 located in the second-type semiconductor layer 9 on the side close to the active layer 8 .

[0068] Preferably, if Figure 2As shown, the manufacturing method also includes growing a buffer layer 16 on the growth substrate 23 before growing the epitaxial structure on the growth substrate 23. The buffer layer 16 can be an AlN layer, a superlattice layer, or an AlGaN layer with a gradient composition. To facilitate the use of laser stripping of the growth substrate 23, a GaN sacrificial layer can be inserted at the interface between the buffer layer 16 and the growth substrate 23 or between the buffer layer 16 and the second-type semiconductor layer 9. Since there are many defects in the buffer layer 16, after the growth substrate 23 is stripped, the AlN layer can be etched away in its entirety or in large part. For example, in a deep ultraviolet LED chip, the AlN layer with many defects has a certain light absorption effect on ultraviolet light, and the light extraction efficiency is greatly affected by total reflection.

[0069] Preferably, if Figure 4 As shown, the epitaxial structure is provided with a light-emitting layer group, which includes a first-type semiconductor layer 7, an active layer 8 and a second-type semiconductor layer 9; cutting grooves 13 and conductive grooves 11 are provided in the light-emitting layer group to form a light-emitting mesa.

[0070] The epitaxial structure growth specifically includes: first growing the second-type semiconductor layer 9, the active layer 8, and the first-type semiconductor layer 7 on the growth substrate 23 in a direction away from the growth substrate 23, and then etching the light-emitting layer group to form the cutting groove 13 and the conduction groove 11. Specifically, the MESA1 etching is completed by photolithography and etching. The MESA1 is etched to the side of the second-type semiconductor layer 9 close to the active layer 8, that is, the active layer 8 can be completely etched and then stopped, or it can be etched a little bit further down without etching to the high-concentration doped region 10 of the second-type semiconductor layer 9. Figure 2-4 As shown, both the cutting groove 13 and the conducting groove 11 are etched by MESA1, wherein the groove on the left is used to form the cutting groove 13, and the groove on the right forms the first groove 111 of the conducting groove 11. Figure 3 、 4 As shown, MESA2 etching is performed in the first groove 111 region using photolithography and etching to form the second groove 112. DE (deep etching) etching is performed in the groove on the left using photolithography and etching to complete the formation of the cut groove 13. DE etching also has the effect of releasing stress in the epitaxial layer and slowing down the spread of epitaxial cracks caused by subsequent laser lift-off to other areas.

[0071] Preferably, if Figure 6 、 7As shown, fabricating the epitaxial structure also includes forming a reflective electrode 18 and a first insulating layer 17. The reflective electrode 18 has independent first and second regions. The first region covers at least the sidewalls of the light-emitting mesa and the surface of the light-emitting mesa facing the conductive substrate 1, while the second region covers the second electrode 15. The reflective electrode 18 is insulated from at least the sidewalls of the light-emitting mesa by the first insulating layer 17, and together with the first insulating layer 17, forms an omnidirectional reflector (ODR) structure. The first electrode pad 5 is electrically connected to the first-type semiconductor layer 7 via the first region of the reflective electrode 18, and the second electrode pad 6 is electrically connected to the second-type semiconductor layer 9 via the second region of the reflective electrode 18. Specifically, after the cutting groove 13 and the conductive trench 11 are formed, the first insulating layer 17 and the reflective electrode 18 are sequentially formed. The first insulating layer 17 covers the exposed surface of the light-emitting layer group near the conductive substrate 1 and has a first through-hole exposing the first-type semiconductor layer 7 and a second through-hole exposing the second electrode 15. In actual fabrication, the reflective electrode 18 can be fabricated by first forming a reflective electrode layer, followed by patterning to form the first and second regions of the reflective electrode 18. After the fabrication is completed, alloying is performed so that the first region of the reflective electrode 18 forms an ohmic contact with the first-type semiconductor layer 7 .

[0072] Preferably, if Figure 8 As shown, the epitaxial structure also includes a first current spreading electrode 19; the first current spreading electrode 19 covers the first region of the reflective electrode 18, providing electrical continuity between the first electrode pad 5 and the first-type semiconductor layer 7. The second current spreading electrode 20 covers the second region of the reflective electrode 18 and is electrically connected to the second electrode 15, providing electrical continuity between the second electrode pad 6 and the second-type semiconductor layer 9. Specifically, the first current spreading electrode 19 and the second current spreading electrode 20 are fabricated after the reflective electrode 18 is fabricated. In actual fabrication, a current spreading electrode layer can be grown and then patterned through photolithography and etching to form the first current spreading electrode 19 and the second current spreading electrode 20.

[0073] Further, if Figure 9 As shown, the epitaxial structure further includes a second insulating layer 21, which covers the first insulating layer 17, the first current spreading electrode 19 and the second current spreading electrode 20, and exposes a portion of the first current spreading electrode 19. The second insulating layer 21 insulates the second current spreading electrode 20 from the first current spreading electrode 19. Except for the area of ​​the bonding layer 2 that contacts the first current spreading electrode 19, the remaining areas are insulated and isolated by the second insulating layer 21. Specifically, after the first current spreading electrode 19 and the second current spreading electrode 20 are formed, the second insulating layer 21 is made. When the LED chip is manufactured, as shown in FIG. Figure 6-9As shown, the film layers covering the walls of the cutting groove 13 all have step surfaces corresponding to the first step surfaces 14 of the cutting groove 13. This arrangement further reduces the area of ​​the bonding layer 2 in the cutting groove 13 where the height difference is the maximum.

[0074] Preferably, the band gap of the first-type semiconductor layer 7 is greater than the energy of the wavelength of photons emitted by the active layer 8 .

[0075] Preferably, if Figure 15 As shown, a first hole 22 exposing the second current expansion electrode 20 is provided on the side of the epitaxial structure facing away from the conductive substrate 1; the second electrode pad 6 is located in the first hole 22 and is electrically connected to the second current expansion electrode 20. Specifically, after the growth substrate 23 is peeled off, the buffer layer 16 is removed or divided to achieve the separation of the epitaxial structure of a single LED chip. Then, the second-type semiconductor layer 9, the active layer 8 and the first-type semiconductor layer 7 are etched from the side facing away from the conductive substrate 1 to expose the first insulating layer 17 corresponding to the second current expansion electrode 20 area, and the first insulating layer 17 is etched to form a first hole 22. Among them, the cutting groove 13 does not extend to the buffer layer 16, which can reduce the depth of the cutting groove 13 and reduce the void rate caused by the height difference; and it helps to solve the problem of high mask requirements due to the large etching depth.

[0076] Preferably, after the cutting grooves 13 and the conducting grooves 11 are formed to form the light-emitting mesa, the light-emitting mesa can be further divided into several sub-mesas; each sub-mesa is electrically connected to each other via the first current spreading electrode 19. Preferably, the sub-mesas are arranged in an array, and the sub-mesas can have a square or circular structure, and the array arrangement can be a square lattice arrangement or a hexagonal honeycomb arrangement. Preferably, the sidewalls of each sub-mesa are inclined, and the angle A between the sidewalls of each sub-mesa and a plane perpendicular to the first direction D is 15°≤A≤60°. Figure 16 The schematic diagram of each sub-table is shown as an example.

[0077] Preferably, a roughened structure can be formed on the surface of the epitaxial structure facing away from the conductive substrate 1 to further improve the light extraction efficiency of the LED chip. Preferably, after the first electrode pad 5 and the second electrode pad 6 are formed, a passivation layer (not shown in the figure) is also formed. The passivation layer covers the surface and sidewalls of the epitaxial structure facing away from the conductive substrate 1, leaving the second electrode pad 6 exposed.

[0078] The LED chip manufacturing method provided in this application corresponds to the aforementioned LED chip and has any of the effects mentioned in the aforementioned LED chip. For features and effects not mentioned in the LED chip manufacturing method, reference can be made to the aforementioned LED chip.

[0079] It should be understood by those skilled in the art that, in the disclosure of the present invention, the terms "horizontal", "longitudinal", "upper", "lower" and the like indicate an orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, which are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, the above terms should not be understood as limiting the present invention. It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to in detail. The above description of the disclosed embodiments enables professionals and technicians in this field to implement or use the present invention. Various modifications to these embodiments will be obvious to professionals and technicians in this field, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that: include: A conductive substrate, a bonding layer, an epitaxial structure, a first electrode pad, and a second electrode pad; The epitaxial structure comprises at least a first-type semiconductor layer, an active layer, and a second-type semiconductor layer arranged in sequence along a first direction; the first direction is perpendicular to the conductive substrate and points from the conductive substrate to the epitaxial structure; the epitaxial structure is provided with a cutting groove and a conducting groove facing a first surface of the conductive substrate and opening on the first surface; The cutting groove extends along the first direction and at least penetrates the second-type semiconductor layer, and the conducting groove exposes a portion of the surface of the second-type semiconductor layer; The epitaxial structure further includes a second current spreading electrode stacked on the first-type semiconductor layer, the second current spreading electrode being insulated from the first-type semiconductor layer, the active layer and the bonding layer and electrically connected to a portion of the surface of the second-type semiconductor layer exposed by the conductive groove; The bonding layer is bonded to the conductive substrate and the epitaxial structure, and the portion of the bonding layer embedded in the cutting groove and the conducting groove is insulated from the epitaxial structure; The first electrode pad is arranged on the side of the conductive substrate away from the epitaxial structure, and is electrically connected to the first type semiconductor layer through the conductive substrate and the bonding layer. The second electrode pad is arranged on the side of the epitaxial structure away from the conductive substrate, and is electrically connected to the second current expansion electrode; the opening size of the cutting groove and the conductive groove decreases along the first direction, and forms at least one first step surface facing the conductive substrate along the first direction, and the first step surface reduces the surface area of ​​the bonding layer facing the bottom of the cutting groove and the conductive groove.

2. The LED chip according to claim 1, wherein: Also comprising a second electrode; The second-type semiconductor layer is provided with a high-concentration doping region, and the high-concentration doping region is spaced apart from the active layer in the first direction; The conductive groove includes a first groove and a second groove; the first groove extends from the first surface to a side of the second-type semiconductor layer close to the active layer, and the second groove opens at the bottom of the first groove and extends to the high-concentration doping region to expose the high-concentration doping region; The bottom of the first groove constitutes the first step surface; The second electrode fills the second groove, and a surface of the second electrode facing the first groove is flush with the bottom of the first groove; the second electrode conducts electricity between the second-type semiconductor layer and the second electrode pad.

3. The LED chip according to claim 1, wherein: The cutting groove extends from the first surface and ends at a surface of the second-type semiconductor layer away from the active layer; the cutting groove has at least the first step surface located on a side of the second-type semiconductor layer close to the active layer.

4. The LED chip according to claim 1, wherein: The epitaxial structure further includes a reflective electrode and a first insulating layer; the epitaxial structure is provided with a light-emitting layer group, the light-emitting layer group including the first-type semiconductor layer, the active layer and the second-type semiconductor layer; the cutting groove and the conductive groove are provided in the light-emitting layer group to form a light-emitting mesa; The reflective electrode has an independent first region and a second region; the first region covers at least the sidewalls of the light-emitting mesa and the surface of the light-emitting mesa facing the conductive substrate, and the second region covers the second electrode; the reflective electrode is insulated from at least the sidewalls of the light-emitting mesa by a first insulating layer, and forms an omnidirectional reflector (ODR) structure with the first insulating layer; the first electrode pad is electrically connected to the first-type semiconductor layer through the first region of the reflective electrode, and the second electrode pad is electrically connected to the second-type semiconductor layer through the second region of the reflective electrode.

5. The LED chip according to claim 4, wherein: The epitaxial structure also includes a first current spreading electrode; the first current spreading electrode covers the reflective electrode in the first region to conduct the first electrode pad and the first type semiconductor layer; the second current spreading electrode also covers the reflective electrode in the second region and is electrically connected to the second electrode pad to conduct the second electrode pad and the second type semiconductor layer.

6. The LED chip according to claim 1, wherein: The band gap of the first-type semiconductor layer is greater than the energy of the wavelength of photons emitted by the active layer.

7. The LED chip according to claim 1, wherein: A first hole exposing the second current spreading electrode is provided on a side of the epitaxial structure facing away from the conductive substrate; the second electrode pad is located in the first hole and is electrically connected to the second current spreading electrode.

8. The LED chip according to claim 5, wherein: The light-emitting mesa is divided into a plurality of sub-mesas; and the sub-mesas are electrically connected to each other through the first current spreading electrode.

9. The LED chip according to claim 8, wherein: The side wall of each sub-table is an inclined surface, and the included angle between the side wall of each sub-table and a plane perpendicular to the first direction is A, and 15°≤A≤60°.

10. A method for manufacturing an LED chip, characterized in that: The following steps are involved: providing a growth substrate; Growing an epitaxial structure on a surface of one side of the growth substrate; the epitaxial structure comprising at least a second-type semiconductor layer, an active layer, and a first-type semiconductor layer sequentially arranged in a direction away from the growth substrate; and making cutting grooves and conducting grooves on the epitaxial structure, the cutting grooves and conducting grooves opening on a surface of the epitaxial structure away from the growth substrate; The cutting groove extends along the first direction and at least penetrates the second-type semiconductor layer, and the conducting groove exposes a portion of the surface of the second-type semiconductor layer; Fabricating the epitaxial structure further includes fabricating a second current spreading electrode stacked on the first-type semiconductor layer, the second current spreading electrode being electrically connected to a portion of the surface of the second-type semiconductor layer exposed by the conductive groove; the second current spreading electrode being insulated from the first-type semiconductor layer and the active layer; providing a conductive substrate; Fabricating a bonding layer; fabricating the bonding layer includes fabricating a first bonding sublayer on a surface of the conductive substrate facing the epitaxial structure and fabricating a second bonding sublayer on a side of the epitaxial structure facing the conductive substrate; the first bonding sublayer and the second bonding sublayer are bonded to connect the conductive substrate and the epitaxial structure; the portion of the bonding layer embedded in the cutting groove and the conductive groove is insulated from the epitaxial structure; the second current spreading electrode is insulated from the bonding layer; peeling off the growth substrate; A first electrode pad and a second electrode pad are produced; the first electrode pad is arranged on a side of the conductive substrate away from the epitaxial structure, and is electrically connected to the first type semiconductor layer through the conductive substrate and the bonding layer, and the second electrode pad is arranged on a side of the epitaxial structure away from the conductive substrate, and is electrically connected to the second current expansion electrode; the first direction is perpendicular to the conductive substrate and points from the conductive substrate to the epitaxial structure; the opening size of the cutting groove and the conductive groove decreases along the first direction, and at least one first step surface arranged along the first direction and facing the conductive substrate is formed, and the first step surface reduces the surface area of ​​the bonding layer facing the bottom of the cutting groove and the conductive groove.

11. The method for manufacturing an LED chip according to claim 10, wherein: The second-type semiconductor layer is provided with a high-concentration doping region, and the high-concentration doping region is spaced apart from the active layer in a first direction; The conductive groove includes a first groove and a second groove; the first groove extends from the surface of the epitaxial structure away from the growth substrate to a side of the second-type semiconductor layer close to the active layer; the second groove opens at the bottom of the first groove and extends to the high-concentration doped region to expose the high-concentration doped region; the bottom of the first groove constitutes the first step surface; Before forming the bonding layer, the method further includes forming a second electrode in the second groove; the second electrode fills the second groove, and the surface facing the first groove is flush with the bottom of the first groove; the second electrode conducts the second-type semiconductor layer and the second electrode pad.

12. The method for manufacturing an LED chip according to claim 10, wherein: The epitaxial structure is provided with a first surface facing the conductive substrate; the cutting groove extends from the first surface and ends at the surface of the second-type semiconductor layer facing away from the active layer; the cutting groove has at least the first step surface located on the side of the second-type semiconductor layer close to the active layer.

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