MEMS chip preparation process
By growing polymers in the gap area of the MEMS chip for electrical connection, the problems of structural asymmetry and connection line suspension in the prior art are solved, and the performance stability of the chip is improved.
Patent Information
- Application Number
- CN202311219586.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-20
- Publication Date
- 2024-12-10
AI Technical Summary
In the existing MEMS chip preparation process, in order to maintain structural symmetry, bridge lead electrodes need to be left on the piezoelectric layer, but this will lead to structural asymmetry, and direct lead electrodes through metal connecting wires can easily cause the connection wire to be suspended, affecting the device. Stable performance.
By growing polymer in the gap area of the MEMS chip and etching the polymer to pattern it for electrical connection, the uppermost metal layer forms pads with parts within the non-diaphragm area, the polymer supports the metal connection layer. , avoid its suspended air, ensure structural symmetry and stable performance.
It realizes the symmetry of the MEMS chip structure, improves device performance, avoids the problem of metal connecting wire falling off, and improves the operating stability of the chip.
Smart Images
Figure CN119100331A_ABST
Abstract
Description
Technical Field
[0001] One or more embodiments of the present specification relate to the field of semiconductor process technology, and in particular, to MEMS chip preparation technology. Background Art
[0002] At present, the existing MEMS chips are made by sequentially growing a metal layer and a piezoelectric layer on a substrate, etching the metal layer and the piezoelectric layer, patterning the metal layer and the piezoelectric layer, and then performing wiring to form the corresponding product. In this process, the patterning is to enable the MEMS chip to form independent diaphragm areas and non-diaphragm areas. Gaps are formed in the diaphragm area and the non-diaphragm area due to etching. At this time, the traditional method of leading out the top electrode is to leave a bridge for routing in the piezoelectric layer in the gap area. The existence of the bridge will make the structure asymmetric and limit the performance of the device. If the symmetry is to be retained, the electrode is directly led out through the metal connecting wire, which will cause the metal connecting wire to be suspended. During the actual product operation, the metal connecting wire is easy to fall off, resulting in unstable device performance.
[0003] In summary, the present application now proposes a MEMS chip preparation process to solve the above-mentioned problems. Summary of the invention
[0004] The present invention aims to solve the problems raised in the background technology. The purpose of one or more embodiments of this specification is to propose a MEMS chip preparation process, using polymer to lead out the electrodes on the upper surface of the piezoelectric layer, maintaining the symmetry of the chip structure, and maximizing the performance of the chip.
[0005] Based on the above purpose, one or more embodiments of the present specification provide a MEMS chip preparation process, including the following steps: preparing a substrate, the substrate having a relative front and back side, and sequentially growing a metal layer and a piezoelectric layer on the front side of the substrate; etching the metal layer and the piezoelectric layer in sequence from top to bottom to pattern the metal layer and the piezoelectric layer, and the metal layer and the piezoelectric layer after etching have penetrating gaps at the edges of the diaphragm area, dividing them into independent parts located in the diaphragm area and parts located in the non-diaphragm area, and at the same time, after etching, the top metal layer forms a pad in the non-diaphragm area, and the pad is electrically connected to the part of the top metal layer located in the non-diaphragm area; growing a polymer inside the gap and etching the polymer to pattern the polymer; growing a metal connection layer on a plane of the top metal layer away from the substrate, and etching the metal connection layer to pattern the metal connection layer, and the etched metal connection layer electrically connects the part of the top metal layer located in the diaphragm area and the part located in the non-diaphragm area, and the polymer supports the part of the metal connection layer located in the gap to prevent the part of the metal connection layer located in the gap from being suspended.
[0006] According to the MEMS chip manufacturing process proposed in the embodiment of the present invention, the substrate is a silicon substrate.
[0007] According to the MEMS chip manufacturing process proposed in the embodiment of the present invention, the substrate is an SOI substrate.
[0008] According to the MEMS chip manufacturing process proposed in the embodiment of the present invention, the gap is a circular ring structure.
[0009] According to the MEMS chip manufacturing process proposed in the embodiment of the present invention, the metal connection layer is a circular ring structure.
[0010] According to the MEMS chip preparation process proposed in an embodiment of the present invention, the metal connection layer includes a disk and a ring, the disk is located in the diaphragm area, the ring is located in the non-diaphragm area, and the annular side of the disk and the inner wall of the ring are connected by a connecting beam.
[0011] The beneficial effects of the present invention are described in detail below with reference to the embodiments and drawings of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] In order to more clearly illustrate one or more embodiments of the present specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only one or more embodiments of the present specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0013] Figure 1-Figure 8 It is a schematic diagram of the MEMS chip manufacturing process proposed in the first embodiment of the present invention.
[0014] Figure 9-Figure 16 Schematic diagram of the MEMS chip manufacturing process proposed in the second embodiment of the present invention.
[0015] In the figure numerals: 1. substrate; 2. first metal layer; 3. first piezoelectric layer; 4. second metal layer; 5. polymer; 6. metal connecting layer; 7. second piezoelectric layer; 8. third metal layer. DETAILED DESCRIPTION
[0016] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in conjunction with specific embodiments.
[0017] like Figure 1In the prior art shown, when the piezoelectric layer in the MEMS chip is patterned, the electrodes on the upper surface of the piezoelectric layer need to be led out, so a bridge needs to be left in the piezoelectric layer for routing, but this will make the structure asymmetric and affect the performance of the device. To ensure symmetry, if the surrounding area is cut out to form a groove, it will cause the problem that the electrodes on the isolated island in the middle cannot be led out.
[0018] According to the following Figure 1-Figure 16 To describe the MEMS chip manufacturing process in the embodiment of the present invention.
[0019] Embodiment 1
[0020] like Figure 1-8 The first embodiment of the present invention is shown. The MEMS chip preparation process proposed in this embodiment includes the following steps:
[0021] S1, such as Figure 1 As shown, a substrate 1 is prepared, the substrate 1 has a front side and a back side opposite to each other, a first metal layer 2 is grown on the front side of the substrate 1, a first piezoelectric layer 3 is grown on a side of the first metal layer 2 away from the substrate 1, and a second metal layer 2 is grown on a side of the first piezoelectric layer 3 away from the substrate 1. Optionally, the substrate 1 is a silicon substrate 1. Optionally, the substrate 1 is an SOI substrate 1, and the SOI is composed of top silicon and bottom silicon connected by a buried oxide layer (not shown in the figure).
[0022] S2, such as Figure 2 As shown, the second metal layer 4 is etched to make it patterned, and a gap is formed between the portion located in the diaphragm area and the portion located in the non-diaphragm area, which are independent of each other. At the same time, the second metal layer 4 forms a pad that can be electrically connected to the outside in the non-diaphragm area, and the pad is electrically connected to the portion of the second metal layer 4 inside the non-diaphragm area.
[0023] S3, such as Figure 3 As shown, the first piezoelectric layer 3 is etched to be patterned, and a gap is formed between the portion located in the diaphragm region and the portion located in the non-diaphragm region, and the two portions are independent of each other. Optionally, the first metal layer 2 is etched to be patterned, and a gap is formed between the portion located in the diaphragm region and the portion located in the non-diaphragm region, and the two portions are independent of each other.
[0024] S4, such as Figure 4 As shown, polymer 5 is grown in the gap in step S2-S3, and the excess part is etched away, so that the polymer 5 covers the gap generated in step S2-S3.
[0025] S5, such as Figure 5 and Figure 6As shown, a fourth metal layer 6 is grown on a side of the first piezoelectric layer 3 and the second metal layer 4 away from the substrate, and the fourth metal layer 6 is etched to pattern the fourth metal layer 6. The fourth metal layer 6 is used to electrically connect the portion of the second metal layer 4 located in the diaphragm region and the portion located in the non-diaphragm region. The present invention uses a polymer to lead out the electrodes located in the diaphragm region, replacing the original method of leading out the electrodes in the diaphragm region with a connecting beam, thereby ensuring structural symmetry and improving chip device performance.
[0026] S6, such as Figure 7 and Figure 8 As shown, the substrate 1 is etched to form a cavity on the back side of the substrate 1 , and the front side of the substrate 1 is patterned, corresponding to the structure of the first metal layer 2 .
[0027] Embodiment 2
[0028] like Figure 9-16 The second embodiment of the present invention is shown. The MEMS chip preparation process proposed in this embodiment includes the following steps:
[0029] S1, such as Fig. 9 As shown, a substrate 1 is prepared, the substrate 1 having a relative front and back side, a first metal layer 2 is grown on the front side of the substrate 1, a first piezoelectric layer 3 is grown on a side of the first metal layer 2 away from the substrate 1, a second metal layer 2 is grown on a side of the first piezoelectric layer 3 away from the substrate 1, a second piezoelectric layer 7 is grown on a side of the second metal layer 2 away from the substrate, and a third metal layer 8 is grown on a side of the second piezoelectric layer 7 away from the substrate.
[0030] S2, such as Fig.10 As shown, the third metal layer 8 is etched to make the third metal layer 8 patterned, and a gap is formed between the portion located in the diaphragm area and the portion located in the non-diaphragm area, which are independent of each other. At the same time, the third metal layer 8 forms a pad in the non-diaphragm area that can be electrically connected to the outside, and the pad is electrically connected to the portion of the third metal layer 8 inside the non-diaphragm area.
[0031] S3, such as Fig.11 As shown, the second piezoelectric layer 7 is etched to pattern the second piezoelectric layer 7, and a gap is formed between the portion located in the diaphragm area and the portion located in the non-diaphragm area, and the two portions are independent of each other; the second metal layer 4 is etched to pattern the second metal layer 4, and a gap is formed between the portion located in the diaphragm area and the portion located in the non-diaphragm area. Optionally, the first piezoelectric layer 3 is etched to pattern the first piezoelectric layer 3, and a gap is formed between the portion located in the diaphragm area and the portion located in the non-diaphragm area. Optionally, the first metal layer 2 is etched to pattern the first metal layer 2, and a gap is formed between the portion located in the diaphragm area and the portion located in the non-diaphragm area.
[0032] S4, such as Fig.12As shown, polymer 5 is grown in the gap in step S2-S3, and the excess part is etched away, so that the polymer 5 covers the gap generated in step S2-S3.
[0033] S5, such as Fig.13 As shown, a fourth metal layer 6 is grown on a side of the second piezoelectric layer 7 and the third metal layer 8 away from the substrate, and the fourth metal layer 6 is etched to pattern the fourth metal layer 6. The fourth metal layer 6 is used to electrically connect the portion of the third metal layer 4 located in the diaphragm region and the portion located in the non-diaphragm region. The present invention uses a polymer 5 to lead out the electrode located in the diaphragm region, replacing the original method of leading out the electrode in the diaphragm region with a connecting beam, thereby ensuring structural symmetry and improving chip device performance.
[0034] S6, such as Fig.15 and Fig.16 As shown, the substrate 1 is etched to form a cavity on the back side of the substrate 1 , and the front side of the substrate 1 is patterned, corresponding to the structure of the first metal layer 2 .
[0035] Optionally, the gap is a circular ring structure.
[0036] Optionally, the metal connection layer 6 is a ring structure, such as Figure 5 a and Fig.13 Optionally, the metal connection layer 6 includes a disk and a ring, the disk is located in the diaphragm area, the ring is located in the non-diaphragm area, and the annular side of the disk and the inner wall of the ring are connected by a connecting beam, as shown in FIG. Figure 6 a and Fig.14 As shown in a.
[0037] Optionally, the polymer is one or a combination of PI (polyimide), parylene, polyparaxylene and PDMS (polydimethylsiloxane).
[0038] One or more embodiments of this specification are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of one or more embodiments of this specification should be included in the scope of protection of this disclosure.
Claims
1. A MEMS chip preparation process, characterized in that: The following steps are involved: A substrate (1) is prepared, wherein the substrate (1) has a front side and a back side opposite to each other, and a metal layer (2, 4, 8) and a piezoelectric layer (3, 7) are sequentially grown on the front side of the substrate (1); The metal layer (2, 4, 8) and the piezoelectric layer (3, 7) are etched in sequence from top to bottom to pattern the metal layer (2, 4, 8) and the piezoelectric layer (3, 7), and the metal layer (2, 4, 8) and the piezoelectric layer (3, 7) after etching have through gaps at the edges of the diaphragm region, dividing the metal layer (2, 4, 8) and the piezoelectric layer (3, 7) into independent parts located in the diaphragm region and parts located in the non-diaphragm region. At the same time, the uppermost metal layer (4, 8) is etched to form a pad in the non-diaphragm region, and the pad is electrically connected to the part of the uppermost metal layer (4, 8) located in the non-diaphragm region; Growing a polymer (5) inside the gap, and etching the polymer (5) to pattern the polymer (5); A metal connection layer (6) is grown on a plane of the top metal layer (4, 8) away from the substrate, and the metal connection layer (6) is etched to pattern the metal connection layer (6). The etched metal connection layer (6) electrically connects the portion of the top metal layer (4, 8) located in the diaphragm area and the portion located in the non-diaphragm area. The polymer (5) supports the portion of the metal connection layer (6) located in the gap to prevent the portion of the metal connection layer (6) located in the gap from being suspended in the air.
2. The MEMS chip preparation process according to claim 1, characterized in that: The substrate (1) is a silicon substrate.
3. The MEMS chip preparation process according to claim 1, characterized in that: The substrate (1) is an SOI substrate.
4. The MEMS chip preparation process according to claim 1, characterized in that: The gap is a circular ring structure.
5. The MEMS chip preparation process according to claim 4, characterized in that: The metal connection layer (6) is a circular ring structure.
6. The MEMS chip preparation process according to claim 4, characterized in that: The metal connection layer (6) comprises a disk and a ring, wherein the disk is located in the diaphragm region and the ring is located in the non-diaphragm region, and the annular side surface of the disk and the inner wall of the ring are connected via a connection beam.