System and method for reallocating storage devices

Abstract

Systems and methods for reallocating storage devices are disclosed. The storage device includes: a storage medium having a first storage capacity and a second storage capacity; and a processor coupled to the storage medium. The processor may be configured to identify a trigger condition. Based on identifying the trigger condition, the processor may be configured to: identify a first storage capacity and a second storage capacity; identifying a first quantity; modifying the first storage capacity based on the first amount; and modifying the second storage capacity based on the first amount.

Description

[0001] This application claims priority to and the benefit of U.S. Provisional Application No. 63 / 471,922, filed on June 8, 2023, entitled “REUTILIZATION OF LIVE SECTORS FROM SSDS PAST FAILURE THRESHOLD,” and U.S. Patent Application No. 18 / 238,351, filed on August 25, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0002] One or more aspects of embodiments according to the present disclosure relate to storage devices, and more particularly to reallocating storage devices when a trigger condition is detected. Background Art

[0003] Applications may interact with storage devices or memory devices (collectively referred to as storage devices) for reading (or loading) and writing (or storing) data. However, after a certain amount of reading and writing to a storage device, one or more memory cells may fail. It may be desirable to maximize the use of a storage device before it is discarded.

[0004] The above information disclosed in this Background section is only for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not constitute prior art. Summary of the invention

[0005] One or more embodiments of the present disclosure are directed to a storage device, the storage device comprising: a storage medium having a first storage capacity and a second storage capacity; and a processor coupled to the storage medium. The processor is configured to: identify a trigger condition. Based on identifying the trigger condition, the processor is configured to: identify the first storage capacity and the second storage capacity; identify a first amount; modify the first storage capacity based on the first amount; and modify the second storage capacity based on the first amount.

[0006] According to some embodiments, the first storage capacity is available to the computing device for storing data.

[0007] According to some embodiments, the second storage capacity is used for background memory operations.

[0008] According to some embodiments, the triggering condition comprises determining that the second storage capacity satisfies a criterion.

[0009] According to some embodiments, the processor is further configured to: identify a first memory block forming part of the first storage capacity; and modify a property of the first memory block to associate the first memory block with the second storage capacity.

[0010] According to some embodiments, the processor is further configured to: identify an attribute of the first memory block; and based on the processor identifying the attribute, store data in the first memory block in a second memory block forming part of the second storage capacity.

[0011] According to some embodiments, the step in which the processor is configured to identify the attributes of the first memory block includes: the processor is configured to identify the attributes of the first memory block based on the first identifier, wherein the step in which the processor is configured to associate the first memory block with the second storage capacity includes: associating the first memory block with the second identifier.

[0012] According to some embodiments, the processor is further configured to: operate the storage device in a first operating mode; and format the storage device based on the processor being configured to modify the first storage capacity.

[0013] According to some embodiments, the processor is further configured to send a notification to the computing device based on the processor being configured to modify the first storage capacity.

[0014] According to some embodiments, the first amount is based on a target associated with the second storage capacity.

[0015] One or more embodiments of the present disclosure also relate to a method, comprising: identifying a trigger condition by a processor; based on identifying the trigger condition: identifying a first storage capacity and a second storage capacity of a storage medium by the processor; identifying a first quantity by the processor; modifying the first storage capacity based on the first quantity by the processor; and modifying the second storage capacity based on the first quantity by the processor.

[0016] These and other features, aspects and advantages of the embodiments of the present disclosure will be more fully understood when considered in conjunction with the following detailed description, the appended claims and the accompanying drawings.Of course, the actual scope of the invention is defined by the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.

[0018] Figure 1 depicts a simplified example of a storage system according to one or more embodiments;

[0019] Figure 2 depicts a block diagram of a storage controller according to one or more embodiments;

[0020] Figure 3 depicts a conceptual layout diagram of a non-volatile memory according to one or more embodiments;

[0021] Figure 4A conceptual layout diagram depicting an example memory block stored in a non-volatile memory of a storage device according to one or more embodiments;

[0022] Figure 5 Depicting a storage device after changing its size according to one or more embodiments. Figure 4 A conceptual layout diagram of the memory blocks in FIG.

[0023] Figure 6 A conceptual layout diagram depicting a mapping table according to one or more embodiments;

[0024] Figure 7 A flowchart depicting a process for changing the size of a storage device according to one or more embodiments; and

[0025] Figure 8 Another flow diagram of a process for changing the size of a storage device is depicted in accordance with one or more embodiments. DETAILED DESCRIPTION

[0026] Hereinafter, example embodiments will be described in more detail with reference to the accompanying drawings, wherein the same reference numerals always represent the same elements. However, the present disclosure may be implemented in a variety of different forms and should not be construed as being limited to the embodiments shown herein. Rather, these embodiments are provided as examples so that the present disclosure will be thorough and complete, and the aspects and features of the present disclosure will be fully conveyed to those skilled in the art. Therefore, it is not necessary to describe the processing, elements, and techniques that are not necessary for a person of ordinary skill in the art to fully understand the aspects and features of the present disclosure. Unless otherwise stated, throughout the drawings and text descriptions, the same reference numerals represent the same elements, and therefore, their descriptions may not be repeated. In addition, in the drawings, the relative sizes of elements, layers, and regions may be exaggerated and / or simplified for clarity.

[0027] Embodiments of the present disclosure are described below with reference to block diagrams and flow charts. Therefore, it should be understood that each frame of the block diagram and flow chart can be implemented in the form of a computer program product, a complete hardware embodiment, a combination of hardware and computer program products, and / or an apparatus, system, computing device, computing entity, etc. that executes instructions, operations, steps, and similar words (e.g., executable instructions, instructions for execution, program codes, etc.) on a computer-readable storage medium for execution. For example, the acquisition, loading, and execution of code can be performed sequentially so that an instruction is acquired, loaded, and executed once. In some example embodiments, acquisition, loading, and / or execution can be performed in parallel so that multiple instructions are acquired, loaded, and / or executed together. Therefore, such an embodiment can produce a specially configured machine that performs the steps or operations specified in the block diagram and flow chart. Therefore, block diagrams and flow charts support various combinations of embodiments for executing specified instructions, operations, or steps.

[0028] A storage device (such as, for example, a solid-state drive (SSD) or other NAND-based storage device) may be discarded when a failure threshold is reached. One reason an SSD may fail is because NAND flash memory can typically only withstand a limited number of program / erase (P / E) cycles. For example, when data is written to NAND flash memory, the data already stored in the memory cell is first erased before the new data is written. This is because NAND is erased at a block level granularity, but written at a page granularity. P / E cycles may cause wear and tear on the device, causing it to eventually fail. Therefore, a failure threshold may be set based on the maximum P / E cycle count that NAND flash memory can typically tolerate. An SSD that has reached the maximum P / E cycle count may be considered a failed device and may typically be discarded.

[0029] SSDs may use wear leveling to evenly distribute wear across cells. Due to wear leveling, entire blocks of data typically fail at approximately the same time. However, this may not be uniformly accurate. There may still be a degree of non-determinism regarding the failure of memory cells. Because an SSD may not fail deterministically, some memory cells may continue to operate even if the SSD has reached an established failure threshold (e.g., a maximum number of P / E cycles), and other memory cells may fail before reaching the established failure threshold.

[0030] In some storage device embodiments, there may be an expectation that a certain number of NAND cells may fail before a failure threshold is reached. Therefore, the storage device may include overprovisioned space that can be used to remap failed sectors of the storage device. As the number of failed sectors or failed blocks increases, the size of the overprovisioned space (e.g., the availability of the overprovisioned space) decreases. The overprovisioned space may eventually decrease to a level where there may not be enough space for sector reallocation and / or other background memory operations. When the availability of the overprovisioned space drops to a minimum level, the SSD may be considered to have reached the failure threshold and may typically be discarded.

[0031] In general, one or more embodiments of the present disclosure relate to systems and methods for reprovisioning (or reformatting) a storage device to extend the life (e.g., use) of a storage device that has met or is approaching an end-of-life condition. By extending the life of the storage device, the storage device can continue to operate normally, allowing data to be read from and written to the storage device. In some embodiments, the end-of-life condition is met when a certain number of usable memory blocks have failed and there are not enough blocks to re-establish an over-allocated area of ​​the device.

[0032] In some embodiments, a controller of a storage device is configured to monitor a trigger condition. The trigger condition may be, for example, a minimum threshold amount of over-allocated space remaining on the storage device, detection of a threshold number of failures of memory blocks, etc. In response to detecting the trigger condition, the storage controller may identify usable memory blocks of the storage device. The usable memory blocks may be blocks that are available (e.g., advertised to) a host computing device to store data. The storage controller may replenish the over-allocated space from the usable memory blocks.

[0033] Assigning usable blocks to overallocated space may result in a reduction in usable space. Nevertheless, by extending the life of the storage device (albeit with a reduced storage size), the storage device can be more environmentally friendly and help reduce the climate impact of the storage device. Reclaiming the storage device can also help reduce the total cost of ownership (TCO) of the storage device.

[0034] Figure 1 A simplified example of a storage system 100 is depicted in which one host device 102 is connected to one storage device 104, but the present disclosure is not limited thereto and the storage system 100 may include any suitable number of host devices each connected to any suitable number of storage devices. Furthermore, the storage system 100 may include multiple storage devices that may be connected to the same host device (e.g., host device 102) or to different host devices.

[0035] Reference Figure 1 , the host device 102 may be connected to the storage device 104 through the host interface 106. The host device 102 may send data requests or commands (e.g., write / store commands, read / load commands, erase commands) to the storage device 104 through the host interface 106, and may receive responses from the storage device 104 through the host interface 106. For example, the response may include the requested data stored in the storage device 104, and / or a notification from the storage device 104 that the corresponding data request command has been successfully executed by the storage device 104.

[0036] In some embodiments, a data request (such as a load or store request, for example) may be generated during execution of an application by host device 102. For example, the application may be a big data analytics application, an e-commerce application, a database application, a machine learning application, etc. The application may use the results of the data request to generate an output.

[0037] The host device 102 may include a host processor 108 and a host memory 110. The host processor 108 may be a processing circuit (e.g., a general-purpose processor or a central processing unit (CPU) core of the host device 102). The host processor 108 may be connected to other components via an address bus, a control bus, a data bus, etc. The host memory 110 may be considered as a high-performance main memory (e.g., a primary memory) of the host device 102. For example, in some embodiments, the host memory 110 may include (or may be) a volatile memory (e.g., a dynamic random access memory (DRAM) as an example). However, the present disclosure is not limited thereto, and the host memory 110 may include (or may be) any suitable high-performance main memory (e.g., a primary memory) for replacing the host device 102 as known to those skilled in the art. For example, in other embodiments, the host memory 110 may be a relatively high performance non-volatile memory (such as, NAND flash memory, phase change memory (PCM), resistive RAM, spin transfer torque RAM (STTRAM), any suitable memory based on PCM technology, memristor technology and / or resistive random access memory (ReRAM)), and may include, for example, chalcogenides, etc.

[0038] The storage device 104 may be considered as a secondary storage that can persistently store data that can be accessed by the host device 102. For example, in some embodiments, the storage device 104 may be a secondary storage of the host device 102 (e.g., taking a solid state drive (SSD) as an example). However, the present disclosure is not limited thereto, and in other embodiments, the storage device 104 may include (or may be) any suitable storage device (e.g., taking a magnetic storage device (e.g., a hard disk drive (HDD)), etc.), an optical storage device (e.g., a Blu-ray drive, a compact disk (CD) drive, a digital versatile disk (DVD) drive, etc.), other types of flash memory devices (e.g., a USB flash drive, etc.) as examples). In various embodiments, the storage device 104 may conform to a large form factor standard (e.g., a 3.5-inch hard disk drive form factor), a small form factor standard (e.g., a 2.5-inch hard disk drive form factor), an M.2 form factor, an E1.S form factor, etc. In other embodiments, the storage device 104 may conform to any suitable or desired derivative of these form factors. For convenience, the storage device 104 may be described in the context of an SSD hereinafter, but the present disclosure is not limited thereto.

[0039] The storage device 104 may be communicatively connected to the host device 102 via a host interface 106. The host interface 106 may facilitate communication (e.g., using a connector and a protocol) between the host device 102 and the storage device 104. In some embodiments, the host interface 106 may facilitate the exchange of storage requests and responses between the host device 102 and the storage device 104. In some embodiments, the host interface 106 may facilitate the transfer of data from the storage device 104 to the host memory 110 of the host device 102 and from the host memory 110 of the host device 102 to the storage device 104. For example, in various embodiments, the host interface 106 (e.g., a connector and its protocols) may include (or may conform to) a compute express link (CXL), a cache coherent interconnect for accelerators (CCIX), a dual in-line memory module (DIMM) interface, a small computer system interface (SCSI), non-volatile memory express (NVMe), a peripheral component interconnect express (PCIe), remote direct memory access (RDMA) over Ethernet, serial advanced technology attachment (SATA), Fibre Channel, serial attached SCSI (SAS), NVMe over fabric (NVMe-oF), iWARP protocol, wireless bandwidth protocol, 5G wireless protocol, wireless fidelity (Wi-Fi) protocol, Bluetooth protocol, etc. In some embodiments, the host interface 106 (e.g., a connector and its protocols) may include (or may conform to) various general interfaces (e.g., taking Ethernet, universal serial bus (USB), etc. as examples).

[0040] In some embodiments, the storage device 104 may include a storage controller 112, a storage memory 114, a non-volatile memory (NVM) 116, and a storage interface 118. The storage memory 114 may be a high-performance memory of the storage device 104, and may include (or may be) a volatile memory (e.g., taking DRAM as an example), but the present disclosure is not limited thereto, and the storage memory 114 may be any suitable type of high-performance volatile or non-volatile memory.

[0041] NVM 116 may persistently store data received, for example, from host device 102. NVM 116 may include, for example, NAND flash memory, but the present disclosure is not limited thereto, and NVM 116 may include any suitable type of memory for persistently storing data according to the implementation of storage device 104 (e.g., phase change memory (PCM), conductive bridging random access memory (CBRAM), ferroelectric random access memory (FeRAM), non-volatile random access memory (NVRAM), magnetoresistive random access memory (MRAM), resistive random access memory (RRAM), silicon-oxide-nitride-oxide-silicon memory (SONOS), floating junction gate random access memory (FJG RAM), millipede memory, racetrack memory, etc.).

[0042] The storage controller 112 may be connected to the NVM 116 via a storage interface 118. The storage interface 118 may be an interface through which the NVM 116 (e.g., NAND flash memory) may communicate with a processing component (e.g., the storage controller 112) or other device. Commands (such as reset, write enable, control signals, clock signals, etc.) may be sent via the storage interface 118. In addition, a software interface may be used in combination with hardware elements that may be used to test / verify the operation of the storage interface 118. The software may be used to write data to and read data from the NVM 116 via the storage interface 118. In addition, the software may include firmware (e.g., for controlling write, erase, and read operations) that may be downloaded to the hardware elements.

[0043] The storage controller 112 may be connected to the host interface 106 and may manage signaling on the host interface 106. In some embodiments, the storage controller 112 may include an associated software layer to manage the physical connector of the host interface 106. The storage controller 112 may respond to input and output (IO) requests received from the host device 102 through the host interface 106. The storage controller 112 may also manage the storage interface 118 to control the NVM 116 and provide access to and from the NVM 116. For example, the storage controller 112 may include at least one processing component embedded thereon for interfacing with the host device 102 and the NVM 116. The processing component may include, for example, a digital circuit (e.g., a microcontroller, a microprocessor, a digital signal processor, or a logic device (e.g., a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), etc.)) capable of executing (e.g., via firmware and / or software) data access instructions to provide access to and from data stored in the NVM 116 according to the data access instructions. For example, the data access instructions may correspond to data request commands and may include any suitable data storage and retrieval algorithms (eg, read / load, write / store, erase, etc.) instructions and the like.

[0044] According to one or more embodiments of the present disclosure, the storage controller 112 may monitor one or more physical blocks, groups, pages, or sectors (collectively referred to as memory blocks) of the NVM 116 to determine the allocation, status, or attributes (also collectively referred to as status) of the memory blocks. For example, the storage controller 112 may monitor one or more memory blocks to determine whether the blocks have failed (also referred to as "dead"), whether they contain data, whether the contained data is valid or invalid, etc. The storage controller may also monitor one or more memory blocks to determine the mapping of memory blocks to available space, over-allocated space, or fault (failure) space of the storage device. For example, one or more logical blocks referenced by the host may be mapped to physical memory blocks associated with available space, over-allocated space, or fault space.

[0045] In some embodiments, the available space of the storage device 104 may include space that is claimed or made available to the host device 102 for loading and storing data. In some embodiments, the failed space of the storage device may include physical memory blocks that have failed. In some embodiments, the over-allocated space may include space of the storage device for bad sector reallocation and / or other background memory operations. In some embodiments, the over-allocated space may not be visible to the host device 102.

[0046] As an example, a storage device having 1 terabyte (TB) of usable space may be advertised to the host device 102 as a 1 TB storage device. The storage device may include over-allocated space that may be 10% (e.g., 100 gigabytes) of the usable space. Therefore, although the storage device according to this example is advertised as a 1 TB storage device, the physical capacity of the storage device may be 1.1 TB.

[0047] In some embodiments, the storage controller 112 is configured to take action to extend the life of the storage device 104 when the device is approaching an end-of-life condition. In some embodiments, the end-of-life condition is met when the usable space of the storage device 104 no longer has sufficient capacity to make up for the over-allocated space. When the end-of-life condition is met, the storage device 104 may be considered a failed device even though there may be memory blocks in the usable space that have not yet failed.

[0048] In some embodiments, the reallocation of the storage device 104 includes remapping one or more usable physical memory blocks associated with the usable space of the storage device to be associated with the over-allocated space. The remapping of the usable blocks may result in a reduction in the storage capacity of the usable space. The number of usable blocks selected for remapping may depend on the amount required to supplement the over-allocated space. In some embodiments, the over-allocated space is supplemented as a percentage (e.g., 10%) of the new available usable space.

[0049] In some embodiments, the reallocation of the storage device 104 includes remapping one or more usable memory blocks associated with the usable space of the storage device to be associated with the over-allocated space. The remapping of the usable blocks may result in a reduction in the storage capacity of the usable space. The number of usable blocks selected for remapping may depend on the amount required to supplement the over-allocated space. In some embodiments, the over-allocated space is supplemented as a percentage (e.g., 10%) of the new usable space.

[0050] In some embodiments, the reallocation of the storage device 104 includes reformatting the device. The storage device 104 may be reformatted based on the reduced usable space and the supplemented overallocated space. The reformatted storage device 104 may then be presented to the host device 102 as a new device.

[0051] In some embodiments, a notification is sent to the host device prior to reformatting of the storage device 104. The notification may prompt the host device to move the data stored in the device to another storage medium (e.g., another storage device). In this regard, the storage controller 112 transitions the storage device 104 to a read-only recovery mode to allow the data stored in the NVM 116 to be read (or recovered) by the host device 102. During the read-only recovery mode, new data may not be allowed to be written to the NVM 116.

[0052] In some embodiments, instead of prompting host device 102 to move all data stored in the device, storage controller 112 can calculate the amount of space needed to supplement overallocated space from available space. Storage controller 112 can prompt host device 102 to delete a target amount of data associated with the needed space.

[0053] Figure 2 A block diagram of a storage controller 112 is depicted according to one or more embodiments. The storage controller 112 includes an NVM controller 200 and a size change engine 202, which may be implemented via hardware, firmware, software, or a combination of hardware, firmware, and / or software. Although the NVM controller 200 and the size change engine 202 are assumed to be separate components, those skilled in the art will recognize that one or more of the components may be combined or integrated into a single component, or further subdivided into more subcomponents, without departing from the spirit and scope of the inventive concept.

[0054] In some embodiments, NVM controller 200 and size change engine 202 may include, for example, digital circuits (e.g., microcontrollers, microprocessors, digital signal processors, or logic devices (e.g., field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), etc. (collectively referred to as processors)). The digital circuits may access a memory (e.g., storage memory 114) storing instructions (e.g., software, firmware, and / or hardware code) that are executed by the processor to implement the functions of storage controller 112.

[0055] In some embodiments, NVM controller 200 is configured to receive data access requests from host device 102. In some embodiments, NVM controller 200 includes a flash translation layer (FTL) 204 that receives data access requests and interfaces with NVM 116 to read data from and write data to the NVM. In this regard, FTL 204 may translate a memory block address (e.g., a logical block address (LBA)) included in the data access request into a flash memory (physical) block address. In doing so, FTL 204 may engage in wear leveling to move data around the memory cells of NVM 116 to evenly distribute writes to NVM 116.

[0056] In some embodiments, the FTL 204 maintains a mapping table 206 for translating LBAs to physical addresses of the NVM 116. In some embodiments, the mapping table also includes the status of one or more memory blocks (e.g., usable, allocated, available, etc.). The mapping table 206 may be stored in, for example, the storage memory 114 of the storage device 104.

[0057] In some embodiments, the size change engine 202 is configured to receive information from the NVM controller 200 (e.g., from the FTL 204) for determining whether the size of the storage device 104 should be changed. For example, the size change engine 202 may receive information about the live memory blocks of the NVM 116 (e.g., the total number of memory blocks excluding failed blocks, and / or the total storage capacity provided by the live memory blocks). The size change engine 202 may determine the availability of over-allocated space compared to the total storage capacity or the available storage capacity. If the available over-allocated space is less than a minimum threshold (e.g., 1%) of the total storage space or the available storage space, the size change engine 202 may trigger a size change of the storage device 104.

[0058] In some embodiments, the size change of the storage device 104 includes calculating the amount of over-allocated space of the storage device whose size is changed. The amount of over-allocated space can be a percentage of the capacity provided by the remaining usable memory blocks. The newly calculated over-allocated space can be less than the over-allocated space initially allocated to the storage device 104.

[0059] In some embodiments, resize engine 202 calculates the number of memory blocks that should be reassigned to the overallocated space from the usable storage portion of NVM 116. Resize engine 202 can communicate with NVM controller 200 to reassign the determined number of memory blocks to the overallocated space. NVM controller 200 can select the memory blocks to be reassigned and update mapping table 206 accordingly.

[0060] Figure 3 A conceptual layout diagram of NVM 116 is depicted according to one or more embodiments. NVM 116 includes one or more memory blocks that make up usable storage space 300. Usable storage space 300 may have a first storage capacity that may be advertised to host device 102.

[0061] NVM 116 also includes one or more memory blocks that constitute over-allocated space 302. Over-allocated space 302 may have a second storage capacity. The second storage capacity may be a percentage of the advertised usable storage (e.g., 10% to 20%). Over-allocated space 302 may be used for bad sector reallocation and / or other background memory operations. In some embodiments, over-allocated space may not be visible to host device 102.

[0062] When P / E operations on NVM 116 result in the loss of memory cells, one or more memory blocks may fail. NVM controller 200 may detect failure characteristics to identify failed memory blocks (e.g., to determine that a memory sector has failed). Example failure characteristics include, for example, duplicate checksum failures, read / write disturb errors, and / or sector reallocations. With respect to sector reallocations, sectors reallocated using overallocated space 302 may be considered failed and identified as such.

[0063] The failed memory block may result in a failed or faulty portion 304 of the NVM 116. In the sector reallocation process, the failed memory sector may be reallocated (e.g., remapped) to the overallocated space 302. For example, data in the failed memory sector may be stored in a memory block associated with the overallocated space 302. As the number of bad sectors increases with continued use of the storage device 104, the availability of the overallocated space 302 may decrease. In some embodiments, the size change engine 202 may trigger a size change of the storage device 104 if the available overallocated space drops below a minimum threshold level 306.

[0064] Figure 4 A conceptual layout diagram of example memory blocks stored in NVM 116 according to one or more embodiments is depicted. Example memory blocks may include one or more failed memory blocks 400, one or more usable memory blocks 402-406, and one or more over-allocated blocks 408. The state of the memory blocks may be maintained by NVM controller 200 (e.g., in mapping table 206). Failed memory blocks 400 may be blocks that have met the failure characteristics and are considered to have failed. For example, blocks with duplicate checksum failures, read / write disturb errors, and / or that have been subject to sector reallocation may be considered to have failed.

[0065] The available memory blocks 402-406 may be blocks available for storing data by the host device 102. The available memory blocks 402-406 may be empty or contain data accessible to the host device 102. The available memory blocks 402-406 may together provide a first storage capacity of the storage device 104.

[0066] Overallocated blocks 408 may be memory blocks in storage device 104 that have been identified for use as overallocated space. Overallocated blocks 408 may together form a second storage capacity of storage device 104 that may be used for background memory operations and / or bad sector reallocation.

[0067] Figure 5 Depicts the following example of a storage device 104 after the size of the storage device 104 is changed according to one or more embodiments. Figure 4 Conceptual layout diagram of the memory blocks in . Figure 5 In the example of , usable memory blocks 402 to 406 can be removed or disassociated from the usable storage space and added to or associated with the over-allocated space as over-allocated blocks 410 to 414.

[0068] In some embodiments, the resize engine 202 selects the usable memory blocks 402 to 406 based on identifying the amount of storage space required to supplement the over-allocated space. The calculation of the required over-allocated space can be based on the number of usable blocks remaining in the storage device. As the storage device continues to be used, more and more blocks may fail. When the number of valid blocks (e.g., the total number of usable blocks and over-allocated blocks) drops below a minimum threshold, a resize can occur.

[0069] In some embodiments, mapping table 206 is updated based on reallocating usable memory blocks 402-406 to overallocated blocks 410-414. Additionally, based on reallocating usable memory blocks 402-406 to overallocated space, the first storage capacity may be reduced and the second storage capacity may be increased.

[0070] Figure 6 A conceptual layout diagram of mapping table 206 is depicted in accordance with one or more embodiments. Mapping table 206 may include an address 600 of a memory block and a state identifier (or attribute) 602 corresponding to the address. The address may be, for example, a physical flash address of NVM 116. In some embodiments, mapping table 206 is an extension of FTL 204.

[0071] Although the embodiment is not limited in this regard, the state identifier 602 corresponding to the address 600 may identify the memory block as failed, usable, or over-allocated. In some embodiments, the mapping table 206 may also include a logical memory address (e.g., LBA) associated with the physical address 600 (e.g., physical addresses PA1 to PA4, etc.), and / or other attributes about the memory block (such as, empty, allocated, etc.).

[0072] Figure 7A flow chart depicting a process for changing the size of a storage device 104 according to one or more embodiments. The process begins, and in act 700, the storage controller 112 (e.g., the size change engine 202) identifies a trigger condition. In some embodiments, the trigger condition is detected in response to the storage device 104 being within a specific range of an end-of-life condition. For example, the end-of-life condition may be exhaustion of over-allocated storage space. The trigger condition may be detected in response to available over-allocated space falling below a threshold (e.g., 1% of available over-allocated space remaining). In some embodiments, the trigger condition may be detected in response to active memory blocks in the storage device 104 falling below a threshold. Active memory blocks may include both usable blocks and available over-allocated blocks.

[0073] In action 702, the storage controller 112 (e.g., the size change engine 202) identifies a first amount. The first amount may be based on a target for overallocated space (e.g., the second storage capacity). The target for overallocated space may be a percentage of the available storage capacity (e.g., the first storage capacity) remaining in the storage device 104. For example, the target amount may be 10% to 20% of the available storage capacity. In some embodiments, the target amount may be greater than the expected conventional amount (e.g., greater than 20%) (more memory blocks will fail as the storage device 104 continues to be used beyond its expected lifespan). A larger target amount may avoid the need to frequently participate in the size change process. In some embodiments, the first amount may include the number of memory blocks that will be reassigned from the available space to the overallocated space to achieve the target. In some embodiments, the storage controller 112 may identify the first storage capacity and the second storage capacity.

[0074] In action 704, the size change engine 202 modifies (e.g., reduces) the available storage capacity (e.g., the first storage capacity) based on the identified first amount. For example, the available storage space may be reduced to below the storage capacity advertised to the host device 102. In this regard, one or more memory blocks mapped to the available storage space are identified based on the first amount, and the one or more memory blocks are reassigned to the over-allocated space. In some embodiments, the storage controller 112 may identify a first memory block that forms a portion of the available storage space (e.g., the first storage capacity), and modify an attribute of the first memory block to associate the first memory block with the over-allocated space (e.g., the second storage capacity).

[0075] In action 706, the size change engine 202 modifies (e.g., increases) the over-allocated space (e.g., the second storage capacity) based on the first amount of identification. For example, the first memory block can be associated with the over-allocated space (e.g., the second storage capacity) by modifying the first memory block (e.g., associated with the first identifier) ​​to be associated with the second identifier. For example, the first identifier can identify the memory block as usable (i.e., indicating that the memory block is mapped to the usable storage space), and the second identifier can identify the memory block as over-allocated (i.e., indicating that the memory block is mapped to the over-allocated space), but is not limited to this. For example, one or more memory blocks mapped to the usable storage space can be reassigned to the over-allocated space. The mapping table 206 can be updated accordingly based on the reassignment. For example, the state identifier 602 of the address corresponding to the one or more memory blocks can be updated to indicate that the memory block is now an over-allocated block.

[0076] Figure 8 Another flow diagram of a process for changing the size of storage device 104 according to one or more embodiments is depicted. The process begins and in act 800, host device 102 sends read / load and write / store commands to storage device 104 while executing one or more applications therefrom.

[0077] In action 802, the storage controller 112 (e.g., the size change engine 202) determines whether a trigger condition has been met. In some embodiments, the trigger condition is met if the storage device 104 is within a specific range of the end-of-life condition. For example, the end-of-life condition can be the exhaustion of over-allocated storage space. In response to the available over-allocated space falling below a threshold (e.g., 1% of the available over-allocated space remaining), the trigger condition can be detected. In some embodiments, the trigger condition is met in response to the effective memory blocks in the storage device 104 falling below a threshold. The effective memory blocks may include both usable blocks and available over-allocated blocks.

[0078] In action 804, the storage controller 112 (e.g., the size change engine 202) calculates the new storage size of the storage device 104. For example, the size change engine 202 can calculate the amount of available over-allocated space remaining in the NVM 116 and compare it to the desired amount. The desired amount can be a percentage of the usable memory blocks remaining in the NVM 116. The size change engine 202 can calculate the number of usable blocks that need to be remapped to over-allocated blocks in order to replenish the over-allocated space to the desired amount. The remapping of the usable memory blocks can reduce the usable space available to the host device 102.

[0079] In act 806, it is determined whether there are enough usable blocks available to replenish the over-allocated space while maintaining the desired amount of usable memory space.

[0080] If the answer is yes, then in action 808, the storage controller 112 notifies the host device 102 of the new (reduced) capacity of the storage device 104. The new capacity notified to the host device 102 can be the current capacity minus the capacity to be reallocated to the over-allocated space. In some embodiments, the notification of the new capacity is accompanied by instructions to remove data from the storage device 104.

[0081] If the answer is no, then in act 814 the storage controller 112 notifies the host device 102 of the failure of the storage device 104 .

[0082] In acts 810 and 816, the storage device 104 is placed in a read-only recovery mode. During this mode, the storage controller 112 is allowed to perform read operations from the host device 102, but requests for write operations cause the storage controller 112 to return error messages. During the read-only period, the host may issue read operations to remove data stored in the storage device 104 before reformatting the storage device.

[0083] In act 812, the host issues a command to format the storage device 104 based on the new usable storage space and the new overallocated space (e.g., based on modifying the first storage capacity). Formatting may include erasing data stored in the storage device, deallocating LBAs, etc. After formatting, the storage device 104 may be ready to be used by the host device 102 to store data, but with a lower capacity than the previous version of the storage device.

[0084] In some embodiments, instead of placing the storage device 104 in a read-only recovery mode to allow the host device 102 to remove data stored in the device, the storage device may calculate the amount of data that should be deleted to achieve the reallocation. The storage device 104 may prompt the host device 102 to delete the calculated amount of data. In response to the prompt, the host device 102 may identify the data to be deleted. The storage controller 112 may delete the identified data from the storage device. The deletion of data in the usable space may allow the storage device to use memory blocks from the usable space to replenish the over-allocated space.

[0085] As described according to various embodiments of the present disclosure, storage devices that can be reallocated to extend the life of the device may be needed in one or more computing environments. For example, it may be desirable in a large data center (hyperscaler) or data center environment where storage has been abstracted and includes several levels of redundancy. Changing the size of storage devices in the abstract storage pool can be automatic and without interruption in service, and helps improve the total cost of ownership of the reallocated storage devices.

[0086] Reassignment of storage devices may also be desirable in a redundant array of independent disks (RAID) system with a parity controller that can detect that one of the storage devices has failed (e.g., is approaching an end-of-life condition). The data in the failed device can be moved to another storage device in the array, and the failed device can be automatically resized and reinserted into the array without interrupting use of the RAID system.

[0087] For the average consumer, reallocation of storage devices may also be desirable to reduce the total cost of ownership of the storage devices. The consumer may simply offload the data in the failed storage device and continue to use the device after the device has been resized.

[0088] Those skilled in the art will recognize that reallocating storage devices to extend the life of the devices provides advantages including improved climate impact, improved total cost of ownership of the devices, etc.

[0089] One or more embodiments of the present disclosure may be implemented in one or more processors. The term "processor" may refer to one or more processors and / or one or more processing cores. One or more processors may be hosted in a single device or distributed on multiple devices (e.g., on a cloud system). The processor may include, for example, an application-specific integrated circuit (ASIC), a general or dedicated central processing unit (CPU), a digital signal processor (DSP), a graphics processing unit (GPU), and a programmable logic device (such as a field programmable gate array (FPGA)). In a processor, as used herein, each function is performed by hardware configured (i.e., hardwired) to perform the function, or by more general hardware (such as a CPU) configured to execute instructions stored in a non-temporary storage medium (e.g., a memory). The processor may be manufactured on a single printed circuit board (PCB) or distributed on several interconnected PCBs. The processor may include other processing circuits (e.g., a processing circuit may include two processing circuits FPGA and CPU interconnected on a PCB).

[0090] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the spirit and scope of the inventive concept, the first element, first component, first region, first layer or first part discussed herein may be referred to as the second element, second component, second region, second layer or second part.

[0091] The terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the inventive concept. In addition, unless explicitly stated, the embodiments described herein are not mutually exclusive. The aspects of the embodiments described herein may be combined in some embodiments.

[0092] As used herein, the terms "substantially," "approximately," and similar terms are used as terms of approximation rather than terms of degree, and are intended to take into account the inherent variations in measurements or calculations that those of ordinary skill in the art would recognize.

[0093] As used herein, unless the context clearly indicates otherwise, the singular form is intended to include the plural form as well. It will also be understood that the terms "include" and / or "comprise" when used in this specification, illustrate the presence of narrated features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their groups. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items. Statements such as "at least one of..." modify the entire column of elements when located after a column of elements, without modifying the individual elements in the column. In addition, the use of "may" when describing an embodiment of the inventive concept means "one or more embodiments of the present disclosure". In addition, the term "exemplary" is intended to represent an example or description. As used herein, the term "use" and its variations may be considered synonymous with the term "utilize" and its variations.

[0094] Although exemplary embodiments of systems and methods for reallocating storage devices have been specifically described and illustrated herein, many modifications and variations will be apparent to those skilled in the art. Therefore, it will be understood that systems and methods for reallocating storage devices constructed in accordance with the principles of the present disclosure may be implemented in a manner other than that specifically described herein. The present disclosure is further defined by the following claims and their equivalents.

[0095] Systems and methods for reallocating storage may include one or more combinations of the features set forth in the following statements.

[0096] Statement 1. A storage device comprising: a storage medium having a first storage capacity and a second storage capacity; and a processor, coupled to the storage medium, the processor being configured to: identify a trigger condition; based on identifying the trigger condition: identify the first storage capacity and the second storage capacity; identify a first quantity; modify the first storage capacity based on the first quantity; and modify the second storage capacity based on the first quantity.

[0097] Statement 2. The storage device of statement 1, wherein the first storage capacity is usable by the computing device to store data.

[0098] Statement 3. The storage device of Statement 1 wherein the second storage capacity is used for background memory operations.

[0099] Statement 4. The storage device of Statement 1, wherein the trigger condition comprises determining that the second storage capacity satisfies a criterion.

[0100] Statement 5. The storage device of Statement 4, wherein the processor is further configured to: identify a first memory block forming part of the first storage capacity; and modify a property of the first memory block to associate the first memory block with the second storage capacity.

[0101] Statement 6. A storage device as described in Statement 1, wherein the processor is further configured to: identify an attribute of the first memory block; and based on the processor identifying the attribute, store data in the first memory block in a second memory block that forms part of the second storage capacity.

[0102] Statement 7. A storage device according to Statement 6, wherein the step in which the processor is configured to identify the attributes of the first memory block includes: the processor is configured to identify the attributes of the first memory block based on the first identifier, wherein the step in which the processor is configured to associate the first memory block with the second storage capacity includes: associating the first memory block with the second identifier.

[0103] Statement 8. The storage device of Statement 7, wherein the processor is further configured to: operate the storage device in a first operating mode; and format the storage device based on the processor being configured to modify the first storage capacity.

[0104] Statement 9. The storage device of Statement 1 wherein the processor is further configured to: send a notification to the computing device based on the processor being configured to modify the first storage capacity.

[0105] Statement 10. The storage device of Statement 1, wherein the first amount is based on a target associated with the second storage capacity.

[0106] Statement 11. A method comprising: identifying, by a processor, a trigger condition; based on identifying the trigger condition: identifying, by the processor, a first storage capacity and a second storage capacity of a storage medium; identifying, by the processor, a first quantity; modifying, by the processor, the first storage capacity based on the first quantity; and modifying, by the processor, the second storage capacity based on the first quantity.

[0107] Statement 12. The method of Statement 11 wherein the first storage capacity is available to the computing device for storing data.

[0108] Statement 13. The method of statement 11 wherein the second storage capacity is used for background memory operations.

[0109] Statement 14. The method of statement 11 wherein the triggering condition comprises determining that the second storage capacity satisfies a criterion.

[0110] Statement 15. The method of Statement 14, further comprising: identifying a first memory block that forms part of the first storage capacity; and modifying a property of the first memory block to associate the first memory block with the second storage capacity.

[0111] Statement 16. The method of statement 11 further comprising: identifying an attribute of the first memory block; and based on the processor identifying the attribute, storing data in the first memory block in a second memory block that forms part of the second storage capacity.

[0112] Statement 17. A method according to Statement 16, wherein the step of identifying the attributes of the first memory block includes: identifying the attributes of the first memory block based on the first identifier, wherein the step of associating the first memory block with the second storage capacity includes: associating the first memory block with the second identifier.

[0113] Statement 18. The method of Statement 17 further comprising: operating the storage device in a first operating mode; and formatting the storage device based on modifying the first storage capacity.

[0114] Statement 19. The method of Statement 11 further comprising: sending a notification to a computing device based on modifying the first storage capacity.

[0115] Statement 20. The method of Statement 11 wherein the first amount is based on a target associated with the second storage capacity.

Claims

1. A storage device, include: A storage medium having a first storage capacity and a second storage capacity; as well as A processor, in conjunction with a storage medium, the processor being configured to: Identify triggering conditions; Based on the identification of trigger conditions: identifying a first storage capacity and a second storage capacity; identifying a first quantity; modifying the first storage capacity based on the first amount; as well as The second storage capacity is modified based on the first amount.

2. The storage device according to claim 1, in, The first storage capacity is available to the computing device for storing data.

3. The storage device according to claim 1, in, The second memory capacity is used for background memory operations.

4. The storage device according to claim 1, in, The trigger condition includes determining that the second storage capacity satisfies a criterion.

5. The storage device according to claim 4, in, The processor is also configured to: identifying a first memory block forming part of a first storage capacity; and An attribute of the first memory block is modified to associate the first memory block with the second storage capacity.

6. The storage device according to claim 1, in, The processor is also configured to: detecting fault characteristics to identify a faulty memory block; and The data in the failed memory block is stored in a second memory block forming part of the second storage capacity.

7. The storage device according to claim 5, in, The processor being configured to identify the first memory block comprises the processor being configured to identify the first memory block based on the first identifier, wherein the processor being configured to associate the first memory block with the second storage capacity comprises associating the first memory block with the second identifier.

8. The storage device according to claim 7, in, The processor is also configured to: operating the storage device in a first operating mode; and The storage device is formatted based on the processor being configured to modify the first storage capacity.

9. The storage device according to any one of claims 1 to 8, in, The processor is also configured to: Based on the processor being configured to modify the first storage capacity, a notification is sent to the computing device.

10. The storage device according to any one of claims 1 to 8, in, The first amount is based on a target associated with the second storage capacity.

11. A method for reallocating a storage device, include: A trigger condition is identified by a processor; Based on the identification of trigger conditions: identifying, by the processor, a first storage capacity and a second storage capacity of the storage medium; identifying, by a processor, a first quantity; modifying, by the processor, the first storage capacity based on the first amount; as well as The second storage capacity is modified, by the processor, based on the first amount.

12. The method according to claim 11, in, The first storage capacity is available to the computing device for storing data.

13. The method according to claim 11, in, The second memory capacity is used for background memory operations.

14. The method according to claim 11, in, The trigger condition includes determining that the second storage capacity satisfies a criterion.

15. The method according to claim 14, further comprising: include: identifying a first memory block forming part of a first storage capacity; as well as An attribute of the first memory block is modified to associate the first memory block with the second storage capacity.

16. The method according to claim 11, further comprising: include: detecting fault characteristics to identify a faulty memory block; as well as The data in the failed memory block is stored in a second memory block forming part of the second storage capacity.

17. The method according to claim 15, in, The step of identifying the first memory block includes identifying the first memory block based on the first identifier, wherein the step of associating the first memory block with the second storage capacity includes associating the first memory block with the second identifier.

18. The method according to claim 17, further comprising: include: operating the storage device in a first operating mode; as well as The storage device is formatted based on modifying the first storage capacity.

19. The method according to any one of claims 11 to 18, further comprising: include: Based on modifying the first storage capacity, a notification is sent to the computing device.

20. The method according to any one of claims 11 to 18, in, The first amount is based on a target associated with the second storage capacity.

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