Packaged semiconductor device and method of manufacture

Abstract

The invention relates to a packaged semiconductor device and a manufacturing method. The packaged semiconductor device has a first surface, a second surface opposite the first surface, and a sidewall between the first surface and the second surface. The packaged semiconductor device includes: a device die disposed in a central region surrounded by the sidewalls; a plurality of conductive contact portions in a peripheral area of the second surface; and a molding compound between the conductive contacts and between the device die and the conductive contacts. The conductive contacts each have an end side surface forming a portion of a sidewall, the remaining portion of the sidewall including a surface of a molding compound. The packaged semiconductor device has recesses between the conductive contacts, each recess having a first distance along the sidewall from the second surface to the first surface, and a second distance from the sidewall to the central region.

Description

Technical Field

[0001] The present invention relates to a packaged semiconductor device and a method for manufacturing a packaged semiconductor device. Background Art

[0002] Leadless packaged semiconductor devices, such as quad flat no lead (QFN) packaged devices, present challenges in reliably connecting the packaged devices to other items such as printed circuit boards (PCBs). Leadless packaged semiconductor devices are mechanically and electrically connected to the PCB through solder joints between solder pads located on the device and on the PCB, respectively. Because such solder joints are prone to becoming cold, failing, or cracking, the connections are susceptible to damage. Summary of the invention

[0003] This Summary is provided to introduce a selected, simplified version of the concepts that are detailed in the Detailed Description below. This Summary is not intended to identify key or essential features of the claims nor is it intended to limit the scope of the claims.

[0004] According to one embodiment, a packaged semiconductor device has a first surface, a second surface opposite to the first surface, and a sidewall between the first surface and the second surface; the packaged semiconductor device includes:

[0005] a device die disposed in a central region surrounded by the sidewalls;

[0006] a plurality of conductive contacts, the plurality of conductive contacts being located in a peripheral area of ​​the second surface; and

[0007] a molding compound between the conductive contacts and between the device die and the conductive contacts;

[0008] wherein the conductive contacts each have an end side surface forming a portion of the side wall, the remainder of the side wall comprising a surface of the molding compound; and

[0009] The packaged semiconductor device has recesses between the conductive contacts, each of the recesses having a first distance from the second surface to the first surface along the sidewall, and a second distance from the sidewall to the central area.

[0010] In one or more embodiments, the recess exposes a portion of a side surface of the conductive contact portion.

[0011] In one or more embodiments, the molding compound is exposed on the first surface of the packaged semiconductor device.

[0012] In one or more embodiments, the conductive contact portion extends a third distance from the side portion to the central region, and the second distance is between 25% and 50% of the third distance.

[0013] In one or more embodiments, the conductive contact portion extends along the sidewall from the second surface to the first surface by a fourth distance, and the first distance is between 40% and 60% of the fourth distance.

[0014] In one or more embodiments, the device die is disposed on a die pad in the central region, wherein at least one of a peripheral region of the die pad and an innermost region of the conductive contact is recessed from the second surface, and wherein the region recessed from the second surface includes the molding compound.

[0015] In one or more embodiments, the conductive contacts each include a plating material on the second surface.

[0016] In one or more embodiments, end side surfaces of the conductive contact portions each include a plating material.

[0017] In one or more embodiments, a portion of the exposed side surface and the end side surface of the conductive contact portion each include a plating material.

[0018] In one or more embodiments, the first distance is between 0.05 mm and 0.13 mm.

[0019] According to another embodiment, a method of manufacturing a packaged semiconductor device includes:

[0020] A lead frame array is provided, the lead frame array comprising at least two lead frames and a connecting bar therebetween, wherein each of the lead frames is connected to a corresponding side of the connecting bar, wherein each of the lead frames comprises a plurality of conductive contacts along and connected to the side of the connecting bar to which the lead frame is connected, and wherein the connecting bar further comprises an outer portion between and connecting the outermost ends of the conductive contacts, the outer portion of the connecting bar having a first recess between adjacent conductive contacts such that a first thickness of the outer portion is less than a full layer thickness of the lead frame;

[0021] disposing a molding compound in the first recess from a first side of the connecting rod;

[0022] removing a remaining portion of the outer portion having the first thickness from a second side surface of the connecting rod opposite to the first side surface, so that the outer portion has a second recess on the second side surface; and

[0023] The tie-bar is separated from the conductive contacts to produce the packaged semiconductor device having the second recess between the conductive contacts.

[0024] In one or more embodiments, providing the lead frame array includes etching the outer portion at locations between adjacent ones of the conductive contacts on the first side to produce a tie bar having the first recess.

[0025] In one or more embodiments, etching the outer portion of the tie bar on the first side includes etching the outer portion of the tie bar from the first side to a distance between 40% and 60% of a full layer thickness of the lead frame.

[0026] In one or more embodiments, the method further includes encapsulating the device die mounted to the lead frame array with the molding compound, including disposing the molding compound in the first recess from a first side of the connecting bar and exposing a second side of the conductive contact opposite the first side.

[0027] In one or more embodiments, removing the remaining portion of the outer portion includes etching the outer portion on the second side down to the molding compound in the first recess.

[0028] In one or more embodiments, each of the conductive contacts includes an innermost region adjacent to the central region of the lead frame and having a first side and an opposite second side; and wherein the conductive contact has a third recess in the innermost region, the third recess receiving the molding compound.

[0029] In one or more embodiments, providing the lead frame array includes etching the innermost second side of the conductive contact to provide the third recess, the innermost second side of the conductive contact being coplanar with the second side of the connecting bar.

[0030] In one or more implementations, the method further includes encapsulating a respective device die mounted to one of the leadframe arrays with the molding compound, including disposing the molding compound in the third recess.

[0031] In one or more embodiments, the second recess exposes a portion of a side surface of the conductive contact portion.

[0032] In one or more embodiments, the method further includes plating the portion of the side surface of the conductive contact exposed by the second recess. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to make the foregoing of the present invention understood in a more specific manner, a further detailed description of the present invention can be obtained with reference to the embodiments, some of which are shown by the attached illustrations. The accompanying illustrations only show typical embodiments of the present invention, and because the present invention can have other equally effective embodiments, the accompanying illustrations should not be construed as limiting the scope of the present invention. The accompanying drawings are drawn for ease of understanding rather than for measuring the present invention. For those skilled in the art, the benefits of the claimed subject matter will be readily understood after reading this description and in conjunction with the accompanying illustrations. In the accompanying drawings, similar reference numerals are used to indicate similar elements, and:

[0034] Figure 1 is a perspective view of a semiconductor device according to an embodiment;

[0035] Figure 2 is a bottom view of a semiconductor device according to an embodiment;

[0036] Figure 3 is a flow chart of a method for manufacturing a semiconductor device according to one embodiment;

[0037] Figure 4 is a top view of a lead frame array according to one embodiment;

[0038] Figure 5 yes Figure 4 An enlarged top view of the lead frame and a cross-sectional view along BB and CC;

[0039] Figure 6 is a cross-sectional view of the connecting rod after the molding compound has been placed;

[0040] Figure 7 is a cross-sectional view of the connecting rod after the remaining portion of the connecting rod has been removed;

[0041] Fig. 8A shows a bottom view of a lead frame array assembly and mold compound with a second surface of tie bars etched according to one embodiment;

[0042] Figure 8B is a bottom view of a lead frame array assembly and mold compound with a second surface of tie bars etched or sawn according to another embodiment;

[0043] Fig. 9 is a cross-sectional view of a semiconductor device when connected to a system board by soldering; and

[0044] Fig.10 According to one embodiment Figure 2 Section view along AA. DETAILED DESCRIPTION

[0045] Figure 1 The semiconductor device 100 has a first surface 102 and an opposite second surface 104, the first surface 102 is also Figure 1 The semiconductor device 100 has four sidewalls 106, or side surfaces, surrounding the main body of the semiconductor device 100 between the first surface 102 and the second surface 104. Inside the semiconductor device 100, there is a device die (in Figure 1 ), the device die is in a central region surrounded by sidewalls 106 .

[0046] On the second surface 104 of the semiconductor device 100, a plurality of conductive contacts 108 are included around the peripheral area of ​​the second surface 104, and the conductive contacts 108 are also exposed on the corresponding sidewalls 106. The conductive contacts are formed of one or more conductive materials, such as copper, and are preferably plated, and the conductive contacts are used to provide electrical connections between the semiconductor device 100 and external devices or circuits. The semiconductor device 100 also includes a mold compound 110 exposed on the first surface 102. The mold compound 110 forms and defines the first surface 102, the second surface 104, and the sidewalls 106. On the sidewalls 106, the mold compound 110 is disposed between the conductive contacts 108 and alternates with the conductive contacts 108. It can also be understood that inside the semiconductor device 100, the mold compound 110 is between the device die and the conductive contacts 108. The mold compound 110 has recesses or depressions 112 at locations where the second surface 104 and the sidewalls 106 intersect or meet, and between adjacent conductive contacts 108 .

[0047] Figure 2 According to the implementation method Figure 1 The bottom view of the semiconductor device 100. For the convenience of description, Figure 21 shows the conductive contacts 108 and the recesses 112 in the mold compound 110 on only one side of the second surface 104. However, it should be understood that the conductive contacts 108 and the recesses 112 are arranged on other sides of the second surface 104. Each conductive contact 108 has an inner end 114 extending toward the center of the semiconductor device 100, and an outer end 116 opposite thereto, which is also exposed on the sidewall 106 and formed as a part of the corresponding sidewall 106, while the remaining part of the sidewall 106 comprises the surface of the mold compound 110. The conductive contact 108 has a side surface 118 and a bottom surface 120. A portion of the side surface 118 is exposed in the recess 112, which can also be referred to as a notch. The bottom surface 120 is exposed on the second surface 104 of the semiconductor device 100. According to an embodiment, the portion of the side surface 118 exposed in the recess 112 and the bottom surface 120 of the conductive contact 108 are plated.

[0048] The outer end 116 of the conductive contact 108 has an end side surface 122 exposed on the side wall 106, and the end side surface 122 is also formed as a part of the side wall 106. The remaining portion of the side wall 106 includes the surface of the mold compound 110. Half or approximately half of the end side surface 122 of the conductive contact 108 that meets the bottom surface 120 is plated, such as Figure 2 The other half 126 of the end side surface 122 is not plated. For ease of description, plating is shown only on one end side surface 122, and it should be understood that the other conductive contact 108 is also configured to have similar plating on the half of the end side surface 122 that meets the bottom surface 120.

[0049] The conductive contact portion 108 has a distance or thickness T1 measured on the end side surface 122 or on the sidewall 106 along the direction from the second surface 104 to the first surface 102. The recess 112 has a distance or depth T2 measured on the sidewall 106 along the direction from the second surface 104 to the first surface 102. In an embodiment, the recess 112 is recessed from the second surface 104 by between 40% and 60% of the thickness of the conductive contact portion 108, typically about half, that is, the depth T2 is between 40% and 60% of the thickness T1, typically about half. The conductive contact portion 108 has a distance or length L1 measured on the second surface 104 from the inner end 114 to the outer end 116, or from the sidewall 106 to the central region. The recess 112 in the molding compound 110 has a distance or length L2 measured along the direction from the sidewall 106 to the innermost part of the recess 112. In this embodiment, the length L2 is 1 / 3 of the length L1, which means that the recess 112 is 1 / 3 of the length of the conductive contact portion 108 from the sidewall 106. In alternative embodiments, the length L2 of the recess 112 may have other proportions relative to the length L2 of the conductive contact portion 108, such as between 25% and 50%.

[0050] Figure 3 is a flow chart of a method for manufacturing a packaged semiconductor device according to one embodiment. The method may be used in the manufacturing Figure 1 and Figure 2 and will be described with reference thereto, and in conjunction with Figure 4 To Figure 8.

[0051] The method begins at step 302 by providing a lead frame array. It is understood that the lead frame array includes a plurality of lead frames, which are preferably manufactured by stamping a sheet of metal material, such as copper strip material, in another process. Figure 4 A portion of a lead frame array 402 is shown, which includes a plurality of unit lead frames 404 arranged to be aligned laterally and longitudinally to form the array 402. The array 402 includes tie bars 406 between the lead frames 404. The tie bars 406 connect adjacent lead frames 404 together so that the array 402 is a unitary assembly of discrete components in the lead frames 404. For example, the tie bars 406 are connected to two corresponding lead frames 404 on each side thereof, and the lead frames 404 have four sides, each side being connected to one side of a corresponding tie bar 406.

[0052] Still refer to Figure 4, the lead frame 404 includes a die pad 408, which is in the central area of ​​the tie bar 406 and is connected to the tie bar 406 by four die pad ties 410 at four corners. Each lead frame 404 connected to one side of the tie bar 406 includes a plurality of conductive contacts 412 along the one side of the tie bar 406. The conductive contacts 412 are separated from the die pad 408 and spaced apart from the die pad 408. The lead frame 404 is typically made of a metal material, such as copper, and has a thickness between 0.1 mm and 0.3 mm.

[0053] Figure 5 yes Figure 4 4. FIG. 4 is a plan view of a lead frame 404 of an array 402, and a BB cross-sectional view of a portion along a tie bar 406, and a CC cross-sectional view along a tie bar 406. An outer portion 407 of the tie bar 406 (i.e., a portion closer to the die pad 408) has a reduced thickness due to a first half-deep recess 416 between adjacent conductive contacts 412. The middle portion of the tie bar 406 has a full layer thickness. From the BB cross-sectional view, the first half-deep recess or notch 416 is formed by etching the first surface, i.e., the top surface 414 of the tie bar 406 at a location between adjacent conductive contacts 412 to a depth of about half the thickness of the tie bar 406, leaving a remaining portion 418 connecting adjacent conductive contacts 412. The darker layer on the first surface 414 shows that the array 402 has been plated, which is optional in other embodiments. Plated material may also be provided on the bottom surface 420 of the lead frame. The plating material includes silver, nickel, or tin-lead, etc., and has a thickness of several microns, typically between 3 microns and 30 microns. The remaining portion 418 thus still extends on the second surface of the connecting bar 406 opposite to the first surface 414, that is, the bottom surface 420. The second surface 420 of the connecting bar 406 is typically coplanar with the bottom surface of the die pad 408 and the bottom surface of the conductive contact portion 412.

[0054] The first half-deep recess 416 may be formed during the process of manufacturing the lead frame array 402, or may be formed during the process of manufacturing the lead frame array 402. Figure 3 During the process of manufacturing a semiconductor device, for example, it is formed in step 302 of the method. As described above, the thickness of the lead frame 404 is between 0.1 mm and 0.3 mm, and the half-etching of the first half-deep recess 416 can be implemented to have a depth of 0.05 to 0.15 mm, and can be deeper to 0.2 mm.

[0055] refer to Figure 1 and Figure 2, the conductive contact portions 412 each include an inner end 422 extending away from the middle portion of the connecting bar 406 toward the die pad 408, and an outer end 424 opposite the inner end 422, and the outer end 424 is adjacent to the outer portion 407 of the connecting bar 406. The conductive contact portion 412 has a length L1 measured from the inner end 422 to the outer end 424, and the first half-depth recess 416 has a length L2 measured along the direction from the connecting bar 406 to the die pad 408. In the present embodiment, the length L2 is 1 / 3 of the length L1. The ratio of the length L2 to the length L1 can be 1 / 2, 1 / 4, etc., and is typically in the range of 1 / 4 and 3 / 4.

[0056] The method of manufacturing a semiconductor device then includes filling the first half-deep recess 416 of the connecting bar 406 with a molding compound in step 304. Step 304 is typically after the steps of attaching a semiconductor device die (not shown) to a die pad 408 of the lead frame 404 and connecting the semiconductor device die to the conductive contact 412 by wire bonding or other suitable techniques. The molding compound is disposed on the top surface 414 of the connecting bar 406, and on the top surface of the conductive contact 412. Typically, the molding compound also encapsulates the semiconductor device die and the bonding wires on the top surface of the die pad 408, and fills the space between the die pad 408 and the conductive contact 412. Typically, the molding compound is introduced into the mold frame and fills the mold to define, for example, the top surface or first surface 102 of the packaged semiconductor device 100. After the molding compound is cured, the discrete components of the lead frame 404, the semiconductor device die, and the bonding wires are tightly bonded together, and the second surface 420 of the connecting bar 406 opposite to the first surface 414 and the bottom surface of the conductive contact portion 412 and the die pad 408 are exposed from the second surface 104 of the semiconductor device 100 to provide source / sink external connections for the semiconductor device.

[0057] exist Figure 3 In step 306 of the method, a portion of the connecting rod 406, namely a portion below the molding compound 426 filling the first half-deep recess 416, is removed. Specifically, the portion 418 remaining after etching the first half-deep recess 406 is now removed. Figure 74 shows a cross-sectional view of the connecting bar after removal. The figure shows a second half-deep recess 428, or gap, resulting from the removal. Since the remaining portion 418 of the outer portion 407 of the connecting bar 406 below the molding compound in the first half-deep recess 416 is removed, the outer portion 407 of the connecting bar 406 between the conductive contacts 412 has completely disappeared. The removal of the remaining portion 418 can be performed by another half-etching process on the second surface 420 of the connecting bar 406 at a position corresponding to and aligned with the first half-deep recess 416 until the filled molding compound 426 in the first half-deep recess 416 is exposed. As previously described, the first half-deep recess 416 is formed by etching the connecting bar 406 to a depth that is typically half the thickness of the connecting bar 406. The removal of the remaining portion 418 should now be performed by etching away the remaining half of the thickness of the connecting rod 406, so that the second half-deep recess 428 also typically has a depth of about half the thickness of the connecting rod 406 or the conductive contact portion 412. In other words, the second half-deep recess 428 is typically recessed from the second surface 420 by about half the thickness of the connecting rod 406. Those skilled in the art will appreciate that in an embodiment where the first half-deep recess 416 has a depth of 1 / 4 of the thickness of the connecting rod 406, the second half-deep recess 428 has a depth of about 3 / 4 of the thickness of the connecting rod 406.

[0058] As described above, the first half-deep recess 416 is etched to have a length L2 that is preferably about 1 / 3 of the length L1 of the conductive contact portion 412. Removal of the remaining portion 418 by etching is typically implemented to make the depth of the second half-deep recess 428 the same as that of the first half-deep recess 416. In other words, the length of the second half-deep recess 428 is typically equal to the length of the first half-deep recess 416, and is also 1 / 3 of the length L1 of the conductive contact portion 412 between the inner end 422 and the outer end 424.

[0059] refer to Fig. 8A and Figure 8B Prior to the optional step 308 of plating the second semi-deep recess 428, the method further comprises the step of exposing a portion of the end side surface of the outer end 424, Figure 2 The step of exposing a portion of the end side surface of the outer end 424 can be typically implemented by etching the second surface 420 of a portion of the connecting rod 406 connected to the outer end 424. Fig. 8AAs shown, in order to expose a portion of the end side surface of the outer end 424, the second surface 420 of the connecting rod 406 is etched only at a position next to the outer end 424. The step of etching the connecting rod 406 at a position next to the outer end 424 can be implemented together with the step of etching the connecting rod 406 in step 306, and the second surface 420 is etched at a position aligned with the first half-depth recess 416 and also to a depth of half the thickness of the connecting rod 406. The etching removes a portion of the connecting rod 406 at a position next to the outer end 424 of the conductive contact portion 412, thereby forming a recess 430 near the outer end 424 of the conductive contact portion 412 and exposing a portion of the end side surface of the outer end 424, which is aligned with the first half-depth recess 416. Figure 2 The end side surface 122 in is similar.

[0060] Further references Figure 8B According to an alternative embodiment, to expose a portion of the end side surface of the external end 424, the second surface 420 of the connecting bar 406 can be etched or sawed along the entirety of the connecting bar 406. The connecting bar 406 is etched to half of its thickness, forming a groove 432 in the connecting bar 406 outside the side of the lead frame 404 and exposing a portion 434 of the end side surface of the external end 424. The step of sawing can be performed from the second surface 420 to a depth sufficient to expose the end side surface but not to separate the molded semiconductor device before the optional plating step 308. The sawing portion can be performed in the singulation step described below. Fig. 8A The depression 430 or Figure 8B The groove 432 is continued with the optional plating step 308 to plate the portion 434 of the end side surface of the conductive contact portion 412. As can be understood, since the etching or sawing of the connecting rod 406 to expose the portion 434 of the end side surface is implemented to a depth of half the thickness of the connecting rod 406, the resulting portion 434 of the end side surface has a height of half the thickness of the connecting rod 406, combined with Figure 2 In the figure, 124 and 126 can be displayed more clearly.

[0061] Figure 3The method includes an optional step 308 after step 306 to plate the second half-deep recess 428, the bottom surface of the conductive contact portion 412, and the bottom surface of the die pad 408 exposed on the second surface and bottom surface of the semiconductor device. The optional plating step 308 can be performed by plating matte tin (Sn) or any other material that enhances the connection of the pins of the semiconductor device 100 with the solder during the subsequent soldering process. The plating can help provide a better connection with the solder when the manufactured semiconductor device is mounted on a system board, such as a printed circuit board or the like. It should be understood that by this optional step 308, the resulting product is not divided and singulated after the molding compound is placed on the array 402 of the lead frames 404 and the connecting rods 406, and the connecting rods 406 still connect the adjacent lead frames 404 together. Step 308 also plates the end side surface of the outer end 424 of the conductive contact portion 412, so that half of the end side surface is plated. Similar to the aforementioned plating materials, step 308 plates silver, nickel, tin-lead or other applicable materials to a thickness between 3 microns and 20 microns.

[0062] refer to Fig. 9 , which is a cross-sectional view of a portion of the semiconductor device of FIG. 8 when connected to a system board by solder, Figure 5 The plating on the end side surface of the conductive contact portion 412 enables the solder 902 to climb to a height of half the thickness of the conductive contact portion 412 when the packaged semiconductor device is mounted on the system board 904. Since the climbing solder 902 is supported by the solder base 906 with a larger size on the system board 904, the solder base 906 can be seen to exceed the coverage of the semiconductor device in a top view, so that the welding between the semiconductor device and the system board 904 can be inspected by an automated optical inspection (AOI) mechanism. Fig. 9 It can also be understood that the second half-deep recess 428 contains sufficient solder to firmly connect the conductive contact portion 412 to the system 904, thereby enhancing the mechanical and electrical connections of the semiconductor device.

[0063] Step 310 is a singulation step after the semiconductor device die is placed and connected and the molding compound is placed. The singulation step 310 separates the connecting bar 406 from the conductive contact portion 412, leaving the second half-deep recess 428 and the molding compound 426 filled in the upper portion of the second half-deep recess 428 integrated with the conductive contact portion 412 in the semiconductor device, such as Figure 1 and Figure 2 The singulation step 310 may be performed by sawing the packaged assembly along the tie bars 406 until adjacent semiconductor devices are completely separated.

[0064] Fig.10 According to one embodiment, a semiconductor device 100 is provided along Figure 2 AA cross-sectional view in FIG. According to the present embodiment, a lead frame for semiconductor device 100 is provided with a locking recess 1002 on the second surface 104 along the side of the surrounding area of ​​die pad 128. Die pad 128 supports device die 130, which is assembled to the lead frame. Similar locking recess 1004 can also be configured on the second surface 104 of the innermost area of ​​conductive contact portion 108. Locking recesses 1002 and 1004 enable molding compound 110 to be molded in a separate molding step or in a Figure 3 The locking recesses 1002 and 1004 are formed by etching in a separate lead frame manufacturing process or in a semiconductor device manufacturing process before the molding compound is injected. The etching starts from the bottom surface of the die pad 128 and / or the inner end of the conductive contact 108 to a depth of half the thickness of the lead frame, which means that the locking recesses 1002 and 1004 are recessed from the second surface 104 to half the thickness of the conductive contact 108. The locking recesses 1002 and 1004 provide a relatively wider opening on the second surface 104, and the unetched portions of the die pad 128 and the conductive contact 108 form a bottleneck, so that the molding compound 110 filled in the wider opening acts as a locking structure to tightly contact the molding compound 110 with the lead frame to avoid delamination or cracking.

[0065] Various exemplary embodiments are described herein with reference to specific illustrated examples. The illustrative examples are selected to assist those skilled in the art to form a clear understanding of and implement the various embodiments. However, the scope of systems, structures, and devices that can be constructed to include one or more embodiments, as well as the scope of methods implemented according to one or more embodiments, are not limited by the illustrative examples shown. On the contrary, those skilled in the art will understand based on this specification that many other configurations, structures, and methods can be implemented according to the various embodiments.

[0066] It should be understood that, with respect to the various positional indications used in the foregoing description of the present invention, such as top, bottom, upper, and lower, those indications are given only with reference to the corresponding drawings, and other positional relationships may be substituted when the orientation of the device changes during manufacture or operation. As mentioned above, those positional relationships are described only for the sake of clarity and are not limiting.

[0067] The foregoing description of this specification is with reference to specific embodiments and specific drawings, but the invention should not be limited thereto, but should be given by the claims. The various drawings described are exemplary and non-restrictive. In the drawings, the dimensions of the various elements may be exaggerated for illustrative purposes and may not be drawn to a specific scale. This description should also include discontinuous changes in tolerances and properties of various components and working methods. Various weakened implementations of the invention should also be included.

[0068] The word "comprising" used in this description and claims does not exclude other elements or steps. Unless otherwise specified, when the singular form such as "one" or "an" is used to refer to a certain or uncertain element, the plural number of the element should be included. Thus, the word "comprising" should not be understood to be limited to the items listed thereafter, and should not be understood to exclude other elements or steps; the scope of the description "the device includes items A and B" should not be limited to a device that only includes elements A and B. This description indicates that, for the purpose of this description, only elements A and B of the device are relevant. Although coupling generally includes inductive connection and connection generally means connection through, for example, wires, the "connection", "coupling" and "coupling" described here all indicate that there is an electrical connection between the coupled or connected elements, and do not mean that there are no intermediate elements between them. When describing transistors and their connections, the words gate, drain, and source are interchangeable with gate, drain, source, and gate terminal, drain terminal, and source terminal.

[0069] It will be apparent to those skilled in the art that various detailed changes may be made without departing from the scope of the claims of the present invention.

Claims

1. A packaged semiconductor device, characterized in that: The packaged semiconductor device has a first surface, a second surface opposite to the first surface, and a sidewall between the first surface and the second surface; The packaged semiconductor device comprises: a device die disposed in a central region surrounded by the sidewalls; a plurality of conductive contacts, the plurality of conductive contacts being located in a peripheral area of ​​the second surface; and a molding compound between the conductive contacts and between the device die and the conductive contacts; wherein the conductive contacts each have an end side surface forming a portion of the side wall, the remainder of the side wall comprising a surface of the molding compound; and The packaged semiconductor device has recesses between the conductive contacts, each of the recesses having a first distance from the second surface to the first surface along the sidewall, and a second distance from the sidewall to the central area.

2. The packaged semiconductor device according to claim 1, wherein: The recess exposes a portion of a side surface of the conductive contact portion.

3. The packaged semiconductor device according to claim 1, wherein: The molding compound is exposed on the first surface of the packaged semiconductor device.

4. The packaged semiconductor device according to claim 1, wherein: The device die is disposed on a die pad in the central region, wherein at least one of a peripheral region of the die pad and an innermost region of the conductive contact is recessed from the second surface, and wherein the region recessed from the second surface includes the mold compound.

5. A method for manufacturing a packaged semiconductor device, characterized in that: include: A lead frame array is provided, the lead frame array comprising at least two lead frames and a connecting bar therebetween, wherein each of the lead frames is connected to a corresponding side of the connecting bar, wherein each of the lead frames comprises a plurality of conductive contacts along and connected to the side of the connecting bar to which the lead frame is connected, and wherein the connecting bar further comprises an outer portion between and connecting the outermost ends of the conductive contacts, the outer portion of the connecting bar having a first recess between adjacent conductive contacts such that a first thickness of the outer portion is less than a full layer thickness of the lead frame; disposing a molding compound in the first recess from a first side of the connecting rod; removing a remaining portion of the outer portion having the first thickness from a second side surface of the connecting rod opposite to the first side surface, so that the outer portion has a second recess on the second side surface; as well as The tie-bar is separated from the conductive contacts to produce the packaged semiconductor device having the second recess between the conductive contacts.

6. The method according to claim 5, characterized in that Providing the lead frame array includes etching the outer portion at locations between adjacent ones of the conductive contacts on the first side to produce a tie bar having the first recess.

7. The method according to claim 5, characterized in that Further comprising encapsulating a device die mounted to the leadframe array with the molding compound, including disposing the molding compound in the first recess from a first side of the tie bar and exposing a second side of the conductive contact opposite the first side.

8. The method according to claim 5, characterized in that Removing the remaining portion of the outer portion includes etching the outer portion on the second side down to the mold compound in the first recess.

9. The method according to claim 5, characterized in that Each of the conductive contacts includes an innermost region adjacent to the central region of the lead frame and having a first side and an opposite second side; and wherein the conductive contacts have a third recess at the innermost region, the third recess receiving the molding compound.

10. The method according to claim 5, characterized in that The second recess exposes a portion of a side surface of the conductive contact portion.

Images