Frame header frequency offset compensation method, device and equipment based on DVBS-2 system and storage medium

Abstract

The invention discloses a frame header frequency offset compensation method, device and equipment based on a DVBS-2 system and a storage medium, and relates to the technical field of communication, and the method comprises the steps: carrying out the front and back multiplication according to the processing flag word data corresponding to a synchronous data frame, and obtaining the adjacent phase difference of a start flag field; performing phase jump processing on the adjacent phase differences to obtain a target phase difference, and obtaining an initial phase difference of the initial flag field in combination with the field phase information corresponding to the processing flag word data; calculating according to the initial phase difference and the adjacent phase difference to determine target phase information; and performing frequency offset compensation on frame header data in the synchronous data frame according to the target phase information to obtain a target data frame. Through the above mode, the frame header frequency offset can be compensated efficiently and accurately, the influence of residual frequency offset on RM decoding in a pilot-frequency-free variable coding modulation scheme is effectively eliminated, and a foundation is laid for the subsequent RM decoding to correctly demodulate information such as a modulation mode and a code length.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a frame header frequency deviation compensation method, device, equipment and storage medium based on a DVBS-2 system. Background Art

[0002] The DVB-S2 (Digital Video Broadcasting - Satellite Second Generation) system is the most widely used satellite TV broadcasting standard in the world. DVB-S2 is a typical satellite single-carrier system. With the increasing demand for space exploration missions, the amount of data transmitted by satellite-to-ground links has increased significantly. In order to meet the application requirements of the VCM (Variable Coding and Modulation) data transmission system for low-Earth orbit satellites, the DVB-S2 system integrates different modulation methods, variable coding modulation and other technologies, which are also easy to quickly update to other similar systems.

[0003] However, in the DVB-S2 system, the signal needs to be frequency-converted multiple times. Due to the nonlinear effects of the device and the environment, these factors will introduce carrier deviations such as frequency offset and phase error to the signal. In the pilot-free scheme, after the receiver uses SOF (Start of Frame) to perform coarse frequency offset estimation and compensation, there is still residual frequency offset. Since the residual frequency offset in the signal will affect the RM (Reed-Muller Decoding) decoding of the receiver, the receiver cannot demodulate the modulation mode and coding mode normally, and cannot perform subsequent data processing, resulting in the receiver being unable to perform data demodulation processing normally. Therefore, how to better eliminate the residual frequency offset in the frame header data is an urgent problem to be solved for the demodulation of the VCM system receiving data. Summary of the invention

[0004] The main purpose of the present application is to provide a frame header frequency deviation compensation method, device, equipment and storage medium based on the DVBS-2 system, aiming to solve the technical problem that the prior art cannot efficiently and accurately compensate for the frame header frequency deviation in a pilot-free scheme, resulting in the subsequent inability to correctly demodulate the received data.

[0005] To achieve the above object, the present application proposes a frame header frequency offset compensation method based on a DVBS-2 system, and the frame header frequency offset compensation method based on a DVBS-2 system includes: Performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame, and obtaining the adjacent phase difference of the start flag field according to the multiplication result, wherein there is no pilot segment in the synchronization data frame; Determine phase change information according to the adjacent phase differences, and perform phase jump processing on the phase change information to obtain a target phase difference; Obtaining the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; Calculating according to the initial phase difference and the adjacent phase difference to determine target phase information; Frequency offset compensation is performed on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

[0006] In one embodiment, before the step of performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame and obtaining the adjacent phase difference of the start flag field according to the multiplication result, the step further includes: Synchronize the received initial data frame to obtain a synchronized data frame; De-framing the synchronization data frame to obtain frame header data; The start flag field in the frame header data is conjugate-multiplied with the pre-stored flag word information to obtain a plurality of processed flag word data of the start flag field.

[0007] In one embodiment, the step of performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame and obtaining the adjacent phase difference of the start flag field according to the multiplication result includes: The processing flag word data corresponding to the synchronization data frame are multiplied forward and backward according to the symbol sequence information to obtain a plurality of adjacent phase information; Data accumulation is performed on each adjacent phase information, and the adjacent phase difference of the start flag field is obtained according to the data accumulation result.

[0008] In one embodiment, the step of determining phase change information according to the adjacent phase differences and performing phase jump processing on the phase change information to obtain a target phase difference includes: Comparing the phase change information with a target transition threshold to obtain a first comparison relationship between the phase change information and the target transition threshold; Determine a first jump processing mode according to the first comparison relationship; The phase change information is subjected to phase jump processing according to the first jump processing method to obtain a target phase difference.

[0009] In one embodiment, the step of obtaining the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference comprises: Perform difference calculation based on the field phase information corresponding to each processing flag word data and the target phase difference to obtain multiple processing phase differences; The average of each processed phase difference is calculated to obtain the initial phase difference of the start flag field.

[0010] In one embodiment, the step of calculating according to the initial phase difference and the adjacent phase difference to determine the target phase information includes: Performing phase calculation according to the initial phase difference and the adjacent phase difference to obtain frame header phase information corresponding to the synchronization data frame; Comparing the frame header phase information with a target transition threshold to obtain a second comparison relationship between the frame header phase information and the target transition threshold; Determine a second jump processing mode according to the second comparison relationship; The frame header phase information is subjected to phase jump processing according to the second jump processing mode to obtain target phase information.

[0011] In one embodiment, the step of performing phase jump processing on the frame header phase information according to the second jump processing mode to obtain target phase information includes: When the second jump processing mode is an addition processing mode, the frame header phase information and the jump processing value are added to obtain the target phase information; When the second jump processing mode is a difference processing mode, a difference calculation is performed on the frame header phase information and the jump processing value to obtain the target phase information.

[0012] In addition, to achieve the above purpose, the present application also proposes a frame header frequency offset compensation device based on the DVBS-2 system, and the frame header frequency offset compensation device based on the DVBS-2 system includes: A processing module, used for performing forward and backward multiplication according to each processing flag word data corresponding to the synchronous data frame, and obtaining the adjacent phase difference of the start flag field according to the multiplication result, wherein there is no pilot segment in the synchronous data frame; The processing module is further used to determine phase change information according to the adjacent phase difference, and perform phase jump processing on the phase change information to obtain a target phase difference; The processing module is further used to obtain the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; A calculation module, used to calculate according to the initial phase difference and the adjacent phase difference to determine the target phase information; The compensation module is used to perform frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

[0013] In addition, to achieve the above-mentioned purpose, the present application also proposes a frame header frequency offset compensation device based on the DVBS-2 system, the device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the frame header frequency offset compensation method based on the DVBS-2 system as described above.

[0014] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by the processor, the steps of the frame header frequency deviation compensation method based on the DVBS-2 system as described above are implemented.

[0015] In addition, to achieve the above-mentioned purpose, the present application also provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps of the frame header frequency offset compensation method based on the DVBS-2 system as described above are implemented.

[0016] The present application performs forward and backward multiplication according to each processing flag word data corresponding to the synchronization data frame, and obtains the adjacent phase difference of the start flag field according to the multiplication result, and there is no pilot segment in the synchronization data frame; determines the phase change information according to the adjacent phase difference, and performs phase jump processing on the phase change information to obtain the target phase difference; obtains the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; calculates according to the initial phase difference and the adjacent phase difference to determine the target phase information; performs frequency deviation compensation on the frame header data in the synchronization data frame according to the target phase information to obtain the target data frame. Through the above method, the frame header frequency deviation can be compensated efficiently and accurately, and the influence of the residual frequency deviation on RM decoding in the variable coding modulation scheme without pilot is effectively eliminated, which lays the foundation for the subsequent RM decoding to correctly demodulate the modulation mode and code length and other information. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0018] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0019] Figure 1A flowchart of the first embodiment of the frame header frequency deviation compensation method based on the DVBS-2 system of the present application is provided; Figure 2 A schematic diagram of a data frame structure of a frame header frequency offset compensation method based on a DVBS-2 system provided in Embodiment 1 of the present application; Figure 3 A flow chart of the second embodiment of the frame header frequency deviation compensation method based on the DVBS-2 system of the present application; Figure 4 A schematic diagram of a simplified flow chart of a frame header frequency deviation compensation method based on a DVBS-2 system provided in Embodiment 2 of the present application; Figure 5 This is a schematic diagram of the module structure of a frame header frequency deviation compensation device based on a DVBS-2 system according to an embodiment of the present application; Figure 6 Schematic diagram of the device structure of the hardware operating environment involved in the frame header frequency deviation compensation method based on the DVBS-2 system in the embodiment of the present application.

[0020] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0021] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0022] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0023] The main solution of the embodiment of the present application is: to perform forward and backward multiplication according to each processing flag word data corresponding to the synchronization data frame, and obtain the adjacent phase difference of the start flag field according to the multiplication result, and there is no pilot segment in the synchronization data frame; to determine the phase change information according to the adjacent phase difference, and to perform phase jump processing on the phase change information to obtain the target phase difference; to obtain the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; to calculate according to the initial phase difference and the adjacent phase difference to determine the target phase information; to perform frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain the target data frame.

[0024] With the development of deep learning, especially transformer architecture, camouflaged instance segmentation has made significant progress under fully supervised learning methods. However, these fully supervised learning methods have some significant drawbacks. First, they require a large amount of accurately labeled data, which is not only costly, but also very difficult to accurately label when the camouflaged object is highly similar to the background. Secondly, the existing technologies still face challenges when dealing with highly camouflaged objects, especially in terms of accuracy and generalization ability. In addition, existing methods often lack sufficient flexibility and adaptability, and have difficulty in coping with segmentation tasks of new scenes or new objects, which limits their application in a wider range of environments. Therefore, there is an urgent need for a new technology that can improve the segmentation accuracy and robustness of complex camouflaged scenes while reducing the reliance on accurately labeled data.

[0025] DVB-S2 is the most widely used satellite TV broadcasting standard in the world. DVB-S2 is a typical satellite single carrier system. With the increase in the demand for space exploration missions, the amount of data transmitted by the satellite-to-ground link has increased significantly. In order to meet the application requirements of the variable coding modulation (VCM) data transmission system of low-Earth orbit satellites, the DVB-S2 system integrates different modulation modes, variable coding modulation and other technologies. These technologies are also convenient for rapid updates to other similar systems. However, in the DVB-S2 system, the signal needs to be frequency-converted multiple times. Due to the nonlinear effects of devices and the environment, these factors will introduce carrier deviations such as frequency offset and phase error to the signal. In the pilot-free scheme, after the receiving end uses SOF for coarse frequency offset estimation compensation, there is still residual frequency offset. Since the residual frequency offset in the signal will affect the RM decoding of the receiving end, the receiving end cannot demodulate the modulation mode and coding mode normally, and cannot perform subsequent data processing, resulting in the receiving end being unable to perform data demodulation processing normally. Therefore, how to better eliminate the residual frequency offset in the frame header data is an urgent problem to be solved for the demodulation of the VCM system receiving data.

[0026] The present application provides a solution that can efficiently and accurately compensate for the frame header frequency deviation, effectively eliminating the impact of residual frequency deviation on RM decoding in a variable coding modulation scheme without a pilot, and laying the foundation for subsequent RM decoding to correctly demodulate information such as the modulation mode and code length.

[0027] It should be noted that the execution subject of this embodiment may be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or a frame header frequency offset compensation device based on the DVBS-2 system that can realize the above functions. The following takes the frame header frequency offset compensation device based on the DVBS-2 system as an example of the execution subject to illustrate this embodiment and the following embodiments.

[0028] Based on this, the embodiment of the present application provides a frame header frequency deviation compensation method based on the DVBS-2 system, referring to Figure 1 , Figure 1 This is a flow chart of the first embodiment of the frame header frequency offset compensation method based on the DVBS-2 system of the present application.

[0029] In this embodiment, the frame header frequency offset compensation method based on the DVBS-2 system includes steps S10 to S50: Step S10, performing forward and backward multiplication on each processing flag word data corresponding to the synchronous data frame, and obtaining the adjacent phase difference of the start flag field according to the multiplication result, wherein the synchronous data frame does not contain a pilot segment.

[0030] It should be noted that the physical layer data in the DVB-S2 system is transmitted in a frame format. The data frame structure is as follows: Figure 2 As shown, each frame consists of a frame header and data, and the frame header consists of a synchronization start flag word SOF (Start of Frame) and PLSC (Physical Layer Signaling Code). The data part is the valid data transmitted in a frame. Every 90 symbols are used as a time slot, and a pilot segment (optional) is inserted every 16 time slots according to the needs. Each pilot segment has 36 symbols. In this embodiment, there is no pilot segment in the data frame. The frame header has a total of 90 symbols, and SOF and PLSC have 26 and 64 symbols respectively. Before constellation mapping, SOF is a fixed codeword (18D2E82) HEX; PLSC is 7 bits containing related signaling, which are coded by first-order RM and scrambled by a fixed scrambling sequence to form 64 bits, among which the odd bits and the even bits immediately following them maintain the same or opposite relationship. The 90 symbols of the frame header part adopt the π / 2-BPSK constellation mapping method.

[0031] It can be understood that when there is a residual deviation in the received data frame, coarse synchronization is performed first. Coarse synchronization means that the receiving end can roughly determine the boundary of the data frame. At this time, a synchronized data frame is obtained. The frame reception signal can be expressed as: In the above formula For the The first frame in the data frame The modulation phase of the transmitting signal, is the length of a frame of data, is the residual frequency offset information after coarse frequency offset compensation, is the current system sampling rate, is the noise signal received by the receiving end.

[0032] In the specific implementation, the synchronous data frame is deframed to obtain the frame header data, and the 26 symbols of SOF information are taken, and the SOF information is conjugate multiplied with the locally stored SOF information, and the phase information of the modulated signal is removed, so as to obtain the processing flag word data corresponding to the synchronous data frame. .

[0033] It should be noted that each processing flag word data Multiply the front and back points to get the phase information of the two points before and after. , based on the phase information of the two points before and after It can be accumulated to get the phase deviation between the two points before and after In this embodiment, the phase difference between the front and rear points is That is, the adjacent phase difference of the start flag field, and the start flag field refers to the SOF segment in the synchronization data frame.

[0034] In a feasible implementation manner, step S10 may further include steps A11-A12: Step A11, performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame according to the symbol sequence information to obtain a plurality of adjacent phase information.

[0035] Step A12, data accumulation is performed on each adjacent phase information, and the adjacent phase difference of the start flag field is obtained according to the data accumulation result.

[0036] It should be noted that the symbol sequence information refers to the position of each SOF signal in the SOF segment. Multiply the front and back points to get the phase information of the two points before and after. In this embodiment, the phase information of the two points before and after That is, adjacent phase information. In this embodiment, it can be calculated from the received signal: .

[0037] It is understandable that since the noise is Gaussian white noise, The phase deviation of the frame received signal is the residual frequency deviation. The phase deviation between the previous and next points is obtained by accumulating: , so as to obtain the adjacent phase difference of SOF segment data .

[0038] Step S20, determining phase change information according to the adjacent phase differences, and performing phase jump processing on the phase change information to obtain a target phase difference.

[0039] It should be noted that according to the phase difference between the two points The phase change information of SOF segment data can be obtained Since the phase change information of the SOF segment data obtained in the above manner There is a phase jump, and the phase change information is needed Perform phase jump processing to obtain the target phase difference .

[0040] In a feasible implementation manner, the phase change information is subjected to phase jump processing to obtain a target phase difference in step S20, and steps B11 to B13 may also be included: Step B11: compare the phase change information with the target transition threshold to obtain a first comparison relationship between the phase change information and the target transition threshold.

[0041] Step B12: determining a first jump processing method according to the first comparison relationship.

[0042] Step B13: performing phase jump processing on the phase change information according to the first jump processing method to obtain a target phase difference.

[0043] It should be noted that the target transition threshold in this embodiment includes the first transition threshold and the second transition threshold , the phase change information and the target jump threshold value, thereby obtaining a first comparison relationship between the two, determining a corresponding first jump processing method based on the first comparison relationship, performing phase jump processing on the phase change information according to the first jump processing method, thereby obtaining a target phase difference In this embodiment, the first comparison relationship is < When , the first jump processing method is Plus , thus obtaining the target phase difference ; In the first comparison relationship > When , the first jump processing method is minus , thus obtaining the target phase difference .

[0044] Step S30, obtaining the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference.

[0045] It should be noted that since the data used is Frame data frame, so there is an initial phase in the data, according to the obtained The target phase difference of each point and the field phase information corresponding to each processing flag word data can be obtained. Initial phase difference of frame data frame .

[0046] In a feasible implementation manner, step S30 may further include steps C11-C12: Step C11, performing difference calculation based on the field phase information corresponding to each processing flag word data and the target phase difference to obtain multiple processing phase differences.

[0047] Step C12, calculating the average of each processed phase difference to obtain the initial phase difference of the start flag field.

[0048] It should be noted that for each initial flag word data Find the phase and get Phase information of 26 data symbols in the SOF field of the frame data: In this embodiment, Phase information of 26 data symbols in the SOF field of the frame data That is, the field phase information corresponding to each processing flag word data.

[0049] It can be understood that the field phase information corresponding to each processing flag word data is calculated Phase difference with target The difference between them is used to obtain multiple processing phase differences , calculate the average of each processed phase difference to obtain the initial phase difference of the SOF segment .

[0050] Step S40: Calculate according to the initial phase difference and the adjacent phase difference to determine target phase information.

[0051] It should be noted that based on the adjacent phase difference and the initial phase difference The phase of each packet frame header data can be calculated as ,in, is the length of the header, which is 90 in DVB-S2. The phase deviation caused by the final residual frequency deviation also has a phase jump, which is processed in the same way to obtain the final compensation phase value. In this embodiment, the final compensation phase value That is the target phase information.

[0052] In a feasible implementation manner, step S40 may further include steps D11 to D14: Step D11, performing phase calculation according to the initial phase difference and the adjacent phase difference to obtain frame header phase information corresponding to the synchronization data frame.

[0053] Step D12: Compare the frame header phase information with the target transition threshold to obtain a second comparison relationship between the frame header phase information and the target transition threshold.

[0054] Step D13: determining a second transition processing method according to the second comparison relationship.

[0055] Step D14, performing phase jump processing on the frame header phase information according to the second jump processing mode to obtain target phase information.

[0056] It should be noted that based on the adjacent phase difference and the initial phase difference The phase of each packet frame header data can be calculated as In this embodiment, the frame header phase information corresponding to the synchronization data frame refers to the phase of each packet frame header data. . The frame header phase information and the target jump threshold value, thereby obtaining a second comparison relationship between the two, determining a corresponding second jump processing method based on the second comparison relationship, and performing phase jump processing on the frame header phase information according to the second jump processing method, thereby obtaining the target phase information .

[0057] In a feasible implementation manner, step D14 may further include steps E11-E12: Step E11, when the second jump processing mode is an addition processing mode, the frame header phase information and the jump processing value are added to obtain the target phase information.

[0058] Step E12: When the second jump processing mode is a difference processing mode, a difference calculation is performed on the frame header phase information and the jump processing value to obtain target phase information.

[0059] It should be noted that, in this embodiment, when the second comparison relationship is < When , the second jump processing mode is the addition processing mode, at this time Plus , thereby obtaining the target phase information ; In the second comparison relation > When , the second jump processing mode is the difference processing mode, at this time minus , thereby obtaining the target phase information .

[0060] Step S50: performing frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

[0061] It should be noted that the target phase information is compensated to the frame header data of the synchronization data frame to complete the phase offset compensation of the frame header data, thereby obtaining the target data frame. The target data frame is RM decoded, and RM decoding can still be performed correctly under the residual frequency offset of 1 / 4 of the symbol rate. The modulation mode and data length of the data are obtained.

[0062] This embodiment performs forward and backward multiplication according to each processing flag word data corresponding to the synchronization data frame, and obtains the adjacent phase difference of the start flag field according to the multiplication result, and there is no pilot segment in the synchronization data frame; determines the phase change information according to the adjacent phase difference, and performs phase jump processing on the phase change information to obtain the target phase difference; obtains the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; calculates according to the initial phase difference and the adjacent phase difference to determine the target phase information; performs frequency deviation compensation on the frame header data in the synchronization data frame according to the target phase information to obtain the target data frame. Through the above method, the frame header frequency deviation can be compensated efficiently and accurately, and the influence of the residual frequency deviation on RM decoding in the variable coding modulation scheme without pilot is effectively eliminated, which lays the foundation for the subsequent RM decoding to correctly demodulate the modulation mode and code length and other information.

[0063] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can be referred to the above introduction, and will not be repeated in the following. Figure 3 The frame header frequency deviation compensation method based on the DVBS-2 system further includes steps S11 to S13 before step S10: Step S11, synchronizing the received initial data frame to obtain a synchronized data frame.

[0064] It should be noted that the receiving end receives the The frame data is the initial data frame, and the initial data frame is roughly synchronized to obtain a synchronized data frame. The frame reception signal can be expressed as: .

[0065] Step S12, de-framing the synchronization data frame to obtain frame header data.

[0066] Step S13, conjugate multiplying the start flag field in the frame header data and the pre-stored flag word information to obtain a plurality of processed flag word data of the start flag field.

[0067] It should be noted that the synchronous data frame is deframed to obtain the frame header data therein, and the SOF segment of 26 symbols in the frame header data is extracted to obtain the locally stored SOF information. In this embodiment, the pre-stored flag word information refers to the locally stored SOF information, and the SOF segment of 26 symbols is the start flag field.

[0068] It can be understood that the start flag field and the pre-stored flag word information are conjugate-multiplied to remove the phase information of the modulated signal, thereby obtaining multiple processed flag word data of the start flag field. ,in, For the received SOF signal, For local storage A SOF signal. The length of the SOF symbol is 26. is the modulation signal amplitude (A=1).

[0069] In this embodiment, the received initial data frame is synchronized to obtain a synchronization data frame; the synchronization data frame is deframed to obtain frame header data; the start flag field in the frame header data is conjugate-multiplied with the pre-stored flag word information to obtain multiple processing flag word data of the start flag field. In this way, the phase information of the modulated signal can be accurately removed.

[0070] For example, in order to help understand the implementation process of the frame header frequency deviation compensation method based on the DVBS-2 system obtained by combining this embodiment with the above-mentioned embodiment 1, please refer to Figure 4 , Figure 4 A brief flow chart of a frame header frequency offset compensation method based on a DVBS-2 system is provided, specifically: The method of this embodiment specifically includes the following steps: Step 1: Extract the SOF sequence modulation signal after frame synchronization , with the locally stored SOF signal Conjugate multiplication removes the data phase effect and yields ; After removing the initial data modulation phase information, the SOF segment data Obtain phase value information. Step 2: Convert the data in step 1 Conjugate multiplication of the previous and next data gives , according to the frame header data obtained The data is accumulated to reduce the impact of noise on the data phase and obtain the final phase difference between the previous and next data. Step 3: Based on the phase difference between the front and back points Perform linear interpolation on the phase of the frame header data caused by frequency deviation to obtain the frame header and estimate the phase of the SOF segment data in the header. Estimated value, perform phase jump processing on the data, and obtain the phase caused by the frame header with residual frequency deviation Step 4: According to the SOF segment data phase obtained in step 1 The phase difference between the SOF estimated in step 3 is , find the initial phase difference of the SOF segment data , calculate the first Initial phase difference of SOF of packet data Step 5: Based on the initial phase of the SOF segment data and phase step value Calculate and find the phase information of the 90 symbols of the current packet header due to frequency deviation Step 6: Perform frequency offset compensation for the first 90 symbols of the frame according to the phase calculated in step 5, and then perform RM decoding to decode the correct modulation mode and frame length information.

[0071] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the frame header frequency offset compensation method based on the DVBS-2 system of the present application. More simple transformations based on this technical concept are all within the protection scope of the present application.

[0072] This application also provides a frame header frequency deviation compensation device based on the DVBS-2 system, please refer to Figure 5 , the frame header frequency deviation compensation device based on the DVBS-2 system includes: The processing module 10 is used to perform forward and backward multiplication according to each processing flag word data corresponding to the synchronous data frame, and obtain the adjacent phase difference of the start flag field according to the multiplication result. There is no pilot segment in the synchronous data frame.

[0073] The processing module 10 is further configured to determine phase change information according to the adjacent phase differences, and perform phase jump processing on the phase change information to obtain a target phase difference.

[0074] The processing module 10 is further used to obtain the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference.

[0075] The calculation module 20 is used to perform calculation according to the initial phase difference and the adjacent phase difference to determine the target phase information.

[0076] The compensation module 30 is used to perform frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

[0077] Optionally, the processing module 10 is further used for: The received initial data frame is synchronized to obtain a synchronization data frame; the synchronization data frame is deframed to obtain frame header data; the start flag field in the frame header data is conjugate-multiplied with the pre-stored flag word information to obtain multiple processing flag word data of the start flag field.

[0078] Optionally, the processing module 10 is further used for: The processing flag word data corresponding to the synchronization data frame are multiplied forward and backward according to the symbol sequence information to obtain a plurality of adjacent phase information; data accumulation is performed on each adjacent phase information, and the adjacent phase difference of the start flag field is obtained according to the data accumulation result.

[0079] Optionally, the processing module 10 is further used for: The phase change information is compared with the target jump threshold to obtain a first comparison relationship between the phase change information and the target jump threshold; a first jump processing method is determined according to the first comparison relationship; and a phase jump processing is performed on the phase change information according to the first jump processing method to obtain a target phase difference.

[0080] Optionally, the processing module 10 is further used for: Difference calculation is performed based on the field phase information corresponding to each processing flag word data and the target phase difference to obtain multiple processing phase differences; and the average of each processing phase difference is calculated to obtain the initial phase difference of the start flag field.

[0081] Optionally, the calculation module 20 is further used for: Perform phase calculation based on the initial phase difference and the adjacent phase difference to obtain the frame header phase information corresponding to the synchronization data frame; compare the frame header phase information with the target jump threshold to obtain a second comparison relationship between the frame header phase information and the target jump threshold; determine a second jump processing method based on the second comparison relationship; perform phase jump processing on the frame header phase information according to the second jump processing method to obtain target phase information.

[0082] Optionally, the calculation module 20 is further used for: When the second jump processing mode is an addition processing mode, the frame header phase information and the jump processing value are added to obtain the target phase information; when the second jump processing mode is a difference processing mode, the frame header phase information and the jump processing value are difference calculated to obtain the target phase information.

[0083] The frame header frequency deviation compensation device based on the DVBS-2 system provided by the present application adopts the frame header frequency deviation compensation method based on the DVBS-2 system in the above-mentioned embodiment, which can solve the technical problem that the prior art cannot efficiently and accurately compensate for the frame header frequency deviation in the pilot-free scheme, resulting in the subsequent inability to correctly demodulate the received data. Compared with the prior art, the beneficial effects of the frame header frequency deviation compensation device based on the DVBS-2 system provided by the present application are the same as the beneficial effects of the frame header frequency deviation compensation method based on the DVBS-2 system provided by the above-mentioned embodiment, and the other technical features of the frame header frequency deviation compensation device based on the DVBS-2 system are the same as the features disclosed in the above-mentioned embodiment method, which will not be repeated here.

[0084] The present application provides a frame header frequency offset compensation device based on a DVBS-2 system, and the frame header frequency offset compensation device based on the DVBS-2 system includes: at least one processor; and a memory connected to the at least one processor in communication; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the frame header frequency offset compensation method based on the DVBS-2 system in the above-mentioned embodiment 1.

[0085] Reference below Figure 6 , which shows a schematic diagram of the structure of a frame header frequency deviation compensation device based on a DVBS-2 system suitable for implementing an embodiment of the present application. The frame header frequency deviation compensation device based on a DVBS-2 system in the embodiment of the present application may include but is not limited to mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 6 The frame header frequency offset compensation device based on the DVBS-2 system shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0086] like Figure 6As shown, the frame header frequency offset compensation device based on the DVBS-2 system may include a processing device 1001 (such as a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. In RAM1004, various programs and data required for the operation of the frame header frequency offset compensation device based on the DVBS-2 system are also stored. The processing device 1001, ROM1002 and RAM1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touchpad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; storage devices 1003 including, for example, a magnetic tape, a hard disk, etc.; and communication devices 1009. The communication device 1009 can allow the frame header frequency offset compensation device based on the DVBS-2 system to communicate wirelessly or wired with other devices to exchange data. Although the frame header frequency offset compensation device based on the DVBS-2 system with various systems is shown in the figure, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems may be implemented or have alternatively.

[0087] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0088] The frame header frequency deviation compensation device based on the DVBS-2 system provided by the present application adopts the frame header frequency deviation compensation method based on the DVBS-2 system in the above-mentioned embodiment, which can solve the technical problem that the prior art cannot efficiently and accurately compensate for the frame header frequency deviation in the pilot-free scheme, resulting in the subsequent inability to correctly demodulate the received data. Compared with the prior art, the beneficial effects of the frame header frequency deviation compensation device based on the DVBS-2 system provided by the present application are the same as the beneficial effects of the frame header frequency deviation compensation method based on the DVBS-2 system provided by the above-mentioned embodiment, and the other technical features of the frame header frequency deviation compensation device based on the DVBS-2 system are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0089] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0090] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0091] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the frame header frequency offset compensation method based on the DVBS-2 system in the above-mentioned embodiment.

[0092] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM: Random Access Memory), a read-only memory (ROM: Read Only Memory), an erasable programmable read-only memory (EPROM: Erasable Programmable Read Only Memory or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM: CD-Read Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency: Radio Frequency), etc., or any suitable combination of the above.

[0093] The computer-readable storage medium may be included in the frame header frequency offset compensation device based on the DVBS-2 system; or may exist independently without being assembled into the frame header frequency offset compensation device based on the DVBS-2 system.

[0094] The above-mentioned computer-readable storage medium carries one or more programs. When the above-mentioned one or more programs are executed by the frame header frequency offset compensation device based on the DVBS-2 system, the frame header frequency offset compensation device based on the DVBS-2 system: performs forward and backward multiplication according to each processing flag word data corresponding to the synchronization data frame, and obtains the adjacent phase difference of the start flag field according to the multiplication result, and there is no pilot segment in the synchronization data frame; determines the phase change information according to the adjacent phase difference, and performs phase jump processing on the phase change information to obtain the target phase difference; obtains the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; calculates according to the initial phase difference and the adjacent phase difference to determine the target phase information; and performs frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain the target data frame.

[0095] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0096] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0097] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.

[0098] The readable storage medium provided by the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned frame header frequency deviation compensation method based on the DVBS-2 system, which can solve the technical problem that the prior art cannot efficiently and accurately compensate for the frame header frequency deviation in the pilot-free scheme, resulting in the subsequent inability to correctly demodulate the received data. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided by the present application are the same as the beneficial effects of the frame header frequency deviation compensation method based on the DVBS-2 system provided by the above-mentioned embodiment, and will not be repeated here.

[0099] The present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the frame header frequency offset compensation method based on the DVBS-2 system as described above.

[0100] The computer program product provided by the present application can solve the technical problem that the prior art cannot efficiently and accurately compensate for the frame header frequency deviation in the pilot-free scheme, resulting in the subsequent inability to correctly demodulate the received data. Compared with the prior art, the beneficial effects of the computer program product provided by the present application are the same as the beneficial effects of the frame header frequency deviation compensation method based on the DVBS-2 system provided in the above embodiment, and will not be repeated here.

[0101] The above descriptions are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structural changes made using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect applications in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A frame header frequency deviation compensation method based on DVBS-2 system, It is characterized in that The frame header frequency deviation compensation method based on the DVBS-2 system includes: Performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame, and obtaining the adjacent phase difference of the start flag field according to the multiplication result, wherein there is no pilot segment in the synchronization data frame; Determine phase change information according to the adjacent phase differences, and perform phase jump processing on the phase change information to obtain a target phase difference; Obtaining the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; Calculating according to the initial phase difference and the adjacent phase difference to determine target phase information; Frequency offset compensation is performed on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

2. The method according to claim 1, It is characterized in that Before the step of performing forward and backward multiplication on the processing flag word data corresponding to the synchronization data frame and obtaining the adjacent phase difference of the start flag field according to the multiplication result, the method further includes: Synchronize the received initial data frame to obtain a synchronized data frame; De-framing the synchronization data frame to obtain frame header data; The start flag field in the frame header data is conjugate-multiplied with the pre-stored flag word information to obtain a plurality of processed flag word data of the start flag field.

3. The method according to claim 1, It is characterized in that The step of performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame and obtaining the adjacent phase difference of the start flag field according to the multiplication result comprises: The processing flag word data corresponding to the synchronization data frame are multiplied forward and backward according to the symbol sequence information to obtain a plurality of adjacent phase information; Data accumulation is performed on each adjacent phase information, and the adjacent phase difference of the start flag field is obtained according to the data accumulation result.

4. The method according to claim 1, It is characterized in that The step of determining phase change information according to the adjacent phase differences and performing phase jump processing on the phase change information to obtain a target phase difference comprises: Comparing the phase change information with a target transition threshold to obtain a first comparison relationship between the phase change information and the target transition threshold; Determine a first jump processing mode according to the first comparison relationship; The phase change information is subjected to phase jump processing according to the first jump processing method to obtain a target phase difference.

5. The method according to claim 1, It is characterized in that The step of obtaining the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference comprises: Perform difference calculation based on the field phase information corresponding to each processing flag word data and the target phase difference to obtain multiple processing phase differences; The average of each processed phase difference is calculated to obtain the initial phase difference of the start flag field.

6. The method according to claim 1, It is characterized in that The step of calculating according to the initial phase difference and the adjacent phase difference to determine the target phase information comprises: Performing phase calculation according to the initial phase difference and the adjacent phase difference to obtain frame header phase information corresponding to the synchronization data frame; Comparing the frame header phase information with a target transition threshold to obtain a second comparison relationship between the frame header phase information and the target transition threshold; Determine a second jump processing mode according to the second comparison relationship; The frame header phase information is subjected to phase jump processing according to the second jump processing mode to obtain target phase information.

7. The method according to claim 6, It is characterized in that The step of performing phase jump processing on the frame header phase information according to the second jump processing mode to obtain target phase information comprises: When the second jump processing mode is an addition processing mode, the frame header phase information and the jump processing value are added to obtain the target phase information; When the second jump processing mode is a difference processing mode, a difference calculation is performed on the frame header phase information and the jump processing value to obtain the target phase information.

8. A frame header frequency deviation compensation device based on DVBS-2 system, It is characterized in that The frame header frequency deviation compensation device based on the DVBS-2 system includes: A processing module, used for performing forward and backward multiplication according to each processing flag word data corresponding to the synchronous data frame, and obtaining the adjacent phase difference of the start flag field according to the multiplication result, wherein there is no pilot segment in the synchronous data frame; The processing module is further used to determine phase change information according to the adjacent phase difference, and perform phase jump processing on the phase change information to obtain a target phase difference; The processing module is further used to obtain the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; A calculation module, used to calculate according to the initial phase difference and the adjacent phase difference to determine the target phase information; The compensation module is used to perform frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

9. A frame header frequency deviation compensation device based on DVBS-2 system, It is characterized in that The frame header frequency offset compensation device based on the DVBS-2 system includes: a memory, a processor, and a frame header frequency offset compensation program based on the DVBS-2 system stored in the memory and executable on the processor, wherein the frame header frequency offset compensation program based on the DVBS-2 system is configured to implement the frame header frequency offset compensation method based on the DVBS-2 system as described in any one of claims 1 to 7.

10. A storage medium, It is characterized in that The storage medium stores a frame header frequency offset compensation program based on the DVBS-2 system, and when the frame header frequency offset compensation program based on the DVBS-2 system is executed by the processor, the frame header frequency offset compensation method based on the DVBS-2 system according to any one of claims 1 to 7 is implemented.

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