Frame header frequency deviation compensation method, device, equipment and storage medium based on DVBS-2 system

Abstract

The present application discloses a frame header frequency deviation compensation method, device, equipment and storage medium based on the DVBS‑2 system, which relates to the field of communication technology. The method includes: performing forward and backward multiplication according to each processing flag word data corresponding to the synchronization data frame to obtain the adjacent phase difference of the start flag field; performing phase jump processing on the adjacent phase difference to obtain the target phase difference, and combining the field phase information corresponding to each processing flag word data to obtain the initial phase difference of the start flag field; calculating according to the initial phase difference and the adjacent phase difference to determine the target phase information; performing frequency deviation compensation on the frame header data in the synchronization data frame according to the target phase information to obtain the target data frame. Through the above method, the frame header frequency deviation can be compensated efficiently and accurately, and the influence of the residual frequency deviation on the RM decoding in the variable coding modulation scheme without pilot is effectively eliminated, which lays the foundation for the subsequent RM decoding to correctly demodulate the modulation mode and code length and other information.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a frame header frequency offset compensation method, apparatus, device, and storage medium based on a DVBS-2 system. Background Art

[0002] DVB-S2 (Digital Video Broadcasting - Satellite Second Generation) is the world's most widely used satellite television broadcast standard. It is a typical single-carrier satellite system. With the increasing demand for space exploration missions, the amount of data transmitted on satellite-to-ground links has increased significantly. To meet the application requirements of VCM (Variable Coding and Modulation) data transmission systems for low-Earth orbit satellites, the DVB-S2 system integrates various modulation methods and VCM technologies. These technologies also facilitate rapid upgrades to other similar systems.

[0003] However, in DVB-S2 systems, the signal undergoes multiple frequency conversions. Nonlinearities in components and the environment can introduce carrier deviations such as frequency offset and phase error. In pilot-free schemes, even after the receiver uses the Start of Frame (SOF) to perform coarse frequency offset estimation and compensation, residual frequency offset still exists. This residual frequency offset affects the Reed-Muller (RM) decoding process at the receiver, preventing the receiver from properly demodulating the modulation and coding schemes, and subsequently processing the data. Consequently, the receiver is unable to properly demodulate the data. Therefore, effectively eliminating the residual frequency offset in the frame header data is a pressing issue for data demodulation in VCM systems. Summary of the Invention

[0004] The main purpose of this application is to provide a frame header frequency deviation compensation method, device, equipment and storage medium based on the DVBS-2 system, aiming to solve the technical problem that the existing technology cannot efficiently and accurately compensate for the frame header frequency deviation in the pilot-free scheme, resulting in the subsequent inability to correctly demodulate the received data.

[0005] To achieve the above objectives, the present application proposes a frame header frequency offset compensation method based on the DVBS-2 system, the frame header frequency offset compensation method based on the DVBS-2 system comprising:

[0006] Performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame, and obtaining adjacent phase differences of the start flag field according to the multiplication result, wherein the synchronization data frame does not have a pilot segment;

[0007] Determining phase change information according to the adjacent phase differences, and performing phase jump processing on the phase change information to obtain a target phase difference;

[0008] Obtaining an initial phase difference of the start flag field according to the field phase information corresponding to each processed flag word data and the target phase difference;

[0009] Calculating based on the initial phase difference and the adjacent phase difference to determine target phase information;

[0010] Frequency offset compensation is performed on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

[0011] In one embodiment, before the step of performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame and obtaining the adjacent phase difference of the start flag field according to the multiplication result, the method further includes:

[0012] Synchronize the received initial data frame to obtain a synchronized data frame;

[0013] De-framing the synchronization data frame to obtain frame header data;

[0014] The start flag field in the frame header data is conjugate-multiplied with the pre-stored flag word information to obtain a plurality of processed flag word data of the start flag field.

[0015] In one embodiment, the step of performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame and obtaining the adjacent phase difference of the start flag field according to the multiplication result includes:

[0016] Multiplying each processing flag word data corresponding to the synchronization data frame forward and backward according to the symbol sequence information to obtain a plurality of adjacent phase information;

[0017] Data accumulation is performed on each adjacent phase information, and the adjacent phase difference of the start flag field is obtained according to the data accumulation result.

[0018] In one embodiment, the step of determining phase change information according to the adjacent phase differences and performing phase jump processing on the phase change information to obtain a target phase difference includes:

[0019] Comparing the phase change information with a target jump threshold to obtain a first comparison relationship between the phase change information and the target jump threshold;

[0020] determining a first jump processing mode according to the first comparison relationship;

[0021] Phase jump processing is performed on the phase change information according to the first jump processing method to obtain a target phase difference.

[0022] In one embodiment, the step of obtaining the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference includes:

[0023] Perform difference calculation based on the field phase information corresponding to each processing flag word data and the target phase difference to obtain multiple processing phase differences;

[0024] The average of each processed phase difference is calculated to obtain the initial phase difference of the start flag field.

[0025] In one embodiment, the step of calculating the target phase information based on the initial phase difference and the adjacent phase difference includes:

[0026] Performing phase calculation based on the initial phase difference and the adjacent phase difference to obtain frame header phase information corresponding to the synchronization data frame;

[0027] Comparing the frame header phase information with a target transition threshold to obtain a second comparison relationship between the frame header phase information and the target transition threshold;

[0028] determining a second transition processing mode according to the second comparison relationship;

[0029] Phase jump processing is performed on the frame header phase information according to the second jump processing mode to obtain target phase information.

[0030] In one embodiment, the step of performing phase jump processing on the frame header phase information according to the second jump processing mode to obtain target phase information includes:

[0031] When the second jump processing mode is an addition processing mode, the frame header phase information and the jump processing value are added to obtain target phase information;

[0032] When the second jump processing mode is a difference processing mode, a difference calculation is performed on the frame header phase information and the jump processing value to obtain target phase information.

[0033] In addition, to achieve the above-mentioned purpose, the present application also proposes a frame header frequency offset compensation device based on the DVBS-2 system, the frame header frequency offset compensation device based on the DVBS-2 system comprising:

[0034] a processing module, configured to perform forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame, and obtain adjacent phase differences of the start flag field according to the multiplication result, wherein the synchronization data frame does not contain a pilot segment;

[0035] The processing module is further configured to determine phase change information based on the adjacent phase differences, and perform phase jump processing on the phase change information to obtain a target phase difference;

[0036] The processing module is further configured to obtain an initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference;

[0037] a calculation module, configured to calculate target phase information based on the initial phase difference and the adjacent phase difference;

[0038] The compensation module is used to perform frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

[0039] In addition, to achieve the above-mentioned objectives, the present application also proposes a frame header frequency offset compensation device based on the DVBS-2 system, wherein the device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the frame header frequency offset compensation method based on the DVBS-2 system as described above.

[0040] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by the processor, the steps of the frame header frequency deviation compensation method based on the DVBS-2 system as described above are implemented.

[0041] In addition, to achieve the above-mentioned purpose, the present application also provides a computer program product, which includes a computer program. When the computer program is executed by a processor, it implements the steps of the frame header frequency offset compensation method based on the DVBS-2 system as described above.

[0042] The present application multiplies each processing flag word data corresponding to the synchronization data frame forward and backward, and obtains the adjacent phase difference of the starting flag field according to the multiplication result, and there is no pilot segment in the synchronization data frame; determines the phase change information according to the adjacent phase difference, and performs phase jump processing on the phase change information to obtain the target phase difference; obtains the initial phase difference of the starting flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; calculates according to the initial phase difference and the adjacent phase difference to determine the target phase information; performs frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain the target data frame. Through the above method, the frame header frequency offset can be compensated efficiently and accurately, effectively eliminating the influence of the residual frequency offset on RM decoding in the variable coding modulation scheme without pilot, and laying the foundation for the subsequent RM decoding to correctly demodulate information such as modulation mode and code length. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0044] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0045] Figure 1 This is a flowchart of the first embodiment of the frame header frequency offset compensation method based on the DVBS-2 system of this application;

[0046] Figure 2 A schematic diagram of a data frame structure of a frame header frequency offset compensation method based on a DVBS-2 system provided in Example 1 of the present application;

[0047] Figure 3 This is a flow chart of the second embodiment of the frame header frequency offset compensation method based on the DVBS-2 system of this application;

[0048] Figure 4 A schematic diagram of a simplified flow chart of a frame header frequency offset compensation method based on a DVBS-2 system provided in Example 2 of the present application;

[0049] Figure 5 This is a schematic diagram of the module structure of the frame header frequency deviation compensation device based on the DVBS-2 system according to an embodiment of the present application;

[0050] Figure 6Schematic diagram of the device structure of the hardware operating environment involved in the frame header frequency offset compensation method based on the DVBS-2 system in the embodiment of the present application.

[0051] The purpose, features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0052] It should be understood that the specific embodiments described herein are merely used to explain the technical solutions of the present application and are not intended to limit the present application.

[0053] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0054] The main solution of the embodiment of the present application is: performing forward and backward multiplication according to each processing flag word data corresponding to the synchronization data frame, and obtaining the adjacent phase difference of the starting flag field according to the multiplication result, and there is no pilot segment in the synchronization data frame; determining the phase change information according to the adjacent phase difference, and performing phase jump processing on the phase change information to obtain the target phase difference; obtaining the initial phase difference of the starting flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; calculating according to the initial phase difference and the adjacent phase difference to determine the target phase information; performing frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain the target data frame.

[0055] With the development of deep learning, especially transformer architectures, camouflaged instance segmentation has made significant progress under fully supervised learning methods. However, these fully supervised learning methods have some significant drawbacks. First, they require a large amount of accurately labeled data, which is not only costly but also very difficult to accurately label when the camouflaged objects are highly similar to the background. Second, existing technologies still face challenges when dealing with highly camouflaged objects, especially in terms of accuracy and generalization ability. In addition, existing methods often lack sufficient flexibility and adaptability, and have difficulty in coping with segmentation tasks of new scenes or new objects, which limits their application in a wider range of environments. Therefore, there is an urgent need for a new technology that can reduce the dependence on accurately labeled data while improving the segmentation accuracy and robustness of complex camouflaged scenes.

[0056] DVB-S2 is currently the most widely used satellite television broadcasting standard in the world. It is a typical single-carrier satellite system. With the increasing demand for space exploration missions, the amount of data transmitted in satellite-to-ground links has increased significantly. To meet the application requirements of variable coding modulation (VCM) data transmission systems for low-Earth orbit satellites, the DVB-S2 system integrates various modulation schemes and VCM technologies. These technologies also facilitate rapid upgrades to other similar systems. However, DVB-S2 systems require multiple frequency conversions of the signal. Due to nonlinear effects from components and the environment, these factors can introduce carrier deviations such as frequency offset and phase error. In pilot-free schemes, even after the receiver uses SOF for coarse frequency offset estimation and compensation, residual frequency offset still exists. This residual frequency offset affects the receiver's RM decoding, preventing the receiver from properly demodulating the modulation and coding schemes, and thus hindering subsequent data processing. Therefore, how to effectively eliminate the residual frequency offset in the frame header data is an urgent problem for data demodulation in VCM systems.

[0057] The present application provides a solution that can efficiently and accurately compensate for the frame header frequency deviation, effectively eliminating the impact of residual frequency deviation on RM decoding in the variable coding modulation scheme without pilot, and laying the foundation for subsequent RM decoding to correctly demodulate information such as modulation mode and code length.

[0058] It should be noted that the execution entity of this embodiment can be a computing service device with data processing, network communication, and program execution functions, such as a tablet computer, personal computer, or mobile phone, or a frame header frequency offset compensation device based on the DVBS-2 system that can implement the above functions. This embodiment and the following embodiments are described below using a frame header frequency offset compensation device based on the DVBS-2 system as the execution entity.

[0059] Based on this, the embodiment of the present application provides a frame header frequency deviation compensation method based on the DVBS-2 system, referring to Figure 1 , Figure 1 This is a flowchart of the first embodiment of the frame header frequency offset compensation method based on the DVBS-2 system of this application.

[0060] In this embodiment, the frame header frequency offset compensation method based on the DVBS-2 system includes steps S10 to S50:

[0061] Step S10: performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame, and obtaining the adjacent phase difference of the start flag field according to the multiplication result, wherein the synchronization data frame does not contain a pilot segment.

[0062] It should be noted that the physical layer data in the DVB-S2 system is transmitted in a frame format. The data frame structure is as follows: Figure 2 As shown, each frame consists of a header and data. The header consists of the synchronization start flag SOF (Start of Frame) and the physical layer signaling code (PLSC). The data portion is the valid data transmitted in the frame. Every 90 symbols constitute a time slot. A pilot segment (optional) is inserted every 16 time slots as needed. Each pilot segment has 36 symbols. In this embodiment, there are no pilot segments in the data frame. The header contains 90 symbols, with the SOF and PLSC having 26 and 64 symbols, respectively. Before constellation mapping, the SOF is a fixed codeword (18D2E82) HEX; the PLSC is 7 bits containing related signaling, which are first-order RM encoded and scrambled with a fixed scrambling sequence to form 64 bits. Odd-numbered bits are either identical or opposite to the immediately following even-numbered bits. The 90 symbols in the header use π / 2-BPSK constellation mapping.

[0063] It is understandable that when there is residual deviation in the received data frame, coarse synchronization is performed first. Coarse synchronization means that the receiving end can roughly determine the boundary of the data frame. At this time, the synchronized data frame is obtained. The frame reception signal can be expressed as: In the above formula For the The first frame in the data frame The modulation phase of the transmitting signal, is the length of a frame of data, is the residual frequency offset information after coarse frequency offset compensation, is the current system sampling rate, is the noise signal received by the receiver.

[0064] In the specific implementation, the synchronous data frame is deframed to obtain the frame header data, and the 26 symbols SOF information are taken. The SOF information is conjugate multiplied with the locally stored SOF information, and the phase information of the modulated signal is removed to obtain the processing flag word data corresponding to the synchronous data frame. .

[0065] It should be noted that each processing flag word data Multiply the front and back to get the phase information of the two points before and after , based on the phase information of the two points before and after Can be accumulated to get the phase deviation between the two points before and after In this embodiment, the phase difference between the front and rear points is That is, the adjacent phase difference of the start flag field, and the start flag field refers to the SOF segment in the synchronization data frame.

[0066] In a feasible implementation, step S10 may further include steps A11 and A12:

[0067] Step A11 : performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame according to the symbol sequence information to obtain a plurality of adjacent phase information.

[0068] Step A12: accumulate data of each adjacent phase information, and obtain the adjacent phase difference of the start flag field according to the data accumulation result.

[0069] It should be noted that the symbol sequence information refers to the position of each SOF signal in the SOF segment. Multiply the front and back to get the phase information of the two points before and after In this embodiment, the phase information of the two points before and after That is, adjacent phase information. In this embodiment, it can be calculated from the received signal: .

[0070] It is understandable that since the noise is Gaussian white noise, the The phase deviation of the frame received signal is the residual frequency deviation. The phase deviation between the previous and next points is obtained by accumulating: , thereby obtaining the adjacent phase difference of SOF segment data .

[0071] Step S20: determining phase change information according to the adjacent phase differences, and performing phase jump processing on the phase change information to obtain a target phase difference.

[0072] It should be noted that according to the phase deviation between the two points The phase change information of SOF segment data can be obtained Since the phase change information of the SOF segment data obtained by the above method There is a phase jump, and the phase change information needs to be Perform phase jump processing to obtain the target phase difference .

[0073] In a feasible implementation manner, performing phase jump processing on the phase change information to obtain a target phase difference in step S20 may further include steps B11 to B13:

[0074] Step B11: Compare the phase change information with a target transition threshold to obtain a first comparison relationship between the phase change information and the target transition threshold.

[0075] Step B12: Determine a first jump processing method according to the first comparison relationship.

[0076] Step B13: performing phase jump processing on the phase change information according to the first jump processing method to obtain a target phase difference.

[0077] It should be noted that the target transition threshold in this embodiment includes the first transition threshold and the second transition threshold , the phase change information The target phase difference is obtained by comparing the target phase difference with the target jump threshold, thereby obtaining a first comparison relationship between the two, determining a corresponding first jump processing method based on the first comparison relationship, and performing phase jump processing on the phase change information according to the first jump processing method, thereby obtaining a target phase difference. In this embodiment, the first comparison relationship is < When , the first jump processing method is Plus , thus obtaining the target phase difference ; In the first comparison relationship > When , the first jump processing method is minus , thus obtaining the target phase difference .

[0078] Step S30 , obtaining the initial phase difference of the start flag field according to the field phase information corresponding to each processed flag word data and the target phase difference.

[0079] It should be noted that since the data used is Frame data frame, so there is an initial phase in the data, according to the obtained The target phase difference of each point and the field phase information corresponding to each processing flag word data can be obtained. Initial phase difference of frame data frame .

[0080] In a feasible implementation, step S30 may further include steps C11 to C12:

[0081] Step C11 , performing difference calculation based on the field phase information corresponding to each processing flag word data and the target phase difference to obtain a plurality of processing phase differences.

[0082] Step C12: Calculate the average of each processed phase difference to obtain the initial phase difference of the start flag field.

[0083] It should be noted that for each initial flag word data Find the phase and get Phase information of 26 data symbols in the SOF field of the frame data: In this embodiment, Phase information of 26 data symbols in the SOF field of the frame data That is, the field phase information corresponding to each processing flag word data.

[0084] It is understandable that the calculation of the field phase information corresponding to each processing flag word data Phase difference with target The difference between them is used to obtain multiple processing phase differences , calculate the mean of each processed phase difference to obtain the initial phase difference of the SOF segment .

[0085] Step S40: Calculate according to the initial phase difference and the adjacent phase difference to determine target phase information.

[0086] It should be noted that based on the adjacent phase difference and the initial phase difference The phase of each packet frame header data can be calculated as ,in, The length of the header is 90 in DVB-S2. The phase deviation caused by the final residual frequency deviation also has a phase jump, which is processed in the same way to obtain the final compensated phase value. In this embodiment, the final compensation phase value That is the target phase information.

[0087] In a feasible implementation, step S40 may further include steps D11 to D14:

[0088] Step D11 , performing phase calculation based on the initial phase difference and the adjacent phase difference to obtain frame header phase information corresponding to the synchronization data frame.

[0089] Step D12: Compare the frame header phase information with the target transition threshold to obtain a second comparison relationship between the frame header phase information and the target transition threshold.

[0090] Step D13: Determine a second transition processing method according to the second comparison relationship.

[0091] Step D14: performing phase jump processing on the frame header phase information according to the second jump processing mode to obtain target phase information.

[0092] It should be noted that based on the adjacent phase difference and the initial phase difference The phase of each packet frame header data can be calculated as In this embodiment, the frame header phase information corresponding to the synchronization data frame refers to the phase of each packet frame header data. . The frame header phase information The target phase information is obtained by comparing the target phase information with the target jump threshold, thereby obtaining a second comparison relationship between the two, determining a corresponding second jump processing method based on the second comparison relationship, and performing phase jump processing on the frame header phase information according to the second jump processing method, thereby obtaining the target phase information. .

[0093] In a feasible implementation, step D14 may further include steps E11 and E12:

[0094] Step E11: When the second jump processing mode is an addition processing mode, the frame header phase information and the jump processing value are added to obtain target phase information.

[0095] Step E12: When the second jump processing mode is a difference processing mode, performing a difference calculation on the frame header phase information and the jump processing value to obtain target phase information.

[0096] It should be noted that, in this embodiment, when the second comparison relationship is < When , the second jump processing mode is the addition processing mode, at this time Plus , thereby obtaining the target phase information ; In the second comparison relation > When , the second jump processing mode is the difference processing mode, at this time minus , thereby obtaining the target phase information .

[0097] Step S50 , performing frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

[0098] It should be noted that the target phase information is added to the header data of the synchronization data frame to complete the phase offset compensation of the frame header data, thereby obtaining the target data frame. RM decoding is performed on the target data frame. Even with a residual frequency offset of 1 / 4 of the symbol rate, RM decoding can still be performed correctly. Information such as the data modulation method and data length is obtained.

[0099] This embodiment multiplies each processing flag word data corresponding to the synchronization data frame forward and backward, and obtains the adjacent phase difference of the starting flag field based on the multiplication result, and there is no pilot segment in the synchronization data frame; determines the phase change information based on the adjacent phase difference, and performs phase jump processing on the phase change information to obtain the target phase difference; obtains the initial phase difference of the starting flag field based on the field phase information corresponding to each processing flag word data and the target phase difference; calculates based on the initial phase difference and the adjacent phase difference to determine the target phase information; and performs frequency offset compensation on the frame header data in the synchronization data frame based on the target phase information to obtain the target data frame. Through the above method, the frame header frequency offset can be compensated efficiently and accurately, effectively eliminating the influence of the residual frequency offset on RM decoding in the variable coding modulation scheme without pilot, and laying the foundation for the subsequent RM decoding to correctly demodulate information such as the modulation mode and code length.

[0100] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the above embodiment 1 can be referred to the above introduction and will not be described in detail later. Figure 3 The frame header frequency offset compensation method based on the DVBS-2 system further includes steps S11 to S13 before step S10:

[0101] Step S11: synchronize the received initial data frame to obtain a synchronized data frame.

[0102] It should be noted that the receiving end receives the The frame data is the initial data frame, and the initial data frame is roughly synchronized to obtain a synchronized data frame. The frame reception signal can be expressed as: .

[0103] Step S12: Deframe the synchronization data frame to obtain frame header data.

[0104] Step S13: Conjugate multiply the start flag field in the frame header data and the pre-stored flag word information to obtain a plurality of processed flag word data of the start flag field.

[0105] It should be noted that the synchronization data frame is deframed to obtain the frame header data therein, and the 26-symbol SOF segment in the frame header data is extracted to obtain the locally stored SOF information. In this embodiment, the pre-stored flag word information refers to the locally stored SOF information, and the 26-symbol SOF segment is the start flag field.

[0106] It can be understood that the start flag field and the pre-stored flag word information are conjugate multiplied and the phase information of the modulated signal is removed to obtain multiple processing flag word data of the start flag field. , in, For the received SOF signal, For local storage SOF signal. The length of the SOF symbol is 26. is the modulation signal amplitude (A=1).

[0107] This embodiment synchronizes the received initial data frame to obtain a synchronized data frame; deframes the synchronized data frame to obtain frame header data; and conjugate-multiplies the start flag field in the frame header data with pre-stored flag word information to obtain multiple processed flag word data for the start flag field. This method accurately removes the phase information of the modulated signal.

[0108] For example, to help understand the implementation process of the frame header frequency deviation compensation method based on the DVBS-2 system obtained by combining this embodiment with the above embodiment 1, please refer to Figure 4 , Figure 4 This article provides a simplified flowchart of a frame header frequency offset compensation method based on the DVBS-2 system. Specifically:

[0109] The method of this embodiment specifically includes the following steps: Step 1: Extract the SOF sequence modulation signal after frame synchronization , with the locally stored SOF signal Conjugate multiplication removes the data phase effect and gives ; After removing the initial data modulation phase information, the SOF segment data Obtain phase value information. Step 2: Convert the data in step 1 Perform conjugate multiplication of the front and back data to obtain , according to the frame header data obtained The data is accumulated to reduce the impact of noise on the data phase and obtain the final phase difference between the previous and next data. Step 3: According to the phase difference between the front and back points Perform linear interpolation on the phase of the frame header data caused by frequency deviation to obtain the frame header and estimate the phase of the SOF segment data in the header. Estimated value, perform phase jump processing on the data, and obtain the phase caused by the frame header with residual frequency offset Step 4: According to the SOF segment data phase obtained in step 1 The phase difference between the SOF estimated in step 3 is , find the initial phase difference of SOF segment data , calculate the first Initial phase difference of SOF of packet data Step 5: According to the initial phase of the SOF segment data and phase step value Calculate and find the phase information of the 90 symbols of the current packet header due to frequency offset Step 6: Compensate the frequency offset of the first 90 symbols of the frame based on the phase calculated in step 5, and then perform RM decoding to decode the correct modulation mode and frame length information.

[0110] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the frame header frequency offset compensation method based on the DVBS-2 system of the present application. More simple transformations based on this technical concept are all within the scope of protection of the present application.

[0111] This application also provides a frame header frequency deviation compensation device based on the DVBS-2 system, please refer to Figure 5 The frame header frequency deviation compensation device based on the DVBS-2 system includes:

[0112] The processing module 10 is used to perform forward and backward multiplication according to each processing flag word data corresponding to the synchronization data frame, and obtain the adjacent phase difference of the start flag field according to the multiplication result. The synchronization data frame does not have a pilot segment.

[0113] The processing module 10 is further configured to determine phase change information according to the adjacent phase differences, and perform phase jump processing on the phase change information to obtain a target phase difference.

[0114] The processing module 10 is further configured to obtain an initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference.

[0115] The calculation module 20 is configured to perform calculation based on the initial phase difference and the adjacent phase difference to determine target phase information.

[0116] The compensation module 30 is configured to perform frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

[0117] Optionally, the processing module 10 is further configured to:

[0118] The received initial data frame is synchronized to obtain a synchronized data frame; the synchronized data frame is deframed to obtain frame header data; the start flag field in the frame header data is conjugate-multiplied with pre-stored flag word information to obtain multiple processed flag word data of the start flag field.

[0119] Optionally, the processing module 10 is further configured to:

[0120] The processing flag word data corresponding to the synchronization data frame are multiplied forward and backward according to the symbol sequence information to obtain multiple adjacent phase information; data accumulation is performed on each adjacent phase information, and the adjacent phase difference of the start flag field is obtained according to the data accumulation result.

[0121] Optionally, the processing module 10 is further configured to:

[0122] The phase change information and the target jump threshold are compared to obtain a first comparison relationship between the phase change information and the target jump threshold; a first jump processing method is determined according to the first comparison relationship; and a phase jump processing is performed on the phase change information according to the first jump processing method to obtain a target phase difference.

[0123] Optionally, the processing module 10 is further configured to:

[0124] Difference calculation is performed based on the field phase information corresponding to each processing flag word data and the target phase difference to obtain multiple processing phase differences; and average calculation is performed on each processing phase difference to obtain the initial phase difference of the starting flag field.

[0125] Optionally, the calculation module 20 is further configured to:

[0126] Perform phase calculation based on the initial phase difference and the adjacent phase difference to obtain the frame header phase information corresponding to the synchronization data frame; compare the frame header phase information with the target jump threshold to obtain a second comparison relationship between the frame header phase information and the target jump threshold; determine a second jump processing method based on the second comparison relationship; perform phase jump processing on the frame header phase information according to the second jump processing method to obtain target phase information.

[0127] Optionally, the calculation module 20 is further configured to:

[0128] When the second jump processing mode is an addition processing mode, the frame header phase information and the jump processing value are added to obtain the target phase information; when the second jump processing mode is a difference processing mode, the frame header phase information and the jump processing value are difference calculated to obtain the target phase information.

[0129] The frame header frequency offset compensation device based on the DVBS-2 system provided in the present application adopts the frame header frequency offset compensation method based on the DVBS-2 system in the above-mentioned embodiment, which can solve the technical problem that the prior art cannot efficiently and accurately compensate for the frame header frequency offset in the pilot-free scheme, resulting in the subsequent inability to correctly demodulate the received data. Compared with the prior art, the beneficial effects of the frame header frequency offset compensation device based on the DVBS-2 system provided in the present application are the same as the beneficial effects of the frame header frequency offset compensation method based on the DVBS-2 system provided in the above-mentioned embodiment, and the other technical features of the frame header frequency offset compensation device based on the DVBS-2 system are the same as the features disclosed in the above-mentioned embodiment method, and are not repeated here.

[0130] The present application provides a frame header frequency offset compensation device based on a DVBS-2 system. The frame header frequency offset compensation device based on the DVBS-2 system includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the frame header frequency offset compensation method based on the DVBS-2 system in the first embodiment above.

[0131] Reference below Figure 6 , which shows a schematic structural diagram of a DVBS-2 system-based frame header frequency offset compensation device suitable for implementing embodiments of the present application. The DVBS-2 system-based frame header frequency offset compensation device in the embodiments of the present application may include, but is not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. Figure 6 The frame header frequency offset compensation device based on the DVBS-2 system shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0132] like Figure 6As shown, the DVBS-2 system-based frame header frequency offset compensation device may include a processing device 1001 (e.g., a central processing unit, graphics processing unit, etc.), which can perform various appropriate actions and processes based on programs stored in a read-only memory (ROM) 1002 or programs loaded from a storage device 1003 into a random access memory (RAM) 1004. RAM 1004 also stores various programs and data required for the operation of the DVBS-2 system-based frame header frequency offset compensation device. Processing device 1001, ROM 1002, and RAM 1004 are interconnected via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to the I / O interface 1006: input devices 1007, such as a touch screen, touchpad, keyboard, mouse, image sensor, microphone, accelerometer, and gyroscope; output devices 1008, such as a liquid crystal display (LCD), speaker, and vibrator; storage devices 1003, such as a magnetic tape and hard disk; and communication devices 1009. Communication devices 1009 can allow the DVBS-2 system-based frame header frequency offset compensation device to communicate wirelessly or wired with other devices to exchange data. While the figure shows a DVBS-2 system-based frame header frequency offset compensation device with various systems, it should be understood that implementation or presence of all the illustrated systems is not required. More or fewer systems may alternatively be implemented or present.

[0133] In particular, according to the embodiments disclosed in the present application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, the embodiments disclosed in the present application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program comprising program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0134] The frame header frequency offset compensation device based on the DVBS-2 system provided in this application adopts the frame header frequency offset compensation method based on the DVBS-2 system in the above-mentioned embodiment, which can solve the technical problem that the existing technology cannot efficiently and accurately compensate for the frame header frequency offset in the pilot-free scheme, resulting in the subsequent inability to correctly demodulate the received data. Compared with the existing technology, the beneficial effects of the frame header frequency offset compensation device based on the DVBS-2 system provided in this application are the same as the beneficial effects of the frame header frequency offset compensation method based on the DVBS-2 system provided in the above-mentioned embodiment, and the other technical features of the frame header frequency offset compensation device based on the DVBS-2 system are the same as the features disclosed in the method of the previous embodiment, and are not repeated here.

[0135] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0136] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

[0137] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, a computer program) stored thereon, wherein the computer-readable program instructions are used to execute the frame header frequency offset compensation method based on the DVBS-2 system in the above embodiment.

[0138] The computer-readable storage medium provided herein may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, systems, or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to, an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including, but not limited to, wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0139] The computer-readable storage medium may be included in the frame header frequency offset compensation device based on the DVBS-2 system; or may exist independently without being assembled into the frame header frequency offset compensation device based on the DVBS-2 system.

[0140] The computer-readable storage medium carries one or more programs. When the one or more programs are executed by a frame header frequency offset compensation device based on a DVBS-2 system, the frame header frequency offset compensation device based on the DVBS-2 system: performs forward and backward multiplication according to each processing flag word data corresponding to the synchronization data frame, and obtains the adjacent phase difference of the start flag field according to the multiplication result, and there is no pilot segment in the synchronization data frame; determines phase change information according to the adjacent phase difference, and performs phase jump processing on the phase change information to obtain a target phase difference; obtains the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; calculates according to the initial phase difference and the adjacent phase difference to determine the target phase information; and performs frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame.

[0141] Computer program code for performing the operations of the present application may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0142] The flow charts and block diagrams in the accompanying drawings illustrate the possible architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a module, program segment or a part of code, and the module, program segment or a part of code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order than that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a dedicated hardware-based system that performs the specified function or operation, or can be implemented by a combination of dedicated hardware and computer instructions.

[0143] The modules described in the embodiments of the present application may be implemented in software or hardware, wherein the name of a module does not necessarily limit the unit itself.

[0144] The computer-readable storage medium provided in this application stores computer-readable program instructions (i.e., a computer program) for executing the aforementioned frame header frequency offset compensation method based on the DVBS-2 system. This computer-readable storage medium can address the technical issue in the prior art of inefficiently and accurately compensating for frame header frequency offset in pilot-free schemes, resulting in the subsequent inability to correctly demodulate received data. Compared to the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the frame header frequency offset compensation method based on the DVBS-2 system provided in the aforementioned embodiment, and are not further elaborated here.

[0145] The present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the above-mentioned frame header frequency offset compensation method based on the DVBS-2 system.

[0146] The computer program product provided in this application can address the technical problem in the prior art of inefficiently and accurately compensating for frame header frequency offset in pilot-free schemes, resulting in the subsequent inability to correctly demodulate received data. Compared to the prior art, the beneficial effects of the computer program product provided in this application are the same as those of the frame header frequency offset compensation method based on the DVBS-2 system provided in the above-mentioned embodiment, and are not further elaborated here.

[0147] The above description is only part of the embodiments of the present application and does not limit the patent scope of the present application. All equivalent structural transformations made by using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect application in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A frame header frequency deviation compensation method based on a DVBS-2 system, characterized in that: The frame header frequency deviation compensation method based on the DVBS-2 system includes: Performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame, and obtaining the adjacent phase difference of the start flag field according to the multiplication result, wherein there is no pilot segment in the synchronization data frame; Determine phase change information according to the adjacent phase differences, and perform phase jump processing on the phase change information to obtain a target phase difference; Obtaining the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; Calculating according to the initial phase difference and the adjacent phase difference to determine target phase information; Performing frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame; Wherein, before the step of performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame and obtaining the adjacent phase difference of the start flag field according to the multiplication result, it also includes: Synchronize the received initial data frame to obtain a synchronized data frame; De-framing the synchronization data frame to obtain frame header data; Conjugate multiply the start flag field in the frame header data and the pre-stored flag word information to obtain a plurality of processed flag word data of the start flag field; The step of calculating according to the initial phase difference and the adjacent phase difference to determine the target phase information includes: Performing phase calculation according to the initial phase difference and the adjacent phase difference to obtain frame header phase information corresponding to the synchronization data frame; Comparing the frame header phase information with a target transition threshold to obtain a second comparison relationship between the frame header phase information and the target transition threshold; Determine a second jump processing mode according to the second comparison relationship; The frame header phase information is subjected to phase jump processing according to the second jump processing mode to obtain target phase information.

2. The method according to claim 1, characterized in that The step of performing forward and backward multiplication on each processing flag word data corresponding to the synchronization data frame and obtaining the adjacent phase difference of the start flag field according to the multiplication result comprises: The processing flag word data corresponding to the synchronization data frame are multiplied forward and backward according to the symbol sequence information to obtain a plurality of adjacent phase information; Data accumulation is performed on each adjacent phase information, and the adjacent phase difference of the start flag field is obtained according to the data accumulation result.

3. The method according to claim 1, characterized in that The step of determining phase change information according to the adjacent phase differences and performing phase jump processing on the phase change information to obtain a target phase difference comprises: Comparing the phase change information with a target transition threshold to obtain a first comparison relationship between the phase change information and the target transition threshold; Determine a first jump processing mode according to the first comparison relationship; The phase change information is subjected to phase jump processing according to the first jump processing method to obtain a target phase difference.

4. The method according to claim 1, characterized in that The step of obtaining the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference comprises: Perform difference calculation based on the field phase information corresponding to each processing flag word data and the target phase difference to obtain multiple processing phase differences; The average of each processed phase difference is calculated to obtain the initial phase difference of the start flag field.

5. The method according to claim 1, characterized in that The step of performing phase jump processing on the frame header phase information according to the second jump processing mode to obtain target phase information comprises: When the second jump processing mode is an addition processing mode, the frame header phase information and the jump processing value are added to obtain the target phase information; When the second jump processing mode is a difference processing mode, a difference calculation is performed on the frame header phase information and the jump processing value to obtain the target phase information.

6. A frame header frequency deviation compensation device based on a DVBS-2 system, characterized in that: The frame header frequency deviation compensation device based on the DVBS-2 system includes: A processing module, used for performing forward and backward multiplication according to each processing flag word data corresponding to the synchronous data frame, and obtaining the adjacent phase difference of the start flag field according to the multiplication result, wherein there is no pilot segment in the synchronous data frame; The processing module is further used to determine phase change information according to the adjacent phase difference, and perform phase jump processing on the phase change information to obtain a target phase difference; The processing module is further used to obtain the initial phase difference of the start flag field according to the field phase information corresponding to each processing flag word data and the target phase difference; A calculation module, used to calculate according to the initial phase difference and the adjacent phase difference to determine the target phase information; A compensation module, used for performing frequency offset compensation on the frame header data in the synchronization data frame according to the target phase information to obtain a target data frame; The processing module is further used to synchronize the received initial data frame to obtain a synchronization data frame; deframe the synchronization data frame to obtain frame header data; conjugate multiply the start flag field in the frame header data with the pre-stored flag word information to obtain multiple processing flag word data of the start flag field; The calculation module is used to perform phase calculation based on the initial phase difference and the adjacent phase difference to obtain the frame header phase information corresponding to the synchronization data frame; compare the frame header phase information with the target jump threshold to obtain a second comparison relationship between the frame header phase information and the target jump threshold; determine a second jump processing method based on the second comparison relationship; perform phase jump processing on the frame header phase information according to the second jump processing method to obtain target phase information.

7. A frame header frequency deviation compensation device based on a DVBS-2 system, characterized in that: The frame header frequency offset compensation device based on the DVBS-2 system includes: a memory, a processor, and a frame header frequency offset compensation program based on the DVBS-2 system stored in the memory and executable on the processor, wherein the frame header frequency offset compensation program based on the DVBS-2 system is configured to implement the frame header frequency offset compensation method based on the DVBS-2 system as described in any one of claims 1 to 5.

8. A storage medium, characterized in that: The storage medium stores a frame header frequency offset compensation program based on the DVBS-2 system, and when the frame header frequency offset compensation program based on the DVBS-2 system is executed by the processor, the frame header frequency offset compensation method based on the DVBS-2 system according to any one of claims 1 to 5 is implemented.

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