Display device

Abstract

The invention provides a display device. The display device includes: a substrate including a display area and a non-display area configured to surround the display area; a light emitting element disposed in the display area on the substrate; a bank disposed on the substrate and configured to define a light emitting region and a non-light emitting region; an encapsulation layer disposed on the light emitting element and including a first inorganic encapsulation layer, an organic encapsulation layer on the first inorganic encapsulation layer, and a second inorganic encapsulation layer on the organic encapsulation layer; a low potential power line disposed on the substrate and disposed to overlap the organic encapsulation layer; a barrier disposed on the substrate and configured to surround the organic encapsulation layer; and a plurality of structures disposed inside the barrier and below the organic encapsulation layer, in which an end portion of the first inorganic encapsulation layer and an end portion of the second inorganic encapsulation layer overlap an end portion of the substrate; the plurality of structures includes a first structure disposed on the bank and a plurality of second structures disposed on the low potential power line.

Description

Technical Field

[0001] The present disclosure relates to a display device, and more particularly, for example but not limited to, to a display device capable of having a narrow frame. Background Art

[0002] Recently, with the full entry into the information age, display devices that visually display electronic information signals are rapidly developing. Various studies are being conducted to develop various thin, light, low-power display devices with improved performance.

[0003] As representative display devices, there are liquid crystal display (LCD) devices, electrowetting display (EWD) devices, organic light emitting display (OLED) devices, and the like.

[0004] Among display devices, display devices including organic light-emitting display devices refer to self-luminous display devices. Unlike liquid crystal display devices, electroluminescent display devices do not require a separate light source, so they can be manufactured as lightweight and thin display devices. In addition, because electroluminescent display devices operate at low voltages, electroluminescent display devices are advantageous in terms of power consumption. In addition, because electroluminescent display devices are also excellent in the realization of color, response speed, viewing angle, and contrast (CR), electroluminescent display devices are expected to be adopted in various fields.

[0005] The description provided in the description of the background technology section should not be considered as prior art simply because it is mentioned or associated with the description of the background technology section. The description of the background technology section may include information describing one or more aspects of the subject technology, and the description in this section does not limit the present invention. Summary of the invention

[0006] An object to be achieved by the present disclosure is to provide a display device capable of reducing a border width by scribing an inorganic encapsulation layer.

[0007] Another object to be achieved by the present disclosure is to provide a display device capable of adjusting a level difference of a structure by configuring a signal line disposed at a lower portion of the structure as a plurality of sub-signal lines.

[0008] Still another object to be achieved by the present disclosure is to provide a display device capable of improving the yield of the display device by ensuring a process margin of an inorganic encapsulation layer of the display device.

[0009] Another object of the present disclosure is to provide a display device capable of improving the detection accuracy of a crack detection unit.

[0010] The objects of the present disclosure are not limited to the above objects, and other objects not mentioned above can be clearly understood by those skilled in the art from the following description.

[0011] According to one aspect of the present disclosure, a display device is provided. The display device includes: a substrate, the substrate including a display area and a non-display area configured to surround the display area; a light-emitting element, the light-emitting element is arranged in the display area on the substrate; a levee, the levee is arranged on the substrate and configured to define a light-emitting area and a non-light-emitting area; an encapsulation layer, the encapsulation layer is arranged on the light-emitting element and includes a first inorganic encapsulation layer, an organic encapsulation layer located on the first inorganic encapsulation layer, and a second inorganic encapsulation layer located on the organic encapsulation layer; a low potential power supply line, the low potential power supply line is arranged on the substrate and arranged to overlap with the organic encapsulation layer; a barrier, the barrier is arranged on the substrate and configured to surround the organic encapsulation layer; and a plurality of structures, the plurality of structures are arranged inside the barrier and below the organic encapsulation layer, wherein the end of the first inorganic encapsulation layer and the end of the second inorganic encapsulation layer overlap with the end of the substrate; and wherein the plurality of structures include a first structure arranged on the levee and a plurality of second structures arranged on the low potential power supply line.

[0012] According to another aspect of the present disclosure, a display device is provided. The display device includes: a substrate, the substrate including a display area and a non-display area configured to surround the display area; a light-emitting element, the light-emitting element is arranged in the display area on the substrate; a levee, the levee is arranged on the substrate and configured to define a light-emitting area and a non-light-emitting area; an encapsulation layer, the encapsulation layer is arranged on the light-emitting element and includes a first inorganic encapsulation layer, an organic encapsulation layer located on the first inorganic encapsulation layer, and a second inorganic encapsulation layer located on the organic encapsulation layer; a low-potential power supply line, the low-potential power supply line is arranged outside the levee and arranged to overlap with the organic encapsulation layer; a first structure, the first structure is arranged on the levee; a plurality of second structures, the plurality of second structures are arranged on the low-potential power supply line; and a barrier, the barrier is arranged outside the plurality of second structures and configured to surround the organic encapsulation layer, wherein the end of the first inorganic encapsulation layer and the end of the second inorganic encapsulation layer are arranged on the same plane as the end of the substrate.

[0013] Additional details of illustrative embodiments are included in the detailed description and accompanying drawings.

[0014] According to the present disclosure, the frame area of ​​the display device can be reduced.

[0015] According to the present disclosure, the crack detection accuracy of a display device can be improved.

[0016] According to the present disclosure, the fluidity of the organic encapsulation layer may be controlled by adjusting the level difference of the structure.

[0017] According to the present disclosure, the process margin of the inorganic encapsulation layer can be ensured.

[0018] The effects according to the present disclosure are not limited to the above-exemplified contents, and more various effects are included in the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other aspects, features and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0020] Figure 1 is a schematic top plan view of a display device according to an exemplary embodiment of the present disclosure;

[0021] Figure 2 is a cross-sectional view showing a sub-pixel of a display device according to an exemplary embodiment of the present disclosure;

[0022] Figure 3 is a cross-sectional view showing a non-display area of ​​a display device according to an exemplary embodiment of the present disclosure;

[0023] Figure 4 is a cross-sectional view illustrating a non-display area of ​​a display device according to another exemplary embodiment of the present disclosure.

[0024] Throughout the drawings and detailed description, unless otherwise described, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the relative sizes and descriptions of these elements may be exaggerated. DETAILED DESCRIPTION

[0025] Reference will now be made in detail to embodiments of the present disclosure, examples of which may be illustrated in the accompanying drawings. The progression of process steps and / or operations described is an example; however, the order of steps and / or operations is not limited to the order described herein, and may be changed as known in the art, except for steps and / or operations that must occur in a particular order. The names of the various elements used in the following description may be selected solely for the purpose of convenience in writing the specification, and therefore may differ from the names used in the actual product.

[0026] By referring to the exemplary embodiments described in detail below in conjunction with the accompanying drawings, the advantages and features of the present disclosure and the methods for achieving the advantages and features will be clear. However, the present disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. Exemplary embodiments are provided only by way of example so that those skilled in the art can fully understand the disclosure of the present disclosure and the scope of the present disclosure.

[0027] The shapes, sizes, areas, ratios, angles, quantities, etc. used to describe the exemplary embodiments of the present disclosure shown in the accompanying drawings are merely examples, and the present disclosure is not limited thereto. Throughout the specification, the same reference numerals generally represent the same elements. In addition, in the following description of the present disclosure, a detailed explanation of known related art may be omitted or briefly given to avoid unnecessarily obscuring the subject matter of the present disclosure. Terms such as "including", "having", "containing", "constituting", "made of", "formed of" and "composed of" used herein are generally intended to allow the addition of one or more components, unless these terms are used together with the term "only". Unless otherwise expressly stated, any reference to the singular may include the plural.

[0028] In interpreting the components, the components are interpreted as including the ordinary margin of error even if not expressly stated.

[0029] When terms such as "on", "above", "over", "below", "next to", "beside", "below", "near", "close to", "adjacent", "on the side of", etc. are used to describe the positional relationship between two parts, unless these terms are used together with the terms "immediately" or "directly", one or more parts may be positioned between the two parts.

[0030] When one element or layer is disposed “on” another element or layer, a third layer or element may be interposed therebetween.

[0031] Although the terms "first", "second", "A", "B", "(a)", and "(b)" and the like are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, in the technical concept of the present disclosure, the first component to be mentioned below may be the second component.

[0032] When describing that a certain structural element or layer is “connected,” “coupled,” “adhered,” or “bonded” to another structural element or layer, it is generally interpreted that the other structural element or layer can be “connected,” “coupled,” “adhered,” or “bonded” to the structural element or layer directly or indirectly.

[0033] Throughout the specification, like reference numerals generally refer to like elements.

[0034] The size and thickness of each component shown in the drawings are illustrated for convenience of description, and the present disclosure is not limited to the size and thickness of the illustrated components.

[0035] The features of various embodiments of the present disclosure may be partially or completely coupled or combined with each other, and may interact and operate in technically various ways, and the embodiments may be performed independently of each other or in association with each other.

[0036] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by a person of ordinary skill in the art to which the exemplary embodiment belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, for example, and should not be interpreted in an idealized or overly formal sense unless explicitly defined herein. For example, the term "component" or "unit" may apply to, for example, a separate circuit or structure, an integrated circuit, a computing block of a circuit device, or any structure configured to perform the described function, as will be understood by a person of ordinary skill in the art.

[0037] Hereinafter, a display device according to an exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0038] Figure 1 is a schematic top plan view of a display device according to an exemplary embodiment of the present disclosure. For ease of description, Figure 1 Only the substrate 101 , the plurality of flexible films COFs, the printed circuit board 130 , the first inorganic encapsulation layer 171 , the second inorganic encapsulation layer 173 , the barrier DAM, and the crack detection part PCD are shown among various constituent elements of the display device 100 .

[0039] The substrate 101 is a supporting member for supporting other components of the display device 100, and may be made of an insulating material, but is not limited thereto. For example, the substrate 101 may be made of glass, resin, a flexible polymer film, etc. For example, the flexible polymer film may be made of any one of polyethylene terephthalate (PET), polycarbonate (PC), acrylonitrile-butadiene-styrene copolymer (ABS), polymethyl methacrylate (PMMA), polyethylene naphthalate (PEN), polyether sulfone (PES), cyclic olefin copolymer (COC), triacetyl cellulose (TAC) film, polyvinyl alcohol (PVA) film, polyimide (PI) film, and polystyrene (PS), which is merely an example and is not necessarily limited thereto.

[0040] Reference Figure 1 , the substrate 101 includes a display area AA and a non-display area NA configured to surround the display area AA.

[0041] The display area AA is an area where an image is displayed. The display area AA may include a plurality of sub-pixels configured to display an image, and a circuit portion configured to operate the plurality of sub-pixels. The circuit portion may include various thin film transistors, capacitors, lines, etc. for operating the sub-pixels. For example, the circuit portion may include various components such as a driving thin film transistor, a switching thin film transistor, a storage capacitor, a gate line, a data line, etc. However, the present disclosure is not limited thereto.

[0042] The non-display area NA is an area where no image is displayed. Various lines, driving parts, etc. for operating the plurality of sub-pixels provided in the display area AA are provided in the non-display area NA, but are not limited thereto.

[0043] Reference Figure 1 and Figure 2 , a plurality of flexible film COFs are connected to one end of the substrate 101, but are not limited thereto. For example, two flexible film COFs are connected to one end of the substrate 101. The plurality of flexible film COFs are films having various types of components disposed on a base film having flexibility so as to provide signals to a plurality of sub-pixels in the display area AA. The plurality of flexible film COFs may be disposed at one end of the non-display area NA of the substrate 101, and provide data voltages, etc. to a plurality of sub-pixels in the display area AA.

[0044] A driving part, such as a gate driving part or a data driving part, may be provided on a plurality of flexible film COFs. A driving IC is a component configured to process data for displaying an image and to process a driving signal for processing the data. The driving IC may be provided in a manner such as a chip on glass (COG) method, a chip on film (COF) method, and a tape carrier package (TCP) method, depending on how the driving IC is mounted. However, the present disclosure is not limited thereto.

[0045] in addition, Figure 1 and Figure 2 The shapes of the multiple flexible film COFs and the number of flexible film COFs shown are merely illustrative. Other shapes and numbers of flexible film COFs are also possible. The shapes and numbers of flexible film COFs can be changed differently according to the design. However, the present disclosure is not limited thereto.

[0046] Reference Figure 1 and Figure 2 , the printed circuit board 130 is connected to the plurality of flexible film COFs. The printed circuit board 130 is a component for providing signals to the driving ICs on the plurality of flexible film COFs. Various types of components for providing various driving signals such as driving signals, data voltages, etc. to the driving ICs on the plurality of flexible film COFs may be provided on the printed circuit board 130, but are not limited thereto.

[0047] A plurality of sub-pixels are arranged in the display area AA of the substrate 101. Each of the plurality of sub-pixels is a single unit configured to emit light, and a light-emitting element and a driving circuit are arranged on each of the plurality of sub-pixels. For example, the plurality of sub-pixels may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel. However, the present disclosure is not limited thereto. The plurality of sub-pixels may also include a white sub-pixel. In addition, the plurality of sub-pixels may also include a cyan, magenta, or yellow sub-pixel, etc.

[0048] The encapsulation layer may be disposed on the substrate 101. As an example, the encapsulation layer may include a first inorganic encapsulation layer 171 and a second inorganic encapsulation layer 173, but is not limited thereto.

[0049] The first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 may be provided to cover the plurality of light emitting elements provided in the display area AA. The first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 may be provided to extend from the display area AA to the non-display area NA. In this case, the end of the first inorganic encapsulation layer 171 and the end of the second inorganic encapsulation layer 173 may overlap with the end of the substrate 101. Figure 3 The first inorganic encapsulating layer 171 and the second inorganic encapsulating layer 173 are described in detail.

[0050] The barrier DAM and the crack detection part PCD may be disposed in the non-display area NA. The crack detection part PCD may be disposed on the substrate 101 and configured to surround the barrier DAM.

[0051] The barrier DAM may be disposed on the substrate 101 and configured to surround the organic encapsulation layer to suppress overflow of the organic encapsulation layer.

[0052] The crack detection part PCD may be disposed outside the barrier DAM and in the non-display area NA to surround the barrier DAM. The crack detection part PCD may detect cracks occurring in the display device 100 and is electrically connected to the flexible film COF and the printed circuit board 130.

[0053] The following will refer to Figure 3 The crack detection part PCD and the barrier DAM are described in detail.

[0054] In the following, reference will be made to Figure 2 The plurality of sub-pixels are described in more detail.

[0055] Figure 2 is a cross-sectional view showing a sub-pixel of a display panel according to an exemplary embodiment of the present disclosure. Figure 2 The display device 100 may include a substrate 101, a transistor 120, a storage capacitor Cst, a light emitting element 150, an encapsulation layer 170, and the like.

[0056] In addition, the display device 100 may further include a multi-buffer layer 102 disposed on the substrate 101. The multi-buffer layer 102 may reduce the amount of moisture or impurities penetrating the substrate 101. As an example, the multi-buffer layer 102 may be formed by alternately stacking a-Si, silicon nitride SiNx, and silicon oxide SiOx at least once, but is not limited thereto.

[0057] In addition, the display device 100 may further include a lower protective metal layer BSM disposed on the substrate 101. Specifically, the lower protective metal layer BSM may be disposed on the multi-buffer layer 102. The lower protective metal layer BSM may be disposed under the plurality of transistors 120 and reduce or minimize damage to the plurality of transistors 120 caused by charges trapped on the substrate 101.

[0058] The lower protective metal layer BSM may be configured as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or alloys thereof. However, the present disclosure is not limited thereto.

[0059] In addition, in the case where the lower protective metal layer BSM is in a floating state, the potential of the lower protective metal layer BSM may fluctuate, and the threshold voltage Vth of the plurality of transistors 120 may also fluctuate during the operation of the display device 100. Therefore, the lower protective metal layer BSM may be provided to be connected to the source electrode 121 or the drain electrode 124 of the plurality of transistors 120. Therefore, the lower protective metal layer BSM may be in an equipotential state with the source electrode 121 or the drain electrode 124, thereby reducing or minimizing the influence on the threshold voltage of the transistor 120.

[0060] In addition, the display device 100 may further include an active buffer layer 103 disposed on the multi-buffer layer 102 and the lower protective metal layer BSM. The active buffer layer 103 may protect the transistor 120 from impurities such as alkaline ions flowing out from the substrate 101. In addition, the active buffer layer 103 may improve the bonding force between the substrate 101 and the layer formed on the upper portion of the active buffer layer 103. As an example, the semiconductor layer 123 of the transistor 120 may be disposed on the active buffer layer 103. In addition, the active buffer layer 103 may insulate the lower protective metal layer BSM and the semiconductor layer 123 of the transistor 120. For example, the active buffer layer 103 may be configured as a single layer or multiple layers made of a-Si, silicon oxide SiOx, or silicon nitride SiNx. However, the present disclosure is not limited thereto.

[0061] The transistor 120 may be disposed on the active buffer layer 103. The transistor 120 may include a source electrode 121, a gate electrode 122, a semiconductor layer 123, and a drain electrode 124.

[0062] As an example, the semiconductor layer 123 may be made of any one of a polycrystalline semiconductor, an amorphous semiconductor, and an oxide semiconductor. However, the present disclosure is not limited thereto.

[0063] In addition, the display device 100 may further include a gate insulating film 104 disposed on the semiconductor layer 123 of the transistor 120. The gate insulating film 104 may be disposed on the semiconductor layer 123 and insulate the semiconductor layer 123 of the transistor 120 from the gate electrode 122. The gate insulating film 104 may be made of an insulating material such as silicon oxide SiOx or silicon nitride SiNx. However, the present disclosure is not limited thereto. In addition, the gate insulating film 104 may be made of an insulating organic material or the like.

[0064] The gate electrode 122 of the transistor 120 is disposed on the gate insulating film 104. The gate electrode 122 may be disposed to overlap with the semiconductor layer 123. The gate electrode 122 may be configured as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, the present disclosure is not limited thereto.

[0065] The drain electrode 124 and the source electrode 121 of the transistor 120 are disposed on the semiconductor layer 123 of the transistor 120 .

[0066] In addition, the display device 100 may further include a first interlayer insulating film 105 disposed on the gate electrode 122. Specifically, the first interlayer insulating film 105 may be disposed on the gate electrode 122 and the gate insulating film 104. The first interlayer insulating film 105 may be made of an insulating material. For example, the first interlayer insulating film 105 may be made of an insulating material such as silicon oxide SiOx or silicon nitride SiNx. However, the present disclosure is not limited thereto. In addition, the first interlayer insulating film 105 may be made of an insulating organic material or the like.

[0067] In addition, the display device 100 may further include a second interlayer insulating film 106 disposed on the first interlayer insulating film 105. The second interlayer insulating film 106 may be made of an insulating material. For example, the second interlayer insulating film 106 may be made of an insulating material such as silicon oxide SiOx or silicon nitride SiNx. However, the present disclosure is not limited thereto. In addition, the second interlayer insulating film 106 may be made of an insulating organic material or the like.

[0068] The source electrode 121 and the drain electrode 124 may each be configured as a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, the present disclosure is not limited thereto.

[0069] In addition, the storage capacitor Cst may be disposed on the gate insulating film 104. Figure 2 As shown, the storage capacitor Cst may include a storage lower electrode C1 and a storage upper electrode C2, with the first interlayer insulating film 105 interposed therebetween. Specifically, the storage lower electrode C1 may be disposed on the gate insulating film 104, and the storage upper electrode C2 may be disposed on the first interlayer insulating film 105, but is not limited thereto. In addition, the second interlayer insulating film 106 may be disposed on the storage upper electrode C2 and the first interlayer insulating film 105.

[0070] The storage lower electrode C1 is disposed on the gate insulating film 104. For example, the storage lower electrode C1 may be formed on the same layer as the gate electrode 122 and may be made of the same or substantially the same material as the gate electrode 122. For example, the storage lower electrode C1 may be configured as a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, the present disclosure is not limited thereto.

[0071] The storage upper electrode C2 is disposed on the first interlayer insulating film 105. For example, the storage upper electrode C2 may be configured as a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, the present disclosure is not limited thereto.

[0072] In addition, the display device 100 may further include a planarization layer 107 disposed on the second interlayer insulating film 106, the source electrode 121, and the drain electrode 124. The planarization layer 107 is an insulating layer for planarizing the upper portion of the substrate 101. The planarization layer 107 may be configured as a single layer or multiple layers made of an organic material (e.g., polyimide or acrylic). However, the present disclosure is not limited thereto.

[0073] The planarization layer 107 may include a contact hole for electrically connecting the transistor 120 and the anode 151 of the light emitting element 150. Specifically, the planarization layer 107 may include a contact hole through which any one of the source electrode 121 and the drain electrode 124 of the transistor 120 is exposed.

[0074] The light emitting element 150 is disposed on or above the transistor 120. Specifically, the light emitting element 150 is disposed on the planarization layer 107. The light emitting element 150 includes an anode 151, a light emitting layer 152, and a cathode 153. That is, the anode 151 may be disposed on the planarization layer 107. For example, the light emitting layer 152 may include one or more of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), but the present disclosure is not limited thereto.

[0075] In addition, the display device 100 may be implemented as a top emission type or a bottom emission type. In the case of the top emission type, the reflective layer may be disposed on the lower portion of the anode 151 and reflect the light emitted from the light emitting layer 152 toward the cathode 153. For example, the reflective layer may include a material having excellent reflectivity, such as aluminum (Al) or silver (Ag). However, the present disclosure is not limited thereto. On the contrary, in the case of the bottom emission type, the anode 151 may be made of a transparent conductive material. However, the present disclosure is not limited thereto. Hereinafter, the display device 100 according to an exemplary embodiment of the present disclosure will be described on the assumption that it is a top emission type.

[0076] The anode 151 may be disposed on the planarization layer 107. The anode 151 may correspond to each of the plurality of sub-pixels. That is, the anode 151 may be patterned to correspond to each of the plurality of sub-pixels one by one. The anode 151 may be electrically connected to the source electrode 121 of the transistor 120 through a contact hole formed in the planarization layer 107. Specifically, the anode 151 may be electrically connected to the source electrode 121 of the transistor 120 through a contact hole formed in the planarization layer 107, the second interlayer insulating film 106, the first interlayer insulating film 105, and the gate insulating film 104.

[0077] The anode 151 may be made of a conductive material having a high work function so as to provide a positive hole to the light emitting layer 152. However, the present disclosure is not limited thereto. For example, the anode 151 may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). However, the present disclosure is not limited thereto.

[0078] The bank 154 is disposed on the anode 151 and the planarization layer 107. The bank 154 may be formed on the planarization layer 107 and cover an edge of the anode 151.

[0079] The bank 154 is an insulating layer disposed between a plurality of sub-pixels so as to distinguish the plurality of sub-pixels. The bank 154 may be made of an organic insulating material. For example, the bank 154 may be made of a polyimide-based resin, an propylene-based resin, or a benzocyclobutene (BCB)-based resin. However, the present disclosure is not limited thereto. Alternatively, the bank 154 may include an inorganic insulating material such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide. In addition, the bank 154 may include a black dye so as to absorb light incident from the outside.

[0080] The spacer 155 may be disposed on the bank 154. The spacer 155 may suppress damage to the light emitting element 150 that may be caused when a fine metal mask (FMM) for forming the light emitting layer 152 of the light emitting element 150 is in direct contact with the bank 154 or the anode 151. The spacer 155 may be made of the same or substantially the same material as the bank 154, or made of a different insulating material from the insulating material of the bank 154. However, the present disclosure is not limited thereto. In addition, the spacer 155 and the bank 154 may be integrated at one time. When the spacer 155 is disposed on the bank 154, the cathode 153 may be disposed to cover the spacer 155 and the bank 154. In addition, the cathode 153 may be disposed to cover the light emitting layer 152.

[0081] The light-emitting layer 152 is disposed on the anode 151 and the bank 154. The light-emitting layer 152 may be formed over the entire surface of the substrate 101. That is, the light-emitting layer 152 may be a common layer formed on a plurality of sub-pixels. The light-emitting layer 152 may be an organic layer that emits light having a specific color. The light-emitting layer 152 may include various layers such as a hole transport layer, a hole injection layer, a hole blocking layer, an electron injection layer, an electron blocking layer, and an electron transport layer. In a series structure in which a plurality of light-emitting layers overlap, a charge generation layer may be additionally disposed between the light-emitting layers.

[0082] The light-emitting layer 152 may be formed for each sub-pixel separately so that the light-emitting layer 152 in each sub-pixel emits light beams having different colors. For example, a red light-emitting layer, a green light-emitting layer, and a blue light-emitting layer may be formed for each sub-pixel separately. However, the present disclosure is not limited thereto. For example, a cyan light-emitting layer, a magenta light-emitting layer, a yellow light-emitting layer, etc. may be formed for each sub-pixel separately. However, a common light-emitting layer may be formed for each pixel to emit white light without distinguishing colors, and color filters for distinguishing colors may be provided separately.

[0083] The cathode 153 is disposed on the light emitting layer 152. In addition, the cathode 153 is disposed on the light emitting layer 152, the bank 154 and the spacer 155. The cathode 153 may be formed as a single layer on the entire surface of the substrate 101. That is, the cathode 153 may be a common layer formed together in a plurality of sub-pixels. Since the cathode 153 provides electrons to the light emitting layer 152, the cathode 153 may be made of a conductive material having a low work function. For example, the cathode 153 may be made of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO), or of a metal alloy such as MgAg or ytterbium (Yb) alloy. The cathode 153 may also include a metal doping layer. However, the present disclosure is not limited thereto.

[0084] The additional inorganic layer 165 may be disposed on the cathode 153. The additional inorganic layer 165 may be disposed between the light emitting element 150 and the encapsulation layer 170, and suppresses moisture from penetrating into the light emitting element 150. The additional inorganic layer 165 may be made of an inorganic material such as silicon oxide SiOx, silicon nitride SiNx, silicon oxynitride SiNxOy, or aluminum oxide AlyOz. However, the present disclosure is not limited thereto.

[0085] The encapsulation layer 170 is disposed on or above the light emitting element 150. In addition, the encapsulation layer 170 may be disposed on the additional inorganic layer 165. The encapsulation layer 170 protects the light emitting element 150 from moisture or the like penetrating from the outside of the display device 100. As an example, the encapsulation layer 170 may include a first inorganic encapsulation layer 171, an organic encapsulation layer 172, and a second inorganic encapsulation layer 173. However, the present disclosure is not limited thereto. The first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 may cover the side surface and the top surface of the crack detection portion PCD.

[0086] The first inorganic encapsulation layer 171 may be disposed on the cathode 153 and inhibit the penetration of moisture or oxygen. The first inorganic encapsulation layer 171 may include an inorganic insulating material. For example, the first inorganic encapsulation layer 171 may be made of an inorganic insulating material such as silicon oxide SiOx, silicon nitride SiNx, silicon oxynitride SiNxOy, or aluminum oxide AlyOz. However, the present disclosure is not limited thereto.

[0087] The organic encapsulation layer 172 is disposed on the first inorganic encapsulation layer 171 and flattens the surface of the first inorganic encapsulation layer 171. In addition, the organic encapsulation layer 172 can cover foreign substances or particles that may be generated during the manufacturing process. The organic encapsulation layer 172 can be made of an organic material (e.g., silicon oxycarbide SiOxCz or acrylic resin or epoxy resin). However, the present disclosure is not limited thereto.

[0088] Similar to the first inorganic encapsulation layer 171, the second inorganic encapsulation layer 173 may be disposed on the organic encapsulation layer 172 and inhibit the penetration of moisture or oxygen. In this case, the second inorganic encapsulation layer 173 and the first inorganic encapsulation layer 171 may be formed to seal the organic encapsulation layer 172. Therefore, the second inorganic encapsulation layer 173 may more effectively reduce the amount of moisture or oxygen that penetrates into the light emitting element 150. The second inorganic encapsulation layer 173 may be made of an inorganic material such as silicon oxide SiOx, silicon nitride SiNx, silicon oxynitride SiNxOy, or aluminum oxide AlyOz. However, the present disclosure is not limited thereto.

[0089] Figure 3 is a cross-sectional view illustrating a non-display area of ​​a display device according to an exemplary embodiment of the present disclosure.

[0090] Reference Figure 3 , the substrate 101, the multi-buffer layer 102, the active buffer layer 103, the gate insulating film 104, the first interlayer insulating film 105, the second interlayer insulating film 106, the planarizing layer 107, the bank 154, the encapsulation layer 170, the first metal layer 141, the second metal layer 142, the gate driving part GIP, the low potential power line VSS, the barrier DAM, the crack detection part PCD and the plurality of structures 160 may be disposed in the non-display area NA. However, the present disclosure is not limited thereto.

[0091] The multi-buffer layer 102 can be set on the substrate 101, the active buffer layer 103 can be set on the multi-buffer layer 102, the gate insulating film 104 can be set on the active buffer layer 103, the first interlayer insulating film 105 can be set on the gate insulating film 104, and the second interlayer insulating film 106 can be set on the first interlayer insulating film 105.

[0092] The first metal layer 141 , the second metal layer 142 , the gate driving part GIP, the low potential power line VSS, and the crack detection part PCD may be disposed on the second interlayer insulating film 106 .

[0093] The first metal layer 141 may be disposed in the non-display area NA. The first metal layer 141 may be disposed to extend from the display area AA. For example, the first metal layer 141 may be a line connected to the light emitting element 150 disposed in the display area AA.

[0094] The first metal layer 141 may be made of the same or substantially the same material as the source electrode 121 or the drain electrode 124. However, the present disclosure is not limited thereto. For example, the first metal layer 141 may be configured as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, the present disclosure is not limited thereto.

[0095] The second metal layer 142 may be disposed outside the first metal layer 141 .

[0096] The second metal layer 142 may be disposed outside the display area AA and adjacent to the embankment 154. The second metal layer 142 may be disposed between the first metal layer 141 and the gate driving part GIP. The planarization layer 107 may be partially removed from the non-display area NA to suppress the penetration of oxygen and moisture into the display area AA. In this case, the second metal layer 142 may be disposed to reduce the degree of physical impact applied to the layer disposed below the planarization layer 107 during the process of removing the planarization layer 107. Therefore, the second metal layer 142 may be disposed to overlap with the area where the planarization layer 107 is removed. The second metal layer 142 may be disposed adjacent to the embankment 154 disposed on the upper portion of the planarization layer 107.

[0097] The second metal layer 142 may be made of the same or substantially the same material as the source electrode 121 or the drain electrode 124. For example, the second metal layer 142 may be configured as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, the present disclosure is not limited thereto.

[0098] The gate driving part GIP may be disposed outside the first metal layer 141 and the second metal layer 142. The gate driving part GIP may be disposed between the second metal layer 142 and the low potential power line VSS. The gate driving part GIP may provide a gate driving voltage provided through the gate pad to the display area DA. Figure 3 The gate driving part GIP is shown to be made of the same or substantially the same material as the source electrode 121 or the drain electrode 124 , but this configuration is provided only for convenience of explanation. The gate driving part GIP may include a transistor 120 , a capacitor, and the like.

[0099] The low potential power line VSS may be disposed outside the gate driving part GIP. The low potential power line VSS may be disposed between the gate driving part GIP and the display area AA, and may be disposed to surround the peripheral area of ​​the substrate 101. The low potential power line VSS may be disposed to overlap with the organic encapsulation layer 172 in the peripheral area of ​​the substrate 101. The low potential power line VSS may be disposed to overlap with the plurality of structures 160. For example, the low potential power line VSS may be disposed below the plurality of second structures 162 and overlap with the plurality of second structures 162. In this case, the low potential power line VSS may be disposed to overlap with the plurality of first substructures 162-1 and the second substructures 162-2, respectively.

[0100] The low potential power line VSS may be made of the same or substantially the same material as the source electrode 121 or the drain electrode 124, but this configuration is provided only for ease of explanation. For example, the low potential power line VSS may be configured as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, the present disclosure is not limited thereto.

[0101] The crack detection part PCD may be disposed on the substrate 101 and disposed outside the gate driving part GIP. In addition, the crack detection part PCD may be configured to surround the barrier DAM.

[0102] The crack detection portion PCD may be disposed outside the barrier DAM in the non-display area NA and surround the barrier DAM. The crack detection portion PCD may be disposed to surround the low potential power line VSS.

[0103] The crack detection portion PCD may be made of the same or substantially the same material as the source electrode 121 or the drain electrode 124, but this configuration is provided only for ease of explanation. For example, the crack detection portion PCD may be configured as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, the present disclosure is not limited thereto.

[0104] The planarization layer 107, the bank 154, and the encapsulation layer 170 may be disposed on the first metal layer 141, the second metal layer 142, and the gate driving part GIP. Specifically, the planarization layer 107 may be disposed on the first metal layer 141, a portion of the second metal layer 142, and the gate driving part GIP. The bank 154 may be disposed on another portion of the planarization layer 107 and the second metal layer 142. The first inorganic encapsulation layer 171 of the encapsulation layer 170 may be disposed on the bank 154.

[0105] A plurality of structures 160 including a first structure 161 and a plurality of second structures 162 may be disposed to overlap the bank 154 and the low potential power line VSS. The plurality of structures 160 may be disposed closer to the display area AA than the barrier DAM disposed in the peripheral area of ​​the substrate 101. That is, the plurality of structures 160 may be disposed inside the barrier DAM and below the organic encapsulation layer 172.

[0106] The plurality of structures 160 may include a first structure 161 disposed on the bank 154 and a plurality of second structures 162 disposed on the low potential power line VSS, but is not limited thereto.

[0107] The first structure 161 may be disposed inside the plurality of second structures 162. Figure 3 As shown, among the plurality of structures 160, the first structure 161 may be disposed closer to the display area AA than the plurality of second structures 162. The first structure 161 may be disposed inside the plurality of second structures 162. In other words, the plurality of second structures 162 may be disposed outside the first structure 161 and disposed adjacent to the periphery of the substrate 101.

[0108] The height of the first structure 161 may be different from the height of each of the plurality of second structures 162. For example, the first structure 161 may have a height higher than that of the second structure 162, and the height of the first structure 161 may be higher than that of each of the plurality of second structures 162, but is not limited thereto. Figure 3 As shown, the first structure 161 may be disposed on the bank 154, and the second structure 162 may be disposed on the low potential power line VSS. However, the present disclosure is not limited thereto.

[0109] The first structure 161 and the plurality of second structures 162 may be made of the same material as the material disposed in the display area AA. For example, the first structure 161 may be made of the same or substantially the same material as the spacer 155, and the plurality of second structures 162 may be made of the same or substantially the same material as the spacer 155 and the embankment 154. However, the present disclosure is not limited thereto.

[0110] The plurality of second structures 162 may include a plurality of first substructures 162 - 1 and second substructures 162 - 2 disposed between the plurality of first substructures 162 - 1 .

[0111] The height of each of the plurality of first substructures 162-1 may be different from the height of the second substructure 162-2. For example, the second substructure 162-2 may have a structure including the first substructure 162-1 and an additional layer stacked on the first substructure 162-1. The height of the second substructure 162-2 may be higher than the height of the first substructure 162-1, but is not limited thereto. Figure 3 As shown, the first substructure 162-1 may be made of the same or substantially the same material as the planarization layer 107, and the second substructure 162-2 may be made of the same or substantially the same material as the planarization layer 107 and the bank 154. However, the present disclosure is not limited thereto.

[0112] In addition, the width of each of the plurality of first substructures 162-1 may be different from the width of the second substructure 162-2. In this case, the width of the first substructure 162-1 and the width of the second substructure 162-2 may refer to the width of the bottom surface of the first substructure 162-1 overlapping with the substrate 101, and the width of the bottom surface of the second substructure 162-2 overlapping with the substrate 101.

[0113] As an example, the width of the second substructure 162-2 may be greater than the width of the first substructure 162-1. For example, the width of the first substructure 162-1 may be 16 μm, and the width of the second substructure 162-2 may be 50 μm. However, the present disclosure is not limited thereto.

[0114] In addition, the spacing spacing between the plurality of first substructures 162-1 may be equal to the spacing spacing between the second substructure 162-2 and the first substructure 162-1 adjacent to the second substructure 162-2. For example, the plurality of first substructures 162-1 may be arranged to be spaced apart from each other by the width of each of the first substructures 162-1. In this case, when the width of the first substructure 162-1 is 16 μm, the spacing between adjacent first substructures 162-1 may be 16 μm, and the spacing between the second substructure 162-2 and the first substructure 162-1 adjacent to the second substructure 162-2 may also be 16 μm. However, the present disclosure is not limited thereto.

[0115] The barrier DAM may be disposed outside the plurality of structures 160. The barrier DAM may be disposed to surround the organic encapsulation layer 172 to suppress overflow of the organic encapsulation layer 172. The height of the barrier DAM may be higher than the height of the first substructure 162-1. In addition, the height of the barrier DAM may be higher than the height of the second substructure 162-2.

[0116] The barrier DAM may be arranged to overlap with the low potential power line VSS. For example, the barrier DAM may be arranged to cover the end of the low potential power line VSS. Specifically, the barrier DAM may be arranged to cover the end of the low potential power line VSS and the second interlayer insulating film 106. Therefore, the barrier DAM may be adjacent to the top surface of the low potential power line VSS, and the barrier DAM may be arranged outside the low potential power line VSS and adjacent to the first interlayer insulating film 105 on the substrate 101. However, the present disclosure is not limited thereto.

[0117] like Figure 3 As shown, the barrier DAM may include a plurality of layers. In this case, the barrier DAM may be made of the same material as the material disposed in the display area AA. For example, the barrier DAM may be made of the same or substantially the same material as the spacer 155, the embankment 154, and the planarization layer 107. However, the present disclosure is not limited thereto.

[0118] In addition, the height of the barrier DAM may be higher than that of the first substructure 162 - 1 . Therefore, the barrier DAM may more effectively suppress overflow of the organic encapsulation layer.

[0119] An encapsulation layer 170 may be disposed on the bank 154 , the plurality of structures 160 , and the barrier DAM.

[0120] The first inorganic encapsulation layer 171 of the encapsulation layer 170 may be disposed on the bank 154, the plurality of structures 160, and the barrier DAM. The first inorganic encapsulation layer 171 may be disposed to extend from the display area AA to the non-display area NA. In this case, the first inorganic encapsulation layer 171 may be disposed outside the barrier DAM and adjacent to the crack detection portion PCD. For example, the first inorganic encapsulation layer 171 may be disposed inside and outside the barrier DAM. In addition, referring to Figure 3 , an end of the first inorganic encapsulation layer 171 may overlap an end of the substrate 101. For example, the first inorganic encapsulation layer 171 may be disposed along the shape of the plurality of structures 160. Therefore, the first inorganic encapsulation layer 171 may cover the top surface of the low potential power line VSS.

[0121] The organic encapsulation layer 172 may be disposed on the first inorganic encapsulation layer 171 and disposed in the display area AA and a portion of the non-display area NA extending from the display area A. For example, the organic encapsulation layer 172 may be disposed inside the barrier DAM.

[0122] The second inorganic encapsulation layer 173 may be disposed on the organic encapsulation layer 172. The second inorganic encapsulation layer 173 may be disposed to extend from the display area AA to the non-display area NA. The second inorganic encapsulation layer 173 may be disposed outside the end of the organic encapsulation layer 172 and adjacent to the first inorganic encapsulation layer 171. For example, the second inorganic encapsulation layer 173 may be disposed inside the barrier DAM and adjacent to the organic encapsulation layer 172. For example, the second inorganic encapsulation layer 173 may be disposed outside the barrier DAM and adjacent to the first inorganic encapsulation layer 171. That is, the second inorganic encapsulation layer 173 may be disposed outside the end of the organic encapsulation layer 172.

[0123] In this case, the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 may be disposed outside the barrier DAM and overlap the crack detection portion PCD. Therefore, the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 may be disposed to cover the side surface and the top surface of the crack detection portion PCD. Figure 3 , ends of the first inorganic encapsulating layer 171 and the second inorganic encapsulating layer 173 may overlap with an end of the substrate 101 .

[0124] In order to meet the demand for ultra-thin display devices, it is necessary to reduce the non-display area of ​​the display device, except for the display area that displays the image. At the same time, in the process of cutting the substrate of the display device into the size of the display panel, the process of cutting the substrate from the outside of the inorganic layer is performed to suppress the occurrence of cracks in the inorganic layer and the propagation of cracks. For example, the process of cutting the substrate from the outside of the first inorganic encapsulation layer and the second inorganic encapsulation layer provided on the substrate is performed.

[0125] In addition, if the cutting process is performed at a position spaced a large distance from the ends of the first and second inorganic encapsulation layers, an area where the cutting process is performed may be limited, resulting in a limitation in reducing the bezel of the display device.

[0126] Furthermore, in the case where the substrate is made of an organic material, the substrate may be unintentionally moved by an external force during the cutting process, which results in a high risk of substrate cracks and byproducts generated during the cutting process propagating into the display device.

[0127] Therefore, the display device 100 according to the exemplary embodiment of the present disclosure is manufactured by cutting the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 together with the substrate 101, so that the end of the substrate and the end of the first inorganic encapsulation layer and the second inorganic encapsulation layer can be consistent with each other. Therefore, regardless of the process margin of the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173, the size of the display panel can be designed. Therefore, the process of manufacturing the display device can be performed while ignoring the process margin of the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173, so that the yield of the display device 100 can be improved. In addition, in the process of cutting the peripheral portion of the display device 100, sufficient margin can be ensured, so that the size of the non-display area NA of the display device 100 can be reduced, and a narrow frame can be achieved.

[0128] In addition, the display device 100 according to an exemplary embodiment of the present disclosure may include a plurality of structures 160 disposed inside the barrier DAM. That is, the plurality of structures 160 are disposed closer to the display area AA than the barrier DAM disposed in the peripheral area of ​​the substrate 101. First, by disposing the first structure 161 with the highest height so that the first structure 161 with the highest height is adjacent to the display area AA, the shape of the organic encapsulation layer 172 can be controlled in the area where the top surface of the organic encapsulation layer 172 is adjacent to the non-display area NA and the display area AA. Next, the second structure 162 disposed on the low potential power line VSS is configured so that a plurality of first substructures 162-1 and second substructures 162-2 having different heights are alternately disposed, so that the organic encapsulation layer 172 can be dispersed into the space defined between the plurality of first substructures 162-1 and second substructures 162-2, thereby minimizing or reducing the amount of the organic encapsulation layer 172 propagating to the peripheral portion of the display device 100. Therefore, the plurality of structures 160 of the display device 100 according to the exemplary embodiment of the present disclosure may minimize or reduce the amount of the organic encapsulation layer 172 propagating toward the peripheral portion of the display device 100 , so that the size of the non-display area NA of the display device 100 may achieve a narrow frame.

[0129] In addition, in the display device 100 according to the exemplary embodiment of the present disclosure, a substrate 101 made of glass can be used, and the possibility of the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 being separated or damaged can be reduced. In the case of cutting the substrate 101 made of glass, the rigidity of the substrate 101 can be increased, and the amount of unintentional movement of the substrate 101 caused by external force during the cutting process can be small. Therefore, the risk of crack occurrence and the risk of by-products propagating into the display device 100 can be reduced. Therefore, even if the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 are cut together with the substrate 101, the possibility of the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 being broken or cracks propagating can be reduced, thereby ensuring process stability.

[0130] In addition, in the display device 100 according to the exemplary embodiment of the present disclosure, the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 may be provided to cover the top surface and the side surface of the crack detection unit PCD, thereby improving the reliability of the crack detection unit PCD. In the case where an organic material is provided on the crack detection unit PCD, the organic material may absorb the impact applied to the crack detection unit PCD, which may reduce the sensitivity and reliability of the crack detection unit PCD. Therefore, in the display device 100 according to the exemplary embodiment of the present disclosure, the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 made of an inorganic material cover the crack detection unit PCD, which may improve the sensitivity and detection reliability of the crack detection unit PCD.

[0131] Figure 4 4 is a cross-sectional view showing a non-display area of ​​a display device according to another exemplary embodiment of the present disclosure. Since the display device 400 according to another exemplary embodiment of the present disclosure is substantially the same in configuration as the display device 100 according to the exemplary embodiment of the present disclosure, except for a plurality of sub-low potential power supply lines S_VSS and an encapsulation layer 470, repeated descriptions will be omitted or briefly given.

[0132] The low potential line may be disposed outside the gate driving unit GIP and include a plurality of sub-low potential power lines S_VSS spaced apart from each other. The low potential line may be disposed inside the barrier DAM. The plurality of sub-low potential power lines S_VSS may be disposed between the gate driving unit GIP and the display area AA and disposed to surround the peripheral area of ​​the substrate 101.

[0133] The plurality of sub-low potential power lines S_VSS may be made of the same or substantially the same material as the source electrode 121 or the drain electrode 124. However, the present disclosure is not limited thereto. For example, the plurality of sub-low potential power lines S_VSS may each be configured as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or their alloys. However, the present disclosure is not limited thereto.

[0134] The plurality of sub-low potential power lines S_VSS may be arranged to overlap the organic encapsulation layer 172 in the peripheral region of the substrate 101. The plurality of sub-low potential power lines S_VSS may be arranged to overlap the plurality of structures 160. For example, the plurality of sub-low potential power lines S_VSS may be arranged below the plurality of second structures 162 and overlap the plurality of second structures 162. In this case, the plurality of sub-low potential power lines S_VSS may be arranged to overlap the plurality of first substructures 162-1 and the second substructures 162-2, respectively. For example, Figure 4 As shown, a plurality of sub-low potential power supply lines S_VSS may be disposed between a plurality of first sub-structures 162-1 and second sub-structures 162-2 and spaced apart from each other. Figure 3 As shown, the low potential power line VSS can be disposed below the plurality of second structures 162 and is continuous, which is consistent with Figure 4 The implementation methods are different.

[0135] For example, Figure 4 As shown, in the case where the two first substructures 162 - 1 are disposed between the second substructures 162 - 2 , the plurality of sub low potential power lines S_VSS may be disposed to overlap the two first substructures 162 - 1 , respectively.

[0136] A plurality of structures 160 including a first structure 161 and a plurality of second structures 162 may be disposed to overlap the bank 154 and the plurality of sub low potential power lines S_VSS.

[0137] The first structure 161 may be disposed on the bank 154. The plurality of second structures 162 may be disposed on the plurality of sub low potential power lines S_VSS, but is not limited thereto.

[0138] The height of the first structure 161 may be different from the height of each of the plurality of second structures 162. For example, the first structure 161 may have a height higher than that of the second structure 162, and the height of the first structure 161 may be higher than that of each of the plurality of second structures 162, but is not limited thereto.

[0139] An encapsulation layer 470 including a first inorganic encapsulation layer 471, an organic encapsulation layer 172, and a second inorganic encapsulation layer 173 may be disposed on the bank 154, the plurality of structures 160, and the barrier DAM. Specifically, a first inorganic encapsulation layer 471 of the encapsulation layer 470 may be disposed on the bank 154, the plurality of structures 160, and the barrier DAM.

[0140] The first inorganic encapsulation layer 471 may be disposed along the shapes of the plurality of structures 160 and the plurality of sub low potential power lines S_VSS. Therefore, the first inorganic encapsulation layer 471 may be disposed between the plurality of sub low potential power lines S_VSS and cover side surfaces of the plurality of sub low potential power lines S_VSS.

[0141] The organic encapsulation layer 172 may be disposed on the first inorganic encapsulation layer 471 and fill a top surface of the first inorganic encapsulation layer 471 that is bent along the shapes of the plurality of structures 160 and the plurality of sub low potential power lines S_VSS.

[0142] The second inorganic encapsulating layer 173 may be disposed on the organic encapsulating layer 172. The second inorganic encapsulating layer 173 may be disposed to extend from the display area AA to the non-display area NA. The second inorganic encapsulating layer 173 may be disposed outside an end of the organic encapsulating layer 172 and adjoin the first inorganic encapsulating layer 471.

[0143] Therefore, in a display device 400 according to another exemplary embodiment of the present disclosure, the size of the display panel can be ensured by cutting the first inorganic encapsulation layer 471 and the second inorganic encapsulation layer 173, so that regardless of the area of ​​the first inorganic encapsulation layer 471 and the second inorganic encapsulation layer 173, the size of the display panel can be designed, the size of the non-display area NA of the display device 400 can be reduced and a narrow border can be achieved.

[0144] In addition, in a display device 400 according to another exemplary embodiment of the present disclosure, the plurality of structures 160 can minimize or reduce the amount of the organic encapsulation layer 172 propagating toward the peripheral portion of the display device 400, and can reduce the size of the non-display area NA of the display device 400, thereby achieving a narrow frame.

[0145] In addition, in the display device 400 according to another exemplary embodiment of the present disclosure, a substrate 101 made of glass can be used, and the possibility of separation or damage of the first inorganic encapsulation layer 471 and the second inorganic encapsulation layer 173 can be reduced. Therefore, even if the first inorganic encapsulation layer 471 and the second inorganic encapsulation layer 173 are cut together with the substrate 101, the possibility of breakage or crack propagation of the first inorganic encapsulation layer 471 and the second inorganic encapsulation layer 173 can be reduced, thereby ensuring process stability.

[0146] In addition, in the display device 400 according to another exemplary embodiment of the present disclosure, the first inorganic encapsulation layer 471 and the second inorganic encapsulation layer 173 may be provided to cover the top surface and the side surface of the crack detection unit PCD, thereby improving the reliability of the crack detection unit PCD. In the case where an organic material is provided on the crack detection unit PCD, the organic material may absorb the impact applied to the crack detection unit PCD, which may reduce the sensitivity and reliability of the crack detection unit PCD. Therefore, in the display device 400 according to another exemplary embodiment of the present disclosure, the first inorganic encapsulation layer 471 and the second inorganic encapsulation layer 173 made of an inorganic material cover the crack detection unit PCD, which may improve the sensitivity and detection reliability of the crack detection unit PCD.

[0147] In addition, in the display device 400 according to another exemplary embodiment of the present disclosure, a plurality of sub-low potential power lines S_VSS are disposed between a plurality of first substructures 162-1 and a second substructure 162-2 and are spaced apart from each other, which can minimize or reduce the amount of the organic encapsulation layer 172 propagating toward the peripheral portion of the display device 400. In the case where a plurality of sub-low potential power lines S_VSS are disposed between a plurality of first substructures 162-1 and a second substructure 162-2 and are spaced apart from each other, the first inorganic encapsulation layer 471 can cover the side surfaces of the plurality of sub-low potential power lines S_VSS exposed between the plurality of first substructures 162-1 and the second substructure 162-2. That is, the first inorganic encapsulation layer 471 can have a level difference corresponding to the height of the plurality of first substructures 162-1, the height of the second substructure 162-2, and the height of the plurality of sub-low potential power lines S_VSS. Therefore, the organic encapsulation layer 172 can be dispersed in the space between the plurality of first substructures 162-1 and the second substructure 162-2 and the space between the plurality of sub-low potential power lines S_VSS. Therefore, the amount of the organic encapsulation layer 172 propagating toward the peripheral portion of the display device 400 can be minimized or reduced, which can reduce the size of the non-display area NA of the display device 400.

[0148] Exemplary embodiments of the present disclosure may also be described as follows:

[0149] According to one aspect of the present disclosure, a display device is provided. The display device includes a substrate, the substrate including a display area and a non-display area configured to surround the display area; a light-emitting element, the light-emitting element is arranged in the display area on the substrate; a levee, the levee is arranged on the substrate and configured to define a light-emitting area and a non-light-emitting area; an encapsulation layer, the encapsulation layer is arranged on the light-emitting element and includes a first inorganic encapsulation layer, an organic encapsulation layer located on the first inorganic encapsulation layer, and a second inorganic encapsulation layer located on the organic encapsulation layer; a low potential power line, the low potential power line is arranged on the substrate and arranged to overlap with the organic encapsulation layer; a barrier, the barrier is arranged on the substrate and configured to surround the organic encapsulation layer; and a plurality of structures, the plurality of structures are arranged inside the barrier and below the organic encapsulation layer, wherein the end of the first inorganic encapsulation layer and the end of the second inorganic encapsulation layer overlap with the end of the substrate; and wherein the plurality of structures include a first structure arranged on the levee and a plurality of second structures arranged on the low potential power line.

[0150] The substrate may be made of glass.

[0151] A height of the first structure may be different from a height of each of the plurality of second structures.

[0152] A height of the first structure may be higher than a height of each of the plurality of second structures.

[0153] The plurality of second structures may be disposed outside the first structure and disposed adjacent to an outer circumference of the substrate.

[0154] The display device may further include a crack detection portion disposed on the substrate and configured to surround the barrier, wherein the first and second inorganic encapsulation layers may cover side surfaces and a top surface of the crack detection portion.

[0155] The first inorganic encapsulation layer may be adjacent to the crack detection portion.

[0156] The barrier may cover an end portion of the low potential power line.

[0157] The first inorganic encapsulation layer may cover a top surface of the low potential power supply line.

[0158] The plurality of second structures may include: a plurality of first substructures; and a second substructure disposed between the plurality of first substructures, and wherein a height of each of the plurality of first substructures may be different from a height of the second substructure.

[0159] The height of the barrier may be higher than the height of the first substructure.

[0160] The low potential power line may be continuous. The plurality of second structures may be arranged on the low potential power line.

[0161] The low potential power line may include a plurality of sub-low potential power lines spaced apart from each other, and the plurality of second structures may be disposed on the plurality of sub-low potential power lines.

[0162] The first inorganic encapsulation layer may be disposed between the plurality of sub-low potential power lines and cover side surfaces of the plurality of sub-low potential power lines.

[0163] The first inorganic encapsulation layer may cover side surfaces of the plurality of sub-low-potential power lines exposed between the plurality of first substructures and the second substructure.

[0164] The display device may further include a spacer disposed on the embankment and a planarization layer disposed under the light-emitting element, wherein the first structure may be made of the same or substantially the same material as the spacer, wherein the plurality of second structures may be made of the same or substantially the same material as the spacer and the embankment, and wherein the barrier may be made of the same or substantially the same material as the spacer, the embankment and the planarization layer.

[0165] According to another aspect of the present disclosure, a display device is provided. The display device includes: a substrate, the substrate including a display area and a non-display area configured to surround the display area; a light-emitting element, the light-emitting element is arranged in the display area on the substrate; a levee, the levee is arranged on the substrate and configured to define a light-emitting area and a non-light-emitting area; an encapsulation layer, the encapsulation layer is arranged on the light-emitting element and includes a first inorganic encapsulation layer, an organic encapsulation layer located on the first inorganic encapsulation layer, and a second inorganic encapsulation layer located on the organic encapsulation layer; a low-potential power supply line, the low-potential power supply line is arranged outside the levee and arranged to overlap with the organic encapsulation layer; a first structure, the first structure is arranged on the levee; a plurality of second structures, the plurality of second structures are arranged on the low-potential power supply line; and a barrier, the barrier is arranged outside the plurality of second structures and configured to surround the organic encapsulation layer, wherein the end of the first inorganic encapsulation layer and the end of the second inorganic encapsulation layer are arranged on the same plane as the end of the substrate.

[0166] The substrate may be made of glass.

[0167] The display device may further include a crack detection portion disposed on the substrate to surround the low potential power line, wherein the first inorganic encapsulation layer is adjacent to the crack detection portion.

[0168] The barrier may be disposed to overlap an end portion of the low potential power line.

[0169] The plurality of second structures may include a plurality of first substructures and second substructures that may have different heights, and the plurality of first substructures and the second substructures may be alternately disposed.

[0170] The second substructure may have a structure including the first substructure and an additional layer stacked on the first substructure.

[0171] The low potential power line may include a plurality of sub-low potential power lines spaced apart from each other, and the plurality of sub-low potential power lines may be disposed between the plurality of first substructures and the second substructure and spaced apart from each other.

[0172] The first inorganic encapsulation layer may be disposed between the plurality of first substructures and the second substructure and cover side surfaces of the plurality of sub low potential power lines.

[0173] Although the exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be embodied in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all aspects and do not limit the present disclosure. The scope of protection of the present disclosure should be understood to be based on the attached claims, and all technical concepts within their equivalent scope should be understood to fall within the scope of the present disclosure.

[0174] CROSS-REFERENCE TO RELATED APPLICATIONS

[0175] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0072619 filed in the Korean Intellectual Property Office on June 7, 2023, the disclosure of which is incorporated herein by reference as if fully set forth herein.

Claims

1. A display device, comprising: a substrate including a display area and a non-display area configured to surround the display area; a light emitting element, wherein the light emitting element is arranged in the display area on the substrate; a bank disposed on the substrate and configured to define a light emitting region and a non-light emitting region; an encapsulation layer, the encapsulation layer being disposed on the light emitting element and comprising a first inorganic encapsulation layer, an organic encapsulation layer located on the first inorganic encapsulation layer, and a second inorganic encapsulation layer located on the organic encapsulation layer; a low potential power line, the low potential power line being arranged on the substrate and arranged to overlap with the organic encapsulation layer; a barrier disposed on the substrate and configured to surround the organic encapsulation layer; as well as a plurality of structures disposed inside the barrier and below the organic encapsulation layer, wherein an end portion of the first inorganic encapsulation layer and an end portion of the second inorganic encapsulation layer overlap with an end portion of the substrate; The plurality of structures include a first structure disposed on the bank and a plurality of second structures disposed on the low potential power line.

2. The display device according to claim 1, wherein: The substrate is made of glass.

3. The display device according to claim 1, wherein: A height of the first structure is different from a height of each of the plurality of second structures.

4. The display device according to claim 1, wherein: The height of the first structure is higher than the height of each of the plurality of second structures.

5. The display device according to claim 1, wherein: The plurality of second structures are disposed outside the first structure and are disposed adjacent to an outer periphery of the substrate.

6. The display device according to claim 1, further comprising: a crack detection portion disposed on the substrate and configured to surround the barrier, The first inorganic encapsulation layer and the second inorganic encapsulation layer cover the side surface and the top surface of the crack detection part.

7. The display device according to claim 6, wherein: The first inorganic encapsulation layer is adjacent to the crack detection portion.

8. The display device according to claim 1, wherein: The barrier covers an end portion of the low potential power line.

9. The display device according to claim 1, wherein: The first inorganic encapsulation layer covers a top surface of the low potential power line.

10. The display device according to claim 1, wherein: The plurality of second structures include: a plurality of first substructures; and a second substructure, the second substructure being disposed between the plurality of first substructures, and The height of each of the plurality of first substructures is different from the height of the second substructure.

11. The display device according to claim 10, wherein: The height of the barrier is higher than the height of the first substructure.

12. The display device according to claim 1, wherein: The low potential power line is continuous, and Wherein, the plurality of second structures are arranged on the low potential power line.

13. The display device according to claim 1, wherein: The low potential power line includes a plurality of sub-low potential power lines spaced apart from each other, and Wherein, the plurality of second structures are arranged on the plurality of sub-low potential power supply lines.

14. The display device according to claim 13, wherein: The first inorganic encapsulation layer is disposed between the plurality of sub-low potential power lines and covers side surfaces of the plurality of sub-low potential power lines.

15. The display device according to claim 13, wherein: The plurality of second structures include: a plurality of first substructures; and a second substructure, the second substructure being disposed between the plurality of first substructures, and The height of each of the plurality of first substructures is different from the height of the second substructure.

16. The display device according to claim 15, wherein: The first inorganic encapsulation layer covers side surfaces of the plurality of sub-low-potential power supply lines exposed between the plurality of first sub-structures and the second sub-structure.

17. The display device according to claim 1, further comprising: a spacer disposed on the bank and a planarization layer disposed under the light emitting element, wherein the first structure and the spacer are made of the same material, wherein the plurality of second structures are made of the same material as the spacers and the embankment, The barrier is made of the same material as the spacer, the bank and the planarization layer.

18. A display device, comprising: a substrate including a display area and a non-display area configured to surround the display area; a light emitting element, wherein the light emitting element is arranged in the display area on the substrate; a bank disposed on the substrate and configured to define a light emitting region and a non-light emitting region; an encapsulation layer, the encapsulation layer being disposed on the light emitting element and comprising a first inorganic encapsulation layer, an organic encapsulation layer located on the first inorganic encapsulation layer, and a second inorganic encapsulation layer located on the organic encapsulation layer; a low potential power supply line, the low potential power supply line being arranged outside the bank and arranged to overlap with the organic encapsulation layer; a first structure disposed on the dike; A plurality of second structures, wherein the plurality of second structures are arranged on the low potential power line; as well as a barrier disposed outside the plurality of second structures and configured to surround the organic encapsulation layer, The end of the first inorganic encapsulation layer and the end of the second inorganic encapsulation layer are arranged on the same plane as the end of the substrate.

19. The display device according to claim 18, wherein: The substrate is made of glass.

20. The display device according to claim 18, further comprising: a crack detection unit, the crack detection unit being arranged on the substrate and surrounding the low potential power line, Wherein, the first inorganic encapsulation layer is adjacent to the crack detection portion.

21. The display device according to claim 18, wherein: The barrier is arranged to overlap with an end portion of the low potential power line.

22. The display device according to claim 18, wherein: The plurality of second structures include a plurality of first substructures and second substructures having different heights, and the plurality of first substructures and the second substructures are alternately arranged.

23. The display device according to claim 22, wherein: The second substructure has a structure including the first substructure and an additional layer stacked on the first substructure.

24. The display device according to claim 22, wherein: The low potential power line includes a plurality of sub-low potential power lines spaced apart from each other, and the plurality of sub-low potential power lines are disposed between the plurality of first substructures and the second substructure and are spaced apart from each other.

25. The display device according to claim 24, wherein: The first inorganic encapsulation layer is disposed between the plurality of first substructures and the second substructure and covers side surfaces of the plurality of sub-low potential power lines.

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