Development and test system of integrated embedded communication equipment
Through the integrated embedded communication device development and testing system, the development process of embedded communication devices is simplified, the problems of complex wiring and incomplete functional testing are solved, fast and accurate testing and reset control are achieved, and the development cycle is significantly shortened.
Patent Information
- Application Number
- CN202411115030.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-14
- Publication Date
- 2024-12-13
AI Technical Summary
During the development of embedded communication equipment, traditional debugging methods have complex wiring and are prone to wiring errors or poor contact, resulting in extended development cycles, and the existing detection devices are not perfect for functional testing and lack reset control functions.
Design a development and testing system for integrated embedded communication equipment, including connection modules, computing modules, data acquisition and output modules, reset control modules and communication status indicator modules, integrating power supply, signal lines, sensors, IO and MCU functions, simplifying During the test process, power supply and communication are realized through the three-core wire interface, and indicator lights are provided to display the output status.
It greatly shortens the development cycle of embedded communication equipment, simplifies the test process, reduces the complexity of external wiring, realizes automatic power supply and data acquisition of the equipment, provides reset control functions, and improves testing efficiency and accuracy.
Smart Images

Figure CN119125856A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of testing embedded communication equipment, and in particular relates to a development and testing system for integrated embedded communication equipment. Background Art
[0002] The development process of embedded communication equipment is relatively complicated. After the hardware and software structure of the equipment is completed, the debugging involves a large amount of repetitive testing work. The traditional debugging method is to lead out the corresponding functional pins for power supply and data acquisition interaction. Wiring errors or poor contact may occur during the wiring process, resulting in long-term failure to find problems in equipment development, thus extending the project development cycle.
[0003] The invention patent application with application number "201811453829.1" discloses a universal detection device for embedded communication equipment, which can be used to test multiple different types of embedded communication equipment. However, its functional test types for embedded communication equipment (such as level output function) are not perfect, and the connection between the test system and the device under test is not convenient enough, and there is no reset control function to deal with the program running away during the test process. Summary of the invention
[0004] The purpose of the present invention is to provide a development and testing system for an integrated embedded communication device, which can greatly shorten the development cycle of the embedded communication device.
[0005] In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention is as follows:
[0006] A development and testing system for an integrated embedded communication device is applied to a device to be tested; the testing system comprises a testing baseboard; the testing baseboard is provided with a connection module, a calculation module, a data acquisition and output module, a reset control module, and a communication status indication module;
[0007] The connection module is used to electrically connect the test base plate and the device under test;
[0008] The operation module is used to establish communication between the test system and the device under test;
[0009] The data acquisition and output module is used to acquire the data of the device under test and convert it into digital quantity and output it to the test system;
[0010] The reset control module is used to reset the test system or the device under test;
[0011] The communication status indication module is used to test the level output function of the device under test and indicate whether the output level of the device under test is valid.
[0012] The invention discloses an integrated development and testing system for embedded communication equipment, which integrates the functions such as power supply, signal line, sensor, IO, MCU and the like required for testing the embedded communication equipment into modules of the system, so that the system can complete the testing of all complex functions including output level only by connecting the leads of the equipment under test during the testing process, without the need for complex external wiring and external sensors and the like. Moreover, the power supply of the equipment under test and the like are directly provided by the testing system, and the equipment under test can also be easily separated from the testing system, which can greatly shorten the development cycle of the embedded communication equipment.
[0013] Preferably, the test system also includes a communication and power supply interface module, a three-core wire, and a host computer; the input end of the three-core wire is electrically connected to the communication and power supply interface module; the first output end of the three-core wire is electrically connected to the test baseboard; the second output end of the three-core wire is electrically connected to the device under test; and the third output end of the three-core wire is electrically connected to the host computer.
[0014] Preferably, the communication status indication module includes an input-output status indication circuit; the input-output status indication circuit includes a plurality of indicator light control subcircuits; the indicator light control subcircuit includes an LED status light, a first input voltage, a first resistor, a second resistor, and a transistor; the first input voltage is electrically connected to the collector of the transistor; the first resistor is arranged between the first input voltage and the collector of the transistor; the LED status light is arranged between the first resistor and the collector of the transistor; the base of the transistor is electrically connected to the device under test; the second resistor is arranged between the base of the transistor and the device under test; the emitter of the transistor is grounded;
[0015] The transistor Q1 is an NPN transistor.
[0016] Preferably, the data acquisition and output module includes an acquisition circuit; the acquisition circuit includes multiple IO ports; the number of the IO ports is the same as the number of the LED status lights, and the level state of each of the IO ports controls a corresponding LED status light to turn on or off; each of the IO ports includes pin 1, pin 2, and pin 3; pin 1 and pin 3 are short-circuited; and pin 2 is electrically connected to the device under test.
[0017] Preferably, the test system further comprises a sensor module; the sensor module is arranged on the test base plate;
[0018] The sensor module is used to collect environmental data of the device under test.
[0019] Preferably, the computing module includes a microcontroller; the microcontroller acquires and processes the data collected by the sensor module.
[0020] Preferably, the sensor module includes a sensor circuit; the sensor circuit includes a temperature and humidity sensor and a third input voltage, and the temperature and humidity sensor includes interface No. 1, interface No. 2, interface No. 3, and interface No. 4; the third input voltage is electrically connected to interface No. 1 and interface No. 2; the interface No. 3 is electrically connected to the device to be tested; and the interface No. 4 is grounded.
[0021] Preferably, the microcontroller includes a first interface; the reset control module includes a reset control circuit; and the reset control circuit is arranged between the first interface and a ground line.
[0022] Preferably, the communication and power supply interface module includes a second input voltage and a step-down circuit; the step-down circuit includes a step-down chip; the step-down circuit converts the second input voltage into an output voltage through the step-down chip to respectively power the test baseboard and the device under test.
[0023] Preferably, the development test system further comprises a debugging interface module, a USB device, and a driving power supply; the test baseboard communicates with the USB device via the debugging interface module; and the driving power supply supplies power to the test baseboard via the debugging interface module.
[0024] Beneficial effects:
[0025] The invention discloses an integrated development and testing system for embedded communication equipment, which integrates the functions such as power supply, signal line, sensor, IO, MCU and the like required for testing the embedded communication equipment into modules of the system, so that the system can complete the testing of all complex functions including output level only by connecting the leads of the equipment under test during the testing process, without the need for complex external wiring and external sensors and the like. Moreover, the power supply of the equipment under test and the like are directly provided by the testing system, and the equipment under test can also be easily separated from the testing system, which can greatly shorten the development cycle of the embedded communication equipment. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 Shown is a first structural block diagram of a development and testing system for an integrated embedded communication device according to an embodiment;
[0027] Figure 2 Shown is a second structural block diagram of a development and testing system for an integrated embedded communication device according to an embodiment;
[0028] Figure 3 Shown is a schematic diagram of an input and output state indication circuit of an embodiment;
[0029] Figure 4 Shown is a schematic diagram of a collection circuit of an embodiment;
[0030] Figure 5 Shown is a schematic diagram of a step-down circuit of an embodiment;
[0031] Figure 6 Shown is a schematic diagram of a microcontroller of an embodiment;
[0032] Figure 7 Shown is a schematic diagram of a reset control circuit of an embodiment;
[0033] Figure 8 Shown is a schematic diagram of a sensor circuit of an embodiment;
[0034] Fig. 9 FIG. 1 is a schematic diagram of a debugging interface circuit of a test system according to an embodiment. DETAILED DESCRIPTION
[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the specific implementation methods of the present invention will be described below with reference to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings and other implementation methods can be obtained based on these drawings without creative work.
[0036] The technical solution of the present invention is described in detail below with specific embodiments.
[0037] Example
[0038] like Figure 1 and 2 As shown, a development and testing system of an integrated embedded communication device of this embodiment is applied to a device under test; the testing system comprises a testing baseboard; the testing baseboard is provided with a connection module, a calculation module, a data acquisition and output module, a reset control module, and a communication status indication module;
[0039] The connection module is used to electrically connect the test base plate and the device under test;
[0040] The operation module is used to establish communication between the test system and the device under test;
[0041] The data acquisition and output module is used to acquire the data of the device under test and convert it into digital quantity and output it to the test system;
[0042] The reset control module is used to reset the test system or the device under test;
[0043] The communication status indication module is used to test the level output function of the device under test and indicate whether the output level of the device under test is valid.
[0044] Preferably, the test system also includes a communication and power supply interface module, a three-core wire, and a host computer; the input end of the three-core wire is electrically connected to the communication and power supply interface module; the first output end of the three-core wire is electrically connected to the test baseboard; the second output end of the three-core wire is electrically connected to the device under test; and the third output end of the three-core wire is electrically connected to the host computer.
[0045] Preferably, the communication status indication module includes an input-output status indication circuit; the input-output status indication circuit includes a plurality of indicator light control subcircuits; the indicator light control subcircuit includes an LED status light, a first input voltage, a first resistor, a second resistor, and a transistor; the first input voltage is electrically connected to the collector of the transistor; the first resistor is arranged between the first input voltage and the collector of the transistor; the LED status light is arranged between the first resistor and the collector of the transistor; the base of the transistor is electrically connected to the device under test; the second resistor is arranged between the base of the transistor and the device under test; the emitter of the transistor is grounded;
[0046] The transistor Q1 is an NPN transistor.
[0047] Preferably, the data acquisition and output module includes an acquisition circuit; the acquisition circuit includes multiple IO ports; the number of the IO ports is the same as the number of the LED status lights, and the level state of each of the IO ports controls a corresponding LED status light to turn on or off; each of the IO ports includes pin 1, pin 2, and pin 3; pin 1 and pin 3 are short-circuited; and pin 2 is electrically connected to the device under test.
[0048] Preferably, the test system further comprises a sensor module; the sensor module is arranged on the test base plate;
[0049] The sensor module is used to collect environmental data of the device under test.
[0050] Preferably, the computing module includes a microcontroller; the microcontroller acquires and processes the data collected by the sensor module.
[0051] Preferably, the sensor module includes a sensor circuit; the sensor circuit includes a temperature and humidity sensor and a third input voltage, and the temperature and humidity sensor includes interface No. 1, interface No. 2, interface No. 3, and interface No. 4; the third input voltage is electrically connected to interface No. 1 and interface No. 2; the interface No. 3 is electrically connected to the device to be tested; and the interface No. 4 is grounded.
[0052] Preferably, the microcontroller includes a first interface; the reset control module includes a reset control circuit; and the reset control circuit is arranged between the first interface and a ground line.
[0053] Preferably, the communication and power supply interface module includes a second input voltage and a step-down circuit; the step-down circuit includes a step-down chip; the step-down circuit converts the second input voltage into an output voltage through the step-down chip to respectively power the test baseboard and the device under test.
[0054] Preferably, the development test system further comprises a debugging interface module, a USB device, and a driving power supply; the test baseboard communicates with the USB device via the debugging interface module; and the driving power supply supplies power to the test baseboard via the debugging interface module.
[0055] Specifically, the communication status indication module includes an input and output status indication circuit; Figure 3 As shown, the input and output status indication circuit is a plurality of indicator light control subcircuits arranged in two rows and eight columns; one of the indicator light control subcircuits includes a 5V input voltage, a resistor R1, a resistor R9, a transistor Q1, and a light emitting diode LED1; the corresponding pin of the device to be tested (assuming it is the J1 pin) is connected to the base of the transistor Q1, and the resistor R9 is set between the J1 pin and the base of the transistor Q1; the 5V input voltage is connected to the collector of the transistor Q1, and the resistor R1 is set between the 5V input voltage and the collector of the transistor Q1, the light emitting diode LED1 is set between the resistor R1 and the collector of the transistor Q1, the positive electrode of the light emitting diode LED1 is electrically connected to the resistor R1, and the negative electrode of the light emitting diode LED1 is electrically connected to the collector of the transistor Q1; the emitter of the transistor Q1 is grounded; the transistor Q1 is an NPN tube, the resistor R1 is 100Ω, and the resistor R9 is 1KΩ. Among them, the light emitting diode LED1 is used as an LED status light for indication.
[0056] Specifically, the data acquisition and output module includes an acquisition circuit; Figure 4As shown, the acquisition circuit is a plurality of IO ports arranged in two rows and eight columns; one of the IO ports includes a 33V input voltage, a resistor R33, a resistor R41, and an acquisition chip JP1; the acquisition chip JP1 includes pins 1, 2, and 3; the corresponding pin of the device to be tested (assuming it is pin J1) is connected to pin 2; pin 1 is connected to the 33V input voltage and a resistor R33 is set between them; pin 2 is connected to the ground wire and a resistor R41 is set between them; pins 1 and 3 are short-circuited to achieve low-level input; wherein the resistor R33 is 220Ω, and the resistor R41 is 10KΩ.
[0057] Furthermore, the acquisition circuit forms 2 groups of 16 input and output ports, which can be arbitrarily configured into different input and output modes. Each group of IO ports consists of 3 pins, and the middle pin is the actual data transmission pin. When the two side pins are short-circuited, the operation of pulling down the level of the middle pin can be achieved. In the actual test process, the write "0" operation can be achieved by short-circuiting the two side pins, and no external device needs to input a low level; each group of IO ports corresponds to an indicator light control sub-circuit. The LED status light of the indicator light control sub-circuit can display the level status of the port in real time. During the test process, it can be used to verify whether there is valid data output or input at the port. The low level light is off and the high level light is on.
[0058] Specifically, the development test system also includes a step-down circuit; the step-down circuit converts the 24V input voltage into a 5V output voltage; Figure 5As shown, the step-down circuit includes a 24V input voltage, a 5V output voltage, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C8, a capacitor C9, a resistor R65, a resistor R66, a resistor R67, a resistor R68, a resistor R69, an inductor L1, a voltage regulator diode D1, and a step-down chip U1; the step-down chip U1 includes a BOOT port, a VIN port, an EN port, a SS port, a VSENSE port, a COMP port, a GND port, and a PH port; the 24V input voltage is electrically connected to the VIN port; the node between the 24V input voltage and the VIN port is grounded, and a resistor R65 and a resistor R66 are connected in series with the ground line in sequence, the node between the resistor R65 and the resistor R66 is electrically connected to the EN port, the node between the resistor R66 and the ground line is electrically connected to the SS port, and a capacitor C7 is arranged between them; the node between the 24V input voltage and the resistor R65 is grounded, and the node between the resistor R65 and the ground line is electrically connected to the SS port, and a capacitor C7 is arranged between them; the node between the 24V input voltage and the resistor R65 is grounded, and the node between the resistor R65 and the ground line is Capacitors C4, C5 and C6 are connected in parallel; the COMP port is grounded, capacitor C8 and resistor R69 are connected in series and connected together with capacitor C9 in parallel between the COMP port and the ground line; the 5V output voltage is electrically connected to the BOOT port and capacitor C1 is set between them, inductor L1 is set between capacitor C1 and the 5V output voltage, the node between capacitor C1 and inductor L1 is electrically connected to the PH port, the node between the PH port and inductor L1 is electrically connected to the negative electrode of the Zener diode D1, and the positive electrode of the Zener diode D1 is grounded; the GND port is grounded; a node between the inductor L1 and the 5V output voltage close to the inductor L1 is connected to the ground line, and capacitors C2 and C3 are connected in parallel to the ground line; another node between the inductor L1 and the 5V output voltage close to the 5V output voltage is connected to the ground line, and resistors R67 and R68 are connected in series with the ground line in sequence, and the node between resistors R67 and R68 is electrically connected to the VSENSE port.
[0059] Specifically, Figure 6 As shown, the operation module includes a microcontroller U2A, which serves as a test system MCU. The microcontroller includes an NRST port, a PA9 TXD port, and a PA10 RXD port.
[0060] Specifically, the reset control module includes a reset control circuit; Figure 7 As shown, the reset control circuit is arranged between the NRST port and the ground line, and includes a switch SW1 and a switch SW2, and the switch SW1 and the switch SW2 are connected in parallel between the NRST port and the ground line.
[0061] Specifically, the sensor module includes a sensor circuit; Figure 8As shown, the sensor circuit includes a temperature and humidity sensor DHT11, a 5V input voltage, and a resistor R76. The temperature and humidity sensor DHT11 includes interface No. 1, interface No. 2, interface No. 3, and interface No. 4; the 5V input voltage is electrically connected to interface No. 1; the 5V input voltage is electrically connected to interface No. 2 and a resistor R76 is arranged therebetween; interface No. 3 is electrically connected to the corresponding interface on the device to be tested; and interface No. 4 is grounded.
[0062] Specifically, the debugging interface module includes a test system debugging interface circuit; Fig. 9 As shown, the debugging interface circuit of the test system includes USB1 (the USB device mentioned above), chip U3, resistor R77, resistor R78, capacitor C19, capacitor C20, and 5V input voltage; USB1 includes +5V port, D- port, D+ port, and GND port; chip U3 includes GND port, TXD port, RXD port, V3 port, UD+ port, UD- port, and VCC port; both GND ports are grounded; 5V input voltage is input into +5V port and VCC port respectively, the node between the 5V input voltage and the VCC port is grounded and capacitor C19 is set; D- port and UD- port are electrically connected and resistor R78 is set between them; D+ port and UD+ port are electrically connected and resistor R77 is set between them; TXD port and PA9 TXD port are electrically connected; RXD port and PA10 RXD port are electrically connected; V3 port and ground wire are electrically connected and capacitor C20 is set between them.
[0063] Furthermore, the debugging interface module is also used for firmware burning and code debugging of the test system.
[0064] The development and testing system of an integrated embedded communication device of the present embodiment integrates a three-core wire interface into the test system. The power supply of the test system and the device to be tested is directly transmitted through the three-core wire, and then the test system and the device to be tested are powered separately through the step-down circuit. The temperature and humidity sensor is directly integrated in the test system, which can be used to directly connect to the device to be tested to perform communication tests between the device and the master station. The test system leads to a total of 16 groups of ordinary digital quantity IO ports, which almost meet all the development and testing requirements of the slave station equipment; the test system is designed with reset buttons for resetting the test system and the device to be tested respectively, and the two devices can be reset respectively; each IO port is provided with three-way pin headers, and when used as an input port, the pin headers on both sides can be directly short-circuited to achieve low-level input. This embodiment will simplify the test process of embedded communication equipment. The tester only needs to connect the device to be tested to this test system according to the pin definition to achieve device reset, data acquisition, data reception and other test work.
[0065] An integrated embedded communication device development and testing system of the present embodiment is used to process sensor data, IO conversion, serial port data forwarding, etc. The test system integrates the power supply, signal line, sensor, IO, MCU, etc. required in the test into one system, so that during the device testing process, the device under test only needs to be conveniently integrated into the test system by using plug-in or DuPont line connection, without the need for complex external wiring and external sensors and other equipment. The power supply of the device under test is directly provided by the test system, and the device under test can also be easily separated from the test system, which can greatly shorten the development cycle of the embedded communication device.
[0066] Furthermore, after the embedded communication device to be tested is connected to the test system of this embodiment, the data collected externally by the embedded communication device is automatically processed in the test system, and the developers only need to focus on the operation of the core board. The test system is integrated with the STM32F100C8T6B series microcontroller, and the firmware related to data processing and data forwarding is burned through the UART1 of the chip, and debugging can also be performed during the test through the serial port.
[0067] Furthermore, through the two groups of 16 input and output ports of the data acquisition and data output module, different input and output modes can be arbitrarily configured. Each group of IO ports consists of 3 pins, and the middle pin is the actual data transmission pin. When the two side pins are short-circuited, the operation of pulling down the level of the middle pin can be achieved. In the actual test process, the write "0" operation can be achieved by short-circuiting the two side pins, and no external device needs to input a low level; each group of IO ports is connected to an LED status light, which can display the level status of the port in real time. During the test process, it can be used to verify whether there is valid data output or input at the port. The low level light is off and the high level light is on.
[0068] Furthermore, the test baseboard is integrated with a DHT11 series temperature and humidity sensor. The temperature data acquisition pin and humidity data acquisition pin of the sensor are respectively connected to the corresponding input pins of the test board. After the pins are initialized, the temperature and humidity data are automatically collected and uploaded to the test board MCU for processing. Developers do not need to connect external data acquisition equipment for testing, avoiding additional testing time due to wiring problems during the test process.
[0069] Furthermore, the test baseboard power supply and signal transmission use a standard three-core M12 interface to simultaneously complete power supply and test data transmission. There is no need to connect the power line and the signal line separately, which reduces the complexity of wiring. The use of a standard interface is more stable during the debugging process and can shorten the debugging cycle.
[0070] Furthermore, in order to prevent the program from "running away" during the test process, a reset button that can be designed to reset the test system separately can be used to reset the test system or the device under test separately, and resetting one will not affect the operation of the other program.
[0071] Furthermore, the connection module only needs to pay attention to the pin definition table to realize the connection between the test system and the device under test, and then use the DuPont line to connect the corresponding pins to the test system baseboard. The power supply and signal transmission between the test system and the device under test can be connected through the corresponding pins.
[0072] Furthermore, the controller of the operation module completes the communication connection between the test system and the device under test, completes the data processing work after the sensor data is collected, and completes the packet forwarding of the data between the test system and the device under test.
[0073] Furthermore, the data acquisition and data output module completes the collection of external data and digital output, and can flexibly configure the port as input or output mode. Each group of IO ports leads to three straight-plug pins, and the middle pin is the actual signal transmission pin. When the two side pins are short-circuited with a DuPont line, the signal pin can be grounded to achieve low-level input. During the debugging of the equipment, it is very convenient to test whether the port input data reception is normal by short-circuiting, saving debugging time.
[0074] Furthermore, the temperature and humidity sensors of the sensor module are respectively connected to the HUMI and 18B20 pins of the test system. The module can simultaneously measure the ambient temperature and humidity data in real time. The data is calculated by the test system MCU and then forwarded to the corresponding pins of the device under test through the serial port. If the device under test has environmental data collection requirements, the corresponding pins can be connected to the test system through the DuPont line for testing. The environmental data collection and communication of the device under test can be completed without the need for an additional external sensor module.
[0075] Furthermore, the reset control module ensures that when a program runaway occurs during the test, there is no need to power off the entire test equipment; RST1 is responsible for resetting the test system MCU alone, and RST2 is responsible for resetting the device under test alone. During the resetting of one party, the operation of the program on the other party is not affected. The independent reset design can shorten the debugging time of the device under test and can perform independent repairs when a program fails.
[0076] Furthermore, the communication status indication module is used to indicate whether there is valid data output, and is used to test the level output function of the device under test. The module consists of 16 light-emitting diodes. When the corresponding pin outputs a high level, the light-emitting diode is turned on and lights up, which is used to indicate whether the output level of the device under test is valid. During the test process, the output status can be judged without the need for detection by a driving device or a multimeter.
[0077] Furthermore, the debugging interface module enables the test system to burn firmware and debug the test system code through the serial port. At the same time, the interface can also provide additional driving power for the test baseboard for use when testing the driving output capability of the communication device.
[0078] Furthermore, the communication and power supply interface module is a standard M12 three-core wire interface, two of which are used as power supply lines for the test system, the device under test and the temperature and humidity sensor, and one is used as a digital signal line to communicate with the host computer or controller. The use of a standard three-core wire interface can make wiring simpler, integrating the data line and the power line into one cable, reducing the wiring complexity during equipment debugging.
[0079] The embedded communication device test system of this embodiment has a high degree of integration. Compared with the traditional test process, it simplifies the complicated wiring process and peripheral equipment. The dual in-line design can simplify the connection between the device under test and the test system. The communication between the device under test and the test system can be completed according to the pin definition table of the test system.
[0080] Furthermore, once the device under test is connected to the test system pin, the input and output function test of the device under test can be realized. The input function test does not require an external input device. The low-level state can be detected by pulling down the corresponding pin, or the change of input data can be directly detected by the environmental data acquisition device integrated in the test system. For the output function test of the device under test, it only needs to be verified through the output status indicator light of the corresponding pin, or verified by an external drive device. The external device can be directly plugged into the data pin of the corresponding pin group through the DuPont line.
[0081] Furthermore, the standard M12 interface is integrated into the test system of the embedded communication equipment. The interface cable is often used in the power supply and communication fields of industrial equipment. The interface connection is convenient and the communication is stable. The power supply and digital communication of the test system can be completed through one cable.
[0082] The embedded communication device development and testing system provided in this embodiment can be used for debugging work during the development of embedded communication devices. The system greatly simplifies the debugging process of the device under test, eliminates complicated wiring and mounting of peripheral devices, and directly uses the environmental data acquisition module integrated in the test system for input testing. The output can be judged by the status indication module on the test device. The power supply of the device under test and the test system and the communication between the device under test and the host computer are completed through a three-core cable with a standard M12 interface. The voltage mismatch problem of each device is coordinated by the internal step-down system of the test system. The test system can greatly simplify the development and debugging process of embedded communication devices.
[0083] The above is a detailed description of an embodiment of a development and testing system for an integrated embedded communication device provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention, and the description of the above embodiments is only used to help understand the core idea of the present invention. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, the present invention can also be improved and modified, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.
Claims
1. A development and testing system for an integrated embedded communication device, characterized in that: Applicable to the device under test; the test system includes a test baseboard; the test baseboard is provided with a connection module, a calculation module, a data acquisition and output module, a reset control module, and a communication status indication module; The connection module is used to electrically connect the test base plate and the device under test; The operation module is used to establish communication between the test system and the device under test; The data acquisition and output module is used to acquire the data of the device under test and convert it into digital quantity and output it to the test system; The reset control module is used to reset the test system or the device under test; The communication status indication module is used to test the level output function of the device under test and indicate whether the output level of the device under test is valid.
2. The development and testing system according to claim 1, characterized in that: The test system also includes a communication and power supply interface module, a three-core wire, and a host computer; the input end of the three-core wire is electrically connected to the communication and power supply interface module; the first output end of the three-core wire is electrically connected to the test baseboard; the second output end of the three-core wire is electrically connected to the device under test; and the third output end of the three-core wire is electrically connected to the host computer.
3. The development and testing system according to claim 2, characterized in that: The communication status indication module includes an input-output status indication circuit; the input-output status indication circuit includes a plurality of indicator light control subcircuits; the indicator light control subcircuit includes an LED status light, a first input voltage, a first resistor, a second resistor, and a transistor; the first input voltage is electrically connected to the collector of the transistor; the first resistor is arranged between the first input voltage and the collector of the transistor; the LED status light is arranged between the first resistor and the collector of the transistor; the base of the transistor is electrically connected to the device under test; the second resistor is arranged between the base of the transistor and the device under test; the emitter of the transistor is grounded; The transistor Q1 is an NPN transistor.
4. The development and testing system according to claim 3, characterized in that: The data acquisition and output module includes an acquisition circuit; the acquisition circuit includes multiple IO ports; the number of the IO ports is the same as the number of the LED status lights, and the level state of each of the IO ports controls a corresponding LED status light to turn on or off; each of the IO ports includes pin 1, pin 2, and pin 3; pin 1 and pin 3 are short-circuited; and pin 2 is electrically connected to the device under test.
5. The development and testing system according to claim 2, characterized in that: The test system further comprises a sensor module; the sensor module is arranged on the test base plate; The sensor module is used to collect environmental data of the device under test.
6. The development test system according to claim 5, characterized in that: The operation module includes a microcontroller; the microcontroller acquires and processes the data collected by the sensor module.
7. The development test system according to claim 5, characterized in that: The sensor module includes a sensor circuit; the sensor circuit includes a temperature and humidity sensor and a third input voltage, and the temperature and humidity sensor includes interface No. 1, interface No. 2, interface No. 3, and interface No. 4; the third input voltage is electrically connected to interface No. 1 and interface No. 2; the interface No. 3 is electrically connected to the device under test; and the interface No. 4 is grounded.
8. The development test system according to claim 6, characterized in that: The microcontroller includes a first interface; the reset control module includes a reset control circuit; and the reset control circuit is arranged between the first interface and a ground line.
9. The development and testing system according to claim 2, characterized in that: The communication and power supply interface module includes a second input voltage and a step-down circuit; the step-down circuit includes a step-down chip; the step-down circuit converts the second input voltage into an output voltage through the step-down chip to respectively power the test baseboard and the device under test.
10. The development test system according to claim 2, characterized in that: The development test system also includes a debugging interface module, a USB device, and a driving power supply; the test baseboard communicates with the USB device through the debugging interface module; The driving power supply supplies power to the test baseboard through the debugging interface module.
Citation Information
Patent Citations
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