Power semiconductor device and method for manufacturing power semiconductor device

By performing lead forming and specific process processing in the terminal bent portion of the semiconductor device, the insulation and installation problems caused by terminal deformation are solved, and efficient insulation and installation are improved, and are suitable for power semiconductor devices with high output specifications.

CN119133132APending Publication Date: 2024-12-13MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
CN202411279523.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2019-03-22
Filing Date
2020-03-17
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

The existing semiconductor devices using lead frames are prone to deform and bend after the connecting rod is cut, resulting in a decrease in insulation and poor installation.

Method used

By shaping the lead wire in the bent portion of the terminal, the width is greater than the front end width, but less than or equal to the package interface width, and a specific cutting and plating process is adopted to ensure the insulation and installation between the terminals.

Benefits of technology

The deformation and bending of the terminals are effectively suppressed, the insulation between adjacent terminals and the installation ability to the control substrate are improved, and it is suitable for power semiconductor devices with high output specifications.

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Abstract

The invention provides a power semiconductor device using a lead frame and a method for manufacturing the same, the power semiconductor device and the method for manufacturing the same can suppress deformation and bending of terminals, ensure insulation between the terminals, and improve mounting performance on a control substrate. By providing a package (1) having a lead frame (2) in which a semiconductor element is mounted on the lead frame (2) and sealed, terminals (3), and a terminal bending section (4), deformation and bending of the terminals (3) can be suppressed, and required insulating properties between adjacent terminals (3) can be ensured, and mounting to a control substrate can be easily performed, and by providing the package (1) having the lead frame (2) in which the semiconductor element is mounted on the lead frame (2), and a terminal bending section (4) in which the terminal bending section (4) is bent. The terminal (3) is exposed from a side surface of the package (1) and is bent, and the terminal bent portion (4) is a bent portion of the terminal (3) and has a width greater than a tip width of the terminal (3) and less than or equal to a width of the terminal (3) in contact with the package (1).
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Description

[0001] This application is based on application No. 202010186779.6 with a filing date of 2020.03.17

[0002] The present invention is a divisional application of (power semiconductor device and manufacturing method thereof), the contents of which are cited below. Technical Field

[0003] The present invention relates to a power semiconductor device using a lead frame and a method for manufacturing the same. Background Art

[0004] In conventional semiconductor devices using lead frames, in order to prevent the insulation between adjacent terminals from being reduced due to the remaining traces of the tie bar cut after the tie bar is cut, a portion of the terminal is cut and removed together with the tie bar. (For example, refer to Patent Document 1)

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2013-4771 (Paragraphs 0024, 0028, Figures 1 to 3 , Figure 5 )

[0006] The terminal shape of such a semiconductor device cannot ensure the rigidity of the terminal, and after the connecting rod is cut and the lead is formed, the terminal may be deformed or bent, and the terminal tip position may be shifted. As a result, the insulation between the terminals and the insertion and mounting properties of the terminals into the through-holes of the control substrate having the control circuit may be affected. Summary of the invention

[0007] The present invention is proposed to solve the above-mentioned problems, and its object is to provide a power semiconductor device using a lead frame, which can suppress deformation and bending of terminals, thereby making it easier to ensure insulation between terminals and improving mountability on a control substrate.

[0008] Another object is to provide a method for manufacturing a power semiconductor device using a lead frame, which suppresses deformation and bending of terminals, makes it easier to ensure insulation between terminals, and improves mountability on a control substrate.

[0009] The power semiconductor device according to the present invention comprises: a package body in which a semiconductor element is mounted and packaged on a lead frame; a terminal which is exposed from a side surface of the package body and is bent; and

[0010] The terminal bending portion is a bent portion of the terminal, and its width is greater than the front end width of the terminal and less than or equal to the width of the terminal connected to the package body.

[0011] In addition, the manufacturing method of the power semiconductor device involved in the present invention has the following steps: for a package having a lead frame after packaging, a connecting rod of the lead frame is cut and removed by a connecting rod cutting mold in a manner that the width is smaller than the width of the terminal connected to the package; the terminal is plated by a plating device; the lead of the lead frame is cut by a lead cutting mold; and the terminal is bent by a lead forming mold.

[0012] Effects of the Invention

[0013] According to the power semiconductor device of the present invention, it is possible to easily ensure insulation between adjacent terminals and mountability on a control substrate.

[0014] Furthermore, according to the method for manufacturing a power semiconductor device according to the present invention, it is possible to obtain a power semiconductor device that can easily achieve insulation between adjacent terminals and easy mounting on a control substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a plan view showing the power semiconductor device according to the first embodiment.

[0016] Figure 2 It is a side view showing the power semiconductor device according to the first embodiment.

[0017] Figure 3 This is an enlarged side view showing the power semiconductor device according to the first embodiment.

[0018] Figure 4 This is an enlarged plan view showing the power semiconductor device according to the first embodiment.

[0019] Figure 5 This is a flowchart showing the method for manufacturing the power semiconductor device according to the first embodiment.

[0020] Figure 6 It is a top view showing the package having the lead frame after packaging according to the first embodiment.

[0021] Figure 7 It is a top view showing the cutting of the connecting rod according to the first embodiment.

[0022] Figure 8 1 is a plan view showing the package after the tie bars according to the first embodiment are cut.

[0023] Fig. 9 This is a plan view showing the package after the leads are cut according to the first embodiment.

[0024] Fig.10 This is an enlarged plan view showing the package after lead cutting according to the first embodiment.

[0025] Fig.11 It is a top view showing a power semiconductor device according to the second embodiment.

[0026] Fig.12 It is a side view showing a power semiconductor device according to the second embodiment.

[0027] Fig.13 It is an enlarged plan view showing a power semiconductor device according to the second embodiment.

[0028] Fig.14 It is a top view showing a package having a lead frame after packaging according to the second embodiment.

[0029] Fig.15 It is a top view showing the cutting of the connecting rod involved in the second embodiment.

[0030] Fig.16 It is a top view showing the package after the tie bars according to the second embodiment are cut.

[0031] Fig.17 This is an enlarged plan view showing the package after lead cutting according to the second embodiment.

[0032] Fig.18 It is a top view showing a power semiconductor device according to the third embodiment.

[0033] Fig.19 It is a side view showing a power semiconductor device according to the third embodiment.

[0034] Fig. 20 It is a top view showing a package having a lead frame after packaging according to the third embodiment.

[0035] Fig.21 It is a top view showing the cutting of the connecting rod involved in the third embodiment.

[0036] Fig. 22 1 is a plan view showing the package after the tie bars according to the third embodiment have been cut.

[0037] Fig.23 It is a top view showing the package after the lead cutting according to the third embodiment.

[0038] Fig.24 It is a top view showing a power semiconductor device according to a fourth embodiment.

[0039] Fig.25 It is a side view showing a power semiconductor device according to a fourth embodiment.

[0040] Fig.26It is a top view showing a package having a lead frame after packaging according to the fourth embodiment.

[0041] Fig. 27 It is a side view showing a package having a lead frame after packaging according to the fourth embodiment.

[0042] Fig.28 1 is a plan view showing the package after the tie bars according to the fourth embodiment have been cut.

[0043] Fig.29 It is a top view showing the package after the lead cutting according to the fourth embodiment.

[0044] Fig.30 It is a side view showing the package after the lead cutting according to the fourth embodiment.

[0045] Description of the label

[0046] 1 Package

[0047] 2 Lead frame

[0048] 3 terminals

[0049] 4 Terminal bend

[0050] 5 Connecting rod

[0051] 6 Connecting rod cutting die

[0052] 7 slots DETAILED DESCRIPTION

[0053] Implementation method 1.

[0054] The structure of the power semiconductor device according to the first embodiment will be described. Figure 1 is a top view showing a power semiconductor device according to Embodiment 1, Figure 2 Viewed from the right side of the paper Figure 1 FIG. 1 is a side view of a power semiconductor device.

[0055] like Figure 1 and Figure 2 As shown, the power semiconductor device is composed of a package 1 and terminals 3 exposed from the package 1. The package 1 is encapsulated by transfer molding using a resin.

[0056] Inside the package 1, a semiconductor element is mounted on a lead frame 2, and the semiconductor element is internally wired through a metal wire and connected to a terminal 3. A plurality of terminals 3 are exposed from the package 1 and inserted and mounted in a through hole of a control substrate having a control circuit not shown. In addition, a required number of power semiconductor elements can be mounted according to the specifications of the power semiconductor device. In addition, the semiconductor element and the metal wire inside the package 1 are omitted.

[0057] The resin sealing the package 1 is made of epoxy resin, but the present invention is not limited thereto, and any resin may be used as long as it has a desired elastic modulus and adhesion.

[0058] Semiconductor devices include IGBT (Insulated Gate Bipolar Transistor),

[0059] MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), diode. In addition, it is not limited to Si, and can also be made of SiC or GaN.

[0060] The metal wire is any of Al wire, Au wire, Ag wire or Cu wire, and is connected by wire bonding inside the package 1. The material and diameter of the metal wire are selected according to the current capacity flowing through the metal wire.

[0061] The terminal 3 has a thickness of 0.3 to 1.0 mm and is exposed from the side opposite to the package body 1. It is usually made of copper, but is not limited to this. Any material having the required heat dissipation characteristics is not particularly limited. For example, Al can be used, and copper / Invar alloy /

[0062] Composite materials such as copper, and alloys such as CuMo can also be used.

[0063] Figure 3 Yes Figure 1 The area A surrounded by the middle dotted line is extracted and enlarged in the side view. Figure 4 Yes Figure 1 The area A surrounded by the middle dotted line is extracted and enlarged in the top view.

[0064] like Figure 2 as well as Figure 3 As shown, the terminal 3 is bent at the terminal bending portion 4 by a lead forming die and bent into a substantially right angle. Figure 1 The back side of the paper is bent toward the positive side. In the terminal bending portion 4, Figure 3Therefore, the terminal bent portion 4 is deformed by the bending process performed by the lead forming die, so that Figure 1 The package 1 shown has a width in the longitudinal direction, that is, toward the adjacent terminal 3, greater than the width before the package 1 is bent by the lead forming die.

[0065] However, if Figure 4 As shown by the arrows, at adjacent terminals 3 , the spatial insulation distance at the terminal bending portion 4 is greater than or equal to the spatial insulation distance of the terminal 3 on the package body 1 side.

[0066] The reason is that the shape of the lead before forming is Fig.10 As shown, by setting the shape in which the width of the terminal bend portion 4 is smaller than the width of the terminal 3 connected to the package body 1, even after the lead is formed, at the terminal bend portion 4 deformed toward the adjacent terminal 3, a spatial insulation distance can be ensured relative to the terminal bend portion 4 of the adjacent terminal 3. In addition, the width of the front end of the terminal 3 mounted on the control substrate is smaller than the width of the terminal bend portion 4.

[0067] Thus, insulation can be ensured between adjacent terminals 3. In addition, since the width of the package 1 side is large and rigid at the terminals 3, the position of the front ends of the plurality of terminals 3 is not displaced. Therefore, mounting from the power semiconductor device to the control substrate can be easily performed.

[0068] Next, a method for manufacturing a power semiconductor device will be described.

[0069] Figure 5 A flowchart related to a method for manufacturing a power semiconductor device is shown.

[0070] First, prepare Figure 6 The package 1 (S101) shown is packaged by transfer molding and uses a lead frame 2. The lead frame 2 includes a terminal 3 and a tie bar 5. Therefore, the thickness of the lead frame 2 is 0.3 to 1.0 mm. Although not shown in the figure, the resin generated during transfer molding is cut and removed.

[0071] Next, if Figure 6 The enlarged top view after extraction from range B is Figure 7 As shown, the connecting rod 5 is cut and removed by shearing processing using the connecting rod cutting die 6 (S102). Figure 8 The top view of the connecting rod after cutting is shown. Then, Figure 8 The lead frame 2 of the terminal 3 shown is plated (S103). The plating is a plating with Sn as a main component. After the plating, the lead of the lead frame 2 is cut and removed by shearing using a lead cutting die (S104). Fig. 9 A top view after lead cutting is shown. Fig.10 Show that Fig. 9 An enlarged top view extracted from range C.

[0072] Thus, at adjacent terminals 3, since the width of the terminal bend 4 is greater than the width of the front end of the terminal 3 mounted on the control substrate and smaller than the width of the terminal 3 in contact with the package 1, the spatial insulation distance at the terminal bend 4 before lead forming is greater than the spatial insulation distance on the package 1 side of the terminal 3. Fig. 9 The terminal 3 is bent by a lead forming die from the state of Figure 1 The power semiconductor device of terminal 3 shown in FIG. Fig. 9 The terminal 3 shown is lead-formed and deformed toward the adjacent terminal due to the compressive stress on the terminal bend 4 , but the spatial insulation distance at the terminal bend 4 of the adjacent terminal 3 is greater than or equal to the spatial insulation distance on the package body 1 side of the terminal 3 .

[0073] Therefore, it is possible to ensure a spatial insulation distance between adjacent terminals 3, so it is possible to ensure insulation between adjacent terminals 3 of different polarities. In addition, the width of the terminal 3 is larger (1.5 to 4 times) on the package body 1 side than the front end portion mounted on the control substrate, so that rigidity can be ensured. That is, even after the lead is cut, deformation and bending of the terminal 3 can be suppressed. Therefore, insertion and mounting on the control substrate can be facilitated.

[0074] In addition, power semiconductor devices can achieve energy saving, so their use has expanded, represented by industrial use, and the current has been increased from several A level to 20 to 75 A level, and the component withstand voltage has been increased from 600 V level to 1200 V level. However, due to the size restrictions of the system using the power semiconductor device and the requirement to install it in the same control circuit, it is difficult to change the size of the package 1 and the configuration of the terminal 3.

[0075] However, by using the power semiconductor device and the manufacturing method thereof of the present invention, it is possible to cope with various specifications represented by high output specifications, and therefore, it is not necessary to change the configuration of the terminals 3 of the package 1, and it is possible to cope with the specifications by using the common package 1 and the terminals 3. For example, if the space insulation distance between adjacent terminals 3 is insufficient, there is no need to change the shape of the lead frame 2 or the expensive molding die, and the required space insulation distance can be ensured between adjacent terminals 3 only by adjusting the connecting rod cutting die 6 to cut the connecting rod 5 in accordance with the insufficient space insulation distance and bending the terminal by lead forming processing.

[0076] In the first embodiment, in the package 1 that packages the semiconductor element and has the lead frame 2, the connecting bar is cut so as to have a width smaller than the width of the terminal 3 connected to the package 1, and after plating, lead cutting, and lead forming, the width of the bent terminal 4 exposed and bent from the side of the package is smaller than or equal to the width of the terminal 3 connected to the package 1. By adopting the above structure, the space insulation distance between adjacent terminals 3 can be ensured, and the insulation between adjacent terminals 3 can be ensured. In addition, since the width of the terminal 3 on the package 1 side is large and the rigidity is ensured, the terminal 3 will not be deformed or bent. Therefore, the mounting performance on the control substrate can be improved.

[0077] Furthermore, the required spatial insulation distance can be ensured between adjacent terminals 3 by adjusting the tie bar cutting die 6 in accordance with the specifications of the power semiconductor device, without changing the positions of the package 1 and the terminals 3. Furthermore, mounting on the same control board is possible.

[0078] The shapes of the terminals 3 do not all need to be the same. Figure 1 In the case where the distance between adjacent terminals 3 is sufficient, and the space insulation distance between the terminal bending portions 4 of the adjacent terminals 3 can be sufficiently ensured after the lead is formed, it is not necessary to form as Fig.10 The step-shaped terminal 3 shown in the figure may also be Fig.10 The width of the terminal bend 4 shown is the same as the width of the terminal 3 at the package body. That is, as long as the required spatial insulation distance can be ensured at adjacent terminal bends 4 according to the specifications of the power semiconductor device after the lead is formed, insulation between the terminals 3 can be ensured.

[0079] Furthermore, the present invention can be applied not only to power semiconductor devices that are inserted into through holes of a control substrate and mounted, but also to power semiconductor devices that are surface mounted on a control substrate. Only the shape of the lead after forming is different.

[0080] Implementation method 2.

[0081] Fig.11 is a top view showing a power semiconductor device according to Embodiment 2, Fig.12 1 is a side view showing a power semiconductor device according to Embodiment 2. In addition, many structures of the power semiconductor device and the manufacturing method thereof according to this embodiment are common to those of Embodiment 1. Therefore, the differences from the power semiconductor device and the manufacturing method thereof according to Embodiment 1 are described, and the same or corresponding structures are indicated by the same reference numerals, and their descriptions are omitted. The difference from Embodiment 1 is the following structure, that is, Fig.13 , Figure 15 to Figure 17 As shown, on the package body 1 side of the terminal bending portion 4 of the terminal 3 , a recess is provided on the adjacent terminal 3 side.

[0082] Fig.13 Yes Fig.11 The enlarged plan view of the range D surrounded by the middle dotted line. Similar to the first embodiment, at adjacent terminals 3 , the spatial insulation distance at the terminal bending portion 4 is greater than or equal to the spatial insulation distance at the package 1 side of the terminal 3 .

[0083] Depending on the frequency of use of the connecting rod cutting die 6, whisker-like burrs may be generated during the connecting rod cutting process due to the wear of the die, blunting of the die corners, clearance, etc.

[0084] Therefore, if Fig.14 The enlarged top view of the range E surrounded by the dotted line is Fig.15 As shown, concave cutouts are provided on both sides of the width direction of the terminal 3 from the connecting rod 5 to the package body 1. In addition, the width of the concave portion of the terminal 3 is greater than the front end width of the terminal 3. Therefore, the rigidity of the terminal 3 can be ensured.

[0085] In this way, the connecting rod cutting is performed in a state where the corner of the connecting rod cutting die 6 is not in contact with the connecting rod 5. Thus, the generation of burrs can be suppressed in the connecting rod cutting process. In addition, the service life of the expensive connecting rod cutting die 6 can be improved. Fig.16 Shows a top view of the connecting rod after cutting.

[0086] Next, the lead frame 2 is cut into leads ( Fig.17 ), through lead forming, it is possible to obtain Fig.11 as well as Fig.12 The power semiconductors shown.

[0087] like Fig.17 As shown, by setting the width of the terminal bend 4 to be smaller than the width of the terminal 3 in contact with the package body, the spatial insulation distance at the terminal bend 4 can be ensured after the lead is formed. In addition, the width of the front end of the terminal 3 mounted on the control substrate is smaller than the width of the terminal bend 4.

[0088] In the second embodiment, for the package 1 that packages the semiconductor element and has the lead frame 2, the connecting bar 5 is cut so as to have a width smaller than the width of the terminal 3 connected to the package 1 without placing a burden on the connecting bar cutting die 6, and the width of the terminal bent portion 4 of the terminal 3 exposed and bent from the side of the package 1 after plating, lead cutting, and lead forming is less than or equal to the width of the terminal 3 connected to the package 1. By adopting the above structure, the spatial insulation distance between adjacent terminals 3 can be ensured, and the insulation between adjacent terminals 3 can be ensured. In addition, since the width of the terminal 3 on the package 1 side is large and the rigidity is ensured, the terminal 3 will not be deformed or bent, and the mounting performance on the control substrate can be improved.

[0089] Furthermore, the spatial insulation distance between adjacent terminals 3 can be ensured by adjusting the tie bar cutting die 6 in accordance with the specifications of the power semiconductor device, without changing the positions of the package 1 and the terminals 3. Furthermore, mounting on the same control board is possible.

[0090] In addition, burrs generated in the connecting rod cutting process can be suppressed, and the spatial insulation distance between adjacent terminals 3 can be ensured. In addition, the service life of the connecting rod cutting die can be increased.

[0091] Implementation method 3.

[0092] Fig.18 is a top view showing a power semiconductor device according to Embodiment 3, Fig.19 1 is a side view showing a power semiconductor device according to Embodiment 3. In addition, many structures of the power semiconductor device and the manufacturing method thereof according to this embodiment are common to those of Embodiment 1. Therefore, the differences from the power semiconductor device and the manufacturing method thereof according to Embodiment 1 are described, and the same or corresponding structures are indicated by the same reference numerals, and their descriptions are omitted. The difference from Embodiment 1 is the following structure, that is, Fig.18 , Figure 20 to Figure 23 As shown, a groove 7 is provided on the inner side of the terminal bending portion 4 of the terminal 3 by coining.

[0093] like Fig.18 As shown, similarly to the first embodiment, at adjacent terminals 3 , the spatial insulation distance at the terminal bending portion 4 is greater than or equal to the spatial insulation distance at the package 1 side of the terminal 3 .

[0094] Fig. 20 The package 1 having a lead frame subjected to coining is shown. In the lead forming step, a groove 7 having a depth of about 20% of the thickness of the lead frame 2 is provided in the connecting bar 5 corresponding to the terminal bend 4. Coining is a process of forming a depression by punching, and thus has excellent productivity.

[0095] Next, the connecting rod cutting is performed as in the first embodiment ( Fig.21 , Fig. 22 ), plating, cutting and removing the leads of the lead frame 2 ( Fig.23 ), and then the lead is formed, thereby obtaining Fig.18 as well as Fig.19 The power semiconductor device shown.

[0096] Since the lead frame 2 is stamped, the terminal 3 can be easily bent with high precision in the lead forming process, so that the desired spatial insulation distance between adjacent terminals 3 can be ensured. In addition, during installation on the control substrate, the configuration deviation of the front end position of the terminal 3 can be suppressed by high-precision bending, and installation can be easily performed.

[0097] In the third embodiment, for the package 1 that packages the semiconductor element and has the lead frame 2, the connecting rod 5 is cut in a manner that becomes smaller than the width of the terminal 3 connected to the package 1, and the plating and lead cutting are performed, so that the lead is easily and accurately formed. The width of the terminal 3 exposed and bent from the side of the package 1 is less than or equal to the width of the terminal 3 connected to the package 1. By adopting the above-mentioned structure, the spatial insulation distance between adjacent terminals 3 can be ensured, and the insulation between adjacent terminals 3 can be ensured. In addition, since the width of the terminal 3 on the package 1 side is large and the rigidity is ensured, the terminal 3 will not be deformed or bent, and the installation performance on the control substrate can be improved.

[0098] Furthermore, the spatial insulation distance between adjacent terminals 3 can be ensured by adjusting the tie bar cutting die 6 in accordance with the specifications of the power semiconductor device, without changing the positions of the package 1 and the terminals 3. Furthermore, mounting on the same control board is possible.

[0099] In addition, the embossing process 7 may be performed not only on one side of the lead frame but also on both sides.

[0100] Implementation method 4.

[0101] Fig.24 is a top view showing a power semiconductor device according to a fourth embodiment. Fig.25 1 is a side view showing a power semiconductor device according to Embodiment 4. In addition, many structures of the power semiconductor device and the manufacturing method thereof according to this embodiment are common to those of Embodiment 1. Therefore, the differences from the power semiconductor device and the manufacturing method thereof according to Embodiment 1 are described, and the same or corresponding structures are indicated by the same reference numerals, and their descriptions are omitted. The difference from Embodiment 1 is that Figure 24 to Figure 28 , Fig.30As shown, the terminals 3 facing each other with the package 1 interposed therebetween have different thicknesses from each other.

[0102] like Fig.24 As shown, similarly to the first embodiment, at adjacent terminals 3 , the spatial insulation distance at the terminal bending portion 4 is greater than or equal to the spatial insulation distance at the package 1 side of the terminal 3 .

[0103] Fig.26 A top view of a packaged power semiconductor device with a lead frame is shown, Fig. 27 The side view is shown. Fig.26 as well as Fig. 27 As shown, the thickness of the lead frame 2 is different on opposite sides. As in the first embodiment, the tie bar cutting ( Fig.28 )、plating、lead cutting( Fig.29 as well as Fig.30 ). Therefore, if Fig.25 As shown, the thickness of the terminal 3 is different. The thickness of the terminal 3 is 0.3 to 1.0 mm, and the thickness of the other terminal 3 is about 1.5 times. A power semiconductor device that can handle high current output.

[0104] In addition, in accordance with the specifications of the power semiconductor device, for example, if the terminal 3 is connected from a semiconductor element such as a MOSFET or an IGBT, the current value flowing therethrough becomes larger, and thus the thickness of the terminal 3 becomes larger. On the other hand, if the terminal 3 is connected from a semiconductor element such as an IC, the current value flowing therethrough becomes smaller, and thus the thickness of the terminal 3 can be reduced. By thus corresponding to the current value, the weight reduction of the power semiconductor device can be achieved.

[0105] In the fourth embodiment, for the package 1 that packages the semiconductor element and has the lead frame 2, the connecting rod 5 is cut in a manner that the width is smaller than the width of the terminal 3 connected to the package 1, and plating, lead cutting, and lead forming are performed. The width of the terminal 3 exposed and bent from the side of the package is less than or equal to the width of the terminal 3 connected to the package 1. By adopting the above structure, the spatial insulation distance between adjacent terminals 3 can be ensured, and the insulation between adjacent terminals 3 can be ensured. In addition, since the width of the terminal 3 on the package 1 side is large and the rigidity is ensured, the terminal 3 will not be deformed or bent, and the installation performance on the control substrate can be improved.

[0106] Furthermore, the spatial insulation distance between adjacent terminals 3 can be ensured by adjusting the tie bar cutting die 6 in accordance with the specifications of the power semiconductor device, without changing the positions of the package 1 and the terminals 3. Furthermore, mounting on the same control board is possible.

[0107] In addition, the present invention can freely combine the various embodiments within the scope of the invention, or appropriately modify or omit the various embodiments.

Claims

1. A power semiconductor device comprising: A package body encapsulating a semiconductor element; a plurality of terminals exposed from the side surface of the package body and bent; and The terminal bending portion is a bent portion of the terminal, and its width is greater than the front end width of the terminal. The width of a portion of the terminal farther from the package body than the terminal bent portion is smaller than the width of the terminal bent portion, A concave portion is provided on the package body side of the terminal bent portion of the terminal in the lateral direction of the adjacent terminal, and the width of the terminal where the concave portion is located is larger than the front end width of the terminal and smaller than the width of the terminal connected to the package body.

2. The power semiconductor device according to claim 1, wherein: In a portion farther from the package body than the terminal bent portion, there is no recessed portion in a lateral direction of an adjacent terminal.

3. The power semiconductor device according to claim 1 or 2, wherein: The terminal bent portion of the terminal has a groove subjected to coining processing.

4. The power semiconductor device according to any one of claims 1 to 3, wherein: The terminals have different thicknesses in opposite directions.

5. A method for manufacturing a power semiconductor device, comprising the following steps: For a package body having a lead frame after packaging, a connecting rod cutting die is used to cut and remove the connecting rod of the lead frame in such a manner that the width of the bent portion of the terminal is larger than the width of the portion of the terminal closer to the front end than the bent portion, a recess is provided on the side of the adjacent terminal on the package body side of the bent portion of the terminal, and the width of the terminal where the recess is located is larger than the front end width of the terminal and smaller than the width of the terminal connected to the package body; Plating the terminal by a plating device; Cutting and removing the leads of the lead frame by a lead cutting die; as well as The terminal is bent at the bent portion by a lead forming die.