Circuit board and method of manufacturing circuit board

By providing an insulating auxiliary member with high thermal expansion coefficient and a substrate portion with different thermal expansion coefficients in the insulating core layer of the circuit board, the warping problem is solved and the stability and yield of the circuit board are improved.

CN119136402APending Publication Date: 2024-12-13SAMSUNG ELECTRO MECHANICS CO LTD
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Patent Information

Application Number
CN202410738256.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-06-13
Filing Date
2024-06-07
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

In the electronic industry, with the improvement of the performance of electronic devices, the warpage of semiconductor packages increases, resulting in a decrease in yield, and it is difficult for the prior art to effectively solve the warpage problem.

Method used

Design a circuit board, by providing insulating auxiliary components with different thermal expansion coefficients in the insulating core layer, and forming circuit wiring and insulating layers with different thermal expansion coefficients on the first and second substrates, the high thermal expansion coefficient of the insulating auxiliary components is used. To balance the thermal expansion imbalance of the circuit board, thereby alleviating warping.

Benefits of technology

有效减轻了电路板在热膨胀过程中上下部分的不平衡,降低了翘曲风险,提高了电路板的稳定性和良率。

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a circuit board and a method of manufacturing the same. The disclosed circuit board includes: an insulating core layer having a first surface and a second surface opposite to each other; an insulating auxiliary member, at least a portion of which is disposed in the insulating core layer, and which has a coefficient of thermal expansion (CTE) different from a coefficient of thermal expansion of the insulating core layer; a first substrate portion including a first insulating layer disposed on the first surface and a first circuit wiring embedded in the first insulating layer; and a second substrate portion including a second insulating layer disposed on the second surface and a second circuit wiring embedded in the second insulating layer.
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Description

Technical Field

[0001] The present disclosure relates to a circuit board and a method of manufacturing the circuit board. Background Art

[0002] As the performance of electronic devices has been improved with the development of the electronics industry, semiconductor packages are required to be miniaturized, thinned and high-density. In order to make the package high-density, the number of integrated circuits (ICs) that need to be installed has increased. In addition, in order to realize multiple functions with a circuit board of limited size, the ball pitch of the IC has gradually decreased.

[0003] As the above-mentioned technology of implementing multiple functions with a circuit board of limited size develops, the risk of reduced yield due to warpage during product manufacturing increases. For this reason, it is becoming increasingly important to develop technology for reducing such warpage. Summary of the invention

[0004] At least one embodiment is directed to providing a circuit board and a method of manufacturing the circuit board capable of reducing the risk of warping.

[0005] However, the problems to be solved by the embodiments are not limited to the above-mentioned objects, and various extensions can be made within the scope of the technical spirit included in the embodiments.

[0006] An embodiment provides a circuit board, comprising: an insulating core layer having a first surface and a second surface opposite to each other; an insulating auxiliary component, at least a portion of which is disposed in the insulating core layer, and the insulating auxiliary component has a thermal expansion coefficient (CTE) different from that of the insulating core layer; a first substrate portion comprising a first insulating layer disposed on the first surface and a first circuit wiring embedded in the first insulating layer; and a second substrate portion comprising a second insulating layer disposed on the second surface and a second circuit wiring embedded in the second insulating layer.

[0007] The CTE of the insulating auxiliary member may be higher than the CTE of the insulating core layer.

[0008] At least a portion of the insulation auxiliary member may be disposed between a center line of the insulation core layer and the first surface.

[0009] The insulating core layer may have a recessed portion provided in the first surface, and the insulating auxiliary member may be provided in the recessed portion.

[0010] The number of the recesses may be two or more, and the recesses may have an array structure.

[0011] The recess may have a groove structure.

[0012] The number of the recessed portions may be two or more, and the recessed portions may have portions intersecting each other.

[0013] The CTE of the first substrate portion and the CTE of the second substrate portion may be different from each other.

[0014] The CTE of the first substrate portion may be smaller than the CTE of the second substrate portion.

[0015] The first substrate portion may further include a first connection pad disposed on a surface of the first insulating layer, and the second substrate portion may further include a second connection pad disposed on a surface of the second insulating layer.

[0016] The inorganic filler content of the first insulating layer may be higher than the inorganic filler content of the second insulating layer.

[0017] The circuit board may further include: a first protection layer disposed on the first insulating layer and having a first opening overlapping the first connection pad; and a second protection layer disposed on the second insulating layer and having a second opening overlapping the second connection pad.

[0018] The insulation auxiliary member may be provided in only one of the first surface and the second surface of the insulation core layer.

[0019] The insulation auxiliary member may include a plurality of portions spaced apart from each other.

[0020] A CTE difference between portions of the first substrate portion and the second substrate portion that overlap each other in a direction perpendicular to the first surface and are disposed in a first region of the circuit board may be greater than a CTE difference between portions of the first substrate portion and the second substrate portion that overlap each other in a direction perpendicular to the first surface and are disposed in a second region of the circuit board. In the first region and the second region of the circuit board, the insulating auxiliary member may be disposed only in the first region.

[0021] Another embodiment provides a method for manufacturing a circuit board, the method comprising: forming a recess in the first surface of an insulating core layer having a first surface and a second surface opposite to each other; disposing an insulating auxiliary member having a CTE different from the CTE of the insulating core layer in the recess; forming a first circuit wiring and a first insulating layer on the first surface of the insulating core layer; and forming a second circuit wiring and a second insulating layer on the second surface of the insulating core layer.

[0022] The step of providing the insulating auxiliary member may include providing an insulating material having a CTE higher than that of the insulating core layer in the recess.

[0023] The step of forming the recess in the first surface of the insulating core layer may include drilling the insulating core layer with a laser in a first direction perpendicular to the first surface to a depth less than or equal to half the thickness of the insulating core layer.

[0024] The step of forming the recess in the first surface of the insulating core layer may include: forming a through hole in a first sub-insulating core layer; and bonding the first sub-insulating core layer to a second sub-insulating core layer.

[0025] The step of bonding the first sub-insulation core layer to the second sub-insulation core layer may include providing an adhesive layer between the first sub-insulation core layer and the second sub-insulation core layer.

[0026] According to at least one embodiment, the imbalance of the thermal expansion coefficient between the upper and lower portions of the circuit board with respect to the center line can be alleviated, whereby the warping phenomenon can be dealt with.

[0027] However, the effects of the embodiment are not limited to the above-described effects, and it is easily understood that various extensions can be made without departing from the spirit and scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 is a cross-sectional view showing a circuit board according to an embodiment.

[0029] FIG. 2A to FIG. 2D It is shown Figure 1 The illustrated plan views are of various examples of insulating auxiliary members disposed in the insulating core layer.

[0030] Figure 3 It is shown Figure 1 A cross-sectional view of a variation of the circuit board is shown.

[0031] Figures 4 to 11 is a cross-sectional view illustrating a method of manufacturing a circuit board according to an embodiment. DETAILED DESCRIPTION

[0032] In the following detailed description, only specific embodiments of the present disclosure are shown and described briefly by way of illustration. The present disclosure can be implemented in various ways and is not limited to the following embodiments.

[0033] The drawings and description are to be regarded as illustrative in nature and not restrictive.Throughout the specification, like reference numerals refer to like elements.

[0034] In addition, for ease of understanding and description, the size (such as thickness) of each structure shown in the drawings is arbitrarily shown, but the present disclosure is not limited thereto. In the drawings, the size (such as thickness) of layers, films, plates, regions, etc. is exaggerated for clarity.

[0035] The accompanying drawings are provided to help easily understand the embodiments disclosed in this specification, and the technical spirit disclosed in this specification is not limited by the accompanying drawings, and it should be understood that the present disclosure includes all modifications, equivalents, and alternatives that fall within the spirit and technical scope of the present disclosure.

[0036] Terms including ordinal numbers such as "first" and "second" are used to describe various constituent elements, but the constituent elements are not limited by the terms. The terms are used only to distinguish one constituent element from another constituent element.

[0037] In addition, it should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements. In addition, when an element is "on" a reference portion, the element is located above or below the reference portion, and it does not necessarily mean that the element is located "above" or "on" in a direction opposite to the direction of gravity.

[0038] In the present disclosure, it should be understood that the terms "include" and "have" are intended to specify the existence of the features, quantities, steps, operations, constituent elements and components or combinations thereof described in the specification, and do not exclude the feasibility of pre-existing or adding one or more other features, quantities, steps, operations, constituent elements and components or combinations thereof. Therefore, unless explicitly described to the contrary, the word "include" and its variations (such as "comprises" and "containing") will be understood to imply the inclusion of the stated elements but not the exclusion of any other elements.

[0039] Furthermore, throughout the specification, the term “on a plane” refers to a case where the target portion is viewed from above, and the term “on a cross section” refers to a case where a cross section obtained by vertically cutting the target portion is viewed from the side.

[0040] Furthermore, throughout the specification, when referred to as “connected,” it not only means that two or more constituent elements are directly connected, but may also mean that two or more constituent elements are indirectly connected via another constituent element, and may also mean that two or more constituent elements are physically connected, electrically connected, or integrated, although the two or more constituent elements are referred to by different names depending on position and function.

[0041] Throughout the specification, a plate has a structure that is wide in a plan view and thin in a cross-sectional view, and the “plane direction of the plate” may refer to a direction parallel to the wide and flat surface of the plate, and the “thickness direction of the plate” may refer to a direction perpendicular to the wide and flat surface of the plate.

[0042] Hereinafter, various embodiments and modifications are described in detail with reference to the accompanying drawings.

[0043] Figure 1 is a cross-sectional view showing a circuit board according to an embodiment.

[0044] Reference Figure 1 The circuit board according to the present embodiment may include an insulating core layer 100 , a first substrate portion 200 disposed on the insulating core layer 100 , a second substrate portion 300 disposed below the insulating core layer 100 , and an insulating auxiliary member 400 disposed in the insulating core layer 100 .

[0045] The insulating core layer 100 may have a predetermined area and a predetermined thickness. The insulating core layer 100 may have a first surface 100a and a second surface 100b opposite to each other. The insulating core layer 100 may have a structure that is wide in a plan view and thin in a cross-sectional view. A direction perpendicular to the first surface 100a or the second surface 100b may refer to a direction perpendicular to a wide and flat surface of the insulating core layer 100.

[0046] The insulating core layer 100 may include a thermosetting resin such as epoxy resin, polyimide, etc., and / or a thermoplastic resin such as polyethylene (PE), polycarbonate (PC), polyvinyl chloride (PVC), etc., and may include a resin including a reinforcing material such as glass fiber or an inorganic filler, etc. For example, the insulating core layer 100 may include a prepreg, an Ajinomoto build-up film (ABF), a photosensitive dielectric (PID), a bismaleimide triazine (BT) resin, etc.

[0047] The insulating core layer 100 may include a first insulating core layer 110 disposed from a center line CL of the insulating core layer 100 to a first surface 100a and a second insulating core layer 120 disposed from the center line CL to a second surface 100b. The insulating core layer 100 may have a recess DT formed from the first surface 100a in some portions of the insulating core layer 100. The recess DT may be formed in the first insulating core layer 110. The depth of the recess DT measured in a first direction perpendicular to the first surface 100a may be less than or equal to half of the thickness of the insulating core layer 100 measured in the first direction. In other words, the recess DT may be formed in the first insulating core layer 110 and may not extend into the second insulating core layer 120.

[0048] The first substrate portion 200 may be disposed on the first surface 100a of the insulating core layer 100. The first substrate portion 200 may include a first circuit wiring 210, a first insulating layer 230, a first connection pad 250, and a first protective layer 270.

[0049] The first circuit wiring 210 may be disposed on the first surface 100a of the insulating core layer 100. The first circuit wiring 210 may transmit electrical signals. The first circuit wiring 210 may be arranged in various patterns. The first circuit wiring 210 may include a conductive material, such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof.

[0050] exist Figure 1 , a wiring layer is shown to be disposed on the first surface 100a as the first circuit wiring 210; however, the first circuit wiring 210 is not limited thereto and may be composed of a plurality of wiring layers. In other words, the first circuit wiring 210 may include a wiring layer located on the first surface 100a and one or more wiring layers disposed above the wiring layer located on the first surface 100a, which also falls within the scope of the present disclosure. The wiring layers may be connected to each other through via layers.

[0051] The first insulating layer 230 may be disposed on the first surface 100a of the insulating core layer 100. The first circuit wiring 210 may be embedded in the first insulating layer 230. The first insulating layer 230 may include a thermosetting resin such as epoxy resin, polyimide, etc., and / or a thermoplastic resin such as polyethylene (PE), polycarbonate (PC), polyvinyl chloride (PVC), etc. In addition, the first insulating layer 230 may include a resin including a reinforcing material such as glass fiber or an inorganic filler. For example, the first insulating layer 230 may include a prepreg, an Ajinomoto deposited film (ABF), a photosensitive dielectric (PID), etc., but is not limited thereto.

[0052] The first connection pads 250 may be disposed on the first insulating layer 230. In other words, the first connection pads 250 may be disposed on the surface of the first insulating layer 230. The surface of the first insulating layer 230 may refer to a side of the first insulating layer 230 opposite to a side of the first insulating layer 230 contacting the first surface 100a. The first connection pads 250 may be arranged in various patterns on the first insulating layer 230. The first connection pads 250 may include a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof.

[0053] Although not shown in the drawings, a via hole may be formed in the first insulating layer 230 to electrically connect the first circuit wiring 210 with the first connection pad 250. For example, the via hole may contain copper (Cu), silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), alloys thereof, etc. The via hole may be formed using the same material as that of the first circuit wiring 210.

[0054] The first protective layer 270 may be disposed on the first insulating layer 230. The first protective layer 270 may include an insulating material such as a solder resist. The first protective layer 270 may have a first opening 275 overlapping the first connection pad 250. In other words, the first connection pad 250 may be exposed to the outside through the first opening 275.

[0055] The second substrate portion 300 may be disposed on the second surface 100b of the insulating core layer 100. The second substrate portion 300 may include a second circuit wiring 310, a second insulating layer 330, a second connection pad 350, and a second protective layer 370.

[0056] The second circuit wiring 310 may be disposed on the second surface 100b of the insulating core layer 100. The second circuit wiring 310 may transmit electrical signals. The second circuit wiring 310 may be arranged in various patterns. The second circuit wiring 310 may include a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti) or an alloy thereof.

[0057] exist Figure 1 , a wiring layer is shown to be disposed on the second surface 100b as the second circuit wiring 310; however, the second circuit wiring 310 is not limited thereto and may be composed of a plurality of wiring layers. In other words, the second circuit wiring 310 may include a wiring layer located on the second surface 100b and one or more wiring layers disposed below the wiring layer located on the second surface 100b, which also falls within the scope of the present disclosure. The wiring layers may be connected to each other through via layers.

[0058] The second insulating layer 330 may be disposed below the insulating core layer 100. The second circuit wiring 310 may be embedded in the second insulating layer 330. The second insulating layer 330 may include a thermosetting resin such as epoxy resin, polyimide, etc., and / or a thermoplastic resin such as polyethylene (PE), polycarbonate (PC), polyvinyl chloride (PVC), etc. In addition, the second insulating layer 330 may include a resin including a reinforcing material such as glass fiber or an inorganic filler. For example, the second insulating layer 330 may include a prepreg, an Ajinomoto deposited film (ABF), a photosensitive dielectric (PID), etc., but is not limited thereto.

[0059] The second connection pads 350 may be disposed under the second insulating layer 330. In other words, the second connection pads 350 may be disposed on the surface of the second insulating layer 330. The surface of the second insulating layer 330 may refer to a side of the second insulating layer 330 opposite to a side of the second insulating layer 330 contacting the second surface 100b. The second connection pads 350 may be arranged in various patterns under the second insulating layer 330. The second connection pads 350 may include a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof.

[0060] Although not shown in the drawings, a via hole may be formed in the second insulating layer 330 to electrically connect the second circuit wiring 310 with the second connection pad 350. For example, the via hole may contain copper (Cu), silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), alloys thereof, etc. The via hole may be formed using the same material as that of the second circuit wiring 310.

[0061] The second protective layer 370 may be disposed under the second insulating layer 330. The second protective layer 370 may include an insulating material such as a solder resist. The second protective layer 370 may have a second opening 375 overlapping the second connection pad 350. In other words, the second connection pad 350 may be exposed to the outside through the second opening 375.

[0062] The coefficient of thermal expansion (CTE) of the first substrate part 200 and the coefficient of thermal expansion (CTE) of the second substrate part 300 may be different from each other. The CTE of the first substrate part 200 and the CTE of the second substrate part 300 may be measured by a CTE measuring device (such as a thermomechanical analyzer (TMA), a dilatometer, etc.). For example, the CTE may be obtained by measuring the expansion length or contraction length of the first substrate part 200 and the second substrate part 300 in the plane direction of the circuit board (i.e., in a direction parallel to the wide and flat surface of the circuit board) by the CTE measuring device. Alternatively, the CTE of the first substrate part 200 and the CTE of the second substrate part 300 may be obtained by measuring the expansion length or contraction length of each of the first circuit wiring 210, the first insulating layer 230, the first connection pad 250 and the first protective layer 270 of the first substrate part 200 and the second circuit wiring 310, the second insulating layer 330, the second connection pad 350 and the second protective layer 370 of the second substrate part 300 in the plane direction of the circuit board. The CTE of the first substrate portion 200 and the CTE of the second substrate portion 300 are weighted averages of the CTEs of the respective components. In other words, the CTE of the first substrate portion 200 may be a weighted average of the CTE of the first circuit wiring 210, the CTE of the first insulating layer 230, the CTE of the first connection pad 250, and the CTE of the first protective layer 270, and the CTE of the second substrate portion 300 may be a weighted average of the CTE of the second circuit wiring 310, the CTE of the second insulating layer 330, the CTE of the second connection pad 350, and the CTE of the second protective layer 370. According to the configuration of the first substrate portion 200 and the second substrate portion 300, the weighted average of the CTE of the first circuit wiring 210 and the CTE of the first insulating layer 230 may be used as the CTE of the first substrate portion 200, and the weighted average of the CTE of the second circuit wiring 310 and the CTE of the second insulating layer 330 may be used as the CTE of the second substrate portion 300. In order to measure the CTE of the first substrate portion 200 and the CTE of the second substrate portion 300 , a sample may be used, and displacement may be measured by expanding or contracting the sample.

[0063] The difference in CTE between the first substrate portion 200 and the second substrate portion 300 may be caused by various factors including differences in materials, circuit wiring, or the content of inorganic fillers in the insulating layer. As an example, the area of ​​the second circuit wiring 310 may be smaller than the area of ​​the first circuit wiring 210, so that the CTE of the second substrate portion 300 may be greater than the CTE of the first substrate portion 200. Alternatively, the number of wiring layers constituting the second circuit wiring 310 may be greater than the number of wiring layers constituting the first circuit wiring 210, so that the area of ​​the second circuit wiring 310 may be greater than the area of ​​the first circuit wiring 210. As another example, the content of inorganic fillers in the first insulating layer 230 may be higher than the content of inorganic fillers in the second insulating layer 330, so that the CTE of the first substrate portion 200 may be less than the CTE of the second substrate portion 300.

[0064] At least some portions of the insulating auxiliary member 400 may be disposed in the insulating core layer 100. The insulating auxiliary member 400 may include a portion disposed in the first insulating core layer 110. In other words, the insulating auxiliary member 400 may include a portion disposed between the center line CL of the insulating core layer 100 and the first surface 100a.

[0065] The insulating auxiliary member 400 may be disposed in the recess DT of the insulating core layer 100. The upper surface 400a of the insulating auxiliary member 400 may be formed to be substantially at the same height as the first surface 100a, but is not limited thereto. The upper surface 400a of the insulating auxiliary member 400 or a portion including the upper surface 400a may be exposed from the insulating core layer 100, and the first substrate portion 200 may cover the exposed portion.

[0066] The insulating auxiliary member 400 may include an insulating material, and may be formed using a material different from that of the insulating core layer 100. The insulating auxiliary member 400 and the insulating core layer 100 may have coefficients of thermal expansion (CTE) different from each other.

[0067] For example, the insulating auxiliary member 400 may include an insulating resin material having a CTE higher than that of the insulating core layer 100. Therefore, the CTE formed by the insulating auxiliary member 400 and the first insulating core layer 110 together may be higher than the CTE formed by the second insulating core layer 120 alone. In this case, the CTE formed by the insulating auxiliary member 400 and the first insulating core layer 110 together may be a weighted average of the CTE of the insulating auxiliary member 400 and the CTE of the first insulating core layer 110. The insulating auxiliary member 400 may be arranged on the entire circuit board in a plan view.

[0068] The insulating auxiliary member 400 may compensate for the imbalance of CTE between the first substrate portion 200 and the second substrate portion 300. For example, when the CTE of the second substrate portion 300 is higher than the CTE of the first substrate portion 200 and there is a risk of warping due to the imbalance of CTE, the insulating auxiliary member 400 having a CTE higher than the CTE of the insulating core layer 100 may be disposed in the first insulating core layer 110, so that the imbalance of CTE may be eliminated or alleviated. In other words, when the CTE of the first substrate portion 200 is lower than the CTE of the second substrate portion 300, the insulating auxiliary member 400 having a CTE higher than the CTE of the insulating core layer 100 may be disposed in the first insulating core layer 110 so that the CTEs of the upper and lower portions relative to the center line CL are equal or close to each other.

[0069] FIG. 2A to FIG. 2D It is shown Figure 1 The illustrated plan views are of various examples of insulating auxiliary members disposed in the insulating core layer.

[0070] The insulating auxiliary member 400 may have a predetermined area and a predetermined thickness. The insulating auxiliary member 400 may have a plate structure and may be circular, elliptical, or polygonal in a plan view. FIG. 2A to FIG. 2D , the insulating auxiliary members 400 may be arranged to form a predetermined pattern. The number of recesses DT may be two or more. The insulating auxiliary member includes a plurality of parts spaced apart from each other. As an example, the insulating auxiliary members 400 may be arranged in an array structure (see Figure 2A and Figure 2B Alternatively, the insulating auxiliary member 400 may be formed in an elongated form, and the recess DT may be formed in a groove structure in the form of an elongated groove (see Figure 2C ). The insulating auxiliary members 400 may have an elongated structure and be arranged to intersect (see Figure 2D ). However, the arrangement of the insulating auxiliary member 400 is not limited to FIG. 2A to FIG. 2D The structure shown, and the insulating auxiliary member 400 may be formed in various patterns.

[0071] Figure 3 It is shown Figure 1 A cross-sectional view of a variation of the circuit board is shown.

[0072] Similar to Figure 1 The circuit board shown in Figure 3The circuit board shown in the figure basically has a laminated structure. In other words, the circuit board according to the modification includes an insulating core layer 100, a first substrate portion 200 disposed on the insulating core layer 100, a second substrate portion 300 disposed below the insulating core layer 100, and an insulating auxiliary member 400 disposed in the insulating core layer 100. The first substrate portion 200 may include a first circuit wiring 210, a first insulating layer 230, a first connecting pad 250, and a first protective layer 270. The second substrate portion 300 may include a second circuit wiring 310, a second insulating layer 330, a second connecting pad 350, and a second protective layer 370.

[0073] The insulating auxiliary member 400 may be disposed in some parts of the circuit board in a plan view. The imbalance of the CTE between the preset first substrate portion 200 and the second substrate portion 300 may be calculated. When the CTE difference between some parts of the first substrate portion 200 and the second substrate portion 300 is large, the insulating auxiliary member 400 may be arranged in the corresponding part, so that the occurrence of complex warping such as saddle warping may be prevented. In order to calculate the CTE of the first substrate portion 200 and the CTE of the second substrate portion 300, a Gerber file or the like may be used.

[0074] For example, refer to Figure 3 When the CTE imbalance between the portions of the first substrate portion 200 and the second substrate portion 300 overlapping each other in the first direction perpendicular to the first surface 100a in the P1 portion is large, the insulating auxiliary member 400 may be arranged in the second insulating core layer 120 in the P1 portion, thereby alleviating the CTE imbalance.

[0075] Figures 4 to 11 is a cross-sectional view showing a method for manufacturing a circuit board according to an embodiment. Figures 1 to 3 And refer to Figures 4 to 11 A method of manufacturing a circuit board according to an embodiment is described.

[0076] Reference Figure 4 First, the insulating core layer 100 is prepared. For example, in order to prepare the insulating core layer 100, a copper clad laminate (CCL) may be used, which includes a prepreg and a thin metal layer MS formed on one or both sides of the prepreg, and the prepreg can form the insulating core layer 100.

[0077] Reference Figure 5 , a recess DT is formed in the insulating core layer 100. The recess DT may be formed in the first surface 100a. As an example, the recess DT may have a plate structure and may be formed in a circular, elliptical, or polygonal shape in a plan view. As another example, the recess DT may be formed in a groove structure.

[0078] Figure 6 and Figure 7 It is shown Figure 5 A plan view of a method for forming the recessed portion DT.

[0079] like Figure 6 As shown, the recess DT may be formed by punching the insulating core layer 100 to a predetermined depth. As an example, the recess DT may be formed by laser. The recess DT may be formed such that the depth of the recess DT measured in the first direction is less than or equal to half the thickness of the insulating core layer 100.

[0080] As another example, Figure 7 As shown, in order to form the insulating core layer 100, a first sub-insulating core layer SC1 and a second sub-insulating core layer SC2 may be prepared. The thickness of the first sub-insulating core layer SC1 may be less than or equal to the thickness of the second sub-insulating core layer SC2. A through hole PH may be formed to pass through the first sub-insulating core layer SC1. In order to form the through hole PH, a drill or a punch may be used. Next, the first sub-insulating core layer SC1 is bonded to the second sub-insulating core layer SC2. In order to bond, an adhesive layer AL may be provided between the first sub-insulating core layer SC1 and the second sub-insulating core layer SC2, and the first sub-insulating core layer SC1 and the second sub-insulating core layer SC2 may be bonded through the adhesive layer AL, thereby forming the insulating core layer 100.

[0081] Reference Figure 8 , an insulating auxiliary member 400 is disposed in the recess DT. The insulating auxiliary member 400 may be formed in the recess DT and may also protrude from the recess DT. The insulating auxiliary member 400 may be formed using an insulating material having a CTE higher than the CTE of the insulating core layer 100. Depending on the difference in CTE between the first substrate portion 200 and the second substrate portion 300, the insulating auxiliary member 400 may have various shapes and sizes and may be arranged in various patterns. In an embodiment, it is shown that the insulating auxiliary member 400 is formed at a height with the first surface 100a; however, the insulating auxiliary member is not limited thereto. For example, the insulating auxiliary member 400 may be formed by filling the recess DT with an insulating material having a CTE higher than the CTE of the insulating core layer 100.

[0082] Reference Fig. 9 , a first circuit wiring 210 is formed on a first surface 100a of an insulating core layer 100, and a second circuit wiring 310 is formed on a second surface 100b of the insulating core layer 100. On the insulating core layer 100, a plating resist may be stacked, and exposure and development may be performed to remove only a portion where the first circuit wiring 210 is to be formed, thereby forming a plating resist pattern. Then, a conductive metal may be stacked on a portion without a plating resist pattern. In this way, the first circuit wiring 210 may be formed. In a similar manner, the second circuit wiring 310 may be formed. For example, the second circuit wiring 310 may be formed by a thin metal layer MS.

[0083] Reference Fig.10 , a first insulating layer 230 is formed on the first surface 100 a of the insulating core layer 100 to cover the first circuit wiring 210 , and a second insulating layer 330 is formed on the second surface 100 b of the insulating core layer 100 to cover the second circuit wiring 310 .

[0084] Although not shown in the drawings, via holes may be formed in the first insulating layer 230 and the second insulating layer 330 to be connected to the first circuit wiring 210 and the second circuit wiring 310 , respectively.

[0085] exist Fig. 9 and Fig.10 , it is shown that as each of the first circuit wiring 210, the first insulating layer 230, the second circuit wiring 310, and the second insulating layer 330, one layer is stacked; however, they are not limited thereto. In other words, other circuit wiring layers and other insulating layers may be stacked on the stacked insulating layers, and such stacking may be repeated. In addition, stacking may be performed so that the number of circuit wiring layers included in the first circuit wiring 210 is different from the number of circuit wiring layers included in the second circuit wiring 310.

[0086] Then, if Fig.11 As shown, a first connection pad 250 is formed on the first insulating layer 230, and a second connection pad 350 is formed on the second insulating layer 330. The first connection pad 250 and the second connection pad 350 may be formed in a manner similar to the above-described manner in which the first circuit wiring 210 and the second circuit wiring 310 are formed.

[0087] Then, refer again Figure 1 , a first protection layer 270 having a first opening 275 may be formed on the first insulating layer 230 , and a second protection layer 370 having a second opening 375 may be formed under the second insulating layer 330 .

[0088] While the invention has been described in conjunction with what are presently considered to be practical embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A circuit board, include: an insulating core layer having a first surface and a second surface opposite to each other; an insulating auxiliary member, at least a portion of which is disposed in the insulating core layer, and the insulating auxiliary member has a thermal expansion coefficient different from that of the insulating core layer; A first substrate portion including a first insulating layer disposed on the first surface and a first circuit wiring embedded in the first insulating layer; as well as The second substrate portion includes a second insulating layer disposed on the second surface and a second circuit wiring embedded in the second insulating layer.

2. The circuit board according to claim 1, in, The thermal expansion coefficient of the insulation auxiliary member is higher than the thermal expansion coefficient of the insulation core layer.

3. The circuit board according to claim 1, in, At least a portion of the insulation auxiliary member is disposed between a center line of the insulation core layer and the first surface.

4. The circuit board according to claim 3, in, The insulating core layer has a recessed portion disposed in the first surface, and The insulation auxiliary member is disposed in the recess.

5. The circuit board according to claim 4, in, The number of the recesses is two or more, The recesses have an array structure.

6. The circuit board according to claim 4, in, The recess has a groove structure.

7. The circuit board according to claim 6, in, The number of the recesses is two or more, and The recessed portions have portions intersecting each other.

8. The circuit board according to claim 1, in, A thermal expansion coefficient of the first substrate portion and a thermal expansion coefficient of the second substrate portion are different from each other.

9. The circuit board according to claim 8, in, The first substrate portion has a smaller thermal expansion coefficient than the second substrate portion.

10. The circuit board according to claim 1, in, The first substrate portion further includes a first connection pad disposed on a surface of the first insulating layer, and The second substrate portion further includes a second connection pad disposed on a surface of the second insulating layer.

11. The circuit board according to claim 1, in, The inorganic filler content of the first insulating layer is higher than that of the second insulating layer.

12. The circuit board according to claim 10, further comprising: include: a first protection layer, disposed on the first insulating layer and having a first opening overlapping the first connection pad; as well as The second protection layer is disposed on the second insulating layer and has a second opening overlapping the second connection pad.

13. The circuit board according to claim 1, in, The insulation auxiliary member is provided in only one of the first surface and the second surface of the insulation core layer.

14. The circuit board according to claim 1, in, The insulation auxiliary member includes a plurality of portions spaced apart from each other.

15. The circuit board according to claim 1, in, a difference in thermal expansion coefficients between portions of the first substrate portion and the second substrate portion which overlap each other in a direction perpendicular to the first surface and are disposed in a first region of the circuit board is greater than a difference in thermal expansion coefficients between portions of the first substrate portion and the second substrate portion which overlap each other in a direction perpendicular to the first surface and are disposed in a second region of the circuit board, and Of the first and second regions of the circuit board, the insulation auxiliary member is provided only in the first region.

16. A method for manufacturing a circuit board, the method include: forming a recess in the first surface of an insulating core layer having a first surface and a second surface opposite to each other; providing an insulating auxiliary member having a thermal expansion coefficient different from that of the insulating core layer in the recess; forming a first circuit wiring and a first insulating layer on the first surface of the insulating core layer; as well as A second circuit wiring and a second insulating layer are formed on the second surface of the insulating core layer.

17. The method for manufacturing a circuit board according to claim 16, in, The step of providing the insulation auxiliary member includes providing an insulation material having a higher thermal expansion coefficient than that of the insulation core layer in the recess.

18. The method for manufacturing a circuit board according to claim 16, in, The step of forming the recess in the first surface of the insulating core layer includes drilling the insulating core layer with a laser in a first direction perpendicular to the first surface to a depth less than or equal to half the thickness of the insulating core layer.

19. The method for manufacturing a circuit board according to claim 16, in, The step of forming the recess in the first surface of the insulating core layer comprises the following operations: forming a through hole in the first sub-insulating core layer; and The first sub-insulating core layer is bonded to the second sub-insulating core layer.

20. The method for manufacturing a circuit board according to claim 19, in, The step of bonding the first sub-insulating core layer to the second sub-insulating core layer includes providing an adhesive layer between the first sub-insulating core layer and the second sub-insulating core layer.