Method for improving damage to floating gate polycrystalline silicon in etching process
By forming a gradually reduced carbon doped deposition gradient and a silicon oxide and silicon nitride stack on the floating gate, the problem of floating gate polysilicon damage during the etching process is solved, and the stability and product reliability of the floating gate are improved.
Patent Information
- Application Number
- CN202310699681.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-13
- Publication Date
- 2024-12-13
AI Technical Summary
During the etching process, the middle and lower parts of the floating gate polysilicon are easily damaged, and the prior art is difficult to effectively protect its stability.
By forming a tunneled oxide layer on the floating gate and performing a gradually reduced carbon doped deposition gradient thereon, a stack of silicon oxide and silicon nitride is formed, and finally a control gate is formed to improve the hardness and stability of the floating gate. .
It effectively increases the hardness of the middle and lower part of the floating gate, improves the stability of the floating gate, prevents damage during subsequent etching, and thus improves product reliability.
Smart Images
Figure CN119136547A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor technology, and in particular to a method for improving damage to floating gate polysilicon during etching. Background Art
[0002] In order to meet the device requirements of 1x NAND, the current 1x NAND active area is etched in steps, and then an ion implantation is added between the two steps. Two-step etching will have higher requirements on the stability of the floating gate polysilicon. The existing technology is to add carbon at the bottom 200A during floating gate deposition to increase the hardness of the floating gate, so that it has a certain stability and prevents the floating gate from being damaged in subsequent etching. Through reliability testing, new problems were found in the slices of failure analysis. The floating gate polysilicon has a waisted phenomenon. The bottom of the floating gate is not damaged, but the middle and lower parts are damaged in the subsequent etching process. How to protect the middle and lower parts of the floating gate polysilicon from being damaged in the subsequent etching process has become an urgent problem to be solved. Summary of the invention
[0003] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for improving the damage to floating gate polysilicon during etching, so as to solve the problem of damage to floating gate polysilicon during etching in the prior art.
[0004] To achieve the above-mentioned object and other related objects, the present invention provides a method for improving damage to floating gate polysilicon during etching, which at least comprises:
[0005] Step 1: providing a tunneling oxide layer, and forming a floating gate on the tunneling oxide layer; the thickness of the floating gate is greater than Wherein from the bottom of the floating gate to The area of thickness is the first area; The area above the thickness is the second area;
[0006] Step 2: Carbon doping is performed on the first region of the floating gate, and the carbon doping amount is from the bottom of the floating gate to A gradually decreasing gradient is formed in the vertical direction of the thickness, and the second region is not carbon-doped;
[0007] Step 3, forming a stacked layer consisting of silicon oxide, silicon nitride, and silicon oxide on the floating gate;
[0008] Step 4: forming a control gate on the stack.
[0009] Preferably, the floating gate in step one is polysilicon.
[0010] Preferably, the method for forming the floating gate in step 1 is a deposition method.
[0011] Preferably, in the process of carbon doping and deposition on the first region in step 2, the carbon doping amount is from the bottom of the floating gate to The vertical direction of the thickness forms first to fourth gradients in sequence.
[0012] Preferably, the carbon addition amount in step 2 decreases in equal amounts from the first gradient to the fourth gradient.
[0013] Preferably, in step 2, the carbon doping amount decreases by 50 sccm from the first gradient to the fourth gradient.
[0014] Preferably, in step 2, the carbon doping amounts of the first to fourth gradients are 200 sccm, 150 sccm, 100 sccm and 50 sccm respectively.
[0015] As described above, the method of improving damage to floating gate polysilicon during etching of the present invention has the following beneficial effects: the present invention adopts a method of gradual carbon doping deposition of the floating gate to increase the hardness of the middle and lower parts of the floating gate, improve the stability of the floating gate, and protect it from damage during subsequent etching processes, thereby improving the reliability of the product. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 Shown is a schematic diagram of floating gate division areas and carbon doping distribution in the present invention;
[0017] Figure 2 The flowchart of the method for improving the damage to floating gate polysilicon during etching process of the present invention is shown. DETAILED DESCRIPTION
[0018] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0019] See also Figure 1 to Figure 2 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0020] The present invention provides a method for improving the damage to floating gate polysilicon during etching, such as Figure 2 As shown, Figure 2The flowchart of the method for improving the damage to floating gate polysilicon during etching of the present invention is shown, and the method at least comprises the following steps:
[0021] Step 1: providing a tunneling oxide layer, and forming a floating gate on the tunneling oxide layer; the thickness of the floating gate is greater than Wherein from the bottom of the floating gate to The area of thickness is the first area; The area above the thickness is the second area; Figure 1 As shown, Figure 1 The floating gate is divided into regions and carbon doping distribution diagram in the present invention. The thickness of the floating gate in step 1 is greater than Refers to the thickness from the bottom of the floating gate to its top Above. Wherein from the bottom of the floating gate to The area of thickness is the first area; The area above the thickness is the second area 05 .
[0022] According to the present invention, the floating gate in step 1 of this embodiment is polysilicon.
[0023] Furthermore, in the present invention, the method for forming the floating gate in step 1 of this embodiment is a deposition method.
[0024] Step 2: Carbon doping is performed on the first region of the floating gate, and the carbon doping amount is from the bottom of the floating gate to A gradually decreasing gradient is formed in the vertical direction of the thickness, and the second region is not carbon-doped; Figure 1 As shown, in step 2, carbon doping is performed on the first region of the floating gate, and the carbon doping amount is from the bottom of the floating gate to The thickness forms a gradually decreasing gradient in the vertical direction, and the second region 05 is not carbon-doped, that is, The area above the thickness is not doped with carbon.
[0025] The present invention further comprises that in the process of carbon doping and deposition on the first region in step 2 of this embodiment, the carbon doping amount is from the bottom of the floating gate to The vertical direction of the thickness forms the first to fourth gradients in sequence. The carbon doping amount increases from the bottom of the floating gate to The vertical direction of the thickness forms a first gradient 01, a second gradient 02, a third gradient 03 and a fourth gradient 04 in sequence, wherein the thicknesses of the first to fourth gradients 01 are respectively
[0026] Furthermore, in the present invention, the carbon addition amount in step 2 of this embodiment is reduced in equal amounts from the first gradient to the fourth gradient.
[0027] In the present invention, the carbon doping amount in step 2 of this embodiment is reduced by 50 sccm from the first gradient to the fourth gradient. Figure 1 As shown, further, in step 2 of this embodiment, the carbon doping amounts of the first to fourth gradients are 200 sccm, 150 sccm, 100 sccm, and 50 sccm, respectively.
[0028] Step 3, forming a stacked layer consisting of silicon oxide, silicon nitride, and silicon oxide on the floating gate;
[0029] Step 4: forming a control gate on the stack.
[0030] In summary, the present invention adopts the method of gradual carbon doping deposition of the floating gate to increase the hardness of the middle and lower part of the floating gate, improve the stability of the floating gate, and protect it from being damaged in the subsequent etching process, thereby improving the reliability of the product. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.
[0031] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A method for improving damage to floating gate polysilicon during etching, characterized in that: At least: Step 1: providing a tunneling oxide layer, and forming a floating gate on the tunneling oxide layer; the thickness of the floating gate is greater than Wherein from the bottom of the floating gate to The area of thickness is the first area; The area above the thickness is the second area; Step 2: Carbon doping is performed on the first region of the floating gate, and the carbon doping amount is from the bottom of the floating gate to A gradually decreasing gradient is formed in the vertical direction of the thickness, and the second region is not carbon-doped; Step 3, forming a stack of silicon oxide, silicon nitride, and silicon oxide on the floating gate; Step 4: forming a control gate on the stack.
2. The method for improving damage to floating gate polysilicon during etching according to claim 1, characterized in that: The floating gate in step one is polysilicon.
3. The method for improving damage to floating gate polysilicon during etching according to claim 1, characterized in that: The method for forming the floating gate in step 1 is a deposition method.
4. The method for improving damage to floating gate polysilicon during etching according to claim 1, characterized in that: In the process of carbon doping and deposition in the first region in step 2, the carbon doping amount is from the bottom of the floating gate to The vertical direction of the thickness forms first to fourth gradients in sequence.
5. The method for improving damage to floating gate polysilicon during etching according to claim 4, characterized in that: In step 2, the carbon addition amount decreases in equal amounts from the first gradient to the fourth gradient.
6. The method for improving damage to floating gate polysilicon during etching according to claim 5, characterized in that: In step 2, the carbon doping amount decreases by 50 sccm from the first gradient to the fourth gradient.
7. The method for improving damage to floating gate polysilicon during etching according to claim 6, characterized in that: In step 2, the carbon doping amounts of the first to fourth gradients are 200 sccm, 150 sccm, 100 sccm, and 50 sccm, respectively.