Developing method of photosensitive substrate, manufacturing method of photomask and manufacturing method of electronic device

Abstract

The method for manufacturing the photosensitive substrate comprises the following steps: heating the exposed photosensitive substrate so as to respectively present a temperature distribution having a temperature gradient in a second direction intersecting with a first direction on the surface of the photosensitive substrate in a plurality of scanning fields, the photosensitive substrate is exposed by scanning a plurality of scanning fields included in the photosensitive substrate in a first direction through a photomask by using pulse laser light including a plurality of center wavelengths; and after heating the photosensitive substrate, supplying a developing solution to the surface of the photosensitive substrate for developing.

Description

Technical Field

[0001] The present disclosure relates to a method for developing a photosensitive substrate, a method for making a photomask, and a method for manufacturing an electronic device. Background Art

[0002] In recent years, in semiconductor exposure devices, as semiconductor integrated circuits become smaller and more highly integrated, there is a demand for improved resolution. Therefore, the wavelength of light emitted from an exposure light source has been shortened. For example, as a gas laser device for exposure, a KrF excimer laser device that outputs a laser with a wavelength of about 248nm and an ArF excimer laser device that outputs a laser with a wavelength of about 193nm are used.

[0003] The spectral line width of the natural oscillation light of the KrF excimer laser device and the ArF excimer laser device is relatively wide, at 350 to 400 pm. Therefore, when a projection lens is constructed using a material that allows ultraviolet light such as KrF and ArF lasers to pass through, chromatic aberration sometimes occurs. As a result, the resolution may be reduced. Therefore, it is necessary to narrow the spectral line width of the laser output from the gas laser device to a level where chromatic aberration is invisible. Therefore, in order to narrow the spectral line width, a narrowing module (Line Narrowing Module: LNM) containing narrowing elements (etalon, grating, etc.) is sometimes provided in the laser resonator of the gas laser device. A gas laser device with a narrowed spectral line width is called a narrowed laser device.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: U.S. Patent No. 5,968,691 Summary of the invention

[0007] In one viewpoint of the present disclosure, a method for manufacturing a photosensitive substrate includes the following steps: heating an exposed photosensitive substrate so that it presents a temperature distribution having a temperature gradient in a second direction intersecting a first direction on a surface of the photosensitive substrate in a plurality of scanning fields, wherein the photosensitive substrate is exposed by scanning a plurality of scanning fields contained in the photosensitive substrate in a first direction via a photomask using a pulsed laser containing a plurality of central wavelengths; and after heating the photosensitive substrate, supplying a developer to the surface of the photosensitive substrate for development.

[0008] In one aspect of the present disclosure, a photomask is used for photolithography using a pulsed laser including a plurality of central wavelengths, and a method for producing a photomask includes the following steps: measuring a wafer pattern of a second test wafer developed by supplying a developer to a surface of a second test wafer that has been exposed and heated, obtaining a measurement wafer pattern representing measurement results of each of a plurality of divided regions arranged in a second direction, wherein the second test wafer is exposed by scanning the second test wafer in a first direction via a second test mask using a pulsed laser, and the second test wafer is heated so as to present a temperature distribution having a temperature gradient in a second direction intersecting the first direction on a surface of the second test wafer in a plurality of scanning fields included in the second test wafer; producing a correction mask pattern for producing a photomask based on the test mask pattern formed on the second test mask, the measurement wafer pattern, and a wafer pattern that is a target for a photosensitive substrate, i.e., a target pattern; and producing a photomask based on the correction mask pattern.

[0009] In one viewpoint of the present disclosure, a method for manufacturing an electronic device includes the following steps: generating a pulsed laser including a plurality of central wavelengths by a laser device; outputting the pulsed laser to an exposure device; in the exposure device, scanning a plurality of scanning fields included in a photosensitive substrate in a first direction respectively via a photomask using the pulsed laser and performing exposure; heating the exposed photosensitive substrate so that in the plurality of scanning fields, a temperature distribution having a temperature gradient in a second direction intersecting the first direction is presented on the surface of the photosensitive substrate; and after heating the photosensitive substrate, supplying a developer to the surface of the photosensitive substrate for development. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Hereinafter, several embodiments of the present disclosure will be described as simple examples with reference to the accompanying drawings.

[0011] Figure 1 The structure of an exposure system in a comparative example is schematically shown.

[0012] Figure 2 : is a flowchart showing a process of forming a resist pattern on a photosensitive substrate in a comparative example.

[0013] Figure 3 This is a flowchart showing details of a process of baking a photosensitive substrate after exposure and supplying a developer.

[0014] Figure 4 The structure of a laser device is schematically shown.

[0015] Figure 5 The photosensitive substrate exposed by the exposure device is shown.

[0016] Figure 6This is a diagram for explaining how the position of the scanning field of the photosensitive substrate changes with respect to the position of the beam cross section of the pulsed laser.

[0017] Figure 7 This is a diagram for explaining how the position of the scanning field of the photosensitive substrate changes with respect to the position of the beam cross section of the pulsed laser.

[0018] Figure 8 This is a diagram for explaining how the position of the scanning field of the photosensitive substrate changes with respect to the position of the beam cross section of the pulsed laser.

[0019] Fig. 9 is a graph showing periodic wavelength variation.

[0020] Fig.10 The integrated spectrum of pulsed laser light containing multiple central wavelengths is shown.

[0021] Fig.11 An example is shown in which, when a target pattern is directly used as a mask pattern, a wafer pattern different from the target pattern is formed due to the optical proximity effect.

[0022] Fig.12 An example is shown in which a wafer pattern close to a target pattern is formed by using a correction mask pattern on which optical proximity effect correction has been performed.

[0023] Fig.13 This is a conceptual diagram of model-based OPC in a comparative example.

[0024] Fig.14 It is a flow chart of model-based OPC.

[0025] Fig.15 The data structure of the measured wafer pattern is shown.

[0026] Fig.16 Detailed description of the process of creating a model function group is shown in FIG.

[0027] Fig.17 The concept of off-axis chromatic aberration generated when a photosensitive substrate is exposed to light using pulsed laser light having a plurality of central wavelengths is shown.

[0028] Fig.18 The figure shows a situation in which the contrast of an optical image formed on a photosensitive substrate is reduced due to off-axis chromatic aberration.

[0029] Fig.19 The measurement locations for calculating the line edge roughness dimensions are shown.

[0030] Fig. 20 This is a flowchart showing a process of forming a resist pattern on a photosensitive substrate in the first embodiment.

[0031] Fig.21 This is a flowchart showing details of a process of baking a photosensitive substrate after exposure at a set temperature distribution and supplying a developer.

[0032] Fig. 22 Detailed description of the process of setting the temperature distribution for performing the post-exposure bake.

[0033] Fig.23 1 is a flowchart showing the details of the process of performing post-exposure baking on each of the imax PEB test wafers and supplying a developer.

[0034] Fig.24 A PEB test wafer and the temperature set for post-exposure baking of the PEB test wafer are shown.

[0035] Fig.25 FIG. 1 is a flowchart showing details of a process for measuring wafer patterns of a developed imax PEB test wafer.

[0036] Fig.26 The area in the scan field where the line edge roughness and critical dimension are measured is conceptually shown.

[0037] Fig. 27 A table summarizing the average values ​​is shown.

[0038] Fig.28 This is a flowchart showing details of a process for setting a temperature distribution based on measurement results.

[0039] Fig.29 An example of the temperature distribution in the X-axis direction set in the first embodiment is shown.

[0040] Fig.30 An example of the temperature distribution in the Y-axis direction set in the first embodiment is shown.

[0041] Fig.31 A first example of the temperature distribution set in the first embodiment is shown.

[0042] Fig.32 A second example of the temperature distribution set in the first embodiment is shown.

[0043] Fig.33 This is a flowchart showing a process of forming a resist pattern on a photosensitive substrate in the second embodiment.

[0044] Fig.34 This is a flowchart showing the details of the process of S13 in the second embodiment.

[0045] Fig.35This is a flowchart showing the details of the process of S15 in the second embodiment.

[0046] Fig.36 This is a conceptual diagram of OPC based on the segmentation model in the second embodiment.

[0047] Fig.37 A plurality of segmented regions included in a scan field of a test wafer are shown.

[0048] Fig.38 It is a flow chart of OPC based on segmentation model.

[0049] Fig.39 The data structure of the measured wafer pattern is shown.

[0050] Fig.40 Detailed description of the process of creating a model function group is shown in FIG.

[0051] Fig.41 An example of a model function group is shown. DETAILED DESCRIPTION

[0052] <Content>

[0053] 1. Comparative Example

[0054] 1.1 Exposure system

[0055] 1.1.1 Structure

[0056] 1.1.2 Action

[0057] 1.2 Laser device 100

[0058] 1.2.1 Structure

[0059] 1.2.2 Action

[0060] 1.3 Narrowband Module 14

[0061] 1.3.1 Structure

[0062] 1.3.2 Action

[0063] 1.4 Scanning exposure

[0064] 1.5 Periodic wavelength variation and cumulative spectrum

[0065] 1.6 Optical Proximity Correction (OPC)

[0066] 1.6.1 Summary

[0067] 1.6.2 Model-based OPC

[0068] 1.7 Issues of Comparative Example

[0069] 2. Control of LER based on temperature distribution of post-exposure baking

[0070] 2.1 Action

[0071] 2.1.1 Post-exposure baking

[0072] 2.1.2 Setting of temperature distribution

[0073] 2.2 Function

[0074] 3. Combination of temperature distribution of post-exposure baking and OPC

[0075] 3.1 Action

[0076] 3.2 Function

[0077] 4. Others

[0078] Below, the embodiments of the present disclosure are described in detail with reference to the accompanying drawings. The embodiments described below show several examples of the present disclosure and do not limit the content of the present disclosure. In addition, the structures and actions described in each embodiment are not necessarily all necessary for the structures and actions of the present disclosure. In addition, the same reference numerals are marked on the same structural elements and repeated descriptions are omitted.

[0079] 1. Comparative Example

[0080] 1.1 Exposure system

[0081] Figure 1 The configuration of the exposure system in the comparative example is schematically shown. The comparative example of the present disclosure is a method that the applicant recognizes as only known to the applicant, and is not a publicly known example acknowledged by the applicant himself.

[0082] The exposure system includes a laser device 100, an exposure device 200 and a developing device 300. Figure 1 The laser device 100 is schematically shown in FIG.

[0083] The laser device 100 includes a laser control processor 130. The laser control processor 130 is a processing device including a memory 132 storing a control program and a CPU (central processing unit) 131 executing the control program. The laser control processor 130 is specially configured or programmed to execute various processes included in the present disclosure. The laser device 100 is configured to output a pulsed laser toward the exposure device 200.

[0084] 1.1.1 Structure

[0085] like Figure 1 As shown, the exposure device 200 includes an illumination optical system 201 , a projection optical system 202 , and an exposure control processor 210 .

[0086] The illumination optical system 201 illuminates a mask pattern of a photomask (not shown) arranged on the mask stage MS with the pulse laser light incident from the laser device 100 .

[0087] The projection optical system 202 projects the pulsed laser light transmitted through the photomask in a reduced size and forms an image on a workpiece (not shown) arranged on a workpiece stage WT. The workpiece is a photosensitive substrate such as a semiconductor wafer coated with a resist film.

[0088] The exposure control processor 210 is a processing device including a memory 212 storing a control program and a CPU 211 executing the control program. The exposure control processor 210 is specially configured or programmed to perform various processes included in the present disclosure. The exposure control processor 210 controls the exposure device 200 in general, and transmits and receives various parameters and various signals to and from the laser control processor 130.

[0089] The developing device 300 includes a wafer moving unit 301 , a processing unit 302 , a measuring unit 303 , and a developing control processor 310 .

[0090] The wafer transfer unit 301 is a device that transfers the photosensitive substrate to and from the exposure device 200 and moves the photosensitive substrate inside the developing device 300 .

[0091] The processing unit 302 is a device that performs coating of a resist film on a photosensitive substrate, post-exposure baking (PEB) of the photosensitive substrate exposed in the exposure device 200, supply of a developer, cleaning, drying, post-development baking (PDB), etc. The post-exposure baking and post-development baking are performed by heating the photosensitive substrate with a hot plate (not shown) included in the processing unit 302. A plurality of processing units 302 may be included in one developing device 300, and processing by each processing unit 302 may be performed in parallel.

[0092] The measuring unit 303 is a device such as a CD-SEM that measures a pattern formed on the photosensitive substrate by exposure and development. The measuring unit 303 may be included in the developing device 300 or may be provided separately from the developing device 300.

[0093] The development control processor 310 is a processing device including a memory 312 storing a control program and a CPU 311 executing the control program. The development control processor 310 is specially configured or programmed to execute various processes included in the present disclosure.

[0094] 1.1.2 Action

[0095] The exposure control processor 210 sends various parameters including the target long wavelength λL and the target short wavelength λS, voltage command values, and trigger signals to the laser control processor 130. The laser control processor 130 controls the laser device 100 according to these parameters and signals.

[0096] The exposure control processor 210 moves the mask stage MS and the work stage WT in parallel in opposite directions in synchronization with each other, thereby exposing the workpiece with the pulsed laser light reflecting the mask pattern.

[0097] The mask pattern is transferred onto the photosensitive substrate by such photolithography, and then the electronic device can be manufactured through multiple steps.

[0098] Figure 2 : is a flowchart showing a process of forming a resist pattern on a photosensitive substrate in a comparative example. Figure 2 Although the process of the developing device 300 is mainly shown, the process of the exposure device 200 is partially included.

[0099] In S3 , the development control processor 310 controls the processing unit 302 to form a resist film on the semiconductor wafer to form a photosensitive substrate.

[0100] In S4 , the exposure control processor 210 controls each unit of the exposure device 200 so as to expose the photosensitive substrate via the photomask using pulsed laser light having a plurality of central wavelengths.

[0101] In S5, the development control processor 310 controls the processing unit 302 to perform post-exposure baking on the photosensitive substrate and supply a developer to the surface of the photosensitive substrate. For example, the acid generated in the exposed portion of the resist film acts as a catalyst to promote the chemical reaction of the resist film during the post-exposure baking. Through this chemical reaction, the positive resist changes from alkali insoluble to alkali soluble, and the negative resist changes from alkali soluble to alkali insoluble. Then, the alkali soluble portion is removed by the alkaline developer. For details of S5, refer to Figure 3 This will be described later.

[0102] In S6 , the development control processor 310 controls the processing unit 302 to perform cleaning, drying, and post-development baking of the developed photosensitive substrate.

[0103] In S7 , the development control processor 310 controls the measuring unit 303 to measure the photosensitive substrate after development and baking as needed.

[0104] After S7, the processing of this flowchart ends.

[0105] Figure 3This is a flowchart showing details of a process of baking a photosensitive substrate after exposure and supplying a developer. Figure 3 The processing shown is equivalent to Figure 2 The S5 subroutine.

[0106] In S51, the development control processor 310 determines whether to change the temperature setting of the hot plate. The temperature of the hot plate is determined by the mask pattern, the type of resist, exposure conditions, and the like.

[0107] When the temperature setting of the hot plate is changed ( S51 : YES), in S52 , the development control processor 310 reads the new temperature setting and changes the temperature setting.

[0108] When the temperature setting of the hot plate is not changed (S51: No), or after the temperature setting of the hot plate is changed (S52), in S53, the development control processor 310 controls the processing unit 302 to make the temperature of the hot plate close to the set temperature and heat the photosensitive substrate for a specified time.

[0109] In S54 , the development control processor 310 controls the processing unit 302 to supply the developer to the surface of the photosensitive substrate.

[0110] After S54, the development control processor 310 ends the processing of this flowchart and returns to Figure 2 Processing shown.

[0111] 1.2 Laser device 100

[0112] 1.2.1 Structure

[0113] Figure 4 The structure of the laser device 100 is schematically shown. Figure 4 The V axis, H axis, and Z axis are shown to be perpendicular to each other. Figure 4 1 shows the laser device 100 viewed in the −V direction, the exposure device 200 is shown in a simplified manner, and the illustration of the developing device 300 is omitted.

[0114] The laser device 100 includes a laser control processor 130, a laser cavity 10, a pulse power module (PPM) 13, a narrowband module 14, an output coupling mirror 15, and a monitor module 17. The narrowband module 14 and the output coupling mirror 15 constitute an optical resonator.

[0115] The laser cavity 10 is disposed on the optical path of the optical resonator and is provided with windows 10a and 10b.

[0116] The laser cavity 10 has a discharge electrode 11a and a discharge electrode (not shown) paired therewith inside. The discharge electrode (not shown) is located at a position overlapping the discharge electrode 11a in the V-axis direction. The laser cavity 10 is filled with, for example, a laser gas, which includes argon gas or krypton gas as a rare gas, fluorine gas as a halogen gas, neon gas as a buffer gas, and the like.

[0117] The pulse power module 13 includes a switch (not shown) and a charger (not shown).

[0118] The narrowband module 14 includes prisms 41 to 43, a grating 53, and a reflection mirror 63. The narrowband module 14 will be described in detail later.

[0119] The output coupling mirror 15 is formed by a partially reflecting mirror.

[0120] A beam splitter 16 is disposed on the optical path of the pulse laser output from the output coupling mirror 15. The beam splitter 16 transmits a part of the pulse laser with high transmittance and reflects the other part. A monitor module 17 is disposed on the optical path of the pulse laser reflected by the beam splitter 16.

[0121] 1.2.2 Action

[0122] The laser control processor 130 obtains various parameters including the target long wavelength λL, the target short wavelength λS, and the voltage command value from the exposure control processor 210. The laser control processor 130 sends a control signal to the narrowband module 14 according to the target long wavelength λL and the target short wavelength λS.

[0123] The laser control processor 130 receives a trigger signal from the exposure control processor 210. The laser control processor 130 transmits an oscillation trigger signal based on the trigger signal to the pulse power module 13. The switch included in the pulse power module 13 is turned on after receiving the oscillation trigger signal from the laser control processor 130. After the switch is turned on, the pulse power module 13 generates a pulse-shaped high voltage using the electric energy charged by the charger, and applies the high voltage to the discharge electrode 11a.

[0124] After a high voltage is applied to the discharge electrode 11a, a discharge is generated in the discharge space between the discharge electrode 11a and the discharge electrode (not shown). The laser gas in the laser cavity 10 is excited to transition to a high energy level by the energy of the discharge. Then, when the excited laser gas transitions to a low energy level, light of a wavelength corresponding to the energy level difference is emitted.

[0125] Light generated in the laser cavity 10 is emitted to the outside of the laser cavity 10 through windows 10a and 10b. Light emitted from window 10a is incident on narrowband module 14. Light near a desired wavelength of the light incident on narrowband module 14 is folded back by narrowband module 14 and returns to the laser cavity 10.

[0126] The output coupling mirror 15 transmits a part of the light emitted from the window 10 b to output the light, and reflects the other part to return the light to the laser cavity 10 .

[0127] In this way, the light emitted from the laser cavity 10 reciprocates between the narrowband module 14 and the output coupling mirror 15. The light is amplified each time it passes through the discharge space in the laser cavity 10. In addition, the light is narrowbanded each time it is turned back by the narrowband module 14, and becomes light with a sharp wavelength distribution, and the wavelength distribution has a part of the range of the selected wavelength of the narrowband module 14 as the central wavelength. The light oscillated in this way and narrowbanded is output from the output coupling mirror 15 as a pulsed laser.

[0128] The monitor module 17 measures the central wavelength of the pulsed laser light and transmits the measured wavelength to the laser control processor 130. The laser control processor 130 performs feedback control on the bandwidth narrowing module 14 based on the measured wavelength.

[0129] The pulse laser beam transmitted through the beam splitter 16 enters the exposure device 200 .

[0130] 1.3 Narrowband Module 14

[0131] 1.3.1 Structure

[0132] The prisms 41 to 43 are arranged in the order of their numbers from small to large on the optical path of the light beam emitted from the window 10a. The prisms 41 to 43 are arranged so that the surfaces of the prisms 41 to 43 for the light beam to enter and exit are parallel to the V axis. The prism 43 can be rotated around an axis parallel to the V axis by the rotating table 143.

[0133] The reflective mirror 63 is disposed on the optical path of the light beam that has passed through the prisms 41 to 43. The reflective mirror 63 is disposed so that the surface reflecting the light beam is parallel to the V axis, and the reflective mirror 63 is rotatable around an axis parallel to the V axis by a rotating stage 163.

[0134] The grating 53 is arranged on the optical path of the light beam reflected by the reflecting mirror 63. The direction of the grooves of the grating 53 is parallel to the V axis.

[0135] 1.3.2 Action

[0136] The light beams emitted from the window 10a are changed in direction in a plane parallel to the HZ plane by the prisms 41 to 43, respectively, so that the beam width is expanded in a plane parallel to the HZ plane, which is a plane perpendicular to the V axis.

[0137] The light beam transmitted through the prisms 41 to 43 is reflected by the reflection mirror 63 and enters the grating 53 .

[0138] The light beam incident on the grating 53 is reflected by the plurality of grooves of the grating 53 and diffracted in a direction corresponding to the wavelength of the light. The grating 53 is arranged in a Littrow configuration so that the incident angle of the light beam incident on the grating 53 from the reflector 63 and the diffraction angle of the diffracted light of a desired wavelength match.

[0139] The reflection mirror 63 and the prisms 41 to 43 reduce the beam width of the light beam returning from the grating 53 in a plane parallel to the HZ plane, and return the light beam to the inside of the laser cavity 10 through the window 10 a .

[0140] The laser control processor 130 controls the rotating stages 143 and 163 via a driver (not shown). The incident angle of the light beam incident on the grating 53 changes according to the rotation angle of the rotating stages 143 and 163, and the wavelength selected by the narrowband module 14 changes. The rotating stage 143 is mainly used for coarse adjustment, and the rotating stage 163 is mainly used for fine adjustment.

[0141] The laser control processor 130 controls the rotating stage 163 according to the target long wavelength λL and the target short wavelength λS received from the exposure control processor 210, so that the posture of the reflector 63 changes periodically according to a plurality of pulses. As a result, the center wavelength of the pulsed laser changes periodically between the target long wavelength λL and the target short wavelength λS according to a plurality of pulses. In this way, the laser device 100 can perform laser oscillation at a plurality of wavelengths.

[0142] The focal length in the exposure device 200 depends on the wavelength of the pulsed laser. The pulsed laser oscillated at multiple wavelengths and incident on the exposure device 200 can form images at multiple different positions in the direction of the optical path axis of the pulsed laser, and thus, the depth of focus can be substantially increased. For example, when a thick resist film is exposed, the imaging performance in the thickness direction of the resist film can also be maintained. Alternatively, the resist profile representing the cross-sectional shape of the developed resist film can be adjusted.

[0143] 1.4 Scanning exposure

[0144] Figure 5The photosensitive substrate exposed by the exposure device 200 is shown. The photosensitive substrate is, for example, a plate of single crystal silicon having a roughly circular plate shape. The exposure of the photosensitive substrate is performed according to the division of scanning fields SF1, SF2, etc. The scanning fields SF1 and SF2 are respectively the areas where several semiconductor chips among the multiple semiconductor chips formed on the photosensitive substrate are formed, which are equivalent to the areas where the mask pattern of one mask is transferred in one scan. The numbers included in the labels SF1 and SF2 indicate the exposure order. When the exposure order is not determined and the description is made, no numbers are marked and it is simply expressed as SF.

[0145] First, the photosensitive substrate is moved so that the pulse laser is irradiated to the first scanning field SF1, and the first scanning field SF1 is exposed.

[0146] Next, the photosensitive substrate moves to irradiate the second scanning field SF2 with the pulse laser, and the second scanning field SF2 is exposed.

[0147] The other scanning fields SF are also exposed in sequence. When the last scanning field SFkmax is exposed, the exposure of the photosensitive substrate is completed.

[0148] Figure 6 to Figure 8 The situation in which the position of the scanning field SF of the photosensitive substrate changes relative to the position of the beam cross section B of the pulsed laser is shown. The direction in which the position of the scanning field SF changes is set as the Y-axis direction, and the direction perpendicular to the Y-axis direction is set as the X-axis direction. The Y-axis direction is equivalent to the first direction in the present disclosure, and the X-axis direction is equivalent to the second direction in the present disclosure.

[0149] When exposing one scanning field SF, pulse laser is continuously output at a predetermined repetition frequency. Continuously outputting pulse laser at a predetermined repetition frequency is called burst output. When the exposure position is moved from one scanning field SF to another scanning field SF, the output of pulse laser is stopped. Therefore, in order to expose one photosensitive substrate, burst output is repeated multiple times.

[0150] The width of the scanning field SF in the X-axis direction is equivalent to the width of the pulse laser on the workpiece table WT (refer to Figure 1 ) in the X-axis direction of the beam cross section B. The Y-axis direction width of the scanning field SF is larger than the Y-axis direction width W of the beam cross section B at the position of the pulse laser on the workpiece stage WT.

[0151] according to Figure 6 , Figure 7 , Figure 8 The steps of scanning and exposing the scanning field SF in the Y-axis direction by pulse laser are performed in the order of Figure 6As shown in FIG. 1 , the workpiece stage WT is positioned such that the end SFy+ of the scanning field SF in the +Y direction is spaced a predetermined distance in the -Y direction relative to the end By- of the beam section B in the -Y direction. Then, the workpiece stage WT is accelerated in the +Y direction to a speed Vy until the end SFy+ of the scanning field SF in the +Y direction coincides with the end By- of the beam section B in the -Y direction. Figure 7 As shown, the scanning field SF is exposed while the workpiece stage WT is moved in the +Y direction so that the position of the scanning field SF performs a uniform linear motion at a speed Vy relative to the position of the beam cross section B. Figure 8 As shown, after the workpiece stage WT moves to a position where the end SFy- in the -Y direction of the scanning field SF passes the end By+ in the +Y direction of the beam cross section B, the scanning of the scanning field SF is completed.

[0152] In this way, exposure is performed while moving the position of the scanning field SF relative to the beam cross section B. When the scanning field SF is used as a reference, it can also be said that the pulsed laser is scanned in the -Y direction.

[0153] The time Ts required for moving the scanning field SF at a speed Vy by a distance corresponding to the width W of the beam cross section B of the pulse laser light is as follows.

[0154] Ts=W / Vy

[0155] The number Ns of irradiation pulses of the pulsed laser light irradiated to any one location in the scanning field SF is the same as the number of pulses of the pulsed laser light generated within the required time Ts, as described below.

[0156] Ns=F·Ts

[0157] Here, F is the repetition frequency of the pulsed laser.

[0158] The number of irradiation pulses Ns is also called the number of N gap pulses.

[0159] Here, the scanning field SF included in the photosensitive substrate used for manufacturing electronic devices is described, but the scanning field SF included in the PEB test wafer and OPC test wafer described later is also the same.

[0160] 1.5 Periodic wavelength variation and cumulative spectrum

[0161] Fig. 9 is a graph showing periodic wavelength variation. Fig. 9 In FIG. 1 , the horizontal axis represents time t, and the vertical axis represents wavelength λ. Fig. 9 The small circles shown represent the time t when the pulse laser is output and the central wavelength at that time.

[0162] exist Fig. 9In the example shown, the central wavelength changes periodically between the target long wavelength λL and the target short wavelength λS. The number of pulses in one cycle of wavelength change is N. The cycle T of wavelength change is given by the following equation.

[0163] T=N / F

[0164] Fig.10 The integrated spectrum of pulsed laser light containing multiple central wavelengths is shown. Fig.10 The cumulative spectrum shown is equivalent to Fig. 9 The cumulative spectrum of one cycle of wavelength variation is shown. Fig.10 In the figure, the horizontal axis represents the wavelength λ and the vertical axis represents the light intensity I. The dotted line represents the spectrum of the pulsed laser per pulse, and each center wavelength can also be consistent with the peak wavelength. Fig. 9 As shown, by changing the center wavelength in multiple stages between the target long wavelength λL and the target short wavelength λS, Fig.10 The integrated spectrum shown can be in the shape of a flat top having a substantially uniform light intensity I between the target long wavelength λL and the target short wavelength λS.

[0165] It is preferred that the number of irradiation pulses Ns of the pulsed laser light irradiated to any one portion in the scanning field SF is a multiple of the number of pulses N in one cycle of wavelength variation. Thus, any portion of the scanning field SF is irradiated with the number of irradiation pulses Ns of the pulsed laser light having the same cumulative spectrum. Thus, the exposure result has less variation due to the irradiation position, and high-quality electronic devices can be manufactured.

[0166] 1.6 Optical Proximity Correction (OPC)

[0167] 1.6.1 Summary

[0168] In photolithography, when the size of the designed target pattern G is smaller than the wavelength of the exposure light source, even if the target pattern G is directly drawn on the mask and exposed, sometimes it is impossible to obtain a wafer pattern equivalent to the target pattern G. Therefore, pre-correcting the target pattern G and making a correction mask pattern F in order to obtain a wafer pattern equivalent to the target pattern G is called optical proximity correction (OPC).

[0169] Fig.11 The following is an example in which, when the target pattern G is used directly as a mask pattern, a wafer pattern R1 different from the target pattern G is formed due to the optical proximity effect. For example, the effects are seen such that the corners included in the target pattern G are rounded in the wafer pattern R1, or the convex portions included in the target pattern G are receded in the wafer pattern R1.

[0170] Fig.12An example of forming a wafer pattern R2 close to the target pattern G by using a correction mask pattern F that has been corrected for the optical proximity effect is shown. The correction mask pattern F includes, for example, the following deformations: adding a protruding portion to a convex corner of the target pattern G; or further concaving a concave corner of the target pattern G; or adding an auxiliary pattern SRAF (sub-resolution assist feature). Thus, a wafer pattern R2 close to the shape of the target pattern G can be obtained.

[0171] In the optical proximity effect correction, not only the optical proximity effect is corrected, but also the difference between the mask pattern and the wafer pattern generated in the development of the resist film and other semiconductor processes can be corrected.

[0172] As optical proximity effect correction, two types of OPC are known: model-based OPC and rule-based OPC. Here, model-based OPC will be described as an example.

[0173] 1.6.2 Model-based OPC

[0174] In model-based OPC, a model function group M is prepared based on the results of exposure simulation performed according to each characteristic shape included in the target pattern G and the actual exposure results. The model function group M is used to prepare a correction mask pattern F for obtaining a wafer pattern equivalent to the target pattern G. Model-based OPC is mainly used for the generation with a line width smaller than 130nm.

[0175] Fig.13 This is a conceptual diagram of model-based OPC in a comparative example. First, an OPC test mask including a test mask pattern E is produced based on a target pattern G. An OPC test wafer is exposed using the OPC test mask, and the patterned OPC test wafer is measured to obtain a measured wafer pattern D.

[0176] Based on the result of the exposure simulation using the test mask pattern E and the actual exposure result, i.e., the measured wafer pattern D, a model function group M is prepared for predicting the actual exposure result from the result of the exposure simulation. The model function group M is used to prepare an OPC process P, which is a program for preparing a calibration mask pattern F from a target pattern G. The OPC process P is executed using the target pattern G, thereby preparing the calibration mask pattern F. By exposing a photosensitive substrate using the calibration mask pattern F, a wafer pattern close to the target pattern G can be obtained.

[0177] Fig.14 It is a flow chart of model-based OPC. Fig.14The processing shown is performed by a processor such as the exposure control processor 210. The processor may be included in other devices such as a mask manufacturing device (not shown) or a server (not shown) connected to the plurality of exposure devices 200, and the structure of such a processor may be the same as that of the exposure control processor 210. In the case of a large amount of calculation, it is more advantageous to enhance the processing capability of the processor included in the server than to enhance the processing capability of the exposure control processor 210 included in the plurality of exposure devices 200 alone.

[0178] In S210, the processor obtains a target pattern G. The target pattern G is a wafer pattern designed by a semiconductor chip designer as a target of a photosensitive substrate, and is provided in a data format called, for example, GDS (Graphic Data System) or OASIS (Open Artwork System Interchange Standard). When etching the photosensitive substrate, the target pattern G may be a pattern after etching, and when etching is not performed, the target pattern G may be a pattern of a resist film developed after exposure.

[0179] In S220, the processor sets exposure conditions according to the target pattern G. The exposure conditions include setting conditions of the exposure device 200, such as the illumination optical system 201 (see Figure 1 ), the shape of the illumination light source of the projection optical system 202, the presence or absence of polarized illumination, and the numerical aperture of the projection optical system 202. In addition, for example, the exposure conditions include the type of resist film, the presence or absence and type of anti-reflection film, resist stack information, the film thickness of the resist film, the coating conditions of the resist film, and the development conditions.

[0180] In S230 , the processor creates a test mask pattern E based on the target pattern G. Specifically, the processor extracts characteristic shapes included in the target pattern G, sets one or more size conditions for each of the shapes, and forms the test mask pattern E.

[0181] According to the test mask pattern E, an OPC test mask is manufactured by a mask manufacturing apparatus.

[0182] In S240, the exposure device 200 scans the OPC test wafer via the OPC test mask, thereby exposing the OPC test wafer. The OPC test wafer is a substrate for test exposure coated with a resist film under the same conditions as the photosensitive substrate. The OPC test mask is equivalent to the second test mask in the present disclosure, and the OPC test wafer is equivalent to the second test wafer in the present disclosure.

[0183] In S242 , the processor controls the processing unit 302 to perform post-exposure baking on the OPC test wafer in the developing device 300 and supply a developing solution to the surface of the OPC test wafer.

[0184] Furthermore, the developed photosensitive substrate is cleaned, dried, and baked after development. When etching is performed, etching is performed by an etching device (not shown), thereby patterning the OPC test wafer.

[0185] In S250 , the processor measures the wafer pattern of the OPC test wafer using a measuring device such as a CD-SEM (not shown), and acquires a measured wafer pattern D indicating the measurement result.

[0186] Fig.15 The data structure of the measurement wafer pattern D is shown. The measurement wafer pattern D includes p dimensions measured for each of the m shapes 1 to m. For example, the dimension D is measured for shape 1. 11 ~D 1p , measure dimension D for shape 2 21 ~D 2p , measure the dimension D for shape m m1 ~D mp However, the value of p in the shapes 1 to m may be different from each other, and the value of p may be 1 or 2 or more.

[0187] When test exposure is performed on a plurality of scan fields SF included in an OPC test wafer using one OPC test mask, average values ​​for each shape and each size are calculated from measurement results in the plurality of scan fields SF and are used as a measurement wafer pattern D.

[0188] Refer again Fig.14 In S260 , the processor creates a model function group M based on the test mask pattern E and the measurement wafer pattern D.

[0189] Fig.16 Detailed description of the process of creating the model function group M is shown in FIG. Fig.16 The processing shown is equivalent to Fig.14 of 260 subroutines.

[0190] In S262, the processor performs an exposure simulation based on a single wavelength using the test mask pattern E. Fourier's imaging theory is used in the exposure simulation.

[0191] In S264, the processor performs initial setting of the model function group M. The model function group M includes, for example, k functions M1 to M2. k Functions M1~M k Each contains multiple coefficients. For example, function M1 contains i coefficients c 11~c 1i , function M k Contains i coefficients c k1 ~c ki However, functions M1 to M k The values ​​of i in can also be different from each other.

[0192] In S265, the processor applies the exposure simulation results to the model function group M, thereby performing a prediction operation of the wafer pattern. The prediction operation includes four arithmetic operations and convolution integrals.

[0193] In S266, the processor determines whether the result of the prediction operation is consistent with the measured wafer pattern D. Even if the result of the prediction operation is not completely consistent with the measured wafer pattern D, as long as the predetermined conditions are met, it can be determined that the result of the prediction operation is consistent with the measured wafer pattern D. In the case where the result of the prediction operation is consistent with the measured wafer pattern D (S266: Yes), the processor sets the model function group M used in S265 to the generated model function group M, ends the processing of this flowchart, and returns to Fig.14 When the result of the prediction operation does not match the measurement wafer pattern D (S266: No), the processor advances the process to S267.

[0194] In S267, the processor changes the coefficients included in the model function group M or makes other corrections, thereby updating the model function group M. The updated model function group M includes, for example, k' functions M1 to M k’ . Represents functions M1~M k’ The value of k' may also be the same as the functions M1 to M2 included in the model function group M used in S265. k The number of functions M1 to M k’ The coefficient c' 11 ~c' k’i It can also be combined with the coefficients c included in the model function group M used in S265 11 ~c ki different.

[0195] After S267, the processor returns the process to S265 and updates the model function group M until the result of the prediction operation matches the measurement wafer pattern D.

[0196] Refer again Fig.14 In S270, the processor creates an OPC process P according to the model function group M. The OPC process P includes, for example, the definition of the model function group M, Fig.15 Dimensions D shown 11 ~D mp Description of the measurement points and directions, and correction rules for the mask pattern.

[0197] In S280 , the processor performs an OPC process P using the target pattern G to produce a calibration mask pattern F. The calibration mask pattern F is also provided in a GDS or OASIS data format.

[0198] In S310 , the mask manufacturing apparatus manufactures a photomask based on the correction mask pattern F, and the processing of this flowchart ends.

[0199] 1.7 Issues of Comparative Example

[0200] Fig.17 The concept of off-axis chromatic aberration CA generated when a photosensitive substrate is exposed using a pulsed laser beam having a plurality of central wavelengths is shown. Fig.17 As shown in FIG. 1 , the refractive index in the projection optical system 202 is different in the target long wavelength λL and the target short wavelength λS. Therefore, the portion of the mask pattern of the mask arranged on the mask stage MS, which is located on the optical path axis A of the projection optical system 202, is imaged at different positions in the depth direction of the photosensitive substrate arranged on the work stage WT. This is called axial chromatic aberration. In contrast, the portion of the mask pattern, which is located away from the optical path axis A, is imaged at different positions not only in the depth direction of the photosensitive substrate, but also in the surface direction of the photosensitive substrate. This is called off-axial chromatic aberration CA.

[0201] Fig.18 The figure shows a situation in which the contrast of an optical image formed on a photosensitive substrate is reduced due to off-axis chromatic aberration. Fig.18 The horizontal axis represents the distance in the X-axis direction from the position 0 of the optical path axis A, and the vertical axis represents the light intensity I. At the position 0 of the optical path axis A, light of multiple wavelengths having the light intensity distribution shown by the dotted line is imaged at the same position in the X-axis direction. In contrast, at the position away from the optical path axis A, light of different wavelengths is imaged at different positions in the X-axis direction. Therefore, the light intensity distribution shown by the solid line after synthesizing these wavelengths of light becomes a longer distribution in the X-axis direction. When the width of the portion that is photosensitized with a light intensity I above the threshold value Ith is set as the critical dimension, the critical dimension CD2 at the position away from the optical path axis A is larger than the critical dimension CD1 at the position 0 of the optical path axis A. In addition, at the position away from the optical path axis A, the inclination of the light intensity I near the threshold value Ith becomes gentle. As a result, the contrast of the optical image formed on the photosensitive substrate at the position away from the optical path axis A is reduced.

[0202] When the contrast is reduced, the line edge roughness (LER) of a pattern formed by development after exposure may deteriorate.

[0203] Fig.19The measurement position for calculating the size of the line edge roughness is shown. The line edge roughness is evaluated, for example, by the root mean square (RMS) of the deviation from the ideal center line CL to the edge, and the larger the deviation, the larger the value. Therefore, it is preferred that the line edge roughness is small.

[0204] Line edge roughness can also be evaluated by pattern width instead of using the deviation from the ideal center line CL to the edge, or by using standard deviation instead of root mean square. Sometimes the index evaluated by pattern width is called line width roughness (LWR), but in this specification, it is collectively referred to as line edge roughness including this.

[0205] The embodiments described below relate to suppressing the deterioration of line edge roughness due to chromatic aberration of magnification when performing exposure using a plurality of wavelengths.

[0206] 2. Control of LER based on temperature distribution of post-exposure baking

[0207] 2.1 Action

[0208] Fig. 20 This is a flowchart showing a process of forming a resist pattern on a photosensitive substrate in the first embodiment. Fig. 20 Although the process of the developing device 300 is mainly shown, the process of the exposure device 200 is partially included.

[0209] In S1a, the development control processor 310 sets a temperature distribution for performing post-exposure baking. The temperature distribution for performing post-exposure baking is a temperature distribution having a temperature gradient in the X-axis direction in each scanning field SF. For details of the processing of S1a, refer to Fig. 22 This will be described later.

[0210] S3 and S4 after S1a are similar to those in reference Figure 2 The situation described is the same.

[0211] In S5a, the development control processor 310 controls the processing unit 302 to perform post-exposure baking on the photosensitive substrate with the set temperature distribution and supply the developer to the surface of the photosensitive substrate. Fig.21 This will be described later.

[0212] S6 and S7 after S5a are similar to those in reference Figure 2 The situation described is the same.

[0213] 2.1.1 Post-exposure baking

[0214] Fig.21 This is a flowchart showing details of a process of baking a photosensitive substrate after exposure at a set temperature distribution and supplying a developer. Fig.21 The processing shown is equivalent to Fig. 20 The subroutine S5a of FIG. 1 is similar to the subroutine S5a of FIG. 1 , except that a temperature distribution having a temperature gradient in the X-axis direction is set instead of setting the temperature of the entire hot plate. Figure 3 The situation described is the same.

[0215] 2.1.2 Setting of temperature distribution

[0216] Fig. 22 Detailed description of the process of setting the temperature distribution for performing the post-exposure bake. Fig. 22 The processing shown is equivalent to Fig. 20 The temperature distribution for performing the post-exposure bake may be set in advance according to a combination of the mask pattern, the type of resist, the exposure conditions, etc., and necessary setting data is read out in S5a.

[0217] Before the development control processor 310 sets the temperature distribution, in S11, the exposure control processor 210 controls the various parts of the exposure device 200 to expose the imax PEB test wafers through the PEB test mask using a pulsed laser including multiple center wavelengths. The PEB test mask can be specially designed to set the temperature distribution for post-exposure baking, or it can be used together with the PEB test mask in the exposure device 200. Fig. 20 The same photomask used in S4 of imax PEB test wafers was used in Fig. 20 The same as the photosensitive substrate used in S4, the exposure device 200 scans a plurality of scanning fields SF in the Y-axis direction. imax pieces can be, for example, in the range of more than 3 pieces and less than 10 pieces. The PEB test mask is equivalent to the first test mask in the present disclosure, and the PEB test wafer is equivalent to the first test wafer in the present disclosure.

[0218] In S12, the development control processor 310 controls the processing unit 302 to perform post-exposure baking on the imax PEB test wafers and supply developer to the surface of the PEB test wafers. Fig.23 This will be described later.

[0219] In S13, the development control processor 310 controls the measuring unit 303 to measure the wafer pattern of the developed imax PEB test wafer. Fig.25 This will be described later.

[0220] In S15, the development control processor 310 sets the temperature distribution according to the measurement result. Fig.28 This will be described later.

[0221] After S15, the development control processor 310 ends the processing of this flowchart and returns to Fig. 20 Processing shown.

[0222] Fig.23 1 is a flowchart showing the details of the process of performing post-exposure baking on each of the imax PEB test wafers and supplying a developer. Fig.23 The processing shown is equivalent to Fig. 22 The S12 subroutine.

[0223] In S121, the development control processor 310 sets the counter i for counting imax PEB test wafers to 1. imax PEB test wafers are heated at different temperatures T1 to Timax. The temperature of the hot plate for heating the i-th PEB test wafer WFi is set to the i-th temperature Ti. The temperatures T1 to Timax are set with the nominal temperature Tnom as the center and at a specified temperature interval. The nominal temperature Tnom is the optimal temperature for post-exposure baking derived without considering the chromatic aberration of magnification, which is equivalent to the reference temperature in the present disclosure. The specified temperature interval is, for example, above 2°C and below 10°C.

[0224] In S122, the development control processor 310 sets the temperature of the heat plate to the i-th temperature Ti.

[0225] In S123, the development control processor 310 controls the processing unit 320 to control the hot plate to have a uniform temperature distribution of temperature Ti, and heats the i-th PEB test wafer WFi for a specified time.

[0226] In S124, the development control processor 310 controls the processing unit 320 to supply the developing solution to the surface of the i-th PEB test wafer WFi.

[0227] In S125, the development control processor 310 determines whether the value of the counter i has reached imax. If the value of the counter i has not reached imax (S125: No), in S126, the development control processor 310 adds 1 to the value of the counter i and returns the process to S122. Thus, the next PEB test wafer is post-exposure baked at a different temperature Ti and developed.

[0228] When the value of the counter i reaches imax (S125: YES), the development control processor 310 ends the processing of this flowchart and returns to Fig. 22 Processing shown.

[0229] Fig.24PEB test wafers WF1 to WF4 and temperature Ti set for post-exposure baking of the PEB test wafers WF1 to WF4 are shown. As temperature Ti, only one value is set for one PEB test wafer WFi.

[0230] Fig.25 FIG. 1 is a flowchart showing details of a process for measuring wafer patterns of a developed imax PEB test wafer. Fig.25 The processing shown is equivalent to Fig. 22 The S13 subroutine.

[0231] In S131 , the development control processor 310 sets a counter i for counting imax PEB test wafers to 1.

[0232] In S132 , the development control processor 310 controls the wafer moving unit 301 to set the i-th PEB test wafer WFi to the measurement unit 303 .

[0233] In S133 , the development control processor 310 sets a counter k for counting the scanning fields SF to 1.

[0234] In S134, the development control processor 310 controls the measuring unit 303 to measure the line edge roughness LERcik and the critical dimension CDcik of the center portion in the X-axis direction of the k-th scanning field SFk of the i-th PEB test wafer WFi.

[0235] In S135, the development control processor 310 controls the measuring unit 303 to measure the line edge roughness LERpik and the critical dimension CDpik of the end of the k-th scanning field SFk in the X-axis direction of the i-th PEB test wafer WFi. The position of the end of the scanning field SFk in the X-axis direction is equivalent to the first position in the present disclosure.

[0236] In S136, the development control processor 310 determines whether the value of the counter k has reached kmax. If the value of the counter k has not reached kmax (S136: No), in S137, the development control processor 310 adds 1 to the value of the counter k and returns the process to S134. If the value of the counter k has reached kmax (S136: Yes), the development control processor 310 advances the process to S138.

[0237] In S138, the development control processor 310 calculates and stores the average values ​​LERci, CDci, LERpi, and CDpi of the measurement results according to the following equations for each PEB test wafer WFi and each position in the scanning field.

[0238] LERci=Avg(LERcik)

[0239] CDci=Avg(CDcik)

[0240] LERpi=Avg(LERpik)

[0241] CDpi=Avg(CDpik)

[0242] Here, Avg(Xik) is the average of kmax values ​​of Xik.

[0243] In S139, the development control processor 310 determines whether the value of the counter i has reached imax. If the value of the counter i has not reached imax (S139: No), in S140, the development control processor 310 adds 1 to the value of the counter i and returns the process to S132. If the value of the counter i has reached imax (S139: Yes), the development control processor 310 advances the process to S141.

[0244] In S141, the development control processor 310 determines the average value LERci of the line edge roughness LERcik of the center portion in the X-axis direction of the scanning field SF included in the PEB test wafers after post-exposure baking at the nominal temperature Tnom among the imax PEB test wafers as the reference LERc.

[0245] After S141, the development control processor 310 ends the processing of this flowchart and returns to Fig. 22 Processing shown.

[0246] Fig.26 The areas of measured line edge roughness LERcik and LERpik and critical dimensions CDcik and CDpik in the k-th scanning field SFk are conceptually shown. The line edge roughness LERcik and critical dimension CDcik are obtained based on the measurement results of the center portion in the X-axis direction of the k-th scanning field SFk, and the line edge roughness LERpik and critical dimension CDpik are obtained based on the measurement results of the end portion in the X-axis direction of the k-th scanning field SFk.

[0247] Fig. 27 A table summarizing the average values ​​LERci, CDci, LERpi, and CDpi is shown. A temperature Ti is set for each PEB test wafer WFi. The temperature Ti is assumed to include a nominal temperature Tnom. The average values ​​LERci, CDci, LERpi, and CDpi of the measurement results are calculated for each PEB test wafer WFi and for each position within the scan field.

[0248] Fig.28This is a flowchart showing details of a process for setting a temperature distribution based on measurement results. Fig.28 The processing shown is equivalent to Fig. 22 The S15 subroutine.

[0249] In S151 , the development control processor 310 sets a counter i for counting imax PEB test wafers to 1.

[0250] In S152, the development control processor 310 determines whether the average value LERpi of the line edge roughness LERpik at the X-axis end of the i-th PEB test wafer WFi is within the allowable range. If the difference between the average value LERpi and the reference LERc is less than the threshold value, the average value LERpi is determined to be within the allowable range.

[0251] In S153, the development control processor 310 determines whether the average CDpi of the critical dimensions CDpik at the ends in the X-axis direction of the i-th PEB test wafer WFi is within an allowable range.

[0252] When either the average value LERpi or the average value CDpi is not within the permissible range ( S152 or S153 : No), the development control processor 310 adds 1 to the value of the counter i in S154 and returns the process to S152 .

[0253] When both the average value LERpi and the average value CDpi are within the allowable range ( S152 and S153 : YES), the development control processor 310 advances the process to S155 .

[0254] In S155, the development control processor 310 sets the temperature Tc of the center portion in the X-axis direction of all the scanning fields SF to the nominal temperature Tnom.

[0255] In S156, the development control processor 310 sets the temperature Tp of the ends in the X-axis direction of all scanning fields SF to the temperature Ti.

[0256] After S156, the development control processor 310 ends the processing of this flowchart and returns to Fig. 22 Processing shown.

[0257] exist Fig. 27 In the example shown, when the nominal temperature Tnom is temperature T4, the reference LERc becomes the average value LERc4. If the difference between the average value LERc4 and the average value LERp2 is less than the threshold value, and the average value CDp2 is within the allowable range, it is determined that both the average value LERpi and the average value CDpi are within the allowable range, and the temperature Tp at the end in the X-axis direction is set to temperature T2.

[0258] Fig.29 An example of the temperature distribution in the X-axis direction set in the first embodiment is shown. Fig.29 The horizontal axis represents the position in the X-axis direction within the scanning field SF, and the vertical axis represents the temperature. The temperature Tc is set at the center c in the X-axis direction, and the temperature Tp is set at the end p in the X-axis direction, and the temperature distribution in the X-axis direction is set so that a gentle temperature gradient is formed between the center c in the X-axis direction and the end p in the X-axis direction.

[0259] According to the temperature conditions of post-exposure baking, the diffusion length of the acid that becomes the catalyst changes, and the speed of the chemical reaction using the acid as the catalyst also changes. By setting the temperature conditions so that the average LERpi and the average CDpi are within the allowable range, the line edge roughness can be adjusted and the quality of the pattern formed on the photosensitive substrate can be improved.

[0260] Here, the case where the temperature Tc is higher than the temperature Tp is shown, but there may be Fig.28 As a result of setting the optimum temperature in the process, the temperature Tc is lower than the temperature Tp.

[0261] Fig.30 An example of the temperature distribution in the Y-axis direction set in the first embodiment is shown. Fig.30 The horizontal axis represents the position in the Y-axis direction within the scanning field SF, and the vertical axis represents the temperature. In the X-axis center c, a fixed temperature Tc is set regardless of the position in the Y-axis direction, and in the X-axis end p, a fixed temperature Tp is set regardless of the position in the Y-axis direction. In addition, the temperature being fixed regardless of the position in the Y-axis direction is not limited to the case where the temperature distribution in the Y-axis direction of the photosensitive substrate is uniform, and includes the case where the target temperature is uniform.

[0262] like Fig.29 and Fig.30 As shown, the temperature distribution of each scanning field SF becomes a temperature distribution in which the temperature gradient in the Y-axis direction is smaller than the temperature gradient in the X-axis direction.

[0263] Fig.31 The first example of the temperature distribution set in the first embodiment is shown. In the first example, a plurality of scanning fields SF are arranged in a rectangular grid. That is, at the corners of the scanning fields SF, the boundary lines of the scanning fields SF intersect in a cross shape. The rectangular grid includes a square grid. In each scanning field SF, the temperature Tc of the center in the X-axis direction and the temperature Tp of the end in the X-axis direction are set, and a gentle temperature gradient is formed between the center in the X-axis direction and the end in the X-axis direction.

[0264] Fig.32The second example of the temperature distribution set in the first embodiment is shown. In the second example, a plurality of scanning fields SF are arranged so as to be offset in the X-axis direction for each column. In each scanning field SF, the temperature Tc of the center in the X-axis direction and the temperature Tp of the end in the X-axis direction are set, and a gentle temperature gradient is formed between the center in the X-axis direction and the end in the X-axis direction. In the second example, the temperature gradient at the boundary between the scanning fields SF adjacent in the Y-axis direction becomes larger.

[0265] exist Fig.31 and Fig.32 In the embodiment, the temperature distributions in the plurality of scanning fields SF are all equal to each other.

[0266] In setting Fig.31 and Fig.32 In the case of an arbitrary temperature distribution, the development control processor 310 may also separately obtain the configuration data of the scanning field SF on the photosensitive substrate and set the temperature distribution in a manner suitable for the configuration data of the scanning field SF.

[0267] In addition, the temperature distribution in the X-axis direction is shown to be bilaterally symmetrical about a straight line parallel to the Y-axis direction, but it may not be bilaterally symmetrical. For example, the temperature Tp may be set separately at the end in the +X direction and the end in the -X direction.

[0268] 2.2 Function

[0269] (1) The developing method of the photosensitive substrate according to the first embodiment includes the following steps.

[0270] The exposed photosensitive substrate is heated so as to present a temperature distribution having a temperature gradient in the X-axis direction intersecting the Y-axis direction on the surface of the photosensitive substrate in a plurality of scanning fields SF. The photosensitive substrate is exposed by scanning the plurality of scanning fields SF contained in the photosensitive substrate in the Y-axis direction via a photomask using a pulsed laser containing a plurality of central wavelengths.

[0271] After the photosensitive substrate is heated, a developing solution is supplied to the surface of the photosensitive substrate to perform development.

[0272] Thus, even if magnification chromatic aberration occurs when exposure is performed using multiple wavelengths, the line edge roughness can be adjusted by providing a temperature gradient in the X-axis direction in the temperature distribution of the post-exposure bake, thereby improving the quality of the pattern formed on the photosensitive substrate.

[0273] (2) In the first embodiment, the photosensitive substrate is heated so as to exhibit a temperature distribution in which the temperature gradient in the Y-axis direction is smaller than the temperature gradient in the X-axis direction in each of the plurality of scanning fields SF.

[0274] Pulse laser on workpiece table WT (refer to Figure 1) is long in the X-axis direction, so the magnification chromatic aberration is larger in the X-axis direction than in the Y-axis direction. The line edge roughness can be appropriately adjusted by increasing the temperature gradient in the X-axis direction and performing post-exposure baking with a temperature distribution corresponding to the position in the X-axis direction.

[0275] (3) In the first embodiment, the photosensitive substrate is heated so as to have a uniform temperature distribution in the Y-axis direction in each of the plurality of scanning fields SF.

[0276] The magnification chromatic aberration in the Y-axis direction is not large. In addition, even if there is aberration, scanning averaging is achieved by irradiating one part multiple times while scanning in the Y-axis direction. Therefore, the line edge roughness can be appropriately adjusted by post-exposure baking with a uniform temperature distribution in the Y-axis direction.

[0277] (4) In the first embodiment, the photosensitive substrate is heated so as to exhibit a temperature distribution symmetrical about the straight lines parallel to the Y-axis direction in each of the plurality of scanning fields SF.

[0278] Since the magnification chromatic aberration may occur symmetrically about a straight line parallel to the Y-axis direction as an axis, the line edge roughness can be appropriately adjusted by performing the post-exposure baking with a symmetrical temperature distribution.

[0279] (5) According to the first embodiment, the temperature distributions in the plurality of scan fields SF are equal to each other.

[0280] Thus, when the exposure conditions of the plurality of scanning fields SF are the same, the line edge roughness can be appropriately adjusted.

[0281] (6) In the first embodiment, the plurality of scanning fields SF are arranged in a rectangular grid.

[0282] This makes it possible to alleviate the temperature gradient at the boundary between the scanning fields SF adjacent to each other in the Y-axis direction, and perform the post-exposure bake with an appropriate temperature distribution.

[0283] (7) In the first embodiment, the photosensitive substrate is heated by the hot plate, and the hot plate is set to have a temperature gradient in the X-axis direction.

[0284] Thus, by setting the temperature gradient of the hot plate, the temperature distribution of the post-exposure bake can be appropriately controlled.

[0285] (8) The method for developing a photosensitive substrate according to the first embodiment includes the following steps.

[0286] The exposed PEB test wafer WFi is heated. The PEB test wafer WFi is exposed by scanning a plurality of scanning fields SF included in the PEB test wafer WFi in the Y-axis direction through a PEB test mask using a pulse laser including a plurality of center wavelengths.

[0287] After the PEB test wafer WFi is heated, a developing solution is supplied to the surface of the PEB test wafer WFi to perform development.

[0288] After the PEB test wafer WFi is developed, the wafer pattern of the PEB test wafer WFi is measured.

[0289] The temperature distribution is set based on the measurement results of the wafer pattern of the PEB test wafer WFi.

[0290] Therefore, by using the measurement results of the wafer pattern, the temperature distribution can be appropriately set.

[0291] (9) In the first embodiment, a plurality of PEB test wafers including the PEB test wafer WFi are heated at different temperatures Ti from each other.

[0292] Thus, by using the results of the post-exposure bake at different temperatures Ti, it is possible to set an appropriate temperature.

[0293] (10) In the first embodiment, the plurality of PEB test wafers are heated individually so as to have a uniform temperature distribution.

[0294] This allows accurate temperature control in the post-exposure bake of the PEB test wafer WFi, so that data indicating the relationship between the post-exposure bake temperature and the measurement result of the wafer pattern is more accurate, and the temperature distribution can be appropriately set.

[0295] (11) In the first embodiment, the average values ​​LERci, CDci, LERpi and CDpi of the measurement results of the chip pattern of the PEB test chip WFi are calculated according to each temperature Ti and the position of each scanning field SF in the X-axis direction, and the temperature distribution in the X-axis direction is set based on the average values ​​LERci, CDci, LERpi and CDpi.

[0296] Therefore, even if there is a slight deviation in the measurement result, accurate measurement data can be obtained by using the average value LERci, CDci, LERpi or CDpi.

[0297] (12) In the first embodiment, the temperature at which the measurement result of the wafer pattern of the PEB test wafer WFi is within the allowable range at the position of each end of the scanning field SF in the X-axis direction away from the center in the X-axis direction is determined, and the temperature distribution is set based on the determined temperature.

[0298] Thereby, it is possible to set an appropriate temperature distribution according to the position in the X-axis direction in the scanning field SF.

[0299] (13) In the first embodiment, the measurement results of the wafer pattern of the PEB test wafer WFi include the average value LERpi of the line edge roughness at the end positions in the X-axis direction, and the temperature distribution is determined so that the average value LERpi is within the allowable range.

[0300] Thus, since the temperature distribution of the post-exposure bake is set after actually measuring the line edge roughness, the line edge roughness can be improved with high accuracy.

[0301] (14) In the first embodiment, when the difference between the reference LERc at the center of the X-axis direction and the average value LERpi of the line edge roughness at the end position in the X-axis direction when the PEB test wafer WFi is heated and developed at the nominal temperature Tnom is below a threshold value, the average value LERpi at the end position in the X-axis direction is set to be within an allowable range.

[0302] Thus, by determining the difference from the reference LERc, the line edge roughness at the end portion in the X-axis direction can be brought close to the line edge roughness at the center portion in the X-axis direction.

[0303] (15) In the first embodiment, the measurement results of the chip pattern of the PEB test chip WFi also include the average value CDpi of the critical dimension at the end position in the X-axis direction, and the temperature distribution is determined in such a way that the average value LERpi of the line edge roughness at the end position in the X-axis direction and the average value CDpi of the critical dimension are both within an allowable range.

[0304] This can improve both line edge roughness and critical dimension.

[0305] Regarding other aspects, the first embodiment is the same as the comparative example.

[0306] 3. Combination of temperature distribution of post-exposure baking and OPC

[0307] 3.1 Action

[0308] Fig.33 This is a flowchart showing a process of forming a resist pattern on a photosensitive substrate in the second embodiment. Fig.33 Although the process of the developing device 300 is mainly shown, the process of the exposure device 200 is partially included.

[0309] Processing and reference of setting temperature distribution in S1a Fig. 20 and Fig. 22 The processing of the first embodiment described above is the same. However, the second embodiment is different from the first embodiment in the following points.

[0310] (a) In the first embodiment, Fig. 22 S13 and Fig.25 In S134, S135 and S138 of the embodiment, the critical dimensions CDcik and CDpik are measured as chip patterns, and their average values ​​CDci and CDpi are calculated. In contrast, in the second embodiment, the critical dimensions CDcik and CDpik are not measured, and the average values ​​CDci and CDpi are not calculated.

[0311] (b) In the first embodiment, Fig. 22 S15 and Fig.28 In S153 of the embodiment, it is determined whether the average value CDpi of the critical dimensions is within the allowable range. In contrast, in the second embodiment, it is not determined whether the average value CDpi of the critical dimensions is within the allowable range.

[0312] Fig.34 and Fig.35 The details of the processing of S13 and S15 in the second embodiment are shown respectively. Fig.34 Corresponding to the first embodiment Fig.25 , Fig.35 Corresponding to the first embodiment Fig.28 .

[0313] like Fig.34 As shown, the development control processor 310 measures only the line edge roughnesses LERcik and LERpik in S134b and S135b, and calculates the average values ​​LERci and LERpi in S138b.

[0314] like Fig.35 As shown, in S152, the development control processor 310 determines whether the average value LERpi of the line edge roughness is within the allowable range.

[0315] Refer again Fig.33 In S2b, a photomask is produced based on OPC. By performing OPC, the critical dimension can be within the allowable range. For details of S2b, refer to Figure 36 to Figure 41 This will be described later.

[0316] The processing of S3 to S7 is the same as that of the first embodiment.

[0317] Fig.361 is a conceptual diagram of the segmentation model-based OPC in the second embodiment. The segmentation model-based OPC is different from the model-based OPC in the comparative example in that the target pattern G, the test mask pattern E, the measurement wafer pattern D, the model function group M, the OPC process P, and the calibration mask pattern F are respectively prepared for each of the plurality of segmentation areas #1 to #n, and the model-based OPC is performed for each of the segmentation areas #1 to #n.

[0318] Fig.37 The plurality of segmented regions #1 to #n included in the scanning field SF of the OPC test wafer are shown. n is an integer greater than or equal to 2, and the plurality of segmented regions #1, #2, ..., and #n are arranged in this order in the X-axis direction on the surface of the OPC test wafer. Preferably, the widths of the segmented regions #1 to #n in the X-axis direction are equal to each other. Preferably, the number of segmented regions #1 to #n, i.e., the value of n, is greater than or equal to 3 and less than or equal to 15.

[0319] Refer again Fig.36 The measurement wafer pattern D obtained from the scanning field SF of the OPC test wafer is divided into measurement wafer patterns D#1 to D#n corresponding to the divided areas #1 to #n.

[0320] One scanning field SF included in the OPC test wafer corresponds to the area where the test mask pattern E formed on one OPC test mask is transferred in one scan, and corresponds to the OPC test mask. The test mask pattern E is also divided into test mask patterns E#1 to E#n corresponding to the divided areas #1 to #n.

[0321] One scanning field SF included in the OPC test wafer corresponds to one scanning field SF included in the photosensitive substrate. The target pattern G to be formed on the photosensitive substrate is also divided into target patterns G#1 to G#n corresponding to the divided regions #1 to #n.

[0322] One scanning field SF included in the photosensitive substrate corresponds to the region where the correction mask pattern F of one photomask is transferred in one scan, and corresponds to the photomask. The correction mask pattern F is also divided into correction mask patterns F#1 to F#n corresponding to divided regions #1 to #n.

[0323] In the OPC based on the partition model, model function groups M#1 to M#n corresponding to the partitioned areas #1 to #n are created, and OPC processes P#1 to P#n corresponding to the partitioned areas #1 to #n are created.

[0324] Fig.38 It is a flow chart of OPC based on segmentation model. Fig.38 The processing shown is mainly performed by a processor such as the exposure control processor 210.

[0325] In S210a, the processor obtains target patterns G#1 to G#n. For example, the target pattern G designed by the designer of the semiconductor chip is divided into divided areas #1 to #n, thereby obtaining the target patterns G#1 to G#n.

[0326] S220 Processing and Reference Fig.14 The processing in the described model-based OPC is the same.

[0327] In S230a, the processor creates test mask patterns E#1 to E#n based on target patterns G#1 to G#n. For example, different test mask patterns E#1 to E#n may be created based on segmented areas #1 to #n, just as test mask pattern E#1 is created based on a characteristic shape included in target pattern G#1 and test mask pattern E#2 is created based on a characteristic shape included in target pattern G#2. Alternatively, a common test mask pattern, i.e., test mask patterns E#1 to E#n containing the same pattern shape as each other, may be created based on the characteristic shape included in target patterns G#1 to G#n.

[0328] According to the test mask patterns E#1 to E#n, an OPC test mask is manufactured by a mask manufacturing apparatus.

[0329] In S240a, the exposure device 200 scans the OPC test wafer through the OPC test mask, thereby exposing the OPC test wafer. The exposure of the OPC test wafer is performed by light of a plurality of wavelengths used in the exposure of the photosensitive substrate.

[0330] In S242a, the processor controls the processing unit 302 so that Fig.33 The OPC test wafer is post-exposed and baked according to the temperature distribution set in S1a, and a developer is supplied to the surface of the OPC test wafer.

[0331] Furthermore, the developed photosensitive substrate is cleaned, dried, and baked after development. When etching is performed, etching is performed by an etching device (not shown), thereby patterning the OPC test wafer.

[0332] In S250a, the processor measures the wafer pattern of the OPC test wafer, and obtains measured wafer patterns D#1 to D#n indicating the measurement results in the plurality of divided regions #1 to #n.

[0333] Fig.39 The data structure of the measurement wafer patterns D#1 to D#n is shown. The measurement wafer patterns D#1 to D#n each include p dimensions measured for m shapes 1 to m.

[0334] When test exposure is performed on multiple scan fields SF included in an OPC test wafer using one OPC test mask, the average value of each divided area, each shape, and each size is calculated based on the measurement results in the multiple scan fields SF and is set as the measurement wafer patterns D#1 to D#n.

[0335] Refer again Fig.38 In S260a, the processor creates model function groups M#1 to M#n based on the test mask patterns E#1 to E#n and the measurement wafer patterns D#1 to D#n. For example, the model function group M#1 is created based on the test mask pattern E#1 and the measurement wafer pattern D#1, and the model function group M#2 is created based on the test mask pattern E#2 and the measurement wafer pattern D#2.

[0336] Fig.40 This is a flowchart showing details of the process of creating the model function groups M#1 to M#n. Fig.40 The processing shown is equivalent to Fig.38 The S260a subroutine.

[0337] In S262a, the processor performs exposure simulation using test mask patterns E#1 to E#n. Exposure simulation may also be performed using light having fewer central wavelengths than the pulsed laser light containing multiple central wavelengths used to scan the OPC test wafer. Exposure simulation is preferably performed using a single wavelength.

[0338] In S263a, the value of counter j is set to an initial value of 1. Counter j identifies one model function group among model function groups M#1 to M#n, and identifies one test mask pattern among test mask patterns E#1 to E#n and one measurement wafer pattern among measurement wafer patterns D#1 to D#n.

[0339] Processing and reference of S264a~S267a Fig.16 The processing of S264 to S267 described above is the same. However, using the exposure simulation result using one of the test mask patterns E#1 to E#n determined by the counter j and one of the measurement wafer patterns D#1 to D#n determined by the counter j, one of the model function groups M#1 to M#n determined by the counter j is created. When the judgment of S266a becomes "yes" and one of the model function groups M#1 to M#n is created, the processor causes the processing to enter S268a.

[0340] In S268a, the processor determines whether the value of counter j is greater than n. If the value of counter j is less than n (S268a: No), in S269a, the processor adds 1 to the value of counter j, returns the process to S264a, and sets the model function group M#j for another segmented area. If the value of counter j is greater than n, the processor ends the process of this flowchart and returns to S269a. Fig.38 Processing shown.

[0341] Fig.41 The following is an example of model function groups M#1 to M#n. When one of the model function groups M#1 to M#n is determined by j, one model function group M#j includes k functions M#j1 to M#j. k Function M#j1~M#j k The number of , that is, the value of k, may be different from one another in the model function groups M#1 to M#n.

[0342] Refer again Fig.38 In S270a, the processor creates OPC processes P#1-P#n respectively according to the model function groups M#1-M#n.

[0343] In S280a, the processor uses the target patterns G#1 to G#n to respectively execute OPC processes P#1 to P#n to respectively produce correction mask patterns F#1 to F#n. Thus, for example, correction mask pattern F#1 is produced according to target pattern G#1 and model function group M#1, and correction mask pattern F#2 is produced according to target pattern G#2 and model function group M#2.

[0344] In S310a, the mask manufacturing apparatus manufactures a photomask based on the correction mask patterns F#1 to F#n, and the process of this flowchart ends.

[0345] 3.2 Function

[0346] (16) A method for producing a photomask according to the second embodiment is a method for producing a photomask used for photolithography using a pulse laser beam having a plurality of center wavelengths, and includes the following steps.

[0347] A chip pattern of an OPC test chip developed by supplying a developer to the surface of the OPC test chip is measured, and measurement chip patterns D#1 to D#n representing measurement results of each of a plurality of divided areas #1 to #n arranged in the X-axis direction are obtained. The OPC test chip is exposed by scanning the OPC test chip in the Y-axis direction via an OPC test mask using a pulsed laser. The OPC test chip is heated to present a temperature distribution having a temperature gradient in the X-axis direction intersecting the Y-axis direction on the surface of the OPC test chip in each of a plurality of scanning fields SF included in the OPC test chip.

[0348] Calibration mask patterns F#1 to F#n for making a photomask are made based on test mask patterns E#1 to E#n formed on an OPC test mask, measurement wafer patterns D#1 to D#n, and target patterns G#1 to G#n, which are wafer patterns set as targets for a photosensitive substrate.

[0349] A photomask is produced based on the correction mask patterns F#1 to F#n.

[0350] Thus, by using the measurement results of each of the divided areas #1 to #n, OPC taking into account off-axis chromatic aberration can be performed to create correction mask patterns F#1 to F#n.

[0351] In the first embodiment, the temperature distribution of the post-exposure bake is set so that both the line edge roughness and the critical dimension are within the allowable range, but sometimes a solution in which both the line edge roughness and the critical dimension are within the allowable range may not be obtained. According to the second embodiment, the line edge roughness can be adjusted by the temperature distribution of the post-exposure bake, and the critical dimension can be adjusted by the OPC of each divided area #1 to #n.

[0352] (17) The method for manufacturing the photomask according to the second embodiment further includes the following steps.

[0353] The exposed PEB test wafer WFi is heated. The PEB test wafer WFi is exposed by scanning a plurality of scanning fields SF included in the PEB test wafer WFi in the Y-axis direction through a PEB test mask using a pulse laser including a plurality of center wavelengths.

[0354] After the PEB test wafer WFi is heated, a developing solution is supplied to the surface of the PEB test wafer WFi to perform development.

[0355] After the PEB test wafer WFi is developed, the wafer pattern of the PEB test wafer WFi is measured.

[0356] The temperature distribution is set based on the measurement results of the wafer pattern of the PEB test wafer WFi.

[0357] Thus, the temperature distribution for post-exposure baking of the OPC test wafer can be set based on the measurement results of the wafer pattern of the PEB test wafer WFi, so the OPC test wafer can be manufactured with high accuracy.

[0358] (18) In the second embodiment, the temperature distribution is determined in such a manner that the average value LERpi of the line edge roughness at the end positions of each scanning field SF away from the center portion in the X-axis direction is within an allowable range, and the correction mask patterns F#1 to F#n are produced in such a manner that the critical dimensions at the end positions in the X-axis direction are within an allowable range.

[0359] This can improve both the line edge roughness and the critical dimension at the end portion in the X-axis direction.

[0360] (19) The developing method of the photosensitive substrate according to the second embodiment includes the following steps.

[0361] The photomask is produced by the above-mentioned production method including OPC taking off-axis chromatic aberration into consideration.

[0362] The exposed photosensitive substrate is heated so as to exhibit a set temperature distribution. The photosensitive substrate is exposed by scanning the photosensitive substrate in the Y-axis direction through a photomask using a pulse laser including a plurality of center wavelengths.

[0363] After the photosensitive substrate is heated, a developing solution is supplied to the surface of the photosensitive substrate to perform development.

[0364] This makes it possible to form a pattern on the photosensitive substrate with high precision.

[0365] In the second embodiment, the case where the model-based OPC is executed for each of the divided areas # 1 to #n is described, but the present disclosure is not limited to this, and for example, the rule-based OPC may be executed for each of the divided areas # 1 to #n.

[0366] Regarding other aspects, the second embodiment is the same as the first embodiment.

[0367] 4. Others

[0368] The above description is not limiting but simply illustrative. Therefore, those skilled in the art will appreciate that changes can be made to the embodiments of the present disclosure without departing from the claims. In addition, those skilled in the art will appreciate that the embodiments of the present disclosure can be used in combination.

[0369] Unless explicitly stated otherwise, the terms used in this specification and claims as a whole should be interpreted as "non-limiting" terms. For example, terms such as "including" or "comprising" should be interpreted as "not limited to the parts recorded as included". Terms such as "having" should be interpreted as "not limited to the parts recorded as having". In addition, the indefinite article "one" should be interpreted as meaning "at least one" or "one or more". In addition, terms such as "at least one of A, B and C" should be interpreted as "A", "B", "C", "A+B", "A+C", "B+C" or "A+B+C". Furthermore, it should be interpreted as also including combinations of them and parts other than "A", "B" and "C".

Claims

1. A method for developing a photosensitive substrate, comprising the following steps: The exposed photosensitive substrate is heated so that it presents a temperature distribution having a temperature gradient in a second direction intersecting the first direction on the surface of the photosensitive substrate in a plurality of scanning fields, wherein: The photosensitive substrate is exposed by scanning the plurality of scanning fields included in the photosensitive substrate in the first direction respectively through a photomask using a pulse laser including a plurality of central wavelengths; and After the photosensitive substrate is heated, a developing solution is supplied to the surface of the photosensitive substrate to perform development.

2. The developing method according to claim 1, wherein: The photosensitive substrate is heated so as to exhibit the temperature distribution in which the temperature gradient in the first direction is smaller than the temperature gradient in the second direction in each of the plurality of scanning fields.

3. The developing method according to claim 1, wherein: The photosensitive substrate is heated so as to exhibit the uniform temperature distribution in the first direction in each of the plurality of scanning fields.

4. The developing method according to claim 1, wherein: The photosensitive substrate is heated so that the temperature distribution exhibits symmetry about a straight line parallel to the first direction as an axis in each of the plurality of scanning fields.

5. The developing method according to claim 1, wherein: In the plurality of scanning fields, the temperature distributions are equal to each other.

6. The developing method according to claim 1, wherein: The plurality of scanning fields are arranged in a rectangular grid shape.

7. The developing method according to claim 1, wherein: The photosensitive substrate is heated by a hot plate, and the hot plate is set to have a temperature gradient in the second direction.

8. The developing method according to claim 1, wherein: The developing method further comprises the following steps: heating the exposed first test wafer, wherein the first test wafer is exposed by scanning a plurality of scanning fields included in the first test wafer in the first direction through a first test mask using a pulse laser including the plurality of center wavelengths; After heating the first test wafer, supplying a developing solution to a surface of the first test wafer for development; After developing the first test wafer, measuring a wafer pattern of the first test wafer; and The temperature distribution is set based on a measurement result of a wafer pattern of the first test wafer.

9. The developing method according to claim 8, wherein: A plurality of first test wafers including the first test wafer are heated at temperatures different from each other.

10. The developing method according to claim 9, wherein: The plurality of first test wafers are heated respectively so as to have a uniform temperature distribution.

11. The developing method according to claim 9, wherein: An average value of measurement results of the wafer pattern of the first test wafer is calculated for each of the temperatures and the positions of the scanning fields in the second direction, and the temperature distribution in the second direction is set based on the average value.

12. The developing method according to claim 11, wherein: The temperature within the allowable range at a first position away from the center in the second direction of each of the scanning fields as a result of measurement of the wafer pattern of the first test wafer is determined, and the temperature distribution is set based on the determined temperature.

13. The developing method according to claim 12, wherein: The measurement result of the wafer pattern of the first test wafer includes the line edge roughness at the first position, and the temperature distribution is determined so that the line edge roughness at the first position is within an allowable range.

14. The developing method according to claim 13, wherein: When the difference between the line edge roughness at the center in the second direction and the line edge roughness at the first position when the first test wafer is heated and developed at a reference temperature is equal to or less than a threshold, the line edge roughness at the first position is within an allowable range.

15. The developing method according to claim 13, wherein: The measurement result of the wafer pattern of the first test wafer further includes a critical dimension at the first position, and the temperature distribution is determined so that both the line edge roughness at the first position and the critical dimension are within an allowable range.

16. A method for producing a photomask used for photolithography using a pulsed laser having a plurality of central wavelengths, wherein: The method for making the photomask comprises the following steps: Measuring a wafer pattern of a second test wafer developed by supplying a developer to a surface of the exposed and heated second test wafer, and obtaining a measurement wafer pattern indicating measurement results of each of a plurality of divided regions arranged in a second direction, wherein the second test wafer is exposed by scanning the second test wafer in a first direction via a second test mask using a pulsed laser, and the second test wafer is heated so that a temperature distribution having a temperature gradient in the second direction intersecting the first direction appears on the surface of the second test wafer in each of a plurality of scanning fields included in the second test wafer; Creating a calibration mask pattern for creating the photomask based on a test mask pattern formed on the second test mask, the measurement wafer pattern, and a target pattern that is a wafer pattern serving as a target for a photosensitive substrate; and The photomask is produced according to the correction mask pattern.

17. The method according to claim 16, wherein: The production method further comprises the following steps: heating the exposed first test wafer, wherein the first test wafer is exposed by scanning a plurality of scanning fields included in the first test wafer in the first direction respectively through a first test mask using a pulse laser including the plurality of center wavelengths; After heating the first test wafer, supplying a developing solution to a surface of the first test wafer for development; After developing the first test wafer, measuring a wafer pattern of the first test wafer; and The temperature distribution is set based on a measurement result of a wafer pattern of the first test wafer.

18. The method according to claim 16, wherein: The temperature distribution is set so that the line edge roughness at a first position away from the center portion in the second direction of each of the scanning fields is within an allowable range, The correction mask pattern is formed so that the critical dimension at the first position is within an allowable range.

19. A method for developing a photosensitive substrate, comprising the following steps: Manufacturing the photomask by the manufacturing method according to claim 16; The exposed photosensitive substrate is heated to make it present the temperature distribution, wherein: The photosensitive substrate is exposed by scanning the photosensitive substrate in the first direction via the photomask using a pulse laser including a plurality of central wavelengths; as well as After the photosensitive substrate is heated, a developing solution is supplied to the surface of the photosensitive substrate to perform development.

20. A method for manufacturing an electronic device, comprising the following steps: generating a pulse laser including a plurality of central wavelengths by a laser device; Outputting the pulse laser to an exposure device; In the exposure device, the pulse laser is used to scan a plurality of scanning fields included in the photosensitive substrate in a first direction through a photomask to perform exposure; heating the exposed photosensitive substrate so that the exposed photosensitive substrate presents a temperature distribution having a temperature gradient in a second direction intersecting the first direction on the surface of the photosensitive substrate in each of the plurality of scanning fields; and After the photosensitive substrate is heated, a developing solution is supplied to the surface of the photosensitive substrate to perform development.

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