Display device and driving method thereof

Abstract

The invention provides a display device and a driving method thereof, and a pixel circuit of the display device comprises a light-emitting element, a data write-in transistor, a driving transistor, and a compensation transistor electrically connected between the data write-in transistor and the driving transistor. In a first time period, the data writing transistor is used for transmitting a first reset signal generated by the voltage generation unit to the gate of the driving transistor, the compensation transistor is conducted, in a second time period, the driving transistor is used for receiving a first voltage signal, and the driving transistor is conducted to enable the potential of the gate of the driving transistor to rise or fall until the driving transistor is cut off. And in the third time period, the detection unit is used for obtaining the potential of the grid electrode of the driving transistor through the data writing transistor so as to generate a compensation voltage signal, and development of a high-resolution display product is facilitated.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display device and a driving method thereof. Background Art

[0002] In current self-luminous display products, pixel circuits need to be equipped with more transistors to achieve functions such as threshold voltage compensation, which is not conducive to the development of high-resolution display products. Summary of the invention

[0003] The object of the present invention is to provide a display device and a driving method thereof, so as to improve the problem that the existing pixel circuit has too many transistors and is not conducive to the development of high-resolution display products.

[0004] An embodiment of the present invention provides a display device, comprising a plurality of control circuits and a plurality of corresponding pixel circuits, wherein the control circuits include a detection unit and a voltage generation unit corresponding to the pixel circuits, and the pixel circuits include:

[0005] Light emitting element;

[0006] a data writing transistor, wherein one of a source and a drain of the data writing transistor is electrically connected to the corresponding detection unit and the corresponding voltage generating unit;

[0007] A driving transistor, wherein a gate of the driving transistor is electrically connected to the data writing transistor, and one of a source and a drain of the driving transistor is electrically connected to one end of the light emitting element;

[0008] A compensation transistor electrically connected between one of the source and the drain of the driving transistor and the gate of the driving transistor;

[0009] In a first period, the data writing transistor is used to transmit the first reset signal generated by the voltage generating unit to the gate of the driving transistor, and the compensation transistor is used to transmit the first reset signal to one of the source and the drain of the driving transistor;

[0010] In a second time period after the first time period, the driving transistor is used to receive a first voltage signal transmitted by a first voltage line, and the driving transistor is turned on under the action of the first reset signal, the first voltage signal and the turned-on compensation transistor, so that the potential of the gate of the driving transistor rises or falls until the driving transistor is turned off;

[0011] In a third period after the second period, the detection unit is used to obtain the potential of the gate of the driving transistor through the data writing transistor, and the control circuit is used to generate a compensation voltage signal according to the potential of the gate of the driving transistor.

[0012] In some embodiments, the pixel circuit further comprises:

[0013] a light emitting control transistor, wherein one of the source and the drain of the light emitting control transistor is electrically connected to the first voltage line, and the other of the source and the drain of the light emitting control transistor is electrically connected to the other of the source and the drain of the driving transistor;

[0014] At least in the second period, the light emission control transistor is used to transmit the first voltage signal to the other of the source and the drain of the driving transistor.

[0015] In some embodiments, during the first period and the third period, the light emission control transistor is used to transmit the first voltage signal to the other of the source and the drain of the driving transistor.

[0016] In some embodiments, the other end of the light emitting element is electrically connected to a second voltage line for transmitting a second voltage signal;

[0017] In the first time period, the second time period and the third time period, the absolute value of the difference between the amplitude of the first reset signal and the amplitude of the second voltage signal is smaller than the turn-on voltage of the light-emitting element, and the absolute value of the difference between the amplitude of the second voltage signal and the amplitude of the first voltage signal is smaller than the absolute value of the difference between the turn-on voltage of the light-emitting element and the driving transistor.

[0018] In some embodiments, in a fourth time period after the third time period, the data writing transistor is used to transmit the first reset signal generated by the voltage generating unit to the gate of the driving transistor, the compensation transistor is used to transmit the first reset signal to one of the source and the drain of the driving transistor, and the light emitting control transistor is used to control the formation of a current circuit between the first voltage line and the other of the source and the drain of the driving transistor.

[0019] In some embodiments, in a fifth time period after the fourth time period, the data writing transistor is used to transmit the target data signal generated by the voltage generating unit to the gate of the driving transistor, the compensation transistor is used to control a current disconnection between one of the source and the drain of the driving transistor and the gate of the driving transistor, and the light emission control transistor is used to control a current disconnection between the first voltage line and the other of the source and the drain of the driving transistor;

[0020] The control circuit is used to generate the target data signal according to the compensation voltage signal and the data signal, and the data signal is used to be generated according to the corresponding grayscale value.

[0021] In some embodiments, in a sixth time period after the fifth time period, the light emitting control transistor is used to control the formation of a current path between the first voltage line and the other of the source and the drain of the driving transistor, and the driving transistor is used to generate a driving current according to the target data signal to drive the light emitting element to emit light.

[0022] In some embodiments, the pixel circuit further comprises:

[0023] a first reset transistor, wherein one of a source and a drain of the first reset transistor is electrically connected to one end of the light emitting element and one of a source and a drain of the driving transistor, and the other of the source and the drain of the first reset transistor is electrically connected to a reset line for transmitting a second reset signal;

[0024] In a fourth time period after the third time period, the data writing transistor is used to transmit the first reset signal generated by the voltage generating unit to the gate of the driving transistor, the compensation transistor is used to electrically disconnect one of the source and the drain of the driving transistor from the gate of the driving transistor, and the first reset transistor is used to transmit the second reset signal to one of the source and the drain of the driving transistor;

[0025] In a fifth time period after the fourth time period, the data writing transistor is used to transmit the target data signal generated by the voltage generating unit to the gate of the driving transistor, the compensation transistor is used to control a current disconnection between one of the source and the drain of the driving transistor and the gate of the driving transistor, the light emission control transistor is used to control a current disconnection between the first voltage line and the other of the source and the drain of the driving transistor, and the first reset transistor is used to transmit the second reset signal to one of the source and the drain of the driving transistor;

[0026] The control circuit is used to generate the target data signal according to the compensation voltage signal and the data signal, and the data signal is used to be generated according to the corresponding grayscale value.

[0027] In some embodiments, the pixel circuit further comprises:

[0028] a second reset transistor, one of a source and a drain of the second reset transistor being electrically connected to the other of the source and the drain of the drive transistor and the other of the source and the drain of the light emission control transistor, and the other of the source and the drain of the second reset transistor being electrically connected to the reset line;

[0029] In the fourth period and the fifth period, the second reset transistor is used to transmit the second reset signal to the other of the source and the drain of the driving transistor.

[0030] In some embodiments, in a sixth time period after the fifth time period, the light emitting control transistor is used to control the formation of a current path between the first voltage line and the other of the source and the drain of the driving transistor, and the driving transistor is used to generate a driving current according to the target data signal to drive the light emitting element to emit light.

[0031] In some embodiments, the pixel circuit further comprises:

[0032] The capacitor is electrically connected between the gate of the driving transistor and the first voltage line, and the first voltage signal transmitted by the first voltage line is a constant voltage signal.

[0033] An embodiment of the present invention also provides a driving method of a display device, wherein the display device includes a plurality of control circuits and a plurality of corresponding pixel circuits, wherein the control circuits include a detection unit and a voltage generation unit corresponding to the pixel circuits, and the pixel circuits include:

[0034] Light emitting element;

[0035] a data writing transistor, wherein one of a source and a drain of the data writing transistor is electrically connected to the corresponding detection unit and the corresponding voltage generating unit;

[0036] A driving transistor, wherein a gate of the driving transistor is electrically connected to the data writing transistor, and one of a source and a drain of the driving transistor is electrically connected to one end of the light emitting element;

[0037] A compensation transistor electrically connected between one of the source and the drain of the driving transistor and the gate of the driving transistor;

[0038] The driving method of the display device comprises:

[0039] In a first period, controlling the data writing transistor to transmit the first reset signal generated by the voltage generating unit to the gate of the driving transistor, and controlling the compensation transistor to transmit the first reset signal to one of the source and the drain of the driving transistor;

[0040] In a second time period after the first time period, controlling the other of the source and the drain of the driving transistor to receive the first voltage signal transmitted by the first voltage line, and controlling the driving transistor to be turned on under the action of the first reset signal, the first voltage signal and the turned-on compensation transistor, so that the potential of the gate of the driving transistor rises or falls until the driving transistor is turned off;

[0041] In a third period after the second period, the detection unit is controlled to obtain the potential of the gate of the driving transistor through the data writing transistor, and the control circuit is controlled to generate a compensation voltage signal according to the potential of the gate of the driving transistor.

[0042] The present invention provides a display device and a driving method thereof. The display device includes a plurality of control circuits and a plurality of corresponding pixel circuits. The control circuit includes a detection unit and a voltage generating unit corresponding to the pixel circuit. In a first time period, the other of the source and the drain of the driving transistor is used to receive a first voltage signal transmitted by a first voltage line. The driving transistor is turned on under the action of the first reset signal, the first voltage signal and the turned-on compensation transistor, so that the potential of the gate of the driving transistor rises or falls until the driving transistor is turned off. In a second time period, the other of the source and the drain of the driving transistor is used to receive the first voltage signal transmitted by the first voltage line. The driving transistor is turned on under the action of the first reset signal, the first voltage signal and the turned-on compensation transistor, so that the potential of the gate of the driving transistor rises or falls until the driving transistor is turned off. The potential of the gate of the driving transistor is detected and reset only by a data writing transistor in time sharing, so that more transistors can be avoided from being set for internal compensation, further saving the number of transistors, and also facilitating the development of high-resolution display products. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A circuit diagram of a pixel circuit provided by an embodiment of the present invention.

[0044] Figure 2 and Figure 3 The embodiments of the present invention provide Figure 1 The corresponding timing diagram.

[0045] Figure 4 A circuit diagram of another pixel circuit provided by an embodiment of the present invention.

[0046] Figure 5 and Figure 6 The embodiments of the present invention provide Figure 4 The corresponding timing diagram.

[0047] Figure 7The present invention provides a flow chart of a method for driving a display device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0048] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0049] In the description of the present invention, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, and unless otherwise clearly and specifically defined, "electrically connected" means that the two are connected through a conductive material, and is not limited to being constantly turned on or partially turned on.

[0050] In addition, it should be noted that the drawings only provide structures and steps that are closely related to the present invention, and omit some details that are not closely related to the invention. The purpose is to simplify the drawings and make the invention clear at a glance, rather than to indicate that the actual device is exactly the same as the attached drawings. Figure 1 The same is not a limitation of the actual device.

[0051] The present invention provides a display device, which may include but is not limited to the following embodiments and combinations of the following embodiments.

[0052] In some embodiments, Figure 1 and Figure 4 As shown, the display device 100 includes a plurality of control circuits 10 and a plurality of corresponding pixel circuits 20, wherein the control circuit 10 includes a detection unit 101 and a voltage generating unit 102 corresponding to the pixel circuit 20, and the pixel circuit 20 includes: a light-emitting element D; a data writing transistor T2, wherein one of the source and the drain of the data writing transistor T2 is electrically connected to the corresponding detection unit 101 and the corresponding voltage generating unit 102; a driving transistor T1, wherein the gate of the driving transistor T1 is electrically connected to the data writing transistor T2, and one of the source and the drain of the driving transistor T1 is electrically connected to one end of the light-emitting element D; a compensation transistor T4, which is electrically connected between one of the source and the drain of the driving transistor T1 and the gate of the driving transistor T1; Figure 2 and Figure 5 As shown, they are Figure 1 and Figure 4 Corresponding timing diagram, in the first time period t1, the data writing transistor T2 is used to transmit the first reset signal Vini generated by the voltage generating unit 102 to the gate of the driving transistor T1, and the compensation transistor T4 is used to transmit the first reset signal Vini to one of the source and the drain of the driving transistor T1; in the second time period t2 after the first time period t1, the driving transistor T1 is used to receive the first voltage signal Vdd transmitted by the first voltage line, and the driving transistor T1 is turned on under the action of the first reset signal Vini, the first voltage signal Vdd and the turned-on compensation transistor T4, so that the potential Vg of the gate of the driving transistor T1 increases or decreases until the driving transistor T1 is turned off; in the third time period t3 after the second time period t2, the detection unit 101 is used to obtain the potential Vg of the gate of the driving transistor T1 through the data writing transistor T2, and the control circuit 10 is used to generate the compensation voltage signal Vb according to the potential Vg of the gate of the driving transistor T1.

[0053] Among them, the display device 100 may include a display panel, a driver and the above-mentioned power manager. The display panel may include multiple pixel circuits 20 mentioned above. The power manager can provide corresponding voltage signals to the multiple pixel circuits and the driver respectively. The driver can generate control signals and data signals Vdata acting on the pixel circuits 20 according to the corresponding voltage signals. The multiple pixel circuits 20 control multiple light-emitting elements D therein to emit light under the action of the control signals, data signals and corresponding voltage signals, thereby presenting a display picture.

[0054] Specifically, the above-mentioned driver may include a gate driver (not shown, which may be integrated into the display panel or set independently of the display panel) and a source driver (not shown). Here, the display panel includes N (N is a positive integer) rows of pixel circuits 20 as an example. The gate driver may generate N first gate signals Scan respectively transmitted to the N rows of pixel circuits 20, and the source driver may generate multiple data signals Vdata respectively transmitted to multiple columns of pixel circuits 20, and each data signal Vdata may include multiple data voltages corresponding to the multiple pixel circuits 20 of the column. The N gate pulses in the N first gate signals Scan are arranged in sequence on the time axis, and are used to control the N rows of pixel circuits 20 to turn on in sequence. Correspondingly, in the period when each row of pixel circuits 20 is turned on, the multiple data signals Vdata output by the source driver are respectively multiple data voltages corresponding to the multiple pixel circuits 20 of the row, so that the multiple pixel circuits 20 of the row are respectively loaded with the corresponding multiple data voltages.

[0055] Specifically, the above-mentioned multiple detection units 101 can be included in the driver, and the above-mentioned multiple voltage generating units 102 can be included in the power manager and the source driver Soure in the driver. It can be considered that the driver can determine at least one compensation voltage signal Vb according to the potentials Vg of the gates of the multiple driving transistors T1 respectively detected by the multiple detection units 101. For example, the display panel can be divided into multiple areas, and the driver can calculate the average value, the mode or adopt other calculation methods according to the potentials Vg of the gates of the multiple driving transistors T1 corresponding to each area to obtain a compensation voltage signal Vb suitable for the area. For another example, the driver can calculate the average value, the mode or adopt other calculation methods according to the potentials Vg of the gates of all driving transistors T1 to obtain a compensation voltage signal Vb suitable for the display panel. Further, the voltage generating unit 102 can generate a subsequent data signal acting on the pixel circuit 20 at least according to the current compensation voltage signal Vb, that is, the data signal Vdata at this time can be considered to have compensated the pixel circuit 20.

[0056] It can be understood that in this embodiment, by setting the detection unit 101 and the voltage generating unit 102 electrically connected to one of the source and the drain of the data writing transistor T2, the potential Vg of the gate of the driving transistor T1 can be detected and reset only through the data writing transistor T2 in a time-sharing manner, so as to avoid setting two or more transistors to respectively realize the above two functions, thereby saving the number of transistors and facilitating the development of high-resolution display products; and, the above-mentioned detection unit 101 can obtain the potential Vg of the gate of the driving transistor T1 through the data writing transistor T2, and the control circuit 10 can generate the compensation voltage signal Vb according to the potential Vg of the gate of the driving transistor T1, and the pixel circuit 20 can be externally compensated subsequently, and it can also avoid setting more transistors for internal compensation, thereby further saving the number of transistors and facilitating the development of high-resolution display products.

[0057] Furthermore, in the present embodiment, in the first period t1 of the detection phase of the potential Vg of the gate of the driving transistor T1, since the compensation transistor T4 is also set to be turned on (its conduction state is controlled by the second gate signal En loaded on its gate), the first reset signal Vini generated by the voltage generating unit 102 is transmitted to the gate of the driving transistor T1 to reset it, and the first reset signal Vini can also be transmitted to one of the source and drain of the driving transistor T1 through the compensation transistor T4 to reset it, so that it is avoided to set an additional transistor to reset one of the source and drain of the driving transistor T1; at the same time, in the detection phase of the potential Vg of the gate of the driving transistor T1, the compensation transistor T4 is turned on. In the second time period t2 of the detection stage, the other of the source and the drain of the driving transistor T1 is used to receive the first voltage signal Vdd to turn on the driving transistor T1. At this time, the compensation transistor T4 is still set to be turned on. At this time, the potential Vg of the gate of the driving transistor T1 rises or falls until it is turned off. Considering that the compensation transistor T4 has been set to be turned on in the first time period t1 before the second time period t2, the starting point of the potential Vg of the gate of the driving transistor T1 in the second time period t2 is higher, which can speed up the time when the driving transistor T1 reaches the cut-off state, thereby shortening the duration of the entire "detection stage of the potential Vg of the gate of the driving transistor T1", thereby improving the detection efficiency of the display device 100.

[0058] In some embodiments, Figure 1 and Figure 4 As shown, the pixel circuit 20 further includes: a light emitting control transistor T3, one of the source and the drain of the light emitting control transistor T3 is electrically connected to the first voltage line (for transmitting the first voltage signal Vdd), and the other of the source and the drain of the light emitting control transistor T3 is electrically connected to the other of the source and the drain of the driving transistor T1; Figure 2 and Figure 5 As shown, at least in the second period t2, the light emitting control transistor T3 is used to transmit the first voltage signal Vdd to the other of the source and the drain of the driving transistor T1.

[0059] In combination with the above discussion, it can be known that in the second time period t2, the other of the source and the drain of the driving transistor T1 needs to receive the first voltage signal Vdd transmitted by the first voltage line to control the driving transistor T1 to be turned on. Therefore, as described in the present embodiment, a light-emitting control transistor T3 can be set between the first voltage line and the other of the source and the drain of the driving transistor T1, and its conduction state is controlled by the third gate signal Em loaded on its gate, so as to control whether a current path is formed between the first voltage line and the other of the source and the drain of the driving transistor T1, so as to control the potential Vs of the other of the source and the drain of the driving transistor T1 to be equal to the first voltage signal Vdd, or the other of the source and the drain of the driving transistor T1 is in a suspended state (its potential Vs is unstable).

[0060] Further, combined with Figure 1 , Figure 2 , Figure 4 and Figure 5 As shown, in the first time period t1 and the third time period t3, the light-emitting control transistor T3 is used to transmit the first voltage signal Vdd to the other of the source and drain of the driving transistor T1. It can be understood that the light-emitting control transistor T3 is turned on in the first time period t1 before the second time period t2, which can also make the starting point of the potential Vs of the other of the source and drain of the driving transistor T1 higher in the second time period t2, which can speed up the speed of the driving transistor T1 from being turned off to being turned on, and the light-emitting control transistor T3 is turned on in the third time period t3 after the second time period t, which can maintain the state of the driving transistor T1 being turned off in the second time period t2, and avoid the potential change of the other of the source and drain of the driving transistor T1 due to the suspension of its potential Vs, thereby affecting the potential Vg of the gate of the driving transistor T1 acquired by the detection unit 101.

[0061] In some embodiments, in combination Figure 1 , Figure 2 , Figure 4 and Figure 5 As shown, the other end of the light-emitting element D is electrically connected to a second voltage line for transmitting a second voltage signal VSS; in the first time period t1, the second time period t2 and the third time period t3, the absolute value of the difference between the amplitude of the first reset signal Vini and the amplitude of the second voltage signal VSS is smaller than the turn-on voltage of the light-emitting element D, and the absolute value of the difference between the amplitude of the second voltage signal VSS and the amplitude of the first voltage signal Vdd is smaller than the absolute value of the difference between the turn-on voltage of the light-emitting element D and the driving transistor T1.

[0062] It should be noted that, since one of the source and the drain of the driving transistor T1 is electrically connected to one end of the light-emitting element D, and combined with the above discussion, it can be known that: in the first time period t1, one of the source and the drain of the driving transistor T1 is reset by the first reset signal Vini. In order to prevent the light-emitting element D from emitting light, it is necessary to satisfy "the absolute value of the difference between the amplitude of the first reset signal Vini and the amplitude of the second voltage signal VSS is less than the turn-on voltage of the light-emitting element D"; in the second time period t2, the potential Vg of the gate of the driving transistor T1 rises or falls until the driving transistor T1 is turned off. When the driving transistor T1 is turned off, Vd=Vg=Vdd+Vth, where Vth is the threshold voltage of the driving transistor T1. At this time, in order to prevent the light-emitting element D from emitting light, it is necessary to satisfy Vdd+Vth-VSS is less than the turn-on voltage of the light-emitting element D, that is, "the absolute value of the difference between the amplitude of the second voltage signal VSS and the amplitude of the first voltage signal Vdd is less than the absolute value of the difference between the turn-on voltage of the light-emitting element D and the driving transistor T1".

[0063] In some embodiments, Figure 1 and Figure 2 As shown, the pixel circuit 20 further includes: a capacitor C, electrically connected between the gate of the driving transistor T1 and the first voltage line, and the first voltage signal Vdd transmitted by the first voltage line is a constant voltage signal. It can be understood that one end of the capacitor C in this embodiment is connected to the first voltage line with a constant potential, and when the gate of the driving transistor T1 electrically connected to the other end of the capacitor C is in a suspended state, a stable potential can be maintained by the voltage stabilizing characteristics of the capacitor C. For example, after "the potential Vg of the gate of the driving transistor T1 rises or falls until the driving transistor T1 is turned off", the potential Vg (that is, Vdd+Vth) of the gate of the driving transistor T1 can remain unchanged, so that the detection unit 101 detects its potential, thereby generating a compensation voltage signal Vb, and it can be considered that Vb=Vth=Vg-Vdd.

[0064] In some embodiments, in combination Figures 1 to 3 As shown, in the fourth time period t4 after the third time period t3, the data writing transistor T2 is used to transmit the first reset signal Vini generated by the voltage generating unit 102 to the gate of the driving transistor T1, the compensation transistor T4 is used to transmit the first reset signal Vini to one of the source and the drain of the driving transistor T1, and the light emitting control transistor T3 is used to control the formation of a current circuit between the first voltage line (used to transmit the first voltage signal Vdd) and the other of the source and the drain of the driving transistor T1.

[0065] It should be noted that the first time period t1 to the third time period t3 above all belong to the "detection stage of the potential Vg of the gate of the driving transistor T1", and the "light-emitting stage of the pixel circuit 20" can be carried out after each detection is completed, and the fourth time period t4 here can be understood as the first stage of the "light-emitting stage of the pixel circuit 20", that is, in the "light-emitting stage of the pixel circuit 20", it is still necessary to turn on the data writing transistor T2 and the compensation transistor T4 to reset the potential Vg of the gate of the driving transistor T1 and the potential Vg of one of the source and the drain of the driving transistor T1 through the first reset signal Vini. At the same time, in order to avoid the light-emitting element D from emitting light, and at this time, there is no need to turn on the driving transistor T1, so unlike the first time period t1 mentioned above, in the fourth time period t4, the light-emitting control transistor T3 can be controlled to be cut off to avoid the formation of a path between the first voltage line and the other of the source and the drain of the driving transistor T1, thereby avoiding the formation of a path between the first voltage line and the other end of the light-emitting element D.

[0066] In some embodiments, in combination Figures 1 to 3 As shown, in the fifth time period t5 after the fourth time period t4, the data writing transistor T2 is used to transmit the target data signal Data generated by the voltage generating unit 102 to the gate of the driving transistor T1, the compensation transistor T4 is used to control the current disconnection between one of the source and the drain of the driving transistor T1 and the gate of the driving transistor T1, and the light emitting control transistor T3 is used to control the current disconnection between the first voltage line and the other of the source and the drain of the driving transistor T1; wherein the control circuit 10 is used to generate the target data signal Data according to the compensation voltage signal Vb and the data signal Vdata, and the data signal Vdata is used to be determined according to the corresponding grayscale value.

[0067] Combined with the above discussion, it can be seen that in the "detection stage of the potential Vg of the gate of the driving transistor T1", a compensation voltage signal Vb can be generated, and each pixel circuit can have a corresponding grayscale value in each frame, and each grayscale value also has a corresponding data voltage, thereby determining the data signal Vdata, and then superimposing the compensation voltage signal Vb on the data signal Vdata can obtain the target data signal Data containing the compensation information.

[0068] After resetting the potential Vg of the gate of the driving transistor T1 and the potential Vg of one of the source and the drain of the driving transistor T1, the target data signal Data generated by the control circuit 10 can be transmitted to the gate of the driving transistor T1 through the data writing transistor T2 in the fourth time period t4. At this time, since the compensation transistor T4 and the light-emitting control transistor T3 are both turned off, the source and the drain of the driving transistor T1 are both in a suspended state, and the driving transistor T1 is not turned on yet.

[0069] In some embodiments, in combination Figures 1 to 3 As shown, in the sixth time period t6 after the fifth time period t5, the light emitting control transistor T3 is used to control the formation of a current path between the first voltage line and the other of the source and the drain of the driving transistor T1, and the driving transistor T1 is used to generate a driving current according to the target data signal Data to drive the light emitting element D to emit light.

[0070] In combination with the above discussion, Vb=Vth, Data=Vdata+Vb. In the sixth period t6, since the first voltage signal Vdd is transmitted to the other of the source and the drain of the driving transistor T1, and the potential Vg of the driving transistor T1 is maintained at Data, the gate-source voltage difference of the driving transistor T1 can be considered to be Vgs=Vdata+Vb-Vdd. According to the formula for generating a driving current by a transistor, the driving current I=K(Vgs-Vth)2=K(Vdata+Vb-Vdd-Vth) 2 =K(Vdata+Vb-Vdd-Vth) 2＝ K(Vdata-Vdd) 2 .

[0071] It can be understood that the compensation voltage signal Vb determined by the "detection stage of the potential Vg of the gate of the driving transistor T1" acts on the pixel circuit 20 in the subsequent "light-emitting stage of the pixel circuit 20", which can offset the influence of the threshold voltage of the current driving transistor T1 on the brightness of the light-emitting element D.

[0072] In some embodiments, in combination Figures 4 to 6 As shown, in Figure 1On the basis of the circuit architecture shown in FIG. 1 , the pixel circuit 20 further includes: a first reset transistor T6, one of the source and the drain of the first reset transistor T6 is electrically connected to one end of the light emitting element D and one of the source and the drain of the driving transistor T1, and the other of the source and the drain of the first reset transistor T6 is electrically connected to a reset line for transmitting a second reset signal Vini_2; in a fourth time period t4 after the third time period t3, the data writing transistor T2 is used to transmit the first reset signal Vini generated by the voltage generating unit 102 to the gate of the driving transistor T1, the compensation transistor T4 is used to electrically disconnect one of the source and the drain of the driving transistor T1 from the gate of the driving transistor T1, and the first reset transistor T6 is used to transmit the second reset signal Vini_2 to the source and the drain of the driving transistor T1. one of the sources and drains of the driving transistor T1; in a fifth time period t5 after the fourth time period t4, the data writing transistor T2 is used to transmit the target data signal Data generated by the voltage generating unit 102 to the gate of the driving transistor T1, the compensation transistor T4 is used to control a current break between one of the source and the drain of the driving transistor T1 and the gate of the driving transistor T1, the light emitting control transistor T3 is used to control a current break between the first voltage line and the other of the source and the drain of the driving transistor T1, and the first reset transistor T6 is used to transmit the second reset signal Vini_2 to one of the source and the drain of the driving transistor T1; wherein the control circuit 10 is used to generate the target data signal Data according to the compensation voltage signal Vb and the data signal Vdata, and the data signal Vdata is used to be determined according to the corresponding grayscale value.

[0073] In particular, the circuit in this embodiment Figure 4 And the circuit above Figure 1 The difference is at least that a first reset transistor T6 electrically connected to one end of the light emitting element D is further provided. In terms of timing, Figure 5 As shown, in the "detection phase of the potential Vg of the gate of the driving transistor T1", the fourth gate signal Sini loaded on the gate of the first reset transistor T6 controls the first reset transistor T6 to be turned off, and the waveforms of other signals loaded in the pixel circuit 20 are the same as Figure 1 The waveform of the signal loaded in the circuit, that is Figure 2 and Figure 1 The same as the “phase of detecting the potential Vg of the gate of the driving transistor T1”.

[0074] Different, such as Figure 6As shown, in the fourth time period t4 (i.e., the first stage of the "light-emitting stage of the pixel circuit 20"), the potential Vg of the gate of the driving transistor T1 is still reset by the current path formed by the first reset signal Vini through the data writing transistor T2, but at this time the compensation transistor T4 is used to electrically disconnect one of the source and the drain of the driving transistor T1 from the gate of the driving transistor T1, that is, the potential Vd of one of the source and the drain of the driving transistor T1 is no longer equal to Vg, but is turned on through the first reset transistor T6 to transmit the second reset signal Vini_2 to one of the source and the drain of the driving transistor T1 to reset its potential Vg.

[0075] It can be understood that in this embodiment, since the potential Vd of one of the source and drain of the driving transistor T1 is reset by the first reset transistor T6, in the fifth period t5, different from the above Figure 1 In the circuit shown, a data writing transistor T2 is used to reset Vd. In this embodiment, even if the data writing transistor T2 has been used to transmit the target data signal Data to the gate of the driving transistor T1, the first reset transistor T6 can still be used to transmit the second reset signal Vini_2 to one of the source and drain of the driving transistor T1 to continuously reset its potential Vg. The reset time can be extended to fully reset it, so as to avoid one of the source and drain of the driving transistor T1 being suspended, causing its potential Vg, thereby affecting the brightness of the light emitting element D at a later stage.

[0076] In some embodiments, in combination Figures 4 to 6 As shown, in Figure 1 On the basis of the architecture of the circuit shown, the pixel circuit 20 also includes: a second reset transistor T5, one of the source and the drain of the second reset transistor T5 is electrically connected to the other of the source and the drain of the driving transistor T1 and the other of the source and the drain of the light emitting control transistor T3, and the other of the source and the drain of the second reset transistor T5 is electrically connected to the reset line (for transmitting the second reset signal Vini_2); in the fourth time period t4 and the fifth time period t, the second reset transistor T5 is used to transmit the second reset signal Vini_2 to the other of the source and the drain of the driving transistor T1.

[0077] It can be understood that the circuit in this embodiment Figure 4 And the circuit above Figure 1 The difference is at least that a second reset transistor T5 electrically connected to the other of the source and drain of the driving transistor T1 is further provided. In terms of timing, Figure 5 As shown, in the "detection phase of the potential Vg of the gate of the driving transistor T1", the second reset transistor T5 is also turned off, that is, Figure 2and Figure 1 The same as the “phase of detecting the potential Vg of the gate of the driving transistor T1”.

[0078] Different, such as Figure 6 As shown, in the fourth time period t4 (i.e., the first stage of the "light emitting stage of the pixel circuit 20"), since the second reset transistor T5 is provided, the second reset signal Vini_2 can be transmitted to the other of the source and drain of the driving transistor T1 by turning on the second reset transistor T5 to reset its potential Vs. Similarly, in the fifth time period t5 after the fourth time period t4, the second reset transistor T5 can still be controlled to be turned on to continuously reset the potential Vs of the other of the source and drain of the driving transistor T1, so as to avoid the other of the source and drain of the driving transistor T1 being suspended in the fourth time period t4 and the fifth time period t5, causing its potential Vs to be unstable.

[0079] Among them, when the pixel circuit 20 includes a first reset transistor T6 and a second reset transistor T5 at the same time, the other of the source and the drain of both can be electrically connected to the reset line to receive the second reset signal Vini_2, and both can be electrically connected to the same gate line to receive the fourth gate signal Sini, so as to reduce the number of signal lines and signal types.

[0080] Similarly, combined Figures 4 to 6 As shown, on the basis of setting at least one of the first reset transistor T6 and the second reset transistor T5, in the sixth period t6 after the fifth period t5, the light emitting control transistor T3 is used to control the first voltage line and the other of the source and the drain of the driving transistor T1 to form a current path, and the driving transistor T1 is used to generate a driving current according to the target data signal to drive the light emitting element D to emit light. For details, please refer to the above about Figure 1 A description of the circuit shown.

[0081] It should be noted that the voltage generating unit 102 mentioned above may include a first switch element S1, and the detection unit 101 may include a second switch element S2. The first switch element S1 and the second switch element S2 are composed of transistors. The first switch element S1 can control whether the voltage generating unit 102 outputs the first reset signal Vini or the target data signal Data to the data writing transistor T2, and the second switch element S2 can control whether the detection unit 101 can obtain the potential Vg of the gate of the driving transistor T1 through the data writing transistor T2. Among them, the detection unit 101 can be but not limited to an analog-to-digital converter.

[0082] In order to better explain the above Figure 1 and Figure 2Regarding the working principle of the circuit diagram shown, in the present invention, taking the driving transistor T1 as a P-type transistor and the other transistors as N-type transistors as an example, the working stages of the two are described as follows.

[0083] As Figure 2 shown, Figure 1 In the circuit diagram shown, the "detection stage of the potential Vg of the gate of the driving transistor T1" may include the following time periods:

[0084] In the first time period t1, the first gate signal Scan, the second gate signal En, and the third gate signal Em are all at high potential. Therefore, the data writing transistor T2, the compensation transistor T4, and the light emission control transistor T3 are all turned on, the first switching element S1 is turned on, the second switching element S2 is turned off, and the voltage generation unit 102 generates the first reset signal Vini. Therefore, the first reset signal Vini is transmitted to the gate of the driving transistor T1 and one of the source and drain, and the first voltage signal Vdd is transmitted to the other of the source and drain of the driving transistor T1. Vg = Vd = Vini, Vs = Vdd, and at this time, the second voltage signal VSS is at the corresponding high potential, and it is necessary to satisfy Vini - VSS < Voled to ensure that the light emitting element D does not emit light, where Voled is the turn-on voltage of the light emitting element D;

[0085] In the second time period t2, the first gate signal Scan, the second gate signal En, and the third gate signal Em are all maintained at high potential, and the first switching element S1 and the second switching element S2 are both turned off. Since Vg = Vd = Vini and Vs = Vdd, the driving transistor T1 is turned on, and the first voltage signal Vdd is transmitted to one of the source and drain of the driving transistor T1 and the gate, and Vg rises until the driving transistor T1 is turned off when Vg = Vd = Vdd + Vth, where Vth is the threshold voltage of the driving transistor T1. At this time, the second voltage signal VSS is still at the corresponding high potential, and it is necessary to satisfy Vdd + Vth - VSS < Voled to ensure that the light emitting element D does not emit light;

[0086] In the third time period t3, the first gate signal Scan, the second gate signal En, and the third gate signal Em are all maintained at high potential, the first switching element S1 is turned off, the second switching element S2 is turned on, and the detection unit 101 detects Vg. According to Vg = Vdd + Vth when the driving transistor T1 is turned off, since the first voltage signal Vdd is known, the threshold voltage Vth of the driving transistor T1 can be calculated.

[0087] As Figure 3 shown, Figure 1 In the circuit diagram shown, the "detection stage of the potential Vg of the gate of the driving transistor T1" may include the following time periods:

[0088] In the fourth period t4, the first gate signal Scan and the second gate signal En are at high potential, the third gate signal Em is at low potential, the data writing transistor T2 and the compensation transistor T4 are turned on, the first switch element S1 is turned on and the second switch element S2 is turned off (not shown in the signal timing diagram), and the first reset signal Vini generated by the voltage generating unit 102 is transmitted to the gate and one of the source and the drain of the driving transistor T1, Vg=Vd=Vini, and Vg and Vd are reset;

[0089] In the fifth period t5, the first gate signal Scan is at a high potential, the second gate signal En and the third gate signal Em are at a low potential, the data writing transistor T2 is turned on, the first switch element S1 is turned on and the second switch element S2 is turned off (not shown in the signal timing diagram), the first switch element S1 is turned on and the second switch element S2 is turned off (not shown in the signal diagram), the target data signal Data (equal to Vdata+Vth) generated by the voltage generating unit 102 is transmitted to the gate of the driving transistor T1, Vg=Vdata+Vth, the light emitting control transistor T3 and the compensation transistor T4 are turned off to avoid affecting Vd and Vg;

[0090] In the sixth period t6, the first gate signal Scan and the second gate signal En are at low potentials, the third gate signal Em is at high potential, the first switch element S1 and the second switch element S2 are both turned off, and the light emitting control transistor T3 is turned on to form a driving current I=K(Vgs-Vth)2=K(Vdata+Vb-Vdd-Vth) 2 =K(Vdata+Vb-Vdd-Vth) 2＝ K(Vdata-Vdd) 2 , the light-emitting element D emits light, and the brightness is not affected by the threshold voltage Vth.

[0091] Among them, by adjusting the proportion of the high potential of the third gate signal Em, the proportion of the light-emitting time of the light-emitting element D in one frame can be adjusted.

[0092] like Figure 5 As shown, Figure 4 The "detection phase of the potential Vg of the gate of the driving transistor T1" in the circuit diagram shown in FIG. 1 may also include the first period t1 to the third period t3. Figure 1 The circuit diagram shown in FIG. 1 adds a first reset transistor T6 and a second reset transistor T5, but in the entire Figure 5 In the first period t1 to the third period t3, the fourth gate signal Sini is the corresponding low potential VGL, so that the first reset transistor T6 and the second reset transistor T5 are both turned off. Figure 4 The circuit diagram shown in the figure shows the working conditions of the circuit diagram in the first period t1 to the third period t3. Figure 1The circuit diagram shown in the figure operates in the same manner from the first period t1 to the third period t3.

[0093] like Figure 6 As shown, Figure 4 The “detection phase of the potential Vg of the gate of the driving transistor T1” in the circuit diagram shown may include the following time periods:

[0094] In the fourth period t4, the first gate signal Scan and the fourth gate signal Sini are at high potential, the second gate signal En and the third gate signal Em are at low potential, the data writing transistor T2, the first reset transistor T6 and the second reset transistor T5 are all turned on, the first switch element S1 is turned on and the second switch element S2 is turned off (not shown in the signal timing diagram), and Figure 1 The difference of the fourth period t4 of the circuit diagram shown is that at this time, the second reset signal Vini_2 is transmitted to the source and drain of the driving transistor T1 to reset Vs and Vd, instead of resetting Vd by the first reset signal Vini, and the amplitude of the first reset signal Vini, the amplitude of the second reset signal Vini_2 and the amplitude of the second voltage signal VSS during this period need to be reasonably set to prevent the light-emitting element D from emitting light;

[0095] The fifth time period t5 is different from the fourth time period t4 in that the voltage generating unit 102 generates a target data signal Data (equal to Vdata+Vth) which is transmitted to the gate of the driving transistor T1. At this time, the second reset signal Vini_2 is still transmitted to the source and drain of the driving transistor T1 to reset Vs and Vd, so that Vs and Vd of all pixel circuits 20 are reset to the same voltage value, eliminating the afterimage caused by the different gate-source voltages Vgs of the driving transistors T1 of all pixel circuits 20.

[0096] In the sixth period t6, the first gate signal Scan, the second gate signal En and the fourth gate signal Sini are all at low potential, the third gate signal Em is at high potential, the first switch element S1 and the second switch element S2 are both turned off. Figure 1 The sixth time period t6 of the circuit diagram shown.

[0097] Similarly, by adjusting the high potential proportion of the third gate signal Em, the light emitting time proportion of the light emitting element D in one frame can be adjusted. Meanwhile, the second gate signal En is at the corresponding low potential VGL in the fourth period t4 to the sixth period t6, that is, the compensation transistor T4 does not need to function.

[0098] An embodiment of the present invention also provides a driving method for a display device, which is applied to a display device, wherein the display device includes any of the control circuits and the pixel circuits described above; Figure 7As shown, the driving method of the display device includes but is not limited to the following steps.

[0099] S1, in a first period, controlling the data writing transistor to transmit the first reset signal generated by the voltage generating unit to the gate of the driving transistor, and controlling the compensation transistor to transmit the first reset signal to one of the source and the drain of the driving transistor.

[0100] Combined with the above discussion, it can be seen that no matter what Figure 1 or Figure 4 As shown in the circuit diagram, at this time, the first switch element S1 is turned on, the data writing transistor T2 and the compensation transistor T4 are turned on, and the first reset signal Vini generated by the voltage generating unit 102 is transmitted to the gate and one of the source and drain of the driving transistor T1. For details, please refer to the relevant discussion of the first period t1 above.

[0101] S2, in a second time period after the first time period, controls the other of the source and the drain of the driving transistor to receive the first voltage signal transmitted by the first voltage line, and controls the driving transistor to be turned on under the action of the first reset signal, the first voltage signal and the turned-on compensation transistor, so that the potential of the gate of the driving transistor rises or falls until the driving transistor is cut off.

[0102] Combined with the above discussion, it can be seen that no matter what Figure 1 or Figure 4 In the circuit diagram shown, at this time, the first switch element S1 and the second switch element S2 are both turned off, the driving transistor T1 is turned on, the first voltage signal Vdd is transmitted to one of the source and the drain of the driving transistor T1 and the gate, and Vg rises or falls until Vg=Vd=Vdd+Vth when the driving transistor T1 is turned off. For details, please refer to the relevant discussion of the second period t2 above.

[0103] S3, in a third period after the second period, controlling the detection unit to obtain the potential of the gate of the driving transistor through the data writing transistor, and controlling the control circuit to generate a compensation voltage signal according to the potential of the gate of the driving transistor.

[0104] Combined with the above discussion, it can be seen that no matter what Figure 1 or Figure 4 In the circuit diagram shown, the first switch element S1 is turned off, the second switch element S2 is turned on, and the detection unit 101 detects Vg. According to Vg=Vdd+Vth when the driving transistor T1 is turned off, since the first voltage signal Vdd is known, the threshold voltage Vth of the driving transistor T1 can be calculated. For details, please refer to the relevant discussion of the third period t3 above.

[0105] The structure of the display device and the driving method thereof provided by the embodiments of the present invention are introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present invention. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display device, characterized in that: The invention comprises a plurality of control circuits and a plurality of corresponding pixel circuits, wherein the control circuit comprises a detection unit and a voltage generating unit corresponding to the pixel circuits, and the pixel circuits comprise: Light emitting element; a data writing transistor, wherein one of a source and a drain of the data writing transistor is electrically connected to the corresponding detection unit and the corresponding voltage generating unit; A driving transistor, wherein a gate of the driving transistor is electrically connected to the data writing transistor, and one of a source and a drain of the driving transistor is electrically connected to one end of the light emitting element; A compensation transistor electrically connected between one of the source and the drain of the driving transistor and the gate of the driving transistor; In a first period, the data writing transistor is used to transmit the first reset signal generated by the voltage generating unit to the gate of the driving transistor, and the compensation transistor is used to transmit the first reset signal to one of the source and the drain of the driving transistor; In a second time period after the first time period, the driving transistor is used to receive a first voltage signal transmitted by a first voltage line, and the driving transistor is turned on under the action of the first reset signal, the first voltage signal and the turned-on compensation transistor, so that the potential of the gate of the driving transistor rises or falls until the driving transistor is turned off; In a third period after the second period, the detection unit is used to obtain the potential of the gate of the driving transistor through the data writing transistor, and the control circuit is used to generate a compensation voltage signal according to the potential of the gate of the driving transistor.

2. The display device according to claim 1, wherein: The pixel circuit further includes: a light emitting control transistor, wherein one of the source and the drain of the light emitting control transistor is electrically connected to the first voltage line, and the other of the source and the drain of the light emitting control transistor is electrically connected to the other of the source and the drain of the driving transistor; At least in the second period, the light emission control transistor is used to transmit the first voltage signal to the other of the source and the drain of the driving transistor.

3. The display device according to claim 2, wherein: In the first period and the third period, the light emission control transistor is used to transmit the first voltage signal to the other of the source and the drain of the driving transistor.

4. The display device according to claim 1, wherein: The other end of the light emitting element is electrically connected to a second voltage line for transmitting a second voltage signal; In the first time period, the second time period and the third time period, the absolute value of the difference between the amplitude of the first reset signal and the amplitude of the second voltage signal is smaller than the turn-on voltage of the light-emitting element, and the absolute value of the difference between the amplitude of the second voltage signal and the amplitude of the first voltage signal is smaller than the absolute value of the difference between the turn-on voltage of the light-emitting element and the driving transistor.

5. The display device according to any one of claims 2 to 4, characterized in that: In a fourth time period after the third time period, the data writing transistor is used to transmit the first reset signal generated by the voltage generating unit to the gate of the driving transistor, the compensation transistor is used to transmit the first reset signal to one of the source and the drain of the driving transistor, and the light emitting control transistor is used to control the formation of a current circuit between the first voltage line and the other of the source and the drain of the driving transistor.

6. The display device according to claim 5, characterized in that In a fifth time period after the fourth time period, the data writing transistor is used to transmit the target data signal generated by the voltage generating unit to the gate of the driving transistor, the compensation transistor is used to control a current disconnection between one of the source and the drain of the driving transistor and the gate of the driving transistor, and the light emission control transistor is used to control a current disconnection between the first voltage line and the other of the source and the drain of the driving transistor; The control circuit is used to generate the target data signal according to the compensation voltage signal and the data signal, and the data signal is used to be generated according to the corresponding grayscale value.

7. The display device according to claim 6, wherein: In the sixth time period after the fifth time period, the light emitting control transistor is used to control the formation of a current path between the first voltage line and the other of the source and the drain of the driving transistor, and the driving transistor is used to generate a driving current according to the target data signal to drive the light emitting element to emit light.

8. The display device according to any one of claims 2 to 4, characterized in that: The pixel circuit further includes: a first reset transistor, wherein one of a source and a drain of the first reset transistor is electrically connected to one end of the light emitting element and one of a source and a drain of the driving transistor, and the other of the source and the drain of the first reset transistor is electrically connected to a reset line for transmitting a second reset signal; In a fourth time period after the third time period, the data writing transistor is used to transmit the first reset signal generated by the voltage generating unit to the gate of the driving transistor, the compensation transistor is used to electrically disconnect one of the source and the drain of the driving transistor from the gate of the driving transistor, and the first reset transistor is used to transmit the second reset signal to one of the source and the drain of the driving transistor; In a fifth time period after the fourth time period, the data writing transistor is used to transmit the target data signal generated by the voltage generating unit to the gate of the driving transistor, the compensation transistor is used to control a current disconnection between one of the source and the drain of the driving transistor and the gate of the driving transistor, the light emission control transistor is used to control a current disconnection between the first voltage line and the other of the source and the drain of the driving transistor, and the first reset transistor is used to transmit the second reset signal to one of the source and the drain of the driving transistor; The control circuit is used to generate the target data signal according to the compensation voltage signal and the data signal, and the data signal is used to be generated according to the corresponding grayscale value.

9. The display device according to claim 8, wherein: The pixel circuit further includes: a second reset transistor, one of a source and a drain of the second reset transistor being electrically connected to the other of the source and the drain of the drive transistor and the other of the source and the drain of the light emission control transistor, and the other of the source and the drain of the second reset transistor being electrically connected to the reset line; In the fourth period and the fifth period, the second reset transistor is used to transmit the second reset signal to the other of the source and the drain of the driving transistor.

10. The display device according to claim 9, characterized in that In the sixth time period after the fifth time period, the light emitting control transistor is used to control the formation of a current path between the first voltage line and the other of the source and the drain of the driving transistor, and the driving transistor is used to generate a driving current according to the target data signal to drive the light emitting element to emit light.

11. The display device according to any one of claims 1 to 4, 6 to 7, 9 to 10, characterized in that: The pixel circuit further includes: The capacitor is electrically connected between the gate of the driving transistor and the first voltage line, and the first voltage signal transmitted by the first voltage line is a constant voltage signal.

12. A method for driving a display device, characterized in that: The display device includes a plurality of control circuits and a plurality of corresponding pixel circuits, wherein the control circuit includes a detection unit and a voltage generating unit corresponding to the pixel circuit, and the pixel circuit includes: Light emitting element; a data writing transistor, wherein one of a source and a drain of the data writing transistor is electrically connected to the corresponding detection unit and the corresponding voltage generating unit; A driving transistor, wherein a gate of the driving transistor is electrically connected to the data writing transistor, and one of a source and a drain of the driving transistor is electrically connected to one end of the light emitting element; A compensation transistor electrically connected between one of the source and the drain of the driving transistor and the gate of the driving transistor; The driving method of the display device comprises: In a first period, controlling the data writing transistor to transmit the first reset signal generated by the voltage generating unit to the gate of the driving transistor, and controlling the compensation transistor to transmit the first reset signal to one of the source and the drain of the driving transistor; In a second time period after the first time period, controlling the other of the source and the drain of the driving transistor to receive the first voltage signal transmitted by the first voltage line, and controlling the driving transistor to be turned on under the action of the first reset signal, the first voltage signal and the turned-on compensation transistor, so that the potential of the gate of the driving transistor rises or falls until the driving transistor is turned off; In a third period after the second period, the detection unit is controlled to obtain the potential of the gate of the driving transistor through the data writing transistor, and the control circuit is controlled to generate a compensation voltage signal according to the potential of the gate of the driving transistor.

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