Over-temperature protection circuit and power management chip

Abstract

The invention discloses an over-temperature protection circuit and a power management chip. The over-temperature protection circuit comprises a current supply module, a cascode current mirror, a trim resistor and a voltage comparison module. The current providing module is used for providing current with a zero temperature coefficient; the cascode current mirror is used for carrying out mirror image processing on the current with the zero temperature coefficient and outputting the current with the zero temperature coefficient to a first end of the trim resistor; the trim resistor is used for converting the current with the zero temperature coefficient into detection voltage and outputting the detection voltage to a first input end of the voltage comparison module; the voltage comparison module is used for outputting an over-temperature indication signal according to the detection voltage and the reference voltage. The over-temperature protection circuit provided by the invention has higher over-temperature detection precision, and the safety of the chip in the working process can be further improved.

Description

Technical Field

[0001] The present application relates to the field of circuit technology, and in particular to an over-temperature protection circuit and a power management chip. Background Art

[0002] With the rapid development of electronic technology, there are more and more application scenarios for power management chips, the integration of power chips is getting higher and higher, the power consumption is getting higher and higher, and the temperature application range of power management chips is getting wider and wider. In order to protect integrated circuit chips from damage due to high temperatures, it is necessary to design a special over-temperature protection circuit. When the temperature exceeds a certain threshold, the over-temperature protection circuit outputs a shutdown signal, so that the chip partially or completely stops working. How to accurately design the temperature protection circuit is crucial to ensure that the power management chip meets increasingly stringent temperature requirements. The inventor studied the over-temperature protection scheme and found that the over-temperature protection circuit has the problem of low accuracy in some scenarios. Summary of the invention

[0003] In view of this, the present application provides an over-temperature protection circuit and a power management chip to solve the problem of low accuracy of traditional over-temperature protection solutions in some scenarios.

[0004] The present application provides an over-temperature protection circuit, which includes a current providing module, a common source and common gate current mirror, a trim resistor and a voltage comparison module;

[0005] The current providing module is used to provide a current with a zero temperature coefficient;

[0006] The cascode current mirror is used for mirroring the current with zero temperature coefficient and outputting the current with zero temperature coefficient to the first end of the trim resistor;

[0007] The trim resistor is used to convert the current with zero temperature coefficient into a detection voltage, and output the detection voltage to the first input terminal of the voltage comparison module;

[0008] The voltage comparison module is used to output an over-temperature indication signal according to the detection voltage and the reference voltage.

[0009] Optionally, the current providing module includes a negative temperature voltage providing unit, an operational amplifier, a first NMOS tube and a negative temperature resistor; the first end of the negative temperature voltage providing unit is grounded, and the second end is connected to the non-inverting input end of the operational amplifier; the inverting input end of the operational amplifier is respectively connected to the source of the first NMOS tube and the first end of the negative temperature resistor, and the output end is connected to the gate of the first NMOS tube; the drain of the first NMOS tube serves as the output end of the current providing module, connected to the input end of the common source and common gate current mirror; the second end of the negative temperature resistor is grounded; the negative temperature voltage providing unit is used to provide a negative temperature coefficient voltage; the negative temperature resistor is used to convert the negative temperature coefficient voltage into the zero temperature coefficient current; the first NMOS tube inputs the zero temperature coefficient current into the common source and common gate current mirror.

[0010] Optionally, the negative temperature voltage providing unit includes a second NMOS tube, a third NMOS tube and a fourth NMOS tube; the drain of the second NMOS tube is used to access the input current, and is respectively connected to the in-phase input terminal of the operational amplifier and the gate of the second NMOS tube, and the source is respectively connected to the drain of the third NMOS tube and the gate of the third NMOS tube; the source of the third NMOS tube is respectively connected to the drain of the fourth NMOS tube and the gate of the fourth NMOS tube; the source of the fourth NMOS tube is grounded.

[0011] Optionally, the over-temperature protection circuit further includes a current source; a first end of the current source is used to access a preset voltage, and a second end is connected to the drain of the second NMOS tube to provide the input current.

[0012] Optionally, the common-source and common-gate current mirror includes a first PMOS tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube and a preset resistor; the source of the first PMOS tube is used to access the preset voltage, the drain is connected to the source of the third PMOS tube, and the gate is respectively connected to the gate of the second PMOS tube, the drain of the third PMOS tube and the first end of the preset resistor; the source of the second PMOS tube is used to access the preset voltage, and the drain is connected to the source of the fourth PMOS tube; the gate of the third PMOS tube is respectively connected to the gate of the fourth PMOS tube and the second end of the preset resistor, and serves as the input end of the common-source and common-gate current mirror; the drain of the fourth PMOS tube serves as the output end of the common-source and common-gate current mirror, and is connected to the first end of the trim resistor.

[0013] Optionally, a trim site is provided at the first end of the trim resistor for connecting to a test device of the trim resistor to adjust a temperature inflection point of the trim resistor.

[0014] Optionally, the trim resistor is a resistor with a negative temperature coefficient.

[0015] Optionally, the voltage comparison module includes a comparator and a level processing unit; the positive input end of the comparator is connected to the first end of the trim resistor to access the detection voltage, the negative output end is connected to the reference voltage, and the output end outputs the over-temperature indication signal through the level processing unit; the comparator is used to output a high-level signal when the detection voltage is greater than the reference voltage, and output a low-level signal when the detection voltage is less than the reference voltage; the level processing unit is used to perform level conversion processing on the level signal output by the comparator so that the converted signal represents the over-temperature state.

[0016] Optionally, the level processing unit includes an even number of inverters connected in series.

[0017] The present application also provides a chip, comprising any of the above-mentioned over-temperature protection circuits.

[0018] In the above-mentioned over-temperature protection circuit and power management chip of the present application, the current providing module 110 can provide a current with a zero temperature coefficient to avoid the current in the mirror processing being affected by temperature. The common source and common gate current mirror 120 is used to mirror the current with a zero temperature coefficient, so that the trim resistor R3 converts the current with a zero temperature coefficient into a detection voltage V1, which can improve the accuracy of the mirror processing. The over-temperature indication signal OTP is output according to the detection voltage V1 and the reference voltage Vref through the voltage comparison module 130, so that other structures of the chip can make corresponding responses according to the over-temperature indication signal OTP, so that the chip operation process is safer, and the above-mentioned over-temperature protection circuit has higher detection accuracy, which can further improve the safety of the chip operation process.

[0019] Furthermore, the common-source common-gate current mirror structure is implemented using a PMOS tube, which has a smaller area under the same current processing capability, thereby being able to reduce the size of the corresponding over-temperature protection circuit.

[0020] Furthermore, a trim point is provided at the first end of the trim resistor R3, and the number of trim bits can be adjusted to obtain a relatively accurate negative temperature coefficient voltage at a certain temperature point as the temperature changes to realize an over-temperature protection circuit with an accurate setting of the temperature inflection point; and the trim resistor R3 is a resistor with a negative temperature coefficient, so that the voltage comparison module 130 can output an over-temperature indication signal OTP by comparing the voltage of the negative temperature coefficient device with the reference voltage, which can reduce the temperature coefficient dependence of the device, reduce the influence of temperature and process on the over-temperature detection process, and improve the reliability of the over-temperature protection circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 This is a schematic diagram of the over-temperature protection circuit structure of an embodiment of the present application;

[0023] Figure 2 is a schematic diagram of the structure of an over-temperature protection circuit in another embodiment of the present application;

[0024] Figure 3 It is a schematic diagram of the over-temperature protection circuit structure of another embodiment of the present application. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present application are clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.

[0026] The first aspect of the present application provides an over-temperature protection circuit, which is used to output an over-temperature indication signal so that the chip where it is located can obtain the over-temperature status in time and perform corresponding responses such as current limiting to ensure the safety of the corresponding chip during operation.

[0027] refer to Figure 1 As shown, the over-temperature protection circuit includes a current providing module 110, a cascode current mirror 120, a trim resistor R3 and a voltage comparison module 130. The output end of the current providing module 110 is connected to the input end of the cascode current mirror 120; the output end of the cascode current mirror 120 is respectively connected to the first end of the trim resistor R3 and the first input end of the voltage comparison module 130; the second input end of the voltage comparison module 130 is used to access the reference voltage Vref, and the output end is used to output the over-temperature indication signal OTP; the second end of the trim resistor R3 is grounded.

[0028] The current providing module 110 is used to provide a current with a zero temperature coefficient; wherein the current providing module 110 may include a resistor with a negative temperature coefficient, and generate a negative temperature coefficient voltage, and apply the negative temperature coefficient voltage to the resistor with the negative temperature coefficient to generate a current with a zero temperature coefficient.

[0029] The cascode current mirror 120 is used to mirror the current with zero temperature coefficient and output the current with zero temperature coefficient to the first end of the trim resistor R3; the cascode current mirror 120 can provide more accurate mirror processing to improve the accuracy of mirror processing of the current with zero temperature coefficient.

[0030] The trim resistor R3 is used to convert the current with zero temperature coefficient into a detection voltage V1, and output the detection voltage V1 to the first input terminal of the voltage comparison module 130; optionally, the trim resistor R3 can be a resistor with a negative temperature coefficient. The higher the temperature, the smaller its resistance value, and the trim resistor at one end of the trim resistor R3 also becomes smaller.

[0031] The voltage comparison module 130 is used to output an over-temperature indication signal OTP according to the detection voltage V1 and the reference voltage Vref. The over-temperature indication signal OTP generally includes two states, one of which indicates that the temperature corresponding to the chip is within a normal range, which is a non-over-temperature state, and the other indicates that the temperature corresponding to the chip is high, which is an over-temperature state (also called an over-temperature state).

[0032] Optionally, the reference voltage Vref can be set according to the temperature tolerance characteristics of the corresponding chip. When the temperature corresponding to the chip changes from a non-overtemperature state to an overtemperature state, the signal output by the voltage comparison module 130 is changed from a signal used to characterize the non-overtemperature state to a signal used to characterize the overtemperature state; for example, if the trim resistor R3 is a resistor with a negative temperature coefficient, when the temperature corresponding to the chip is in a normal range, the voltage comparison module 130 outputs a high-level signal, and as the temperature rises, if the detection voltage V1 on the trim resistor R3 becomes smaller, when the detection voltage V1 is less than the reference voltage Vref, the voltage comparison module 130 outputs a low-level signal, indicating that the corresponding chip is currently in an overtemperature state.

[0033] In the above-mentioned over-temperature protection circuit, the current providing module 110 can provide a current with a zero temperature coefficient to avoid the current of the mirror processing being affected by temperature. The common source and common gate current mirror 120 is used to mirror the current with a zero temperature coefficient, so that the trim resistor R3 converts the current with a zero temperature coefficient into a detection voltage V1, which can improve the accuracy of the mirror processing. The over-temperature indication signal OTP is output according to the detection voltage V1 and the reference voltage Vref through the voltage comparison module 130, so that other structures of the chip can make corresponding responses according to the over-temperature indication signal OTP, so that the chip operation process is safer. The above-mentioned over-temperature protection circuit has higher detection accuracy, which can further improve the safety of the chip operation process.

[0034] In some embodiments, reference Figure 2As shown, the current supply module 110 includes a negative temperature voltage supply unit 111, an operational amplifier APM, a first NMOS tube NM1 and a negative temperature resistor R2. The first end of the negative temperature voltage supply unit 111 is grounded, and the second end is connected to the in-phase input end (also called the positive input end) of the operational amplifier APM; the inverting input end (also called the negative input end) of the operational amplifier APM is respectively connected to the source of the first NMOS tube NM1 and the first end of the negative temperature resistor R2, and the output end is connected to the gate of the first NMOS tube NM1; the drain of the first NMOS tube NM1 serves as the output end of the current supply module 111, and is connected to the input end of the common source and common gate current mirror 120; the second end of the negative temperature resistor R2 is grounded.

[0035] The negative temperature voltage providing unit 111 is used to provide a negative temperature coefficient voltage, and the negative temperature resistor R2 is used to convert the negative temperature coefficient voltage into a current with a zero temperature coefficient, so as to input the current with a zero temperature coefficient into the common source and common gate current mirror 120 through the first NMOS tube NM1. Specifically, if the negative temperature coefficient voltage provided by the negative temperature voltage providing unit 111 is VT, and the resistance value of the negative temperature resistor R2 is R2, then the current with a zero temperature coefficient is: I1=VT / R2, VT is a negative temperature coefficient voltage, R2 is a negative temperature coefficient resistor, so I1 is a current with a relatively zero temperature coefficient.

[0036] In some examples, reference Figure 3 As shown, the negative temperature voltage providing unit 111 includes a second NMOS tube NM2, a third NMOS tube NM3 and a fourth NMOS tube NM4; wherein the second NMOS tube NM2, the third NMOS tube NM3 and the fourth NMOS tube are NMOS tubes of the same configuration. The drain of the second NMOS tube NM2 is used to access the input current I0, and is respectively connected to the in-phase input terminal of the operational amplifier APM and the gate of the second NMOS tube NM2, and the source is respectively connected to the drain of the third NMOS tube NM3 and the gate of the third NMOS tube NM3; the source of the third NMOS tube NM3 is respectively connected to the drain of the fourth NMOS tube NM4 and the gate of the fourth NMOS tube NM4; the source of the fourth NMOS tube NM4 is grounded.

[0037] In the negative temperature voltage providing unit 111, the gate and drain of the second NMOS tube NM2, the third NMOS tube NM3 and the fourth NMOS tube NM4 are short-circuited to form a diode connection. When the chip is working stably, the voltage of the in-phase input terminal of the operational amplifier APM is the threshold voltage 3Vth of the three NMOS tubes, where Vth is the threshold voltage of any one of the second NMOS tube NM2, the third NMOS tube NM3 and the fourth NMOS tube. At this time, the voltage of the inverting input terminal of the operational amplifier APM is equal to the voltage 3Vth of the positive input terminal of the operational amplifier APM, and the current size of the output terminal of the common source and common gate current mirror 120 is I1=3Vth / R2, where Vth is a negative temperature coefficient voltage, R2 is a negative temperature coefficient resistor, so I1 is a current with a relative zero temperature coefficient.

[0038] In some examples, such as Figure 3 As shown, the over-temperature protection circuit further includes a current source I0; a first end of the current source I0 is used to access a preset voltage VDD, and a second end is connected to the drain of the second NMOS transistor NM2 to provide the input current I0.

[0039] In some embodiments, Figure 2 and Figure 3 As shown, the common-source common-gate current mirror 120 includes a first PMOS tube PM1, a second PMOS tube PM2, a third PMOS tube PM3, a fourth PMOS tube PM4 and a preset resistor R1; wherein the first PMOS tube PM1 and the second PMOS tube PM2 have the same size, and the third PMOS tube PM3 and the fourth PMOS tube PM4 have the same size. The source of the first PMOS tube PM1 is used to access the preset voltage VDD, the drain is connected to the source of the third PMOS tube PM3, and the gate is respectively connected to the gate of the second PMOS tube PM2, the drain of the third PMOS tube PM3 and the first end of the preset resistor R1; the source of the second PMOS tube PM2 is used to access the preset voltage VDD, and the drain is connected to the source of the fourth PMOS tube PM4; the gate of the third PMOS tube PM3 is respectively connected to the gate of the fourth PMOS tube PM4 and the second end of the preset resistor R2, and serves as the input end of the cascode current mirror 120; the drain of the fourth PMOS tube PM4 serves as the output end of the cascode current mirror 120, and is connected to the first end of the trim resistor R3. The cascode current mirror structure provided in this embodiment can make the mirror processing process of the current with zero temperature coefficient more accurate, and the cascode current mirror 120 is realized by using a PMOS tube, and the area is smaller under the same current processing capability, thereby reducing the size of the corresponding over-temperature protection circuit.

[0040] In some embodiments, Figure 2 and Figure 3As shown, the first end of the trim resistor R3 is provided with a trim site for accessing the test equipment of the trim resistor R3 to adjust the temperature inflection point of the trim resistor R3. The above trim site can be connected to the test equipment at the corresponding test time for corresponding test adjustment, which can ensure that the detection voltage V1 is at a relatively stable voltage value under the influence of temperature and process angle, so as to achieve the purpose of accurately adjusting the temperature inflection point.

[0041] In some embodiments, the trim resistor R3 is a resistor with a negative temperature coefficient. The voltage comparison module 130 can output an over-temperature indication signal OTP by comparing the voltage of the negative temperature coefficient device with the reference voltage, thereby reducing the temperature coefficient dependence of the device and reducing the impact of temperature and process on the over-temperature detection process.

[0042] In some examples, such as Figure 2 As shown, the voltage comparison module 130 includes a comparator COMP and a level processing unit 131. The positive input terminal of the comparator COMP is connected to the first end of the trim resistor R3 to access the detection voltage V1, the negative output terminal is connected to the reference voltage Vref, and the output terminal outputs the over-temperature indication signal OTP through the level processing unit 131.

[0043] The comparator COMP is used for outputting a high level signal when the detection voltage V1 is greater than the reference voltage Vref, and outputting a low level signal when the detection voltage V1 is less than the reference voltage Vref.

[0044] The level processing unit 131 is used to perform level conversion processing on the level signal output by the comparator COMP, so that the converted signal OTP can more clearly characterize the over-temperature state, improve the stability of the subsequent components of the chip when identifying the over-temperature indication signal OTP, and thus improve the reliability of the over-temperature protection circuit during operation. The positive input voltage of the comparator COMP is V1=I1*R3, so the detection voltage V1 is a negative temperature coefficient voltage; the reference voltage Vref is a zero temperature drift voltage separated from the bandgap reference module. Because the detection voltage V1 is a negative temperature coefficient voltage, the detection voltage V1 will be less than the reference voltage Vref at a certain temperature point. At this time, the level signal at the output point of the comparator COMP will flip, and the over-temperature indication signal OTP will flip from 1 to 0. This temperature point is the over-temperature protection point of the over-temperature protection circuit.

[0045] Specifically, the level processing unit 131 includes an even number of inverters connected in series, so as to maintain the level characteristics of the level signal output by COMP on the basis of performing level conversion processing on the level signal output by COMP. Optionally, the level processing unit 131 includes two inverters connected in series, such as Figure 3As shown, the level processing unit 131 includes a first inverter INV1 and a second inverter INV2, the input end of the first inverter INV1 is connected to the output end of the comparator COMP, and the output end outputs the over-temperature indication signal OTP through the second inverter INV2.

[0046] In the above over-temperature protection circuit, the current providing module 110 can provide a current with a zero temperature coefficient to prevent the current of the mirror processing from being affected by the temperature. The cascode current mirror 120 is used to mirror the current with a zero temperature coefficient, so that the trim resistor R3 converts the current with a zero temperature coefficient into a detection voltage V1, which can improve the accuracy of the mirror processing. Then, the voltage comparison module 130 outputs an over-temperature indication signal OTP according to the detection voltage V1 and the reference voltage Vref, so that other structures of the chip can make corresponding responses according to the over-temperature indication signal OTP, so that the chip operation process is safer, and the above over-temperature protection circuit has a higher detection accuracy, which can further improve the safety of the chip operation process. Among them, the cascode current mirror structure is implemented by a PMOS tube, and the area is smaller under the same current processing capacity, so the size of the corresponding over-temperature protection circuit can be reduced. The first end of the trim resistor R3 is provided with a trim bit, and the trim bit number can be adjusted to obtain a relatively accurate negative temperature coefficient voltage at a certain temperature point as the temperature changes to realize an over-temperature protection circuit with an accurate setting of the temperature inflection point; and the trim resistor R3 is a resistor with a negative temperature coefficient, so that the voltage comparison module 130 can output an over-temperature indication signal OTP by comparing the voltage of the negative temperature coefficient device with the reference voltage, which can reduce the temperature coefficient dependence of the device, reduce the influence of temperature and process on the over-temperature detection process, and improve the reliability of the over-temperature protection circuit.

[0047] A second aspect of the present application provides a chip, wherein the chip includes the over-temperature protection circuit described in any one of the above embodiments.

[0048] Optionally, the above-mentioned chip may also include a processing module, which can obtain the over-temperature indication signal OTP output by the voltage comparison module 130, and control the operation of the chip according to the over-temperature indication signal OTP. For example, when the over-temperature indication signal OTP indicates an over-temperature state, at least some components of the chip are current limited or at least some components of the chip are shut down, etc., so as to limit the heat generation of the chip and improve the safety of the chip during operation.

[0049] The above-mentioned power amplifier includes the over-temperature protection circuit described in any of the above-mentioned embodiments, and has all the beneficial effects of the over-temperature protection circuit described in any of the above-mentioned embodiments, which will not be repeated here.

[0050] Although the present application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on reading and understanding of this specification and the accompanying drawings. The present application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the above-mentioned components, the terms used to describe such components are intended to correspond to any component (unless otherwise indicated) that performs the specified function of the component (e.g., it is functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the functions in the exemplary implementation of this specification shown herein.

[0051] That is, the above description is only an embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the specification and drawings of the present application, such as the mutual combination of technical features between the embodiments, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.

[0052] In addition, in the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, which are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, for structural elements with the same or similar characteristics, the present application may use the same or different reference numerals for identification. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0053] In this application, the word "exemplary" is used to mean "used as an example, illustration or description". Any embodiment described as "exemplary" in this application is not necessarily to be construed as being more preferred or more advantageous than other embodiments. In order to enable any technician in the field to implement and use the present application, the present application provides the above description. In the above description, various details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be elaborated in detail to avoid unnecessary details that make the description of the present application obscure. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest range of principles and features disclosed in the present application.

Claims

1. An over-temperature protection circuit, characterized in that: The over-temperature protection circuit includes a current supply module, a common source and common gate current mirror, a trim resistor and a voltage comparison module; The current providing module is used to provide a current with a zero temperature coefficient; The cascode current mirror is used for mirroring the current with zero temperature coefficient and outputting the current with zero temperature coefficient to the first end of the trim resistor; The trim resistor is used to convert the current with zero temperature coefficient into a detection voltage, and output the detection voltage to the first input terminal of the voltage comparison module; The voltage comparison module is used to output an over-temperature indication signal according to the detection voltage and the reference voltage.

2. The over-temperature protection circuit according to claim 1, characterized in that: The current supply module includes a negative temperature voltage supply unit, an operational amplifier, a first NMOS tube and a negative temperature resistor; The first end of the negative temperature voltage providing unit is grounded, and the second end is connected to the non-inverting input end of the operational amplifier; the inverting input end of the operational amplifier is respectively connected to the source of the first NMOS tube and the first end of the negative temperature resistor, and the output end is connected to the gate of the first NMOS tube; the drain of the first NMOS tube serves as the output end of the current providing module, and is connected to the input end of the common source and common gate current mirror; the second end of the negative temperature resistor is grounded; The negative temperature voltage providing unit is used to provide a negative temperature coefficient voltage; The negative temperature resistor is used to convert the negative temperature coefficient voltage into the zero temperature coefficient current; The first NMOS tube inputs the current with zero temperature coefficient into the common-source common-gate current mirror.

3. The over-temperature protection circuit according to claim 2, characterized in that: The negative temperature voltage providing unit includes a second NMOS tube, a third NMOS tube and a fourth NMOS tube; The drain of the second NMOS tube is used to access the input current and is respectively connected to the in-phase input terminal of the operational amplifier and the gate of the second NMOS tube, and the source is respectively connected to the drain of the third NMOS tube and the gate of the third NMOS tube; the source of the third NMOS tube is respectively connected to the drain of the fourth NMOS tube and the gate of the fourth NMOS tube; the source of the fourth NMOS tube is grounded.

4. The over-temperature protection circuit according to claim 3, characterized in that: The over-temperature protection circuit also includes a current source; The first end of the current source is used to access a preset voltage, and the second end is connected to the drain of the second NMOS tube to provide the input current.

5. The over-temperature protection circuit according to claim 1, characterized in that: The common-source common-gate current mirror comprises a first PMOS tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube and a preset resistor; The source of the first PMOS tube is used to access the preset voltage, the drain is connected to the source of the third PMOS tube, and the gate is respectively connected to the gate of the second PMOS tube, the drain of the third PMOS tube and the first end of the preset resistor; the source of the second PMOS tube is used to access the preset voltage, and the drain is connected to the source of the fourth PMOS tube; the gate of the third PMOS tube is respectively connected to the gate of the fourth PMOS tube and the second end of the preset resistor, and serves as the input end of the common source and common gate current mirror; the drain of the fourth PMOS tube serves as the output end of the common source and common gate current mirror, and is connected to the first end of the trim resistor.

6. The over-temperature protection circuit according to claim 1, characterized in that: A trim site is provided at the first end of the trim resistor for connecting to a test device of the trim resistor to adjust a temperature inflection point of the trim resistor.

7. The over-temperature protection circuit according to claim 1, characterized in that: The trim resistor is a resistor with a negative temperature coefficient.

8. The over-temperature protection circuit according to claim 7, characterized in that: The voltage comparison module includes a comparator and a level processing unit; The positive input terminal of the comparator is connected to the first end of the trim resistor to access the detection voltage, the negative output terminal is connected to the reference voltage, and the output terminal outputs the over-temperature indication signal through the level processing unit; The comparator is used to output a high level signal when the detection voltage is greater than the reference voltage, and output a low level signal when the detection voltage is less than the reference voltage; The level processing unit is used to perform level conversion processing on the level signal output by the comparator, so that the converted signal represents an over-temperature state.

9. The over-temperature protection circuit according to claim 8, characterized in that: The level processing unit includes an even number of inverters connected in series.

10. A chip, characterized in that: The over-temperature protection circuit comprises the over-temperature protection circuit as claimed in any one of claims 1 to 9.

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