Enhanced gallium nitride device, preparation method thereof and electronic equipment

Abstract

The invention provides an enhanced gallium nitride device, a preparation method thereof and electronic equipment, an Al < X > Ga < 1-X > N barrier layer can repair damage of an etching side wall of a P-type doping layer to reduce side wall electric leakage, repair surface damage of the barrier layer and compensate over-etching of the barrier layer in the etching process of the P-type doping layer; the upper surface of the AlXGa1-XN barrier layer has higher Al component concentration, and the AlXGa1-XN barrier layer and the in-situ barrier layer jointly act to generate a stronger polarization effect, so that 2DEG with higher concentration is generated in a channel region of a non-gate region, and the on-resistance of the device is reduced; the Al component concentration of the upper surface of the Al < X > Ga < 1-X > N barrier layer is large, the forbidden band width is larger, and the electric leakage of the gate electrode is well reduced; compared with a barrier layer with fixed Al component concentration, the AlXGa1-XN barrier layer is smoother in valence band top, holes are injected into the P-type doping layer from the gate electrode more easily when positive bias voltage is applied to the P-type doping layer, and threshold voltage drift caused by hole injection difficulty is effectively compensated.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to an enhanced gallium nitride device, a preparation method thereof, and an electronic device. Background Art

[0002] Gallium nitride (GaN) materials have a large bandgap, high critical breakdown field strength, and high electron saturation rate. The heterostructure formed with aluminum gallium nitride (AlGaN) film can produce high-concentration, high-electron-mobility two-dimensional electron gas (2DEG) due to the polarization effect. It is considered to be an ideal material in the fields of power electronics, radio frequency, etc. Due to the spontaneous existence of 2DEG, GaN high electron mobility transistors (HEMTs) are depletion-type, that is, they are in the on state when zero bias is applied to the gate electrode. The circuits using this device structure have poor safety and complex driving; the corresponding is the enhancement type, that is, HEMT can only be turned on when a positive bias is applied to the gate electrode. The technology to achieve effective controllable enhancement-type HEMT devices is the P-type gate structure, that is, adding a P-GaN layer above the AlGaN / GaN heterostructure in the gate region, and controlling the heterojunction energy band through the P-GaN layer to achieve the depletion of the 2DEG under the gate electrode in the zero gate voltage state, thereby shutting off the conductive channel.

[0003] At present, the P-type gate structure can be realized by etching away the P-GaN layer in the non-gate area, using photoresist as a soft mask or using other dielectric layer materials as hard mask dry etching. In the actual process, it is difficult to accurately stop etching at the interface between the P-GaN layer and the AlGaN barrier layer, and the AlGaN barrier layer will be over-etched, resulting in a reduction in the thickness of the AlGaN barrier layer in the non-P-GaN gate area. This will weaken the polarization effect of the AlGaN barrier layer, resulting in a decrease in the 2DEG concentration in the non-P-GaN gate area and an increase in the on-resistance of the device. In addition, over-etching will also destroy the AlGaN barrier layer lattice and introduce defects, reducing the performance and reliability of the device. Therefore, the problem of over-etching the AlGaN barrier layer in the non-P-GaN gate area needs to be properly solved.

[0004] In addition, the gate leakage and threshold voltage drift of the enhanced HEMT with Schottky contact are the main problems affecting the reliability of the enhanced HEMT. Reducing the gate leakage can reduce device power consumption, improve gate reliability, and increase device life. This can be achieved by reducing the defect concentration in the P-GaN layer and optimizing the gate electrode Schottky contact interface quality. Both rely on the device manufacturing process level and have great uncertainty. Alternatively, using an insulating layer structure (Metal Insulator Semiconductor, MIS), adding a high bandgap width dielectric layer between the P-GaN layer and the gate electrode metal can effectively isolate the gate leakage and increase the gate electrode breakdown voltage. However, too low gate leakage will reduce the hole injection of the P-GaN layer, resulting in a gate threshold voltage drift. This is because the downward electric field of the gate electrode will attract electrons in the 2DEG to move toward the P-GaN layer, recombine with holes in the P-GaN layer, and the holes will drift toward the substrate under the action of the electric field. If there is no appropriate amount of hole injection into the P-GaN layer, the hole concentration in the P-GaN bulk material will decrease, the depletion effect of the P-GaN layer on the 2DEG below the gate region will be weakened, and the threshold voltage of the enhancement HEMT will drift.

[0005] In summary, the over-etching problem of the AlGaN barrier layer in the non-P-GaN gate region of the enhancement-mode HEMT device as well as the gate electrode leakage and threshold voltage drift problems need to be properly solved. Summary of the invention

[0006] The embodiments of the present disclosure provide an enhancement-mode gallium nitride device, a method for preparing the same, and an electronic device, which are used to solve the problems of over-etching of the barrier layer, gate electrode leakage, and threshold voltage drift in the prior art enhancement-mode HEMT device during p-GaN etching.

[0007] The embodiments of the present disclosure provide an enhanced gallium nitride device, a method for preparing the same, and an electronic device, the specific scheme of which is as follows: On the one hand, the embodiment of the present disclosure provides an enhanced gallium nitride device, comprising: a substrate, a buffer layer, a channel layer, a barrier layer, a P-type doping layer, an Al X Ga 1-X N barrier layer, source electrode and drain electrode, first dielectric layer and gate electrode; wherein x is 0~1; The source electrode and the drain electrode are respectively formed by penetrating the Al X Ga 1-X The N barrier layer and the via hole of the barrier layer are in contact with the channel layer; the positive projection of the gate electrode on the substrate is located between the positive projections of the source electrode and the drain electrode on the substrate; the gate electrode is connected to the Al through the via hole penetrating the first dielectric layer.X Ga 1-X N barrier layer contact; Among them, along the Al X Ga 1-X The N barrier layer is close to the substrate and points in a direction away from the substrate. X Ga 1-X The Al component concentration in the N barrier layer gradually increases.

[0008] In some embodiments, in the enhanced gallium nitride device provided in the embodiments of the present disclosure, the Al X Ga 1- X The Al component concentration in the N barrier layer away from the top surface of the substrate is greater than or equal to the Al component concentration in the barrier layer.

[0009] In some embodiments, in the enhanced gallium nitride device provided in the embodiments of the present disclosure, the Al X Ga 1- X The Al component concentration in the N barrier layer close to the bottom surface of the substrate is greater than or equal to the Al component concentration in the barrier layer.

[0010] In some embodiments, in the enhanced gallium nitride device provided in the embodiments of the present disclosure, the Al X Ga 1- X The thickness of the N barrier layer is 1~100 nm.

[0011] In some embodiments, in the enhanced gallium nitride device provided in the embodiments of the present disclosure, the Al X Ga 1- X A surface of the N barrier layer close to the gate electrode has a groove, and the gate electrode fills the groove.

[0012] In some embodiments, in the enhanced gallium nitride device provided in the embodiments of the present disclosure, the depth of the groove is 1-100 nm.

[0013] In some embodiments, the enhanced gallium nitride device provided in the embodiment of the present disclosure further includes a spacer layer between the channel layer and the barrier layer, wherein the source electrode and the drain electrode are respectively formed by penetrating the Al X Ga 1-X An N barrier layer, the barrier layer, and a via hole of the spacer layer are in contact with the channel layer.

[0014] In some embodiments, in the enhanced gallium nitride device provided in the embodiments of the present disclosure, the material of the spacer layer is AlN, and the thickness of the spacer layer is greater than 0 and less than or equal to 3 nm.

[0015] In some embodiments, in the enhanced gallium nitride device provided in the embodiments of the present disclosure, further comprising: X Ga 1-X The N barrier layer and the second dielectric layer between the source electrode and the drain electrode, the source electrode and the drain electrode are respectively formed by penetrating the second dielectric layer, the Al X Ga 1-X The N barrier layer and the via hole of the barrier layer are in contact with the channel layer, and the gate electrode is connected to the Al X Ga 1-X N barrier layer contact.

[0016] In some embodiments, in the enhanced gallium nitride device provided in the embodiments of the present disclosure, the material of the second dielectric layer includes one or more of SiO2, SiN, and AlN, and the thickness of the second dielectric layer is 1-200 nm.

[0017] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, the material of the channel layer is GaN, the material of the barrier layer is AlGaN, and the material of the P-type doping layer is Mg-doped GaN.

[0018] On the other hand, the embodiment of the present disclosure further provides a method for preparing the enhancement-mode gallium nitride device, which is used to prepare the enhancement-mode gallium nitride device provided by the embodiment of the present disclosure, and the preparation method comprises: A buffer layer, a channel layer, a barrier layer and a P-type doping layer are sequentially formed in a stacked manner on one side of the substrate in a direction away from the substrate; Etching the P-type doped layer to form a P-type doped layer located in the gate region; Molecular beam epitaxy is used on the side of the P-type doped layer away from the substrate to form an Al layer with an Al component concentration gradually increasing as the thickness increases by adjusting the component ratio of the Al source and the Ga source. X Ga 1-X N barrier layer; For the Al X Ga 1-X The N barrier layer and the barrier layer are etched to remove the Al in the source region and the drain region. X Ga 1-X N barrier layer and the barrier layer to form a X Ga 1-XN barrier layer and via holes in the barrier layer; In the Al X Ga 1-X Depositing an ohmic contact metal on a side of the N barrier layer facing away from the substrate, and etching the ohmic contact metal to remove the ohmic contact metal outside the source region and the drain region to form a source electrode and a drain electrode respectively contacting the channel layer through the via hole; Depositing a dielectric film on the side of the source electrode and the drain electrode away from the substrate, and etching the dielectric film to remove the dielectric film outside the gate region to form a first dielectric layer; A gate electrode metal is deposited on a side of the first dielectric layer facing away from the substrate, and the gate electrode metal is etched to remove the gate electrode metal outside the gate region to form a gate electrode.

[0019] On the other hand, an embodiment of the present disclosure further provides an electronic device, comprising the above-mentioned enhancement-mode gallium nitride device provided by an embodiment of the present disclosure.

[0020] The beneficial effects of the present disclosure are as follows: The embodiment of the present disclosure provides an enhanced gallium nitride device, a preparation method thereof, and an electronic device, by growing a layer of Al component concentration with Al after etching the P-type doped layer. X Ga 1-X The thickness of the N barrier layer increases as the graded Al X Ga 1-X The N barrier layer can repair the damage of the P-type doped layer etching side wall to reduce the side wall leakage, repair the barrier layer surface damage, and compensate for the over-etching of the barrier layer during the P-type doped layer etching process; and Al X Ga 1-X The side of the N barrier layer facing away from the substrate has a greater Al component concentration, which works together with the in-situ barrier layer to produce a stronger polarization effect, generating a higher concentration of 2DEG in the channel region of the non-gate area, reducing the device on-resistance and improving the device dynamic characteristics; at the same time, Al X Ga 1-X The Al component concentration of the N barrier layer near the gate electrode is large, and the band gap is larger, which can effectively reduce the gate electrode leakage; and Al X Ga 1-X Compared with the barrier layer with a fixed Al component concentration, the valence band top of the N barrier layer is smoother. When a positive bias is applied to the P-type doped layer, it is easier for holes to be injected from the gate electrode into the P-type doped layer, which can effectively compensate for the gate electrode threshold voltage drift caused by the difficulty in hole injection and improve the dynamic characteristics of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1A schematic diagram of the structure of an enhanced gallium nitride device provided in an embodiment of the present disclosure; Figure 2 A schematic diagram of another structure of an enhancement-mode gallium nitride device provided in an embodiment of the present disclosure; Figure 3 A schematic diagram of another structure of an enhancement-mode gallium nitride device provided in an embodiment of the present disclosure; Figure 4 A schematic diagram of another structure of an enhancement-mode gallium nitride device provided in an embodiment of the present disclosure; Figure 5 A flow chart of a method for preparing an enhanced gallium nitride device provided in an embodiment of the present disclosure; Fig. 6A for Figure 2 A schematic diagram of the structure of an enhancement-mode gallium nitride device during the preparation process is shown; Figure 6B for Figure 2 Another structural schematic diagram of an enhancement-mode gallium nitride device during the preparation process is shown; Figure 6C for Figure 2 Another structural schematic diagram of an enhancement-mode gallium nitride device during the preparation process is shown; Fig.6D for Figure 2 Another structural schematic diagram of an enhancement-mode gallium nitride device during the preparation process is shown; Fig. 6E for Figure 2 Another structural schematic diagram of an enhancement-mode gallium nitride device during the preparation process is shown; Fig. 6F for Figure 2 Another structural schematic diagram of an enhancement-mode gallium nitride device during the preparation process is shown; Figure 6G for Figure 2 Another structural schematic diagram of an enhancement-mode gallium nitride device during the preparation process is shown; Figure 6H for Figure 2 Another structural schematic diagram of an enhancement mode gallium nitride device during the preparation process is shown. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described in conjunction with the drawings of the embodiments of the present disclosure. It should be noted that in the drawings, the thickness of the layers, films, panels, regions, etc. is magnified for clarity. In the present disclosure, exemplary embodiments are described with reference to cross-sectional views of schematic diagrams of idealized embodiments. In this way, deviations from the shapes of the figures as a result of, for example, manufacturing technology and / or tolerances will be expected. Therefore, the embodiments described in the present disclosure should not be interpreted as being limited to the specific shapes of the regions shown in the present disclosure, but include deviations in shape caused by, for example, manufacturing. For example, an area illustrated or described as flat may typically have rough and / or nonlinear features; the illustrated sharp corners may be rounded, etc. Therefore, the areas shown in the figures are schematic in nature, and their sizes and shapes do not represent the exact shapes of the illustrated areas, do not reflect the true proportions, and the purpose is only to illustrate the contents of the present disclosure. And the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of well-known functions and well-known components.

[0023] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons of ordinary skill in the field to which the present disclosure belongs. The words "first", "second" and similar words used in the present disclosure specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" and the like mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Inside", "outside", "upper", "lower", etc. are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0024] In the following description, when an element or layer is referred to as being "on" or "connected to" another element or layer, the element or layer may be directly on, directly connected to, or there may be an intermediate element or intermediate layer. When an element or layer is referred to as being "disposed on one side of" another element or layer, the element or layer may be directly on one side of, directly connected to, or there may be an intermediate element or intermediate layer. However, when an element or layer is referred to as being "directly on" or "directly connected to" another element or layer, there are no intermediate elements or intermediate layers. The term "and / or" includes any and all combinations of one or more of the associated listed items.

[0025] The present disclosure provides an enhanced gallium nitride device, such as Figure 1 As shown, it comprises: a substrate 1, a buffer layer 2, a channel layer 3, a barrier layer 4, a P-type doping layer 5, an Al X Ga 1-X N barrier layer 6, source electrode 7 and drain electrode 8, first dielectric layer 9 and gate electrode 10; wherein x is 0-1; barrier layer 4 and channel layer 3 form a heterostructure, which can induce 2DEG, and the dotted line in channel layer 3 represents 2DEG; first dielectric layer 9 can protect the device from oxidation; The source electrode 7 and the drain electrode 8 are respectively formed by penetrating Al X Ga 1-X The N barrier layer 6 and the via hole of the barrier layer 4 are in contact with the channel layer 3; the orthographic projection of the gate electrode 10 on the substrate 1 is located between the orthographic projections of the source electrode 7 and the drain electrode 8 on the substrate 1, and the gate electrode 10 is connected to the Al through the via hole penetrating the first dielectric layer 9. X Ga 1-X N barrier layer 6 contact; Among them, along Al X Ga 1-X In the direction from the side of the N barrier layer 6 close to the substrate 1 to the side away from the substrate 1 (the direction of the arrow F), Al X Ga 1-X The Al component concentration in the N barrier layer 6 gradually increases.

[0026] The enhanced gallium nitride device provided in the embodiment of the present disclosure is formed by growing a layer of Al component concentration varying with Al after etching the P-type doped layer. X Ga 1-X The thickness of the N barrier layer increases as the graded Al X Ga 1-X The N barrier layer can repair the damage of the P-type doped layer etching side wall to reduce the side wall leakage, repair the barrier layer surface damage, and compensate for the over-etching of the barrier layer during the P-type doped layer etching process; and AlX Ga 1-X The side of the N barrier layer facing away from the substrate has a greater Al component concentration, which works together with the in-situ barrier layer to produce a stronger polarization effect, generating a higher concentration of 2DEG in the channel region of the non-gate area, reducing the device on-resistance and improving the device dynamic characteristics; at the same time, Al X Ga 1-X The Al component concentration of the N barrier layer near the gate electrode is large, and the band gap is larger, which can effectively reduce the gate electrode leakage; and Al X Ga 1-X Compared with the barrier layer with a fixed Al component concentration, the valence band top of the N barrier layer is smoother. When a positive bias is applied to the P-type doped layer, it is easier for holes to be injected from the gate electrode into the P-type doped layer, which can effectively compensate for the gate electrode threshold voltage drift caused by the difficulty in hole injection and improve the dynamic characteristics of the device.

[0027] Specifically, due to Al X Ga 1-X The Al component concentration of the N barrier layer gradually changes between 0 and 1. X Ga 1-X The Al component concentration is low near the in-situ barrier layer of the N barrier layer. X Ga 1-X The stress of the N barrier layer is small, and the Al X Ga 1-X The N barrier layer has better growth quality.

[0028] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 1 As shown, the substrate 1 may be a GaN substrate, a SiC substrate, a Si substrate, a sapphire substrate, an AlN substrate, a QST substrate, etc.

[0029] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 1 As shown, the material of the buffer layer 2 can be one or more of AlN, AlGaN, InGaN, and GaN, the material of the channel layer 3 can be GaN, the material of the barrier layer 4 can be AlGaN, the concentration of the Al component in AlGaN is 1% to 30%, the thickness of the barrier layer 4 is 1 to 30 nm, and the material of the P-type doping layer can be Mg-doped GaN, that is, the P-type doping layer 5 is a P-GaN layer.

[0030] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 1 As shown, the width of the source electrode 7 and the drain electrode 8 are both larger than the width of the Al X Ga 1-XThe width of the via holes of the N barrier layer 6 and the barrier layer 4 and the width of the gate electrode 10 are greater than the width of the via hole penetrating the first dielectric layer 9 .

[0031] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 1 As shown, the materials of the source electrode 7 and the drain electrode 8 include one or more of Ti, Al, Ta, Mo, Au, Ni, and TiN, and the material of the gate electrode 10 may include one or more of Ti, Al, Ta, Mo, Au, Ni, and TiN. It is understandable that the materials of the source electrode 7, the drain electrode 8, and the gate electrode 10 may be the same or different.

[0032] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 1 As shown, the material of the first dielectric layer 9 can be aluminum nitride and silicon oxide.

[0033] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 1 As shown, Al X Ga 1-X The thickness of the N barrier layer 6 can be 1-100 nm, for example, 1 nm, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, etc.

[0034] In some embodiments, in the above-mentioned enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 1 As shown, Al X Ga 1-X The Al component concentration in the N barrier layer 6 away from the top surface B1 of the substrate 1 is greater than or equal to the Al component concentration in the barrier layer 4. X Ga 1-X The Al component concentration in the N barrier layer 6 increases with the Al X Ga 1-X The Al component concentration of the top surface B1 is not lower than the Al component concentration of the in-situ barrier layer 4. For example, the Al component concentration in the barrier layer 4 is 30%, and the Al component concentration in the top surface B1 is not lower than the Al component concentration in the in-situ barrier layer 4. X Ga 1-X The Al component concentration in the N barrier layer 6 can be gradually increased from 0 to 30% or more, for example, from 0 to 40%, 50%, 60%, 70%, 80%, 90%, 100%, etc. X Ga 1-XThe Al component concentration in the N barrier layer 6 can also be gradually increased from 30% to 100%. Of course, it is not limited to increasing to 100%, and can also be gradually increased from 30% to 40%, 50%, 60%, 70%, 80%, 90%, etc., according to the need to optimize device performance.

[0035] In some embodiments, in the above-mentioned enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 1 As shown, Al X Ga 1-X The Al component concentration in the N barrier layer 6 close to the bottom surface B2 of the substrate 1 is greater than or equal to the Al component concentration in the barrier layer 4. X Ga 1-X The Al component concentration in the N barrier layer 6 increases with the Al X Ga 1-X The Al component concentration of the bottom surface B2 is not lower than the Al component concentration of the in-situ barrier layer 4. For example, the Al component concentration in the barrier layer 4 is 30%, and the Al component concentration of the bottom surface B2 is not lower than the Al component concentration of the in-situ barrier layer 4. X Ga 1-X The Al component concentration in the N barrier layer 6 can be gradually increased from 30% to 100%, and is certainly not limited to 100%. It can also be gradually increased from 30% to 40%, 50%, 60%, 70%, 80%, 90%, etc., depending on the need to optimize device performance.

[0036] Specifically, when Al X Ga 1-X The Al component concentration of the bottom surface B2 of the N barrier layer 6 is higher than that of the original barrier layer 4, which can fully compensate for the 2DEG decrease caused by the over-etching of the original barrier layer 4, strengthen the polarization effect in the channel layer 3, increase the 2DEG concentration, and reduce the channel on-resistance. The gradient high Al component concentration can reduce the leakage of the gate electrode 10, improve the hole injection of the P-type doping layer 5, and suppress the threshold voltage drift. Therefore, the present invention can adjust the gradient Al according to different device requirements. X Ga 1-X The Al component concentration distribution and thickness of the N barrier layer 6 are used to achieve different device parameters.

[0037] In some embodiments, in the above-mentioned enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 2 As shown, Figure 2 The structure shown is Figure 1 The structures shown are basically the same, the only difference is Figure 2 Al X Ga 1-XThe surface of the N barrier layer 6 near the gate electrode 10 has a groove 61, and the gate electrode 10 fills the groove 61. That is, when the first dielectric layer 9 is etched to form a via hole corresponding to the gate electrode 10 area, Figure 1 The structure shown is etched to stop at Al X Ga 1-X The surface of N barrier layer 6, on Al X Ga 1-X There is no overetching in the N barrier layer 6 corresponding to the gate electrode 10 region. Figure 2 When etching the first dielectric layer 9 to form a via hole corresponding to the gate electrode 10 region, the etching stops at the Al X Ga 1-X Inside the N barrier layer 6, that is, etching at least part of the thickness of the Al X Ga 1-X N barrier layer 6 can reduce the distance between gate electrode 10 and 2DEG formed by channel layer 3, thus solving the problem of Al X Ga 1-X The problem that the control capability of the gate electrode 10 over the channel layer 3 is weakened due to the excessive thickness of the N barrier layer 6 .

[0038] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 2 As shown, the depth of the groove 61 can be 1-100 nm, for example, 1 nm, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, etc.

[0039] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 3 As shown, Figure 3 The structure shown is Figure 1 The structures shown are basically the same, the only difference is Figure 3 The structure shown in the figure also includes a spacer layer 11 located between the channel layer 3 and the barrier layer 4. The source electrode 7 and the drain electrode 8 are respectively formed by penetrating Al X Ga 1-X The vias of the N barrier layer 6, the barrier layer 4 and the spacer layer 11 are in contact with the channel layer 3. Specifically, the material of the spacer layer 11 may be, but is not limited to, AlN, and the thickness of the spacer layer 11 is greater than 0 and less than or equal to 3 nm, such as 1 nm, 2 nm, 3 nm, etc. The spacer layer 11 may improve the 2DEG mobility and reduce the channel resistance.

[0040] In some embodiments, in the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure, if Figure 4 As shown, Figure 4 The structure shown is Figure 1The structures shown are basically the same, the only difference is Figure 4 The structure shown also includes a X Ga 1- X The second dielectric layer 12 between the N barrier layer 6 and the source electrode 7 and the drain electrode 8 can reduce stress and improve device performance; the source electrode 7 and the drain electrode 8 are respectively formed by penetrating the second dielectric layer 12, Al X Ga 1-X The via holes of the N barrier layer 6 and the barrier layer 4 are in contact with the channel layer 3, and the gate electrode 10 is in contact with the Al2O3 layer through the via holes penetrating the first dielectric layer 9 and the second dielectric layer 12. X Ga 1-X N barrier layer 6. Specifically, the material of the second dielectric layer 12 may include but is not limited to one or more of SiO2, SiN, and AlN, and the thickness of the second dielectric layer 12 may be 1-200 nm, for example, 1 nm, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, 200 nm, etc.

[0041] It should be noted that Figure 2 Al X Ga 1-X N barrier layer 6 structure, Figure 3 The spacer layer 11 and Figure 4 The second dielectric layers 12 in the embodiment can be used in combination with each other.

[0042] Based on the same inventive concept, an embodiment of the present disclosure provides a method for preparing the above-mentioned enhanced gallium nitride device. Since the principle of solving the problem by the preparation method is similar to the principle of solving the problem by the above-mentioned enhanced gallium nitride device, the implementation of the preparation method provided by the embodiment of the present disclosure can refer to the implementation of the above-mentioned enhanced gallium nitride device provided by the embodiment of the present disclosure, and the repeated parts will not be repeated.

[0043] In some embodiments, the method for preparing the enhancement-mode gallium nitride device provided in the embodiments of the present disclosure is as follows: Figure 5 As shown, it may include: S501, forming a buffer layer, a channel layer, a barrier layer and a P-type doping layer stacked in sequence on one side of the substrate in a direction away from the substrate; S502, etching the P-type doped layer to form a P-type doped layer located in the gate region; S503, using molecular beam epitaxy technology on the side of the P-type doped layer away from the substrate, by adjusting the composition ratio of the Al source and the Ga source, an Al layer with an Al component concentration gradually increasing as the thickness increases is formed. X Ga 1-X N barrier layer; S504, Al X Ga 1-X The N barrier layer and the barrier layer are etched to remove the Al in the source and drain regions. X Ga 1-X N barrier layer and barrier layer to form a through Al X Ga 1-X N barrier layer and via holes in the barrier layer; S505, in Al X Ga 1-X Depositing an ohmic contact metal on the side of the N barrier layer facing away from the substrate, and etching the ohmic contact metal to remove the ohmic contact metal outside the source region and the drain region to form a source electrode and a drain electrode respectively contacting the channel layer through vias; S506, depositing a dielectric film on the side of the source electrode and the drain electrode facing away from the substrate, and etching the dielectric film to remove the dielectric film outside the gate region to form a first dielectric layer; S507 , depositing a gate electrode metal on a side of the first dielectric layer facing away from the substrate, etching the gate electrode metal, removing the gate electrode metal outside the gate region, and forming a gate electrode.

[0044] In order to better understand the above preparation method provided in the embodiments of the present disclosure, Figure 1 Taking the enhanced gallium nitride device shown as an example, the preparation process of the enhanced gallium nitride device is described in detail.

[0045] In some embodiments, Figure 1 The preparation process of the enhancement-mode gallium nitride device may specifically include the following steps: (1) If Fig. 6A As shown, a substrate 1 is selected, and a buffer layer 2 , a channel layer 3 , a barrier layer 4 , and a P-type doping layer 5 are stacked and formed in sequence on one side of the substrate 1 in a direction away from the substrate 1 .

[0046] (2) If Figure 6B As shown, photoresist is used as a soft mask or other dielectric materials are used as a hard mask to etch the P-type doped layer 5 to remove the P-type doped layer 5 outside the gate region to form a P-type doped layer 5 located in the gate region, and then excess photoresist or dielectric materials are removed.

[0047] (3) If Figure 6CAs shown, molecular beam epitaxy technology is used on the side of the P-type doped layer 5 away from the substrate 1 to adjust the composition ratio of the Al source and the Ga source to form an Al layer with an Al component concentration gradually increasing as the thickness increases. X Ga 1-X N barrier layer 6, followed by Al X Ga 1-X The N barrier layer 6 is annealed. X Ga 1-X As an example, the N barrier layer 6 can also be grown by other techniques such as MOCVD (metal organic chemical vapor deposition) and ALD (atomic layer deposition). X Ga 1-X The N barrier layer 6 is not limited in the present disclosure.

[0048] (4) If Fig.6D As shown, photoresist is used as a soft mask and a dry etching process is used to etch Al X Ga 1-X The N barrier layer 6 and the barrier layer 4 are etched to remove the Al in the source region and the drain region. X Ga 1-X N barrier layer 6 and barrier layer 4 form a through Al X Ga 1-X The vias of N barrier layer 6 and barrier layer 4 penetrate Al X Ga 1-X The via holes of the N barrier layer 6 and the barrier layer 4 are denoted by V1 ; specifically, the etching may be stopped at the upper surface of the channel layer 3 or the channel layer 3 may be overetched within 10 nm.

[0049] (5) Fig. 6E As shown in Al X Ga 1-X An ohmic contact metal 78 is non-selectively deposited on the side of the N barrier layer 6 facing away from the substrate 1 .

[0050] (6) If Fig. 6F As shown, using photoresist as a soft mask, using a dry etching process to etch the ohmic contact metal 78, removing the ohmic contact metal 78 outside the source region and the drain region, forming a source electrode 7 and a drain electrode 8 respectively contacting the channel layer 3 through the via hole V1, and the width of the source electrode 7 and the drain electrode 8 is greater than the width of the Al X Ga 1-X The via width of the N barrier layer 6 and the barrier layer 4 is then annealed to the source electrode 7 and the drain electrode 8 .

[0051] (7) Figure 6G As shown, a dielectric film 9 ′ is non-selectively deposited on the side of the source electrode 7 and the drain electrode 8 facing away from the substrate 1 .

[0052] (8) Figure 6H As shown, a photoresist is used as a soft mask, and a dry etching process is used to etch the dielectric film 9' to remove the dielectric film 9' outside the gate region, that is, the etching stops at the Al X Ga 1-X The top surface of the N barrier layer 6 forms a first dielectric layer 9 having a via corresponding to the gate region, and the via on the first dielectric layer 9 is represented by V2. For example, the material of the first dielectric layer is an aluminum nitride layer grown by atomic layer deposition technology and a silicon oxide layer grown by PECVD.

[0053] (9) Figure 1 As shown, a gate electrode metal is deposited on the side of the first dielectric layer 9 away from the substrate 1, a photoresist is used as a soft mask, and a dry etching process is used to etch the gate electrode metal to remove the gate electrode metal outside the gate area, thereby forming a via hole V2 connected to the Al X Ga 1-X The gate electrode 10 that contacts the N barrier layer 6 has a width that is greater than a width of a via hole that penetrates the first dielectric layer 9 , and then the gate electrode 10 is annealed.

[0054] Through the above steps (1)-(9) Figure 1 Enhancement-mode GaN device shown.

[0055] Need to explain yes, Figure 2 The preparation method of the enhanced gallium nitride device shown in Figure 1 The preparation method shown is basically the same, except that: when etching the dielectric film 9', the etching stops at the Al X Ga 1-X The inside of the N barrier layer 6.

[0056] Need to explain yes, Figure 3 The preparation method of the enhanced gallium nitride device shown in Figure 1 The preparation method shown in the figure is basically the same, except that: a spacer layer 11 is formed between the channel layer 3 and the barrier layer 4 in the above step (1), and Al is X Ga 1-X When the N barrier layer 6 and the barrier layer 4 are etched, the spacer layer 11 is etched at the same time.

[0057] Need to explain yes, Figure 4 The preparation method of the enhanced gallium nitride device shown in Figure 1 The preparation methods shown are basically the same, except that: in the above step (3), Al is formed X Ga 1-X After the N barrier layer 6, and in the above step (4) to Al X Ga 1-XBefore etching the N barrier layer 6 and the barrier layer 4, the Al X Ga 1-X A second dielectric layer 12 is formed on the N barrier layer 6. In the above step (4), Al X Ga 1-X When the N barrier layer 6 and the barrier layer 4 are etched, the second dielectric layer 12 is etched simultaneously. When the dielectric film 9' is etched in the above step (8), the second dielectric layer 12 is etched simultaneously.

[0058] Based on the same inventive concept, an embodiment of the present disclosure provides an electronic device, including the enhanced gallium nitride device provided in the embodiment of the present disclosure. Since the principle of solving the problem by the electronic device is similar to the principle of solving the problem by the enhanced gallium nitride device, the implementation of the electronic device provided in the embodiment of the present disclosure can refer to the implementation of the enhanced gallium nitride device provided in the embodiment of the present disclosure, and the repeated parts will not be repeated.

[0059] In some embodiments, the electronic devices provided by the embodiments of the present disclosure may include, but are not limited to: radio frequency amplifiers, mixers, radars, satellites, power supplies, automotive electronics, energy-saving lamps, household appliances, etc. Of course, in addition to enhanced gallium nitride devices, the electronic devices provided by the present disclosure may also include other structures, for example, when the electronic device is a radar, it also includes: transmitters, antennas, receivers, etc.; when the electronic device is a mixer, it also includes: input ports, output ports, etc.

[0060] The embodiment of the present disclosure provides an enhanced gallium nitride device, a preparation method thereof, and an electronic device, by growing a layer of Al component concentration with Al after etching the P-type doped layer. X Ga 1-X The thickness of the N barrier layer increases as the graded Al X Ga 1-X The N barrier layer can repair the damage of the P-type doped layer etching side wall to reduce the side wall leakage, and repair the surface damage of the barrier layer to compensate for the over-etching of the barrier layer during the etching process of the P-type doped layer; and the Al X Ga 1-X The side of the N barrier layer facing away from the substrate has a greater Al component concentration, which works together with the in-situ barrier layer to produce a stronger polarization effect, generating a higher concentration of 2DEG in the channel region of the non-gate area, reducing the device on-resistance and improving the device dynamic characteristics; at the same time, Al X Ga 1-X The Al component concentration of the N barrier layer near the gate electrode is large, and the band gap is larger, which can effectively reduce the gate electrode leakage; and Al X Ga 1-XCompared with the barrier layer with a fixed Al component concentration, the valence band top of the N barrier layer is smoother. When a positive bias is applied to the P-type doped layer, it is easier for holes to be injected from the gate electrode into the P-type doped layer, which can effectively compensate for the gate electrode threshold voltage drift caused by the difficulty in hole injection and improve the dynamic characteristics of the device.

[0061] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present disclosure.

[0062] Obviously, those skilled in the art can make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is also intended to include these modifications and variations.

Claims

1. An enhancement-mode gallium nitride device, characterized in that: include: A buffer layer, a channel layer, a barrier layer, a P-type doping layer, an Al layer, and a plurality of other layers are sequentially stacked on the substrate in a direction away from the substrate. X Ga 1-X N barrier layer, source electrode and drain electrode, first dielectric layer and gate electrode; wherein x is 0~1; The source electrode and the drain electrode are respectively formed by penetrating the Al X Ga 1-X The N barrier layer and the via hole of the barrier layer are in contact with the channel layer; the positive projection of the gate electrode on the substrate is located between the positive projections of the source electrode and the drain electrode on the substrate; the gate electrode is connected to the Al through the via hole penetrating the first dielectric layer. X Ga 1-X N barrier layer contact; Among them, along the Al X Ga 1-X The N barrier layer is close to the substrate and points in a direction away from the substrate. X Ga 1-X The Al component concentration in the N barrier layer gradually increases.

2. The enhancement-mode gallium nitride device according to claim 1, characterized in that: The Al X Ga 1-X The Al component concentration in the N barrier layer away from the top surface of the substrate is greater than or equal to the Al component concentration in the barrier layer.

3. The enhancement-mode gallium nitride device according to claim 1, characterized in that: The Al X Ga 1-X The Al component concentration in the N barrier layer close to the bottom surface of the substrate is greater than or equal to the Al component concentration in the barrier layer.

4. The enhancement-mode gallium nitride device according to claim 1, characterized in that: The Al X Ga 1-X The thickness of the N barrier layer is 1~100 nm.

5. The enhancement-mode gallium nitride device according to any one of claims 1 to 4, characterized in that: The Al X Ga 1-X A surface of the N barrier layer close to the gate electrode has a groove, and the gate electrode fills the groove.

6. The enhancement-mode gallium nitride device according to claim 5, characterized in that: The depth of the groove is 1-100 nm.

7. The enhancement-mode gallium nitride device according to any one of claims 1 to 4, characterized in that: The invention also includes a spacer layer located between the channel layer and the barrier layer, wherein the source electrode and the drain electrode are respectively formed by penetrating the Al X Ga 1-X An N barrier layer, the barrier layer, and a via hole of the spacer layer are in contact with the channel layer.

8. The enhancement-mode gallium nitride device according to claim 7, characterized in that: The material of the spacer layer is AlN, and the thickness of the spacer layer is greater than 0 and less than or equal to 3 nm.

9. The enhancement-mode gallium nitride device according to any one of claims 1 to 4, characterized in that: Also included is located in the Al X Ga 1-X The N barrier layer and the second dielectric layer between the source electrode and the drain electrode, the source electrode and the drain electrode are respectively formed by penetrating the second dielectric layer, the Al X Ga 1-X The N barrier layer and the via hole of the barrier layer are in contact with the channel layer, and the gate electrode is connected to the Al X Ga 1-X N barrier layer contact.

10. The enhancement-mode gallium nitride device according to claim 9, characterized in that: The material of the second dielectric layer includes one or more of SiO2, SiN, and AlN, and the thickness of the second dielectric layer is 1-200 nm.

11. The enhancement-mode gallium nitride device according to any one of claims 1 to 4, characterized in that: The material of the channel layer is GaN, the material of the barrier layer is AlGaN, and the material of the P-type doping layer is Mg-doped GaN.

12. A method for preparing an enhancement-mode gallium nitride device, used for preparing the enhancement-mode gallium nitride device according to any one of claims 1 to 11, characterized in that: The preparation method comprises: A buffer layer, a channel layer, a barrier layer and a P-type doping layer are sequentially formed in a stacked manner on one side of the substrate in a direction away from the substrate; Etching the P-type doped layer to form a P-type doped layer located in the gate region; Molecular beam epitaxy is used on the side of the P-type doped layer away from the substrate to form an Al layer with an Al component concentration gradually increasing as the thickness increases by adjusting the component ratio of the Al source and the Ga source. X Ga 1-X N barrier layer; For the Al X Ga 1-X The N barrier layer and the barrier layer are etched to remove the Al in the source region and the drain region. X Ga 1-X N barrier layer and the barrier layer to form a X Ga 1-X N barrier layer and via holes in the barrier layer; In the Al X Ga 1-X Depositing an ohmic contact metal on a side of the N barrier layer facing away from the substrate, and etching the ohmic contact metal to remove the ohmic contact metal outside the source region and the drain region to form a source electrode and a drain electrode respectively contacting the channel layer through the via hole; Depositing a dielectric film on the side of the source electrode and the drain electrode away from the substrate, and etching the dielectric film to remove the dielectric film outside the gate region to form a first dielectric layer; A gate electrode metal is deposited on a side of the first dielectric layer facing away from the substrate, and the gate electrode metal is etched to remove the gate electrode metal outside the gate region to form a gate electrode.

13. An electronic device, characterized in that: Comprising the enhancement-mode gallium nitride device as described in any one of claims 1 to 11.

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