Wide bandgap semiconductor device

By introducing an electric field adjustment region or a second doped type of wide bandgap semiconductor layer into a wide bandgap semiconductor MOSFET device, the electric field distribution is optimized, and the high conduction loss and gate dielectric layer breakdown risk caused by excessive channel resistance are solved. , achieving lower conduction loss and higher device reliability.

CN119170634AInactive Publication Date: 2024-12-20GUANGZHOU HUARUI SHENGYANG INVESTMENT CO LTD
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Patent Information

Application Number
CN202411144707.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-20
Publication Date
2024-12-20
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The excessive channel resistance in wide bandgap semiconductor MOSFET devices leads to high conduction loss and high risk of gate dielectric layer breakdown, making it difficult to effectively optimize the existing technology.

Method used

An electric field adjustment region is introduced in a wide bandgap semiconductor device, and the electric field line distribution between the source trench is adjusted by setting a field electrode and an isolation dielectric layer, or a second doped wide bandgap semiconductor layer is provided below the source trench , avoid the concentration of electric field lines in the channel area.

Benefits of technology

It reduces the device's conduction loss and gate dielectric layer breakdown risk, allows further shortening of the channel length without causing source and drain field penetration, effectively improving the high conduction loss and gate dielectric layer failure problems caused by excessive channel resistance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a wide bandgap semiconductor power device, which comprises at least one cellular structure, and the cellular structure comprises a substrate; the wide bandgap semiconductor layer is arranged on the substrate; the source electrode grooves and the grid electrode grooves are distributed in the wide bandgap semiconductor layer in parallel and are arranged at intervals; the source region is arranged in the wide bandgap semiconductor layer between the source trench and the gate trench; the first source electrode is arranged in the source electrode groove, and Schottky contact is formed between the side wall of the source electrode groove and the wide bandgap semiconductor layer; a gate electrode disposed in the gate trench; the gate dielectric layer surrounds the gate electrode; the second source electrode is arranged on the first source electrode and forms ohmic contact with the source region; the electric field adjusting region is arranged below the at least one first source electrode and is used for adjusting electric field line distribution between the source electrode trenches; the drain electrode is arranged on the lower surface of the substrate; wherein the extension length of the source trench in the vertical direction exceeds that of the gate trench. According to the invention, the conduction loss of the wide bandgap semiconductor device and the breakdown risk of the gate dielectric layer can be reduced.
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Description

Technical Field

[0001] The invention belongs to the technical field of power electronics, and in particular relates to a wide bandgap semiconductor device. Background Art

[0002] Power semiconductor devices are the core components of power electronics technology and have a decisive influence on the energy conversion efficiency of power electronics systems. An ideal power semiconductor device needs to have as low conduction loss and switching loss as possible while having sufficiently high voltage blocking capability. In wide bandgap semiconductor MOSFET devices, the channel resistance accounts for a large proportion and is the main source of device conduction loss. On the other hand, the large proportion of channel resistance means that when the wide bandgap semiconductor MOSFET device is in the reverse cutoff state, the source-drain electric field will be more concentrated in the channel region, resulting in a sharp increase in the risk of gate dielectric layer breakdown in the channel region. Therefore, in wide bandgap semiconductor MOSFET devices, channel resistance optimization is the primary goal of device structure design.

[0003] The channel resistance of a MOSFET can be calculated using the following formula: Where L is the channel length, W is the channel width, μ is the carrier mobility, C ox is the gate oxide capacitance per unit area, V GS is the gate-source voltage, V TH is the threshold turn-on voltage. According to the above formula, there are four main ways to reduce the channel resistance of MOSFET: 1) reduce the aspect ratio of the channel; 2) increase the mobility of channel carriers; 3) increase the gate oxide capacitance per unit area; 4) increase the gate-source voltage or reduce the threshold turn-on voltage. In the design of MOSFET cell structure, the channel resistance of MOSFET is generally optimized by reducing the aspect ratio of the channel through approach 1. The improvement of carrier mobility in approach 2 is mainly achieved by improving the quality of the gate oxide interface through the process. However, approaches 3 and 4 will cause serious reliability problems in the device and increase the switching loss, so they are generally not used as the optimization direction of the channel resistance.

[0004] However, currently, optimizing the channel resistance of wide bandgap semiconductor MOSFET by reducing the channel aspect ratio also faces bottlenecks. On the one hand, the reduction of the channel aspect ratio can be achieved by shortening the channel length. However, with the shortening of the channel length, the electric field between the drain and the source of the MOSFET may directly penetrate, resulting in a decrease in the threshold voltage of the MOSFET or even an inability to turn off. This phenomenon is called the drain-induced barrier lowering effect (DIBL). On the other hand, the reduction of the channel aspect ratio can be achieved by connecting more cells in parallel, but this will also cause the short-circuit current of the chip to increase, exacerbating the already weak short-circuit tolerance problem of wide bandgap semiconductor MOSFET. Therefore, in wide bandgap semiconductor MOSFET, conventional cell structure solutions are difficult to solve the problems of high conduction loss and gate dielectric layer breakdown caused by excessive channel resistance. Summary of the invention

[0005] In view of the deficiencies in the prior art, the present invention aims to provide a wide bandgap semiconductor MOSFET device to improve the high conduction loss and high gate dielectric layer breakdown risk problems caused by excessive channel resistance of the wide bandgap semiconductor MOSFET device.

[0006] In order to achieve the above object, the present invention adopts the following technical solution:

[0007] A wide bandgap semiconductor device comprises at least one cellular structure, wherein the cellular structure comprises:

[0008] substrate;

[0009] A wide bandgap semiconductor layer is disposed on the substrate and is a wide bandgap semiconductor of a first doping type;

[0010] A plurality of source trenches are parallelly distributed in the wide bandgap semiconductor layer;

[0011] A plurality of gate trenches are distributed in parallel with the wide bandgap semiconductor layer and are spaced apart from the source trenches;

[0012] A source region is provided in the wide bandgap semiconductor layer between the source trench and the gate trench;

[0013] A first source electrode is disposed in the source trench, and the first source electrode forms a Schottky contact with the wide bandgap semiconductor layer at a sidewall of the source trench;

[0014] A gate electrode is disposed in the gate trench;

[0015] A gate dielectric layer is disposed in the gate trench and surrounds the gate electrode;

[0016] A second source electrode is disposed on the first source electrode and forms an ohmic contact with the source region;

[0017] An electric field adjustment region, disposed below at least one first source electrode, for adjusting the distribution of electric field lines between source trenches;

[0018] A drain electrode is disposed on the lower surface of the substrate;

[0019] The extension length of the source trench in the vertical direction exceeds that of the gate trench.

[0020] Preferably, the electric field adjustment region is arranged in the source trench, and comprises: a field electrode and an isolation dielectric layer, wherein the isolation dielectric layer physically isolates the field electrode from the wide bandgap semiconductor layer.

[0021] Preferably, the electric field adjustment region is a wide bandgap semiconductor layer of the second doping type, and is disposed below the source trench.

[0022] Preferably, the wide bandgap semiconductor layer is one of SiC, GaN, AlN, Ga2O3, ZnO, SnO2, and diamond.

[0023] Preferably, a work function difference between the field electrode and the first doping type wide bandgap semiconductor layer is greater than 0.3 eV.

[0024] Preferably, the field electrode is made of polysilicon.

[0025] Preferably, the polysilicon has a second doping type, and the doping concentration is greater than 1×10 16 cm -3 .

[0026] Preferably, the constituent material of the field electrode includes at least one of Ti, Co, Ni, W, Mo, Au, Pt, Ru, Rh, and Ir.

[0027] Preferably, the field electrode consists of a plurality of parts with different work functions.

[0028] Preferably, the length of the field electrode in the vertical direction is between 0.1 and 20 μm.

[0029] Preferably, in the vertical direction, a lower surface of the field electrode is lower than a lower surface of the gate trench.

[0030] Preferably, in the horizontal direction, the maximum width of the electric field adjustment region is greater than the width of the source trench.

[0031] Preferably, in the vertical direction, a central axis of the electric field adjustment region coincides with a central axis of the source trench.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] The present invention can reduce the conduction loss of wide bandgap semiconductor devices and the risk of breakdown of gate dielectric layers by setting an electric field adjustment zone for adjusting the distribution of electric field lines between source trenches below at least one first source electrode. Specifically: a field electrode is set in the source trench, the field electrode can assist the charge depletion of the drift layer, and establish a lateral electric field in the drift layer, thereby optimizing the distribution of the electric field lines of the source-drain electric field between the drift layer and the channel when the MOSFET device is reversely cut off, and avoiding the concentration of the source-drain electric field in the channel area; or, by setting a wide bandgap semiconductor layer of a second doping type below the source trench, it is avoided that when the lower surface of the source trench is lower than the lower surface of the gate trench, the electric field lines are more concentrated at the bottom of the source trench. Device reliability problems caused. Therefore, the channel length can be further reduced on the basis of the existing wide bandgap semiconductor MOSFET structure without the problem of source-drain electric field penetrating the channel, effectively improving the high conduction loss and gate dielectric layer failure problems caused by excessive channel resistance of wide bandgap semiconductor MOSFET devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A schematic diagram of a cell structure of a wide bandgap semiconductor device provided in Embodiment 1 of the present invention;

[0035] Figure 2 A schematic diagram of a cell structure of a wide bandgap semiconductor device provided in Embodiment 2 of the present invention;

[0036] Figure 3 A schematic diagram of a cell structure of a wide bandgap semiconductor device provided in Embodiment 3 of the present invention;

[0037] Figure 4 A schematic diagram of the cell structure of a wide bandgap semiconductor device provided in Embodiment 4 of the present invention. DETAILED DESCRIPTION

[0038] The present invention and its beneficial effects will be further described in detail below in conjunction with specific implementations and the accompanying drawings, but the specific implementations of the present invention are not limited thereto.

[0039] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0040] In the present invention, the first doping type and the second doping type are opposite types of doping. For example, if the first doping type is n-type, the second doping type is p-type.

[0041] In the present invention, the plane coordinate axis is taken as a reference, the vertical direction is the Y-axis direction, and the horizontal direction is the X-axis direction.

[0042] First embodiment

[0043] Figure 1 A cell structure of a wide bandgap semiconductor device provided by the first embodiment of the present invention is shown. In actual products, the number of cell structures may be one or more. The wide bandgap semiconductor device of this embodiment comprises a substrate 101 of a first doping type, a wide bandgap semiconductor layer 102 of a first doping type located on the substrate 101, a plurality of source trenches 103 and gate trenches 104 arranged in parallel and spaced apart in the wide bandgap semiconductor layer 102, and a source region 105 arranged between the source trenches 103 and the gate trenches 104. A first source electrode 106 arranged in the source trench 103 forms a Schottky contact with the wide bandgap semiconductor layer 102 on the sidewall of the source trench 103. A second source electrode 107 arranged on the first source electrode 106 forms an ohmic contact with the source region 105. A gate electrode 108 and a gate dielectric layer 109 are arranged in the gate trench 104 of the wide bandgap semiconductor device. The gate dielectric layer 109 physically separates the gate electrode 108 from the wide bandgap semiconductor layer 102, and the cover dielectric layer 113 physically separates the gate electrode 108 from the second source electrode 107. The drain electrode 110 of the wide bandgap semiconductor device is disposed on the lower surface of the substrate 101. The wide bandgap semiconductor device is further provided with a field electrode 111 and an isolation dielectric layer 112 in at least one source trench 103, and the isolation dielectric layer 112 physically separates the field electrode 111 from the wide bandgap semiconductor layer 102 to form an electric field adjustment region of the second doping type for adjusting the distribution of electric field lines between the source trenches.

[0044] Specifically, the wide bandgap semiconductor layer is one of SiC, GaN, AlN, Ga2O3, ZnO, SnO2, and diamond; the field electrode may be made of polycrystalline silicon, or may include at least one of Ti, Co, Ni, W, Mo, Au, Pt, Ru, Rh, and Ir, and may also be composed of materials with different work functions, which is not limited here.

[0045] In this embodiment, the wide bandgap semiconductor device is a SiC MOSFET, the first doping type is n-type, and the second doping type is p-type. The material of the field electrode 111 is p-type doped polysilicon, and the doping element can be B or Al, and the concentration of the doping element is >1×10 16 cm -3 The doping element distribution of the polysilicon field electrode can be equal concentration in each region, or gradually change concentration along a certain direction, or a combination of multiple doping concentrations. By modulating the doping concentration of different regions of the polysilicon field electrode, the distribution of electric field lines between adjacent source trenches can be further optimized.

[0046] In this embodiment, the depth of the source trench 103 is 0.5-20 μm, and the depth of the source trench is greater than 1.5 times the depth of the gate trench, and the extension length of the field electrode 111 in the vertical direction is 0.1-20 μm. The p-type doped polysilicon field electrode 111 located in the source trench 104 is located at a lower position than the gate electrode 108 in the vertical direction.

[0047] In this embodiment, the p-type doped polysilicon field electrode 111 can promote the charge depletion of the SiC semiconductor layer between adjacent source trenches, form a lateral electric field between adjacent source trenches 103, and thus change the electric field lines of the source-drain electric field between the source trenches 103. In this embodiment, since the source trench 103 is located at a lower position than the gate trench in the vertical direction, the lateral electric field introduced by the p-type doped polysilicon field electrode 111 can reduce the electric field line aggregation in the gate trench region, so the gate trench depth of the SiC MOSFET provided in this embodiment can be further reduced compared to the conventional solution without the device failure problem caused by the drain-induced barrier lowering effect. The channel resistance of the SiC MOSFET in this embodiment also decreases with the reduction of the gate trench depth, thereby effectively improving the high conduction loss and gate dielectric layer failure problems caused by excessive channel resistance of the wide bandgap semiconductor MOSFET device.

[0048] Second embodiment

[0049] Figure 2A cell structure of a wide bandgap semiconductor device provided by the second embodiment of the present invention is shown. The wide bandgap semiconductor device of this embodiment comprises a substrate 201 of a first doping type, a wide bandgap semiconductor layer 202 of a first doping type located on the substrate, a series of parallel source trenches 203 and gate trenches 204 arranged in the wide bandgap semiconductor layer 202, and a source region 205 arranged between the source trenches 203 and the gate trenches 204. The first source electrode 206 arranged in the source trench 203 forms a Schottky contact with the wide bandgap semiconductor layer 202 on the sidewall of the source trench 203. The second source electrode 207 arranged on the first source electrode 206 forms an ohmic contact with the source region 205. A gate electrode 208, a shielding electrode 209 and a dielectric layer 210 are arranged in the gate trench 204 of the wide bandgap semiconductor device. The dielectric layer 210 separates the gate electrode 208, the shielding electrode 209 and the semiconductor layer 202 from each other, and the covering dielectric layer 214 physically separates the gate electrode 208 from the second source electrode 207. The drain electrode 211 of the wide bandgap semiconductor device is arranged on the lower surface of the substrate 201. The wide bandgap semiconductor device is also provided with a field electrode 212 and an isolation dielectric layer 213 in the source trench 203. The isolation dielectric layer 213 physically separates the field electrode 212 from the wide bandgap semiconductor layer 202 to form an electric field adjustment region of the second doping type, which is used to adjust the distribution of electric field lines between the source trenches.

[0050] In this embodiment, the wide bandgap semiconductor device is a SiC MOSFET, the first doping type is n-type, and the second doping type is p-type; the constituent material of the field electrode 212 is at least one of metals such as Ti, Co, Ni, W, Mo, Au, Pt, Ru, Rh, and Ir; the work function difference between the field electrode and the first doping type wide bandgap semiconductor epitaxial layer is greater than 0.3 eV. The metal field electrode 212 affects the depletion effect of the SiC drift layer between adjacent source trenches through the work function difference with the wide bandgap semiconductor layer 202, thereby achieving the purpose of alleviating the electric field line aggregation at the bottom of the gate trench. Compared with the first embodiment, this embodiment further provides a shielding electrode 209 in the gate trench 204, and the shielding electrode 209 can cooperate with the field electrode 212 to enhance the depletion effect of the SiC drift layer between adjacent source trenches, optimize the distribution of electric field lines, and avoid the restriction of the source-drain electric field punch-through on shortening the channel length. At the same time, due to the synergistic depletion effect of the field electrode and the shielding electrode on the drift layer, the doping concentration of the drift layer can be further increased, thereby reducing the resistance of the drift layer, which is beneficial to further reduce the conduction loss of the bandgap semiconductor device.

[0051] The remaining aspects of this embodiment are the same as those of the first embodiment and will not be described in detail here.

[0052] Third embodiment

[0053] Figure 3The cell structure diagram of the wide bandgap semiconductor device provided by the third embodiment of the present invention is shown. The wide bandgap semiconductor device of this embodiment comprises a substrate 301 of a first doping type, a wide bandgap semiconductor layer 302 of a first doping type located on the substrate, a series of parallel source trenches 303 and gate trenches 304 arranged in the wide bandgap semiconductor layer 302, and a source region 305 arranged between the source trenches 303 and the gate trenches 304. The first source electrode 306 arranged in the source trench 303 forms a Schottky contact with the wide bandgap semiconductor layer 302 on the sidewall of the source trench 303. The second source electrode 307 arranged on the first source electrode 306 forms an ohmic contact with the source region 305. A gate electrode 308 and a gate dielectric layer 309 are arranged in the gate trench 304 of the wide bandgap semiconductor device. The gate dielectric layer 309 physically separates the gate electrode 308 from the wide bandgap semiconductor layer 302, and the covering dielectric layer 313 physically separates the gate electrode from the second source electrode 307. The drain electrode 310 of the wide bandgap semiconductor device is disposed on the lower surface of the substrate 301. The wide bandgap semiconductor device is further provided with a field electrode 311 and an isolation dielectric layer 315 in the source trench 303. The isolation dielectric layer 315 physically separates the field electrode 311 from the wide bandgap semiconductor layer 302 to form an electric field adjustment region of the second doping type for adjusting the distribution of electric field lines between the source trenches, wherein the field electrode 311 is composed of a first part 312, a second part 313 and a third part 314 having different work functions.

[0054] In this embodiment, the wide bandgap semiconductor device is a SiC MOSFET, the first doping type is n-type, and the second doping type is p-type. Compared with the first embodiment, the field electrode 311 of this embodiment is composed of three parts with different work functions. For example, the first part 311 is polysilicon, the second part 312 is metal Ti, and the third part 313 is metal W. Through the multi-segment field electrode structure of this embodiment, the work function difference between the field electrode and the drift region in different regions can be modulated, thereby optimizing the distribution of electric field lines near the gate trench to achieve a more ideal effect.

[0055] The remaining aspects of this embodiment are the same as those of the first embodiment and will not be described in detail here.

[0056] Fourth embodiment

[0057] Figure 4The cell structure diagram of the wide bandgap semiconductor device provided by the fourth embodiment of the present invention is shown. The wide bandgap semiconductor device of this embodiment comprises a substrate 401 of a first doping type, a wide bandgap semiconductor layer 402 of a first doping type located on the substrate, a series of parallel source trenches 403 and gate trenches 404 arranged in the wide bandgap semiconductor layer 402, and a source region 405 arranged between the source trenches 403 and the gate trenches 404. The first source electrode 406 arranged in the source trench 403 forms a Schottky contact with the wide bandgap semiconductor layer 402 on the sidewall of the source trench 403. The second source electrode 407 arranged on the first source electrode 406 forms an ohmic contact with the source region 405. A gate electrode 408 and a gate dielectric layer 409 are arranged in the gate trench 404 of the wide bandgap semiconductor device. The gate dielectric layer 409 physically separates the gate electrode 408 from the wide bandgap semiconductor layer 402, and the covering dielectric layer 412 physically separates the gate electrode from the second source electrode 407. The drain electrode 410 of the wide bandgap semiconductor device is disposed on the lower surface of the substrate 401. The wide bandgap semiconductor device is further provided with an electric field adjustment region 411 of a second doping type below the source trench 403 for adjusting the distribution of electric field lines between the source trenches.

[0058] In this embodiment, the wide bandgap semiconductor device is a Ga2O3 MOSFET, the first doping type is n-type, and the second doping type is p-type. The electric field adjustment region 411 located below the source trench 403 can be in direct contact with the source trench, or separated from the source trench by being embedded in the semiconductor layer 402. The doping element of the electric field adjustment region 411 can be Mg or Ir, and the distribution of the doping element in the electric field adjustment region 411 can be equal concentration in each region, or gradually changing concentration along a certain direction, or a combination of multiple doping concentrations. The electric field adjustment region 411 has a maximum width in the horizontal direction, and the width is greater than the width of the source trench.

[0059] In this embodiment, since the extension length of the source trench 403 in the wide bandgap semiconductor layer 402 is greater than that of the gate trench 404 in the vertical direction, the electric field lines are more concentrated at the bottom of the source trench than at the bottom of the gate trench, which places higher requirements on the reliability of the bottom of the source trench. In this embodiment, by providing a p-type doped electric field adjustment region 411 below the source trench, the problem of electric field line concentration at the bottom of the source trench can be effectively alleviated, thereby improving the reliability of the device.

Claims

1. A wide bandgap semiconductor device, comprising at least one cellular structure, characterized in that: The cellular structure comprises: substrate; A wide bandgap semiconductor layer, disposed on the substrate, is a wide bandgap semiconductor of a first doping type; A plurality of source trenches are parallelly distributed in the wide bandgap semiconductor layer; A plurality of gate trenches are parallelly distributed in the wide bandgap semiconductor layer and are spaced apart from the source trenches; A source region is provided in the wide bandgap semiconductor layer between the source trench and the gate trench; A first source electrode is disposed in the source trench, and the first source electrode forms a Schottky contact with the wide bandgap semiconductor layer on a sidewall of the source trench; A gate electrode is disposed in the gate trench; A gate dielectric layer is disposed in the gate trench and surrounds the gate electrode; A second source electrode is disposed on the first source electrode and forms an ohmic contact with the source region; An electric field adjustment region, disposed below at least one first source electrode, for adjusting the distribution of electric field lines between source trenches; A drain electrode is disposed on the lower surface of the substrate; The extension length of the source trench in the vertical direction exceeds that of the gate trench.

2. The wide bandgap semiconductor device according to claim 1, characterized in that: The electric field adjustment region is arranged in the source trench, and comprises a field electrode and an isolation dielectric layer, wherein the isolation dielectric layer physically isolates the field electrode from the wide bandgap semiconductor layer.

3. The wide bandgap semiconductor device according to claim 1, characterized in that: The electric field adjustment region is a wide bandgap semiconductor layer of the second doping type and is arranged below the source trench.

4. The wide bandgap semiconductor device according to claim 1, characterized in that: The wide bandgap semiconductor layer is one of SiC, GaN, AlN, Ga2O3, ZnO, SnO2 and diamond.

5. The semiconductor device according to claim 2, wherein: The work function difference between the field electrode and the wide bandgap semiconductor layer is greater than 0.3 eV.

6. The wide bandgap semiconductor device according to claim 2, characterized in that: The field electrode is made of polysilicon.

7. The wide bandgap semiconductor device according to claim 6, characterized in that: The polysilicon has a second doping type, and the doping concentration is greater than 1×10 16 cm -3 .

8. The wide bandgap semiconductor device according to claim 2, characterized in that: The field electrode is made of at least one material selected from the group consisting of Ti, Co, Ni, W, Mo, Au, Pt, Ru, Rh, and Ir.

9. The wide bandgap semiconductor device according to claim 2, characterized in that: The field electrode is composed of a plurality of parts having different work functions.

10. The wide bandgap semiconductor device according to claim 2, characterized in that: The length of the field electrode in the vertical direction is between 0.1 and 20 μm.

11. The wide bandgap semiconductor device according to claim 2, characterized in that: In the vertical direction, a lower surface of the field electrode is lower than a lower surface of the gate trench.

12. The wide bandgap semiconductor device according to claim 3, characterized in that: In the horizontal direction, the maximum width of the electric field adjustment region is greater than the width of the source trench.

13. The wide bandgap semiconductor device according to claim 3 or 12, characterized in that: In the vertical direction, the central axis of the electric field adjustment region coincides with the central axis of the source trench.