Ground reference generator for power converter

Abstract

The embodiment of the invention relates to a ground reference generator for a power converter. A ground reference circuit (208) to generate a ground reference for a voltage reference circuit (204) includes a resistor coupled in series with a transistor via a current mirror. The resistor is coupled between a ground reference terminal of the voltage reference circuit (204) and a ground terminal of a power converter (100). The transistor control terminal is configured to receive a pulse width modulation (PWM) control signal having a duty cycle similar to a switching element duty cycle of the power converter (100). A current mirror circuit is coupled between a current terminal of the transistor and the ground reference terminal. A controller (106) configured to control the switching element duty cycle may include the ground reference circuit (208) along with the voltage reference circuit (204), and a PWM circuit (202) configured to determine the switching element duty cycle based on a comparison between a reference voltage provided by the voltage reference circuit (204) and a converter output voltage.

Description

Technical Field

[0001] This description relates to power converters, and more particularly to providing a stable ground reference in a power converter. Background Art

[0002] Power converters (e.g., DC-DC converters) are widely used in electronic systems such as consumer electronics, automotive systems, industrial equipment, and lighting systems to convert an input voltage into an output voltage that is higher or lower than the input voltage. Such converters utilize metal oxide semiconductor field effect transistors (MOSFETs) as power switches, which are switched on and off to regulate the output voltage. A feedback loop is also used in conjunction with a controller to determine the on or off time of the transistor in each switching cycle based on a feedback voltage representing the output voltage of the power converter and a reference voltage, thereby regulating the output voltage of the power converter. A voltage reference circuit provides the reference voltage to the controller. Summary of the Invention

[0003] According to one embodiment, a ground reference circuit includes: a resistor having a first resistor terminal and a second resistor terminal; a first transistor having a first terminal, a second terminal, and a control terminal; a second transistor having a first terminal, a second terminal, and a control terminal; a third transistor having a first terminal, a second terminal, and a control terminal; and a fourth transistor having a first terminal, a second terminal, and a control terminal. The first resistor terminal is coupled to a reference terminal, and the second resistor terminal is coupled to a ground terminal. The second terminal of the first transistor is coupled to the ground terminal, and the control terminal of the first transistor is coupled to a first control signal terminal. The first terminal of the second transistor is coupled to the first terminal of the first transistor, and the control terminal of the second transistor is coupled to a second control signal terminal. The first terminal of the third transistor is coupled to both the control terminal of the third transistor and the second terminal of the second transistor, and the second terminal of the third transistor is coupled to the reference terminal. The first terminal of the fourth transistor is coupled to a power supply terminal, the second terminal of the fourth transistor is coupled to the reference terminal, and the control terminal of the fourth transistor is coupled to the control terminal of the third transistor.

[0004] According to another embodiment, a controller is described that is configured to control a switching element duty cycle for a power converter circuit. The controller includes a voltage reference circuit configured to generate a reference voltage and having a ground reference terminal and an output terminal; a pulse width modulation circuit configured to determine the switching element duty cycle based on a comparison between the reference voltage and a feedback voltage representing the output voltage of the power converter circuit; and a ground reference circuit configured to generate a ground reference for the voltage reference circuit. The ground reference circuit includes a resistor coupled between the ground reference terminal of the voltage reference circuit and a ground terminal of the power converter circuit; a transistor having a first terminal, a second terminal, and a control terminal, wherein the control terminal is configured to receive a pulse width modulation (PWM) control signal having the switching element duty cycle; and a current mirror circuit coupled between the second terminal of the transistor and the ground reference terminal of the voltage reference circuit.

[0005] According to another embodiment, a voltage regulator includes: a first rail terminal; a second rail terminal; a ground rail terminal; a feedback circuit configured to provide a feedback voltage representative of an output voltage of the voltage regulator; a first transistor coupled between the first rail terminal and the ground rail terminal; a first driver coupled to a control terminal of the first transistor and configured to receive a voltage on the second voltage rail terminal; a second transistor coupled between the first transistor and the ground rail terminal such that the first transistor and the second transistor are connected in series between the first rail terminal and the ground rail terminal; a second driver coupled to the control terminal of the second transistor; a reference generator circuit having a ground terminal and configured to generate a reference voltage; a pulse width modulation circuit configured to determine a duty cycle of the second transistor based on a comparison between the feedback signal and the reference voltage; and a ground reference circuit configured to provide a ground reference to the ground terminal of the reference generator circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a block diagram of a voltage regulator in one example.

[0007] Figure 2A In one example, Figure 1 The block diagram of the voltage regulator controller is shown in FIG.

[0008] Figure 2B In one instance, Figure 2A The timing diagram of various signals associated with the pulse control block of the controller is shown in FIG.

[0009] Figure 3 is a schematic diagram of a ground reference circuit in one example. DETAILED DESCRIPTION

[0010] A ground reference system is described. In one example, the system is configured to provide a ground reference for a voltage reference circuit in a power converter (e.g., a DC-DC buck converter). The ground reference system may include a ground reference circuit within a controller that generates a pulse width modulation (PWM) signal to turn one or more switching elements of the power converter on and off, such as the high-side and low-side switching elements of a buck converter. In such an example, the high-side and low-side switching elements regulate whether the output switching terminal is coupled to an input power rail or a ground rail, and their respective on-times determine the output voltage level of the power converter. The high-side and low-side switching elements are alternately activated so that the high-side switching element is on while the low-side switching element is off, and vice versa. A feedback loop is provided to sample the power converter output voltage and provide it back to the controller for comparison with a reference voltage. Based on the comparison, the controller sets the appropriate on-time of the high-side switching element to bring the output voltage to a desired voltage level. The ground reference circuit can use one or more control signals from within the controller to provide a ground reference (e.g., a bandgap voltage reference) for the voltage reference circuit, which generates the aforementioned reference voltage. For example, a sample current proportional to the output current of the power converter passes through a current mirror and filter arrangement in phase with the PWM control signal that activates the low-side switching element. The current mirror amplifies the sample current to provide an amplified current across a resistor to provide a dedicated ground reference to the voltage reference circuit. This dedicated ground reference is less affected by parasitic currents relative to the global system ground. When providing a reference voltage, the voltage reference circuit uses a more stable dedicated ground reference instead of the global system ground. According to some embodiments, the potential at the dedicated ground reference terminal changes depending on the current output of the power converter and the duty cycle of the switching element of the power converter.

[0011] General Overview

[0012] As described above, a voltage reference circuit can be used to provide a reference voltage to a controller, which in turn controls one or more switching elements of a given power converter to provide a regulated output voltage. For example, the controller of a power converter can use a bandgap voltage reference circuit to provide a reference voltage for comparison with a feedback voltage collected from the output of the power converter. However, when current flows through the low-side switch and the output voltage begins to decrease, a parasitic IR drop can form between the internal ground reference used by the bandgap voltage reference circuit and the global chip ground terminal. This causes an undesirable shift in potential on the internal ground reference, which in turn causes load regulation, where the output voltage becomes affected by the size of the load attached to the power converter. This problem is also more significant during lower duty cycle operation because the DC portion of the parasitic IR drop is higher at lower duty cycles. The magnitude of the parasitic IR drop can also be affected by the type of package used for the power converter, as some leadframe packages with high resistance can cause worse load regulation at the output.

[0013] Therefore, according to some embodiments of the present disclosure, a ground reference system is provided that can be integrated with a controller of a power converter to dynamically shift the ground reference used by a bandgap voltage reference circuit to compensate for parasitic currents present on an internal ground reference terminal. The shift of the ground reference can be affected by the level of the output current and the duty cycle of the power converter. According to some embodiments, the ground reference system includes a ground reference circuit that is integrated with, or at least coupled to, the controller of the power converter. The ground reference circuit is designed to receive a sample current proportional to the output current and amplify the sample current (e.g., using a current mirror) to provide the amplified current at a ground reference terminal. A resistor can be coupled between a ground reference terminal of the ground reference system and an internal ground terminal of the power converter to provide a dedicated ground reference terminal for the bandgap voltage reference circuit. According to some embodiments, a transistor is used to control when the sample current is applied to the current mirror, wherein the control gate of the transistor is coupled to a PWM control signal for a low-side switching element. Because the transistor will switch current on and off in phase with the low-side PWM control signal, one or more filters such as a resistor-capacitor (RC) low-pass filter may be provided with a current mirror to remove the AC component of the current, or otherwise extract the DC component of the current.

[0014] Numerous other variations will be apparent based on the embodiments described herein.

[0015] Electronic systems

[0016] Figure 1At least a portion of an example electronic system 100 is shown. In some cases, the electronic system 100 is implemented as a system on a chip, or as a chipset populated on a printed circuit board (PCB), or as a set of discrete components populated on a PCB that can in turn be populated into a chassis of a multi-chassis system or other higher-level system, but any number of implementations can be used. The electronic system 100 can be part of a switching regulator or power converter, such as a DC-DC step-down switching converter.

[0017] According to some embodiments, electronic system 100 includes a power converter circuit 102, which may be implemented as a chip within a chip package and may have various input / output (I / O) terminals, such as an enable terminal (EN), a power input terminal (PVIN), a bootstrap terminal (BST), a switching node terminal (SW), a ground terminal (GND), and a feedback terminal (FB). Any number of other I / O terminals may be provided.

[0018] According to some embodiments, the power converter circuit 102 includes a high-side switching device (HSD) along with an associated high-side driver (HS), and a low-side switching device (LSD) along with an associated low-side driver (LS). Figure 1 As shown in FIG, both the high-side switching element HSD and the low-side switching element LSD can be n-channel MOSFETs, but other suitable switching elements can be used. The high-side switching element HSD has a first terminal coupled to the input power rail (e.g., the PVIN terminal) and a second terminal coupled to the switching node SW of the power converter. Thus, the state of the high-side driver HS controls the gate terminal of the high-side switching element HSD, and the high-side switching element HSD provides the input voltage on PVIN to the switching node SW when the high-side switching element HSD is turned on. The low-side switching element LSD has a first terminal coupled to the switching node SW and a second terminal coupled to the ground rail (e.g., at the ground terminal GND). The ground terminal GND can be a global ground associated with the chip including the power converter circuit 102. The state of the low-side driver LS controls the gate terminal of the low-side switching element LSD, and the low-side switching element LSD provides the ground voltage to the switching node SW when the low-side switching element LSD is turned on. At any given time, only one of the HSD and LSD can be turned on, and whenever the HSD is turned on, the LSD is turned off, and vice versa.

[0019] A boost capacitor Cb may be coupled between the switching node SW and the bootstrap terminal BST (or bootstrap voltage rail) and may be used in conjunction with a bootstrap charging circuit 104 (e.g., for charging Cb) to provide a boosted voltage between the bootstrap terminal BST and the input voltage terminal PVIN that is higher than the output switching voltage at SW. This boosted voltage may then be provided to the positive supply rail of the high-side driver HS.

[0020] An inductor LOUT can be provided at the switching node SW to smooth the varying voltage and provide a more stable output voltage as VOUT. In some cases, the inductor LOUT can be, for example, part of a transformer, or any other suitable energy storage element. A voltage divider including resistors R1 and R2 can be provided at the output to generate a feedback voltage that is fed to the feedback terminal FB of the power converter circuit 102.

[0021] The controller 106 sends the control signal (eg, HS PWM and LS PWM ) are provided as inputs to the high-side driver HS and the low-side driver LS, respectively. These control signals may be pulse-width modulated signals that drive the corresponding high-side switching elements and low-side switching elements. The controller 106 may also receive various inputs (e.g., a feedback voltage FB) to facilitate the generation of the control signals.

[0022] Figure 2A 1 shows a diagram of the controller 106 according to some embodiments. The controller 106 includes a pulse control block 202 that generates PWM control signals for both the high-side driver and the low-side driver. The controller 106 also includes a reference generator circuit 204 that generates a voltage reference V REF to be compared with the feedback voltage on the feedback terminal FB. In some embodiments, the reference generator circuit 204 includes a bandgap voltage reference circuit. A bandgap voltage reference circuit may refer to any circuit that attempts to generate a stable voltage reference independent of temperature and supply voltage variations. In simple terms, a bandgap voltage reference circuit typically includes a voltage reference generator, a temperature sensor, and a current source. The voltage reference generator generates a stable reference voltage, which may be based on a combination of a bipolar junction transistor (BJT) and a diode. The temperature sensor measures the temperature of the circuit and generates a compensation voltage that is added to the reference voltage to offset the circuit's temperature dependence. The current source may be used to bias the BJT and diode in the voltage reference generator. Like most circuits, the bandgap voltage reference circuit relies on a stable ground potential to function correctly because the output voltage reference from the bandgap voltage reference circuit is based on the potential difference between the output voltage reference terminal and the ground terminal of the bandgap voltage reference circuit.

[0023] The pulse control block 202 determines the on-time and duty cycle of the PWM control signal based at least in part on the state of the ONESHOT signal and the drive signal. Figure 2B An example timing diagram is shown that illustrates how these signals are used to generate a PWM control signal. According to some embodiments, when the drive signal pulse is high, HS PWM The signal is asserted high to turn on the high-side switching element HSD. PWMThe signal will remain high until the single pulse is low, at which time HS PWM The signal is asserted low to turn off the high-side switching element HSD. PWM The signal will remain low until the drive signal is pulsed high again, thus repeating the cycle. Thus, the drive signal controls when the high-side switching element turns on, and the single shot controls the HS PWM How long the voltage remains high determines the duty cycle. PWM The signal is HS PWM The inversion of the signal ensures the correct switching operation of the high-side switching element and the low-side switching element.

[0024] Return to Figure 2A By comparing the feedback voltage at FB with the reference voltage (V REF ) to determine the state of the drive signal. Therefore, when the feedback voltage is lower than V REF When the drive signal pulses high, the high-side switching element HSD is turned on again. REF is a stable potential value provided by the reference generator circuit 204.

[0025] According to some embodiments, the controller 106 further includes a ground reference circuit 208 that provides a ground reference AVSS_Shift to the reference generator circuit 204. According to some embodiments, the potential on AVSS_Shift can be used by the reference generator circuit 204 as a dedicated ground potential in place of the internal ground reference AVSS. Thus, the ground reference circuit 208 provides a dedicated ground reference AVSS_Shift that is not affected or substantially not affected by parasitic currents present on the internal ground reference AVSS. According to some embodiments, the ground reference circuit 208 uses the sample current I from the pulse control block 202 to generate a reference current. IR-comp And PWM control signal HS PWM and LS PWM To generate AVSS_Shift. Sample current I IR-comp The current output may be proportional to (or substantially equal to) the current output at the switching node terminal SW of the power converter. According to some embodiments, the controller 106 compares the current output to a reference current to determine the timing of the single-shot signal, which affects the duty cycle of the PWM control signal.

[0026] Ground reference circuit

[0027] Figure 31 shows an example of a ground reference circuit 208. As mentioned above, the ground reference circuit 208 can be integrated within the controller 106. In some examples, the ground reference circuit 208 can be part of a separate chip or module coupled to the controller 106. In any case, the ground reference circuit provides a dedicated ground reference terminal AVSS_Shift, which in this example case is based at least in part on the low-side PWM control signal LS PWM And the sample current I IR-comp .

[0028] According to some embodiments, the sample current I IR-comp According to some embodiments, MP_0 and MP_1 are connected to PWM control HS PWM and LS PWM In some examples, MP_0 and MP_1 are both p-channel devices, so that they are each switched on and off by HS PWM and LS PWM In other examples, either or both of MP_0 and MP_1 are turned on by HS PWM and LS PWM An n-channel device that is turned on by asserting high. In any case, MP_1 can be configured to turn on whenever the low-side switching element HSD is turned on. Other examples can be configured differently, such as a power converter with only one switching element. In such an example case, a similar ground reference circuit 208 can be used, but there will be no second switching element and therefore no MP_0.

[0029] When HS PWM During the period when MP_1 is high, MP_1 is off and the sample current I IR-comp Flows through MP_0 to ground AVSS. However, according to some embodiments, when LS PWM During the period when MP_0 is high, MP_0 is off and the sample current I IR-comp Flows through MP_1 and is received by a current mirror arrangement consisting of transistors MN_MIR_0 and MN_MIR_1. Transistors MN_MIR_0 and MN_MIR_1 can each be an n-channel device. The current mirror arrangement can include a filter network 302 that can have any number of RC filter elements designed to filter out the AC component in order to isolate the sample current I IR-compThe DC component of MN_MIR_0 is removed. In one example, the filter network 302 includes any number of capacitors coupled to ground AVSS (e.g., capacitors C_filt_0 and C_filt_1) and any number of resistors coupled between the capacitors (e.g., resistor R_filt). According to some embodiments, due to the inclusion of the filter network 302, the current mirror can remain active to provide current to the AVSS_Shift terminal even during the switching of MP_1. The current flowing through MN_MIR_0 can be approximately equal to I IR-comp *(1-D), where D is the duty cycle of the high-side switching device (HSD).

[0030] According to some embodiments, MN_MIR_1 is larger than MN_MIR_0 to give a magnification factor to the current flowing through MN_MIR_1. For example, MN_MIR_1 may have a width-to-length ratio (W / L) that is at least 2 times, at least 4 times, at least 5 times, or at least 10 times that of MN_MIR_0. Thus, the current flowing through MN_MIR_1 may be substantially equal to I IR-comp *(1-D)*M, where M is a magnification factor based on the size difference between MN_MIR_0 and MN_MIR_1.

[0031] According to some embodiments, the currents through MN_MIR_0 and MN_MIR_1 combine to form I 移位 , which flows through resistor R_I2V to produce a DC voltage shift from the internal ground reference AVSS. 移位 So it is roughly equal to I IR-comp *(1-D)*(M+1). Any parasitic (e.g., static) current that exists is offset by the much larger I 移位 The reference voltage terminal AVSS_SHIFT can then be used by the reference generator circuit 204 to generate the reference voltage V REF .

[0032] Other examples

[0033] Example 1 is a ground reference circuit comprising: a resistor having a first resistor terminal and a second resistor terminal; a first transistor having a first terminal, a second terminal, and a control terminal; a second transistor having a first terminal, a second terminal, and a control terminal; a third transistor having a first terminal, a second terminal, and a control terminal; and a fourth transistor having a first terminal, a second terminal, and a control terminal. The first resistor terminal is coupled to a reference terminal, and the second resistor terminal is coupled to a ground terminal. The second terminal of the first transistor is coupled to a ground terminal, and the control terminal of the first transistor is coupled to a first control signal terminal. The first terminal of the second transistor is coupled to the first terminal of the first transistor, and the control terminal of the second transistor is coupled to a second control signal terminal. The first terminal of the third transistor is coupled to both the control terminal of the third transistor and the second terminal of the second transistor, and the second terminal of the third transistor is coupled to the reference terminal. The first terminal of the fourth transistor is coupled to a power supply terminal, the second terminal of the fourth transistor is coupled to the reference terminal, and the control terminal of the fourth transistor is coupled to the control terminal of the third transistor.

[0034] Example 2 includes the ground reference circuit of Example 1, wherein the first control signal terminal is configured to receive a first pulse width modulation (PWM) control signal, and the second control signal terminal is configured to receive a second PWM control signal, wherein the first PWM control signal is the inverse of the second PWM control signal.

[0035] Example 3 includes the ground reference circuit of Example 1 or 2, wherein: the power terminal is a power converter circuit power terminal; the reference terminal is a voltage reference circuit ground terminal; and the ground terminal is a power converter circuit ground terminal.

[0036] Example 4 includes the ground reference circuit of any of Examples 1-3, wherein both the first terminal of the first transistor and the first terminal of the second transistor are coupled to the sample current terminal.

[0037] Example 5 includes the ground reference circuit of any of Examples 1-4, wherein a control terminal of the fourth transistor is coupled to a control terminal of the third transistor via one or more filters.

[0038] Example 6 includes the ground reference circuit of Example 5, wherein the resistor is a first resistor, and the one or more filters include a first capacitor and a second capacitor and a second resistor, the first capacitor having a first terminal coupled to the control terminal of the third transistor and a second terminal coupled to the ground terminal, the second capacitor having a first terminal coupled to the control terminal of the fourth transistor and a second terminal coupled to the ground terminal, and the second resistor is coupled between the first terminals of the first capacitor and the second capacitor.

[0039] Example 7 includes the ground reference circuit of any of Examples 1-6, wherein the first transistor and the second transistor are p-channel field effect transistors (FETs), and the third transistor and the fourth transistor are n-channel FETs.

[0040] Example 8 includes the ground reference circuit of any of Examples 1-7, wherein the third transistor has a first width-to-length (W / L) ratio and the fourth transistor has a second W / L ratio that is at least twice the first W / L ratio.

[0041] Example 9 is an integrated circuit comprising the ground reference circuit of any one of Examples 1 to 8.

[0042] Example 10 includes the integrated circuit of Example 9, further comprising a voltage reference circuit having an output voltage terminal and configured to generate a voltage reference across the output voltage terminal and the reference terminal.

[0043] Example 11 is a power converter controller comprising: a ground reference circuit according to any one of Examples 1 to 8; a voltage reference circuit having an output voltage terminal and a ground terminal directly coupled to the reference terminal; a pulse width modulation (PWM) circuit having a control input, a first PWM output, a second PWM output, and a sample current output. The first PWM output is coupled to a first control signal terminal, the second PWM output is coupled to a second control signal terminal, and the sample current output is coupled to first terminals of a first transistor and a second transistor. The power converter controller further comprises a comparator having first and second comparator inputs and a comparator output. The first comparator input is coupled to a feedback voltage terminal, the second comparator input is coupled to an output voltage terminal of the voltage reference circuit, and the comparator output is coupled to a control input of the PWM circuit. The feedback voltage terminal is configured to receive a feedback voltage representing the output voltage of the power converter.

[0044] Example 12 is an integrated circuit comprising the power converter controller of example 11.

[0045] Example 13 is a controller configured to control a switching element duty cycle for a power converter circuit. The controller includes: a voltage reference circuit configured to generate a reference voltage and having a ground reference terminal and an output terminal; a pulse width modulation circuit configured to determine the switching element duty cycle based on a comparison between the reference voltage and a feedback voltage representing the output voltage of the power converter circuit; and a ground reference circuit configured to generate a ground reference for the voltage reference circuit. The ground reference circuit includes: a resistor coupled between the ground reference terminal of the voltage reference circuit and a ground terminal of the power converter circuit; a transistor having a first terminal, a second terminal, and a control terminal, wherein the control terminal is configured to receive a pulse width modulation (PWM) control signal having the switching element duty cycle; and a current mirror circuit coupled between the second terminal of the transistor and the ground reference terminal of the voltage reference circuit.

[0046] Example 14 includes the controller of example 13, wherein the controller is further configured to generate a sample current associated with an output current of the power converter circuit at a current terminal, and the first terminal of the transistor is coupled to the current terminal.

[0047] Example 15 includes the controller of Example 13 or 14, wherein the transistor is a first transistor, and the current mirror circuit includes a second transistor and a third transistor, the second transistor being coupled to the second terminal of the first transistor, and the third transistor having a control terminal coupled to the control terminal of the second transistor.

[0048] Example 16 includes the controller of Example 15, wherein the first terminal of the second transistor is coupled to both the second terminal of the first transistor and the control terminal of the second transistor, the second terminal of the second transistor is coupled to a ground reference terminal of a voltage reference circuit such that the resistor is between the second terminal of the second transistor and the ground terminal of the power converter circuit, and the first terminal of the third transistor is coupled to the power rail terminal, and the second terminal of the third transistor is coupled to the ground reference terminal of the voltage reference circuit such that the resistor is between the second terminal of the third transistor and the ground terminal of the power converter circuit.

[0049] Example 17 includes the controller of Example 15 or 16, further comprising one or more resistor-capacitor (RC) filters coupled between the control terminal of the second transistor and the control terminal of the third transistor.

[0050] Example 18 includes the controller of any of Examples 15-17, wherein the second transistor has a first width-to-length (W / L) ratio, and the third transistor has a second W / L ratio that is at least twice the first W / L ratio.

[0051] Example 19 is a power converter circuit comprising: a controller of any one of Examples 13 to 18; a high-side switching element coupled between an input voltage terminal and a switching voltage terminal; a first driver having an output coupled to a control terminal of the high-side switching element; a low-side switching element coupled between the switching voltage terminal and a ground terminal of the power converter circuit; and a second driver having an output coupled to the control terminal of the low-side switching element.

[0052] Example 20 includes the power converter circuit of Example 19, wherein the PWM control signal is a first PWM control signal for setting a duty cycle of the low-side switching element, and the controller is further configured to generate a second PWM control signal for setting a duty cycle of the high-side switching element.

[0053] Example 21 includes the power converter circuit of Example 20, wherein the second PWM control signal is an inverse of the first PWM control signal.

[0054] Example 22 includes the power converter circuit of Example 20 or 21, wherein the transistor is a first transistor, and the ground reference circuit further includes a second transistor having first and second terminals and a control terminal, the control terminal of the second transistor being configured to receive the second PWM control signal.

[0055] Example 23 includes the power converter circuit of Example 22, wherein the first terminal of the first transistor is coupled to the first terminal of the second transistor.

[0056] Example 24 is an integrated circuit comprising the controller of any of Examples 13-18 or the power converter circuit of any of Examples 19-23.

[0057] Example 25 is a voltage regulator comprising: a first rail terminal; a second rail terminal; a ground rail terminal; a feedback circuit configured to provide a feedback voltage representative of an output voltage of the voltage regulator; a first transistor coupled between the first rail terminal and the ground rail terminal; a first driver coupled to a control terminal of the first transistor and configured to receive a voltage on the second voltage rail terminal; a second transistor coupled between the first transistor and the ground rail terminal such that the first transistor and the second transistor are connected in series between the first rail terminal and the ground rail terminal; a second driver coupled to the control terminal of the second transistor; a reference generator circuit having a ground terminal and configured to generate a reference voltage; a pulse width modulation circuit configured to determine a duty cycle of the second transistor based on a comparison between a feedback signal and the reference voltage; and a ground reference circuit configured to provide a ground reference to the ground terminal of the reference generator circuit.

[0058] Example 26 includes the voltage regulator of Example 25, wherein the ground reference circuit comprises: a third transistor having a first terminal, a second terminal, and a control terminal, wherein the control terminal of the third transistor is configured to receive a control signal associated with a duty cycle of the second transistor; a current mirror circuit coupled between the second terminal of the third transistor and a ground terminal of the reference generator circuit; and a resistor coupled between the ground terminal of the reference generator circuit and a ground rail terminal.

[0059] Example 27 includes the voltage regulator of Example 26, wherein the control signal is a first control signal, and the ground reference circuit further includes a fourth transistor having a first terminal, a second terminal, and a control terminal, wherein the second terminal of the fourth transistor is coupled to the ground rail terminal, and the control terminal of the fourth transistor is configured to receive a second control signal associated with a duty cycle of the first transistor.

[0060] Example 28 includes the voltage regulator of Example 27, wherein the first terminal of the third transistor is coupled to the first terminal of the fourth transistor.

[0061] Example 29 includes the voltage regulator of Example 27 or 28, wherein the pulse width modulation circuit is further configured to generate a sample current at a current terminal, the sample current associated with an output current of the voltage regulator, and wherein both the first terminal of the third transistor and the first terminal of the fourth transistor are coupled to the current terminal.

[0062] Example 30 includes the voltage regulator of Examples 27-29, wherein the current mirror circuit comprises: a fifth transistor coupled to the second terminal of the third transistor; and a sixth transistor having a control terminal coupled to the control terminal of the fifth transistor via a filter network.

[0063] Example 31 includes the voltage regulator of Example 30, wherein a first terminal of the fifth transistor is coupled to the second terminal of the third transistor, a second terminal of the fifth transistor is coupled to a ground terminal of the reference generator circuit, a first terminal of the sixth transistor is coupled to the power voltage rail terminal, and a second terminal of the sixth transistor is coupled to the ground terminal of the reference generator circuit.

[0064] Example 32 includes the voltage regulator of example 30 or 31, wherein the filter network includes one or more resistor-capacitor (RC) filters coupled between a control terminal of the fifth transistor and a control terminal of the sixth transistor.

[0065] Example 33 includes the voltage regulator of any of Examples 30-32, wherein the fifth transistor has a first width-to-length (W / L) ratio and the sixth transistor has a second W / L ratio that is greater than the first W / L ratio.

[0066] Example 34 includes the voltage regulator of any of Examples 25-33, wherein the first rail terminal is an input rail terminal, the second rail terminal is a bootstrap rail terminal, the first transistor is a high-side transistor, and the second transistor is a low-side transistor.

[0067] In this description, the term "coupled" may encompass any connection, communication, or signal path that enables a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first example, device A is coupled to device B via a direct connection; or (b) in a second example, if the intermediate component C does not change the functional relationship between device A and device B, device A is coupled to device B via an intermediate component C, such that device B is controlled by device A via the control signal generated by device A.

[0068] A device that is "configured to" perform a task or function may be configured (e.g., programmed and / or hardwired) to perform the function when manufactured by the manufacturer, and / or may be configurable (or reconfigurable) by a user after manufacture to perform the function and / or other additional or alternative functions. Configuration may be through firmware and / or software programming of the device, through the construction and / or layout of the device's hardware components and interconnections, or a combination thereof.

[0069] As used herein, the terms "terminal," "node," "interconnect," "pin," and "lead" are used interchangeably. Unless specifically stated otherwise, these terms are generally used to refer to an interconnect between, or termination of, a device element, circuit element, integrated circuit, device, or semiconductor component. Furthermore, a voltage rail, or simply a "rail," may also be referred to as a voltage terminal and may generally refer to a common node or set of coupled nodes in a circuit that are at the same electrical potential.

[0070] A circuit or device described herein as including certain components may actually be adapted to be coupled to those components to form the described circuit system or device. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage sources and / or current sources) may actually include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or an integrated circuit (IC) package) and may be adapted to be coupled to at least some of the passive elements and / or sources to form the structure during or after manufacture, for example, by an end user and / or a third party.

[0071] Although the use of specific transistors is described herein, other transistors (or equivalent devices) may be used instead. For example, a p-channel field-effect transistor (PFET) may be used instead of an n-channel field-effect transistor (NFET) with little or no change to the circuit. Furthermore, other types of transistors (e.g., bipolar junction transistors (BJTs)) may be used. Furthermore, the device may be implemented in / on a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs). Furthermore, references to transistor features such as a gate, source, or drain are not intended to exclude any suitable transistor technology. For example, features such as source, drain, and gate are commonly used to refer to a FET, while emitter, collector, and base are commonly used to refer to a BJT. Such features may be used interchangeably herein. For example, a reference to the gate of a transistor may refer to the gate of a FET or the base of a BJT, and vice versa. In some instances, a control terminal may refer to the gate of a FET or the base of a BJT. Any other suitable transistor technology may be used. Any such transistor can be used as a switch, with the gate or base or other comparable feature acting as a switch select input that can be driven to connect the source and drain (or emitter and collector as the case may be).

[0072] Reference herein to a field effect transistor (FET) being "on" (or the switch being closed) means that the FET's conductive channel exists and drain current can flow through the FET. Reference herein to a FET being "off" (or the switch being open) means that the conductive channel does not exist and drain current does not flow through the FET. However, an off FET can have current flowing through the transistor's body diode.

[0073] The circuits described herein can be reconfigured to include additional or different components to provide functionality that is at least partially similar to the functionality available before the components were replaced. Unless otherwise specified, components shown as resistors generally represent any one or more elements coupled in series and / or in parallel to provide the amount of impedance represented by the resistor shown. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may actually be multiple resistors or capacitors, respectively, coupled in series between the same two nodes as a single resistor or capacitor.

[0074] The use of the phrase "ground" in the foregoing description includes chassis ground, ground line ground, floating ground, virtual ground, digital ground, universal ground, and / or any other form of ground connection that is applicable or suitable for the teachings of this specification. In this specification, unless otherwise specified, the word "about," "substantially," or "substantially" preceding a parameter means within a range of + / - 10% of the parameter.

[0075] Modifications may be made in the described examples and other examples may be devised within the scope of the claims.

Claims

1. A ground reference circuit, comprising: a resistor having a first resistor terminal and a second resistor terminal, the first resistor terminal being coupled to a reference terminal and the second resistor terminal being coupled to a ground terminal; a first transistor having a first terminal and a second terminal and a control terminal, the second terminal of the first transistor being coupled to the ground terminal and the control terminal of the first transistor being coupled to a first control signal terminal; a second transistor having a first terminal and a second terminal and a control terminal, the first terminal of the second transistor being coupled to the first terminal of the first transistor and the control terminal of the second transistor being coupled to a second control signal terminal; a third transistor having a first terminal and a second terminal and a control terminal, the first terminal of the third transistor being coupled to both the control terminal of the third transistor and the second terminal of the second transistor, and the second terminal of the third transistor being coupled to the reference terminal; as well as A fourth transistor has a first terminal, a second terminal and a control terminal, the first terminal of the fourth transistor being coupled to the power supply terminal, the second terminal of the fourth transistor being coupled to the reference terminal, and the control terminal of the fourth transistor being coupled to the control terminal of the third transistor.

2. The ground reference circuit of claim 1 , wherein the first control signal terminal is configured to receive a first pulse width modulation (PWM) control signal, and the second control signal terminal is configured to receive a second PWM control signal, wherein the first PWM control signal is an inversion of the second PWM control signal. 3 . The ground reference circuit of claim 1 , wherein the first terminal of the first transistor and the first terminal of the second transistor are both coupled to a sample current terminal. 4 . The ground reference circuit of claim 1 , wherein the control terminal of the fourth transistor is coupled to the control terminal of the third transistor via one or more filters. 5 . The ground reference circuit of claim 1 , wherein the third transistor has a first width-to-length (W / L) ratio, and the fourth transistor has a second W / L ratio, the second W / L ratio being at least twice the first W / L ratio.

6. An integrated circuit comprising the ground reference circuit according to claim 1.

7. The integrated circuit of claim 6, further comprising a voltage reference circuit having an output voltage terminal and configured to generate a voltage reference across the output voltage terminal and the reference terminal.

8. A power converter controller, comprising: The ground reference circuit according to claim 1; a voltage reference circuit having a ground terminal directly coupled to the reference terminal, and an output voltage terminal; a pulse width modulation (PWM) circuit having a control input, a first PWM output coupled to the first control signal terminal, a second PWM output coupled to the second control signal terminal, and a sample current output coupled to the first terminals of the first transistor and the second transistor; as well as a comparator having a first comparator input coupled to a feedback voltage terminal, a second comparator input coupled to the output voltage terminal of the voltage reference circuit, and a comparator output coupled to the control input of the PWM circuit, wherein the feedback voltage terminal is configured to receive a feedback voltage representative of the output voltage of the power converter.

9. A controller configured to control a duty cycle of a switching element for a power converter circuit, the controller comprising: a voltage reference circuit configured to generate a reference voltage and having a ground reference terminal and an output terminal; a pulse width modulation circuit configured to determine the switching element duty cycle based on a comparison between the reference voltage and a feedback voltage representative of an output voltage of the power converter circuit; as well as a ground reference circuit configured to generate a ground reference for the voltage reference circuit, the ground reference circuit comprising a resistor coupled between the ground reference terminal of the voltage reference circuit and a ground terminal of the power converter circuit, a transistor having a first terminal, a second terminal and a control terminal, the control terminal being configured to receive a pulse width modulated (PWM) control signal having a duty cycle of the switching element, and A current mirror circuit is coupled between the second terminal of the transistor and the ground reference terminal of the voltage reference circuit. 10 . The controller of claim 9 , wherein the controller is further configured to generate a sample current associated with an output current of the power converter circuit at a current terminal, and the first terminal of the transistor is coupled to the current terminal.

11. The controller of claim 9, wherein the transistor is a first transistor, and the current mirror circuit comprises a second transistor and a third transistor, the second transistor being coupled to the second terminal of the first transistor, and the third transistor having a control terminal coupled to a control terminal of the second transistor.

12. The controller according to claim 11, wherein: a first terminal of the second transistor coupled to both the second terminal of the first transistor and the control terminal of the second transistor; a second terminal of the second transistor coupled to the ground reference terminal of the voltage reference circuit such that the resistor is between the second terminal of the second transistor and the ground terminal of the power converter circuit; and A first terminal of the third transistor is coupled to a power rail terminal and a second terminal of the third transistor is coupled to the ground reference terminal of the voltage reference circuit such that the resistor is between the second terminal of the third transistor and the ground terminal of the power converter circuit.

13. A power converter circuit comprising: The controller according to claim 9; a high-side switching element coupled between the input voltage terminal and the switching voltage terminal; a first driver having an output coupled to a control terminal of the high-side switching element; a low-side switching element coupled between the switching voltage terminal and a ground terminal of the power converter circuit; as well as A second driver has an output coupled to a control terminal of the low-side switching element.

14. The power converter circuit of claim 13, wherein the PWM control signal is a first PWM control signal for setting a duty cycle of the low-side switching element, and the controller is further configured to generate a second PWM control signal for setting a duty cycle of the high-side switching element.

15. The power converter circuit of claim 14, wherein the transistor is a first transistor and the ground reference circuit further comprises a second transistor having first and second terminals and a control terminal, the control terminal of the second transistor being configured to receive the second PWM control signal.

16. A voltage regulator comprising: First rail terminal; Second rail terminal; Ground rail terminal; a feedback circuit configured to provide a feedback voltage representative of an output voltage of the voltage regulator; a first transistor coupled between the first rail terminal and the ground rail terminal; a first driver coupled to a control terminal of the first transistor and to the second rail terminal; a second transistor coupled between the first transistor and the ground rail terminal such that the first transistor and the second transistor are connected in series between the first rail terminal and the ground rail terminal; a second driver coupled to a control terminal of the second transistor; a reference generator circuit having a ground terminal and configured to generate a reference voltage; a pulse width modulation circuit configured to determine a duty cycle of the second transistor based on a comparison between the feedback signal and the reference voltage; as well as A ground reference circuit is configured to provide a ground reference to the ground terminal of the reference generator circuit.

17. The voltage regulator of claim 16, wherein the ground reference circuit comprises: a third transistor having a first terminal, a second terminal, and a control terminal, the control terminal of the third transistor being configured to receive a control signal associated with the duty cycle of the second transistor; a current mirror circuit coupled between the second terminal of the third transistor and the ground terminal of the reference generator circuit; as well as A resistor is coupled between the ground terminal and the ground rail terminal of the reference generator circuit.

18. The voltage regulator of claim 17 , wherein the control signal is a first control signal, the ground reference circuit further comprising a fourth transistor having a first terminal, a second terminal, and a control terminal, the second terminal of the fourth transistor being coupled to the ground rail terminal, and the control terminal of the fourth transistor being configured to receive a second control signal associated with a duty cycle of the first transistor.

19. The voltage regulator of claim 18, wherein the pulse width modulation circuit is further configured to generate a sample current at a current terminal, the sample current being associated with an output current of the voltage regulator, and wherein both the first terminal of the third transistor and the first terminal of the fourth transistor are coupled to the current terminal.

20. The voltage regulator of claim 18, wherein the current mirror circuit comprises: a fifth transistor coupled to the second terminal of the third transistor; and a sixth transistor having a control terminal coupled to the control terminal of the fifth transistor via a filter network.

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