Carrier-based model predictive control for converters with filter units

Abstract

An electrical converter (10) comprises a main stage (12) adapted to convert a DC voltage into an intermediate voltage comprising at least two voltage levels, and a filter cell stage (14) having filter cells (30) for each phase of the intermediate voltage, each filter cell (30) being adapted to add or subtract a cell voltage of the filter cell (30) to the intermediate voltage. A method for controlling an electrical converter (10) comprises a pattern determination section (44) comprising the steps of: determining a main pulse pattern (60) for a main stage (12) with pulse width modulation, where the main pulse pattern (60) is determined from a voltage reference signal (Vref, abc) for an output voltage, and wherein the main pulse pattern (60) comprises a switching time for the main stage (12) within a next modulation period of the main stage (12); and determining a cell pulse pattern (70) for the filter cell stage (14) with pulse width modulation, where the cell pulse pattern (70) is determined from the difference between the voltage reference signal (Vref, abc) and the primary stage voltage signal (62) determined from the primary pulse pattern (60), and where the cell pulse pattern (70) comprises a switching time for the filter cell (30) within the next modulation period. The method further includes a model predictive control section (46) including the following steps performed multiple times during the next modulation period: modifying the main pulse pattern (60) and the unit pulse pattern (70) by moving at least one transition time of the switching time, such that a flux error determined from a difference between an estimated flux of the electrical converter and a reference flux trajectory (76) is minimized; and applying at least a next switching time from the main pulse pattern (60) and the unit pulse pattern (70) to the electrical converter (10).

Description

Technical Field

[0001] The present invention relates to the field of high power converter control. In particular, the present invention relates to a method, a computer program, a computer readable medium and a controller for controlling an electric converter. The present invention also relates to an electric converter. Background Art

[0002] Especially in medium voltage applications, a cost-effective electrical converter topology with high power quality is presented with the 3L(A)NPC+AF topology. Here, 3L stands for 3-level, (A)NPC stands for (active) neutral point clamping, and AF stands for active filter. This topology was proposed many years ago. However, optimized hardware design, reliable control and fail-safe operation remain a challenge.

[0003] One of the main advantages of this topology is that smaller voltage steps can be generated. Small voltage steps reduce the machine side dv / dt and overvoltage as well as the current THD (total harmonic distortion) and harmonic losses involved in the machine. In order to fully benefit from the improved power quality, the control scheme needs to cover the entire operating point range of the machine from low speed to high speed. Previously developed control schemes work with optimized pulse patterns (OPP) calculated offline and cover medium to high speed operation. For low speed operation (such as less than 50% of nominal speed) and stationary operation, a new control scheme that does not rely on OPP would be beneficial.

[0004] WO 2018 029303 A1 relates to a two-stage control of a converter system with a floating filter unit, wherein the floating filter unit is directly controlled.

[0005] EP 3 709 497 A1 describes a cascaded real-time pulse width modulation method in which a main converter is modulated at a low switching frequency and a subsequent filter stage with a filter unit is modulated at an increased switching frequency.

[0006] In EP 2 469 692 A1, the optimized pulse pattern is modified based on model predictive control. The pre-calculated optimized pulse pattern switching angle is modified online to follow the flux trajectory.

[0007] EP 3 729 637 A1 relates to a model predictive control of a converter based on pulse width modulation. A pulse pattern is created using a mathematical representation of the pulse width modulation and modified using model predictive control.

[0008] WO 2019 137 916 A1 relates to a model predictive control of a converter based on a pulse width modulation switching pattern without a filter unit.

[0009] EP 3 846 327 A1 describes a method for operating a converter of a floating cell with an optimized pulse pattern such that the step size of the total output voltage is reduced.

[0010] EP 3 142 236 A1 describes a method for controlling a modular multilevel converter with an optimized pulse pattern, wherein the switching times of the optimized pulse pattern are shifted using model predictive control.

[0011] US 2012 / 161 685 A1 describes a method for controlling a converter with an optimized pulse pattern, wherein the switching times of the optimized pulse pattern are shifted using model predictive control.

[0012] WO 2018 / 172 329 A1 describes a method for operating a converter of a floating cell with pulse width modulation.

[0013] US 2019 / 190 397 A1 describes a method for operating a converter with a floating cell with two-stage control, wherein the switching moments of the floating cell are selected to reduce the output voltage error and keep the cell capacitor voltage within limits. Summary of the invention

[0014] An object of the invention is to improve the control of an electrical multilevel converter having a filter unit. A further object of the invention is to reduce the computational requirements of such a control method and to reduce the total harmonic distortion and losses of the electrical converter.

[0015] These objects are achieved by the subject-matter of the independent claims. Further exemplary embodiments are evident from the dependent claims and the following description.

[0016] One aspect of the invention relates to a method for controlling an electrical converter.The electrical converter may be a medium voltage or high voltage converter adapted to handle voltages up to 6.6 kV or more.

[0017] According to an embodiment of the invention, an electrical converter comprises a main stage adapted to convert a DC voltage into an intermediate voltage comprising at least two voltage levels. The main stage may comprise one or more (A)NPC half-bridges, which are connected in parallel to the DC link. The output of the half-bridge may be an intermediate voltage, which may be a multi-phase, in particular a three-phase voltage. Depending on the topology of the main stage, the output voltage may have two, three, five or more voltage levels. In the case of a 3L (A)NPC half-bridge, three output voltage levels are possible.

[0018] According to an embodiment of the invention, the electrical converter further comprises a filter cell stage having a filter cell for each phase of the intermediate voltage, wherein each filter cell is adapted to add or subtract a cell voltage of the filter cell from the intermediate voltage. Each filter cell may comprise a cell capacitor providing the cell voltage, which is connected in parallel with two half-bridges providing the input and output of the filter cell. The filter cell stage may be regarded as an active filter of the electrical converter.

[0019] According to an embodiment of the present invention, the method includes a pattern determination part, including the following steps: determining a main pulse pattern for a main stage with pulse width modulation, wherein the main pulse pattern is determined from a voltage reference signal for an output voltage, and wherein the main pulse pattern includes a switching moment for the main stage within a next modulation cycle of the main stage; determining a unit pulse pattern for a filter stage (filter unit stage) with pulse width modulation, wherein the unit pulse pattern (or filter unit pulse pattern) is determined from a difference between a voltage reference signal and a main stage voltage signal determined from the main pulse pattern, and wherein the unit pulse pattern includes a switching moment of the filter unit within the next modulation cycle of the main stage.

[0020] The next modulation period of the main stage may be half a carrier period or one or several carrier periods of the pulse width modulation.

[0021] Typically, two pulse patterns are determined, i.e., a main pulse pattern of the main stage and a unit pulse pattern of the filter unit stage. Each pulse pattern is or comprises a sequence of one or more switching moments within a specific time interval (modulation period). The switching moment indicates a point in time and / or a transition time and a switch position to be switched to at that point in time.

[0022] The master pulse pattern is determined from a voltage reference signal of the output voltage which may be provided by an external control loop. The unit pulse pattern is determined from the difference between the voltage reference signal and the master voltage signal. The master voltage signal may be determined from the master pulse pattern by determining the output voltage level generated by the master pulse pattern over time.

[0023] In pulse width modulation, a signal (here a voltage reference signal of the output voltage or a difference between the voltage reference signal and the main voltage signal) crosses a triangular signal whose carrier frequency is higher than the signal frequency. The crossing point is then used as the time point of the switching moment and / or the transition time. In the present method, pulse width modulation is performed by a mathematical function of a controller that implements the method.

[0024] It has to be noted that the main pulse pattern and the unit pulse pattern can be multi-phase quantities, ie each phase may have a switching moment.

[0025] According to an embodiment of the present invention, the method includes a model predictive control part, which includes the following steps performed multiple times during the next modulation cycle: modifying the main pulse pattern and the unit pulse pattern by moving at least one transition time of the switching moment so that the flux error determined from the difference between the estimated flux of the electrical converter and the reference flux trajectory is minimized; and applying at least the next switching moment of the future main pulse pattern and the unit pulse pattern to the electrical converter.

[0026] The model predictive control part as well as the model predictive control may be performed as in EP 2 469 692 A1 incorporated by reference. Furthermore, in the chapter "Pattern Controller" of EP 3 729 637 A1 incorporated by reference, a model predictive control of a pulse pattern created based on pulse width modulation is described.

[0027] Model prediction methods attempt to optimize a control objective, which can be modeled by an objective function. The objective function is a function that depends on parameters and quantities determined from two pulse patterns with time-shifted switching moments. A pulse pattern with time-shifted switching moments is searched for that minimizes the objective function.

[0028] The objective function is modeled to minimize the flux error between the estimated flux of the electrical converter and a reference flux trajectory.The actual, estimated flux may be determined from measurements in the electrical converter.

[0029] When the two pulse patterns are optimized, the next switching instant is applied to the electrical converter, ie the main stage and / or the filter unit stage. This is achieved by switching the switches of the main stage and / or the filter unit stage to the positions required for the switching instant.

[0030] The model predictive control part can be repeated with the same pulse pattern and reference flux trajectory as determined in the pattern determination part. The same main pulse pattern and the same unit pulse pattern determined by the pattern determination part can be used again in the model predictive control part at a later time to calculate the next switching time again.

[0031] The model predictive control part is executed more frequently than the pattern determination part, which means that the execution frequency is higher. In the pattern determination part, two pulse patterns are provided, for example, as a lookup table. In the model predictive control part, these two pulse patterns are used as input to the optimizer, which shifts the transition time multiple times.

[0032] The pattern determination part repeatedly calculates the nominal pulse pattern of the main stage and the filter unit stage online in the upcoming modulation cycle, for example using carrier-based pulse width modulation. Then, based on these two pulse patterns, an accurate flux reference trajectory is pre-calculated for the modulation cycle. Finally, the pulse pattern and the flux reference trajectory can be written into a lookup table and passed to the model predictive control part. The model predictive control part ensures closed-loop control by tracking the provided flux reference trajectory using online modification of the provided pulse pattern.

[0033] In order to avoid that the model predictive control part modifies the pulse pattern in such a way that the balance of the filter cells is disturbed, the flux reference trajectory is pre-calculated online using the previously calculated pulse pattern. Due to the specific characteristics of pulse width modulation, the pre-calculation of the flux reference trajectory can be done online without a high computational burden. This not only ensures that the cell voltage balancing algorithm works as expected, but also simplifies the balancing of the neutral point potential of the primary stage.

[0034] The pattern determination part can be used especially for low speed operation, for example when the output voltage frequency is less than 20 Hz. For higher speeds, the optimized pulse patterns of the main stage and the filter unit stage can be used to replace the main pulse pattern and the unit pulse pattern that have been determined by pulse width modulation. Therefore, for the model predictive control part, there is no need to maintain two different control schemes for low speed and nominal speed operation and / or implement complex switching logic.

[0035] According to an embodiment of the present invention, the pattern determination part further comprises: determining a flux reference trajectory in the next modulation cycle from the main pulse pattern and the unit pulse pattern. This can be achieved by integrating the sum of the output voltage of the main stage indicated by the main pulse pattern and the output voltage of the filter unit stage indicated by the unit pulse pattern.

[0036] The flux reference trajectory can be, for example, a vector with a component for each phase or a vector in an orthogonal reference frame described by two components.

[0037] A reference flux trajectory may be determined for a specific angular range corresponding to the next modulation period for determining the pulse pattern (i.e., the main pulse pattern and the unit pulse pattern). The use of a reference flux trajectory may be beneficial because it includes the flux ripple and thus matches the pulse pattern. Thus, in the absence of external interference, the pulse pattern may be applied without modification.

[0038] It may also be possible to use the circular flux trajectory directly as the reference flux trajectory. However, in this case the model predictive controller may modify the pattern switching moments to better match the circle, thus potentially overriding the regulation and possibly interfering with the unit balancing objective.

[0039] According to an embodiment of the present invention, the method further comprises: determining one or more differential mode components of an average (output) voltage reference of the filter unit, which differential mode components can be determined from measurements in the filter unit, and subtracting the differential mode component(s) from the voltage reference signal before determining the main pulse pattern. For the average output voltage reference, the capacitor voltage of the filter unit can be measured, compared with the capacitor voltage reference and further manipulated to generate a filter unit average output voltage reference signal.

[0040] According to an embodiment of the present invention, each phase of the average output voltage reference corresponding to the filter unit is based on the difference between the measurement capacitor voltage signal of the filter unit and the reference capacitor voltage of the filter unit. The capacitor voltage signal can be filtered with a low-pass filter to reduce ripple, and the capacitor voltage reference can be subtracted. The average output voltage reference of the filter unit can be an output signal of the difference between the measurement capacitor voltage signal of the filter unit and the reference capacitor voltage of the filter unit, which is then processed with a proportional integral (PI) controller. Then, the common mode signal, that is, the sum of the phase components of the average output voltage reference, is subtracted from the average output voltage reference signal of each unit to compensate only for the differential mode component of the average output voltage reference.

[0041] According to an embodiment of the present invention, the method further comprises: adjusting the unit pulse pattern in the pattern determination part of the method; wherein during the adjustment, the switching moment of the unit pulse pattern is moved so that the average voltage generated by the unit pulse pattern in the filter unit is shifted toward the average output voltage reference of the filter unit determined from the measured value in the filter unit. The average output voltage reference of the filter unit is also used to balance the filter unit capacitor voltage. The unit pulse pattern determined by pulse width modulation is adjusted (before it is supplied to the model predictive control part) so that the filter unit is better balanced. To achieve this, the switching moment of the unit pulse pattern is moved so that the goal is achieved. Balance means that the unit capacitor voltage moves toward the unit capacitor reference voltage. The unit capacitor voltage reference can be the desired voltage of the unit capacitor.

[0042] For example, a typical configuration of an electrical converter with a 3L(A)NPC+AF topology (see above) foresees a rather low cell voltage for the filter cell, typically 1 / 3 of half the DC link voltage of the main stage or less. For a ratio of 1 / 3, but further for lower ratios, the reference signal for the cell output voltage may periodically drive its pulse width modulator into the overmodulation range. As a result, within the modulation period of the main converter, the filter cell output voltage may have a non-zero average value, which may result in a continuous discharge / charge of the filter cell. By adjusting the cell pulse pattern as described above, such overmodulation may be avoided.

[0043] The regulation of the cell pulse pattern done in this way in the time domain is independent of power delivery at the fundamental frequency and can therefore be operated even at zero fundamental frequency (stationary). The method also operates well during transients. The cell voltage can be stabilized very effectively.

[0044] According to an embodiment of the present invention, the unit pulse pattern is determined by the difference between the differential mode signal of the voltage reference signal and the differential mode signal of the main voltage signal determined from the main pulse pattern. In this way, the differential mode signal of the average output voltage reference of the filter unit subtracted from the voltage reference signal used to determine the main pulse pattern can be compensated.

[0045] According to an embodiment of the present invention, the steps in the pattern determination part are performed once during a modulation period. The modulation period can be a full pulse width modulation cycle or a half pulse width modulation cycle of the main stage. The modulation period can also be aligned with the pulse width modulation cycle of the main stage. For a carrier frequency of the main stage of 150 Hz, the pattern determination part can run as a background task with an update frequency of 150 Hz or 300 Hz, leaving enough computing resources for other fast control blocks (such as the model predictive control part).

[0046] The online calculation of the main pulse pattern and the unit pulse pattern, the balancing of the filter units and the corresponding adjustment of the unit pulse pattern as well as the calculation of the flux reference trajectory can be performed at a reduced update frequency, for example between 150 and 300 Hz. Compared with the speed of the model predictive control part, this can be regarded as a long period of time. Due to the low update frequency of the pattern determination part, sufficient time is available for the calculation, i.e., the calculation burden is reduced. The execution of the model predictive control part can be independent and / or may generally require a higher update frequency for closed-loop control.

[0047] According to an embodiment of the present invention, the steps in the pattern determination part are performed by a pattern determination controller, and the steps in the model prediction control part are performed by a model prediction controller. The two parts of the method performed at different speeds can be performed by two different controllers. Compared with the pattern determination controller, the model prediction controller can have a faster execution speed. For example, the speed of the model prediction controller can be at least 10 times faster than the speed of the pattern determination controller.

[0048] According to an embodiment of the invention, when a base stator flux reference angle, for example commanded and / or requested by an outer loop controller, is outside the angle range covered by a pre-calculated reference flux trajectory based on the master pattern and the unit pattern, a flux error is determined from the difference between the estimated flux of the electric converter and the circular flux trajectory, rather than from the difference between the estimated flux and the pre-calculated reference flux trajectory. According to an embodiment of the invention, the master pulse pattern, the unit pulse pattern and the flux reference trajectory are stored in a lookup table during the pattern determination part. The table may be provided in a common memory of the pattern determination controller and the model predictive controller. The content of the lookup table provided by the pattern determination controller is used by the model predictive controller.

[0049] According to an embodiment of the present invention, the modulation period is at least half of the carrier period of the pulse width modulation of the main stage. c or T c / 2 is executed, while T c The carrier period of the main stage of the equivalent carrier-based pulse width modulation scheme can be 3.3ms or 1.65ms if the main stage uses a frequency of 300Hz.

[0050] According to an embodiment of the invention, the carrier frequency for pulse width modulation of the unit level is at least 4 times higher than the carrier frequency for pulse width modulation of the main level. The filter unit can be switched more frequently than the main level. This allows reducing the total harmonic distortion of the output voltage and / or more effectively damping high-order harmonics.

[0051] According to an embodiment of the present invention, the pulse width modulation of the main level and / or the filter unit level is performed by a mathematical expression of a pulse width modulator based on a carrier. The input signal of the corresponding modulator function and / or block of the main level and the filter unit level can be converted or provided as a mathematical function (e.g., piecewise linear interpolation). Moreover, the carrier signal can be provided as a mathematical function (e.g., as a trigonometric function). The intersection of the two functions can be determined, and the switching moment can be determined by the intersection.

[0052] Such a mathematical representation of pulse width modulation is described in the chapter “Pulse Width Modulation” of EP 3 729 637 A1, which is incorporated by reference.

[0053] A further aspect of the invention relates to a computer program for controlling an electric converter, which, when executed by a processor, is adapted to perform the steps of the method of one of the preceding claims, and to a computer readable medium having such a computer program stored thereon. Both the pattern determination part and the model predictive control part may be executed as software on one or more processors.

[0054] The pattern determination controller may have a processor, and the pattern determination part is executed on the processor. The pattern determination part may be stored in a memory of the pattern determination controller.

[0055] The model predictive controller may also have a processor, and the model predictive control portion executes on the processor. The model predictive control portion may be stored in a memory of the model predictive controller.

[0056] The computer readable medium may be a floppy disk, a hard disk, a USB (Universal Serial Bus) storage device, a RAM (Random Access Memory), a ROM (Read Only Memory), an EPROM (Erasable Programmable Read Only Memory) or a flash memory. The computer readable medium may also be a data communication network, such as the Internet, that allows downloading program code. In general, the computer readable medium may be a non-transient or transient medium.

[0057] A further aspect of the invention relates to a controller for controlling an electrical converter. The controller is adapted to perform the method described herein. The controller may comprise a pattern determination controller for performing the steps in the pattern determination part of the method. The controller may comprise a model predictive controller for performing the steps in the model predictive control part of the method.

[0058] The controller may include one or more processors, wherein the method is executed as software. The method may also be implemented at least partially or completely in hardware, such as a DSAP or FPGA.

[0059] A further aspect of the invention relates to an electrical converter controlled such as described herein.

[0060] According to an embodiment of the invention, an electrical converter comprises a main stage adapted to convert a DC voltage into an intermediate voltage comprising at least two voltage levels and a filter cell stage having a filter cell for each phase of the intermediate voltage, wherein each filter cell is adapted to add or subtract a cell voltage of the filter cell from the intermediate voltage, and comprises a controller such as described herein.

[0061] Generally, it has to be understood that features of the method described above and below may be features of the computer program, computer readable medium, controller and electrical converter described above and below, and vice versa.

[0062] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] The subject matter of the invention will be explained in more detail hereinafter with reference to exemplary embodiments which are illustrated in the attached drawings.

[0064] Figure 1A schematic circuit diagram of an electrical converter according to an embodiment of the invention is shown.

[0065] Figure 2 A schematic block diagram of a controller according to an embodiment of the present invention is shown.

[0066] Figure 3 Two diagrams showing the adjustment of a unit pulse pattern used in an illustrated control method according to an embodiment of the invention are shown.

[0067] Figure 4 A diagram showing signals and trajectories used in a graphical control method according to an embodiment of the present invention is shown.

[0068] The reference symbols used in the drawings and their meanings are listed in summary form in the reference symbol list. In principle, identical parts are provided with the same reference symbols in the figures. DETAILED DESCRIPTION

[0069] Figure 1 An electrical converter 10 is shown having a main stage 12 and a filter unit stage 14. The electrical converter 10 is adapted to transform a first AC voltage provided by an electrical grid 15 into an output voltage to be supplied to an electrical load 16.

[0070] The primary stage 12 comprises a rectifier 18 , which may be a passive diode rectifier and is adapted to convert an AC voltage from the grid 15 into a DC voltage, which is supplied to the main DC link 20 .

[0071] Furthermore, the main stage 12 includes three output converters 22, each of which is adapted to transform the DC voltage in the DC link 20 into a phase of an intermediate voltage provided at an output 24 of the main stage 12. The output converters 22 are connected in parallel to the DC link 20, for example via clamping inductors and / or resistors 28 or directly. Each of the output converters 22 may include a clamping circuit 26 and / or a DC link 26 having two capacitors. The DC links 20, 26 may be split DC links.

[0072] As shown, each of the output converters 22 may include a 3-level neutral point clamped (3LNPC) half-bridge 23, which may be based on IGCTs, but other topologies and semiconductor types are also possible. The half-bridge 23 may also be an ANPC half-bridge. Moreover, other topologies are also possible for the entire main stage 12. In general, the main stage 12 may be adapted to provide a two-level or multi-level intermediate voltage at the output 24, optionally with more than one phase. Figure 1 The half-bridge 23 shown is suitable for generating three different voltage levels for respective phases of the intermediate voltage.

[0073] Inductor 28 provides an IGCT di / dt clamp. In the case of other types of semiconductor switches (such as IGBTs), inductor 28 may be omitted. Clamp 26 may be used to control device voltage during switching. For other choices of semiconductor switches, clamp 26, which is typically used for IGCT switches, may or may not be omitted.

[0074] For each phase of the main stage 12, the filter unit stage 14 comprises a filter unit 30, which can be regarded as an active filter, and an optionally passive output filter 32 connected in series between the corresponding output 24 of the main stage 12 and the output 34 of the electrical converter 10. More than one filter unit 30 may be connected in series and / or in parallel between the output 24 and the output 34 of a phase.

[0075] Each filter unit 30 comprises two half-bridges 36, which are connected in parallel with a unit capacitor 38. A first midpoint of one of the half-bridges 36 is connected to the output 24 of the main stage 12. A second midpoint of the other half-bridge 36 provides an output 40 of the filter unit 30 and is connected to the corresponding output 34 of the electrical converter 10 via an optional passive filter 32.

[0076] The filter unit 30 comprises three different switching states, which can be achieved by switching their semiconductor switches (two per half bridge) accordingly, for example the semiconductor switches can be IGBTs. In a first switching state, the filter unit 30 directly connects the output 24 with the output 40. In a second switching state, the converter unit 30 connects the cell capacitor 38 between the outputs 24, 40, such that the cell capacitor voltage of the cell capacitor 39 is added to the intermediate voltage provided at the output 24. In a third switching state, the filter unit 30 connects the cell capacitor 38 between the outputs 24, 40, such that the cell capacitor voltage of the cell capacitor 38 is subtracted from the intermediate voltage provided at the output 24. In this way, the intermediate voltage from the main stage 12 (which is usually shaped like a step function due to the limited number of levels of the main stage) can be converted into a voltage (i.e., the output voltage) that is closer to a sinusoidal and / or continuous output voltage reference.

[0077] Each of the passive filters 32 may include an inductor, a resistor, and / or a capacitor for electrically filtering the output voltage to further damp higher order harmonics.

[0078] Figure 2 FIG. 4 shows a block diagram of a controller 42, which is composed of a pattern determination controller 44 and a model prediction controller 46. Using the controller 42, the Figure 1The blocks of the controller also indicate method steps of the control method performed by the controller. The blocks of the pattern determination controller 44 can also be regarded as the pattern determination part of the control method. The blocks of the model prediction controller 46 can also be regarded as the model prediction control part of the method.

[0079] The pattern determination section 44 may determine the time period T c or T c / 2 is executed, while T c is the carrier period of the equivalent carrier-based PWM scheme of the main stage 12. If the main stage 12 uses a frequency of 300 Hz, the execution period can be 3.3 ms or 1.65 ms.

[0080] Based on the basic flux reference angle provided by the outer loop torque controller, the next modulation period T is calculated. c (or T c / 2) within the voltage reference signal V ref，abc . Voltage reference signal V ref，abc can be a vector value. This can be achieved, for example, by rotating the base stator flux reference angle by 90° and scaling the length of the voltage vector with speed (in the case of operation with a constant flux reference). To weaken the magnetic field, it may be necessary to further scale the voltage reference signal V ref，abc To compensate for the delay of the pulse width modulation method used below, the angle can be further rotated with T c / 2(or T c / 4) corresponds to the equivalent angle. Voltage reference signal V ref，abc A common mode voltage signal may also be included to balance the neutral potential of the main stage 12 and / or to further improve the voltage quality using space vector equivalent modulation.

[0081] The cell capacitor voltages V of the filter cells 30 in the three phases are measured individually afc，abc , and optionally with a low pass filter 48G LP to be processed.

[0082] In the active filter cell balancer 50, the cell capacitor voltage V afc，abc The difference compared to the cell capacitor reference voltage is processed with a P controller or a PI controller. The output signal can be interpreted as a non-zero average output voltage reference V bal，abc , which needs to be injected by the filter unit 30 in order to accumulate charge in the cell capacitor 38 of the filter unit 30, thereby charging or discharging the cell capacitor 38. If the cell voltage matches the reference voltage, the filter unit 30 c (or T c / 2) should be zero, and the entire volt-second in the modulation period is provided by the main stage 12. In the balancer 50, it is necessary to consider the phase current I ph，abc The sign of the filter unit 30 makes the average voltage command drive the unit voltage in the correct direction, that is, the P controller or PI controller output is consistent with the corresponding phase current I ph，abc The output signal V of the balancer 50 is bal，abc is used as reference for the filter cell voltage average regulator 52 .

[0083] In block 54, determine V bal，abc The differential mode (DM) component 55. From the voltage reference signal V ref，abc Subtract V bal，abc The differential mode component 55 of the main stage 12 is used to form a compensation voltage reference signal 56. This is done to compensate for the additional voltage injected by the filter unit 30 caused by the regulation generated by the regulator (see below). Therefore, the sum of the output voltage of the main stage 12 (i.e. the intermediate voltage) and the output voltage of the filter unit stage 14 does not change and has no effect on the basic flux trajectory and torque control.

[0084] In the main stage modulator 58, the compensation voltage reference signal 56 is used to calculate the main stage 12 in the next modulation period T c (or T c / 2) within the main pulse pattern 60.

[0085] The main pulse pattern 60 is composed of switching moments of three phases, wherein each switching moment includes a switching state and a switching time. The switching time of the main pulse pattern 60 is provided in the next modulation cycle of the main stage 12.

[0086] The calculation of the main pulse pattern 60 is done using a mathematical representation of carrier-based pulse width modulation. The compensation voltage reference signal 56 can be provided as a mathematical function, for example as a piecewise linear interpolation, and / or can be represented as an array of voltage and time entries. Moreover, the carrier signal can be provided as a mathematical function (for example as a trigonometric function). The intersection of the two functions can be determined, and the switching instant can be determined by the intersection. In the chapter "Pulse Width Modulation" of EP 3 729 637 A1, which is incorporated by reference, such a mathematical representation of pulse width modulation is described.

[0087] A difference signal 64 is formed between the compensation voltage reference signal 56 and the creation voltage pulse 61 of the main stage 12 encoded in the main pulse pattern 60. For this purpose, only the differential mode components of the corresponding signals provided by blocks 62 and 63 can be used, because the common mode components are not filtered by the filter unit. Therefore, before calculating the difference signal 64, the differential mode components of the compensation voltage reference signal 56 and the creation voltage pulse 61 are first calculated. The voltage pulse 61 can be regarded as the main stage voltage signal 61, which is determined from the main stage pulse pattern 60. The phase component of the difference signal 64 is the reference signal of the filter unit 30.

[0088] The phase component of the difference signal 64 can be represented as T c (or T c / 2). The same applies to the reference voltage signal V ref，abc 56 and the phase component of the main voltage signal 62.

[0089] In the filter unit stage modulator 66, the difference signal 64 of the filter unit stage 14 is used to determine the next modulation period T c (or T c / 2) initial unit pulse pattern 68 of the inner filter unit stage 14.

[0090] The mathematical representation of carrier-based pulse width modulation is used to calculate the initial unit pulse pattern 68. This can be done as described with respect to the main stage modulator 58, but starting from the difference signal 64.

[0091] The carrier frequency of the filter unit stage modulator 66 is high compared to the carrier frequency of the main stage modulator 58. For example, a factor of 8 between the filter unit stage carrier frequency and the main stage carrier frequency may be used.

[0092] The initial unit pulse pattern 68 consists of the switching moments of the three phases, wherein each switching moment comprises a switching state and a switching time. The switching time of the initial unit pulse pattern 68 is provided in the next modulation cycle of the main stage 12. The same applies to the final unit pulse pattern 70.

[0093] The initial unit pulse pattern 68 is adjusted to form the (final) unit pulse pattern 70. This is done so that c (or T c / 2) to implement a specific average output voltage injection. If the average output voltage from the balancer is referenced to V bal，abc The command is zero, then the filter unit 30 is in the modulation period T c (or T c / 2) should be zero. Otherwise, the modulation period T c (or T c / 2) The average output voltage injected should correspond to the average output voltage reference V bal，abc The pulse pattern adjustment is done in the time domain, i.e. the pre-calculated switching moments of the initial unit pulse pattern 68 are shifted so that the requested average voltage is achieved. This will be relative to Figure 3 Describe in more detail.

[0094] In block 72, the main pulse pattern 60 for the main stage 12 and the unit pulse pattern 70 for the filter unit stage 14 are stored in a lookup table. There, the pulse patterns 60, 70 are available for the next modulation period T of the model predictive controller 46. c (or T c / 2).

[0095] In block 74, a flux reference trajectory 76 corresponding to the main pulse pattern 60 and the unit pulse pattern 70 is calculated. The flux reference trajectory 76 includes the correct ripples generated by the main pulse pattern 60 and the unit pulse pattern 70.

[0096] Using pulse width modulation, in the modulation period T c (or T c / 2), the flux reference trajectory 76 always intersects the circular reference trajectory 78. Therefore, with the modulation period T c (or T c The circular reference trajectory 78 corresponding to the stator flux reference angle at the beginning of the stator flux reference angle φ / 2) can be used as the starting point for calculating the flux reference trajectory 76. The modulation period T is obtained by piecewise integration of the combined pulse patterns 60, 70 of the main stage 12 and the filter unit stage 14. c (or T c / 2) the remainder of the internal flux reference trajectory 76.

[0097] In block 80 , the flux reference trajectory 76 is stored in a lookup table. There, the flux reference trajectory 76 is available for the next modulation period T of the model predictive controller 46 . c (or T c / 2).

[0098] The pattern determination controller 44 can also calculate the next modulation period T c (or T c / 2) and the flux reference trajectory 76. This can simplify implementation on a microcontroller, as the method can run in a lower priority interrupt and can calculate the pattern 60, 70 for the next modulation cycle, while the model predictive controller 46 works on the previously calculated active modulation cycle.

[0099] The model predictive controller 46 comprises an MP3C (Model Predictive Pulse Pattern Control) core 82 which executes the pulse patterns 60, 70 and controls the stator flux to follow the flux reference trajectory 76. To this end, the core 82 reads the pulse patterns 60, 70 and the flux reference trajectory 76 from a lookup table and receives an estimated flux 84 calculated from measurements in the electrical converter 10.

[0100] The model predictive control part as well as the model predictive control may be performed as in EP 2 469 692 A1 incorporated by reference. Furthermore, in the chapter "Pattern Controller" of EP 3 729 637 A1 incorporated by reference, a model predictive control of a pulse pattern created based on pulse width modulation is described.

[0101] Typically, the tasks and / or method steps of the model predictive control part are performed in a modulation period T c (or T c / 2) is executed multiple times during the period.

[0102] The main pulse pattern 60 and the unit pulse pattern 70 are modified by shifting at least one transition time and / or time point of the switching instants so that a flux error determined from the difference between the estimated flux 84 of the electrical converter 10 and the reference flux trajectory 76 is minimized. To this end, an objective function is used, in which the transition times and / or time points of the switching instants are input.

[0103] Then, at least the next switching instant from the modified main pulse pattern 60 and the modified unit pulse pattern 70 is applied to the electrical converter 10. This means that the switches of the main stage 12 and the filter unit stage 14 are switched to the switching positions indicated by the next switching instant at the transition time of the next switching instant.

[0104] In block 86 the circular flux reference trajectory 78 is calculated.

[0105] If there is a modulation period T that causes the stator flux reference angle to be in the same range as the pre-calculated modulation period T c (or T c / 2), the flux reference trajectory 76 is skipped and the circular flux reference trajectory 78 of the stator flux reference angle is used instead.

[0106] In the following, it will be described in more detail Figure 2 A possible implementation of a block.

[0107] Filter unit balancer 50

[0108] The filter unit balancer 50 can be implemented as a P controller or a PI controller. It operates on the difference between the capacitor voltage of the filter unit 30 in phase k and the reference capacitor voltage. The capacitor voltage can be filtered with a low pass filter 48. The output of the filter unit balancer 50 is proportional to the current I in the corresponding phase. ph Multiply the signs of .

[0109] V bal，k =G PI (s)·(V c，ref -G LP (s)·V afc，k )·sign(I ph，k )

[0110] Balance voltage V bal or average output voltage reference V bal will be injected by the filter unit 30 to control the cell DC link voltage to the cell reference voltage V c，ref In order not to disturb the total volt-second (the sum of the output voltage of the main stage 12 and the output voltage of the filter unit during the modulation cycle), thereby ensuring that the flux reference trajectory 76 is restored to the original reference at the end of the modulation cycle, it is necessary to obtain the voltage reference V ref Subtract the average voltage reference V bal . Only the reference voltage V ref Subtract the differential mode portion 55. The calculation of phase k is as follows.

[0111]

[0112] Main stage pulse width modulator 58

[0113] The main pulse width modulator 58 can be a mathematical representation of a pulse width modulation block based on a 3-level carrier. It calculates the next modulation period T c (or T c / 2) and stores the switching time and corresponding switch position (i.e., switching instant) of each phase of the main stage 12 in the phase k in the array. The input signal 56 of the modulator 58 of the phase k is given as

[0114] V ref，npc，k =V ref，k -V bal，DM，k

[0115] The input signal is modulated in period T c (or T c / 2) can be constant

[0116] Filter unit level pulse width modulator 66

[0117] The filter unit level pulse width modulator 66 can be a mathematical representation of a pulse width modulation block based on a 3-level carrier. It calculates the next modulation period T c (or T c / 2) and stores the switching time and corresponding switching position (i.e., switching instant) of the filter unit 30 in each phase and stores it in an array. The input signal 56 of the modulator 66 of phase k is given as

[0118] V ref，af，k (t i )=V ref，npc，DM，k -V npc，DM，k (t i )

[0119] The input signal of the modulator 66 is a piecewise constant. The signal of phase k is modulated in the modulation period T c (or T c / 2) at time t i It is calculated using the actual differential mode voltage 61 of each switching position of the main stage 12 and the differential mode voltage of the reference signal 56 for each switching time in each phase.

[0120]

[0121] V ref，npc，DM，k =V ref，npc，k -1 / 3(V ref，npc，a +V ref，npc，b +V ref，npc，c )

[0122] For each switch position change in any phase of the main stage 12, it is necessary to create a i New reference entry for .

[0123] The modulator 66 calculates the switch positions and switching times of the filter unit 30 in phase k by using the piecewise constant input signal and the mathematical representation of the modulator. A space vector equivalent common mode voltage may be added to the input signal to improve the final voltage quality.

[0124] Likewise, the switching time and position of each filter unit are saved in the array.

[0125] Filter unit average voltage regulator 52

[0126] Ideally, the average voltage injected by the filter unit 30 during the modulation period should be zero, since the total volt-seconds should be provided only by the main stage 12. Otherwise, the filter unit 30 will be charged or discharged. Due to overmodulation effects, especially if the nominal voltage of the filter unit 30 is very low compared to the half DC link voltage of the main stage 12, the average filter unit output voltage during the modulation period may not be equal to zero in general.

[0127] Figure 3 An example of a unit pulse pattern 68 before adjustment and a unit pulse pattern 70 after adjustment is shown. The curves show the switching instants (the switching instants at which the switching signal changes) over time, as depicted on the right.

[0128] For the unit pulse pattern 68, the average filter unit output voltage within the modulation period is not zero. For the unit pulse pattern 70 with adjusted switching time, the average filter unit output voltage within the modulation period is equal to the average output voltage reference V calculated by the balancer bal . It may be zero if the cell capacitor voltage is equal to the capacitor reference voltage.

[0129] The regulator 52 adjusts the average output voltage during the modulation period and makes it equal to the voltage reference V of the balancer 50. bal This is achieved by shifting the switching times of the cell pulse pattern 68 until the desired average voltage is achieved.

[0130] In a first step, before applying the modification, the average filter cell output voltage over the modulation period is calculated using

[0131]

[0132] In the second step, the individual switching times t are shifted i To reduce the average voltage, positive voltage steps are shifted to the right (delayed) and negative voltage steps are shifted to the left (advanced), as shown in Figure 3 To increase the average voltage, the steps move in the opposite direction.

[0133] Several strategies are possible on how to shift the switching moments. One approach aims to shift all available switching moments by the same time shift to achieve a total shift. In order to evenly distribute the required total shift to the available (movable) voltage transitions N tr , the following equation can be used to calculate the time shift that needs to be applied to each switching instant.

[0134]

[0135] r AF is the ratio between the nominal filter unit capacitor voltage and half the DC link voltage of the primary stage 12. Applying ΔT to each switching instant ensures that the filter unit average output voltage is equal to the modified voltage command V of the balancer 50 balConstraints can also limit how much a certain switching moment can be shifted, or that certain switching moments should not be shifted at all, for example if they are synchronized with the switching of the main stage 12. Furthermore, the required total time shift can be distributed differently from the available switching moments (for example by shifting the first switching moment as much as possible to achieve the total shift), or an adjusted average value can be achieved by executing the method multiple times.

[0136] Flux trajectory calculation block 74

[0137] In block 74, the pulse patterns 60, 70 of the main stage 12 and the filter unit stage 14 are combined and for the next modulation period T c (or T c / 2) Pre-calculate the reference flux trajectory 76.

[0138] The advantage of the pre-calculated reference flux trajectory 76 is as follows: If a circular flux trajectory 78 is used, the MP3C core 82 will move the switching moments in the provided pulse pattern 60, 70 to be as close as possible to the circular flux reference 78. The previously determined pulse pattern 60, 70 will be at least partially overturned and will not be applied as the pre-calculated pulse pattern. As a result, modifications introduced to balance the filter cell voltages may not be at least fully applied and the cell voltages may drift and cannot be fully controlled.

[0139] Therefore, it is beneficial to pre-calculate the flux reference including the ripple component. Since the proposed method is based on carrier-based pulse width modulation, the reference flux trajectory 76 has a well-known characteristic shape. One characteristic of pulse width modulation is that the flux ripple will intersect the circular flux trajectory 78 within each half modulation period.

[0140] This is like Figure 4 As shown, Figure 4 shows the modulation period T c / 2, carrier signal 88, voltage reference signal V ref , the pulse pattern 60, 70 determined thereby, the reference flux trajectory Ψ ref 76 and circular flux trajectory Ψ c 78.

[0141] It is intended to provide the total volt-second using only the main stage 12, and this characteristic is maintained even when the filter stage 14 is included. Therefore, it can be assumed that the flux ripple is c (or T c / 2) Start with a circular reference Ψ c Start from 78.

[0142] Since the average output voltage of the filter unit is V bal shift and the reference voltage of the main stage 12 V balThe corresponding subtraction (compensation), modulation period T c (or T c / 2) the sum of the average output voltages of the main stage 12 and the filter unit stage 14 remains unchanged and corresponds to the original reference voltage V ref Therefore, in the modulation period T c (or T c / 2) after which the flux reference trajectory Ψ ref 76 will eventually reach the circular reference trajectory Ψ again c 78.

[0143] Flux reference trajectory Ψ ref 76 can be pre-calculated using simple forward integration. First, the starting point is determined based on the circular flux trajectory

[0144] Ψ ref，αβ (t0) = Ψ c，αβ (t0)

[0145] (Here αβ corresponds to the αβ frame.) Next, the pulse patterns 60, 70 of the main stage 12 and the filter unit stage 14 are combined and transformed to a stationary orthogonal (αβ) reference frame.

[0146] V tot，k =V npc，k +V AF，k

[0147]

[0148] V npc，k is the kth phase component of the voltage generated by the main pulse pattern 60, and V AF，k is the k-th phase component of the voltage generated by the unit pulse pattern 70 .

[0149] Finally, the cumulative sum is used to calculate the switching time t j The flux trajectory corner at

[0150] Ψ ref，αβ (t j )=Ψ ref，αβ (t j-1 )+V tot，αβ (t j-1 )·(t j -t j-1 )

[0151] This can be viewed as a discrete integral.

[0152] Although the present invention has been illustrated and described in detail in the drawings and the foregoing description, such illustration and description are to be considered illustrative or exemplary rather than restrictive; the present invention is not limited to the disclosed embodiments. Other variations of the disclosed embodiments may be understood and implemented by those skilled in the art in practicing the claimed invention by studying the drawings, the disclosure and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. A single processor or controller or other unit may fulfill the functions of several items listed in the claims. The fact that certain measures are listed in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any figure marks in the claims should not be interpreted as limiting the scope.

Claims

1. A method for controlling an electrical converter (10), the electrical converter (10) comprising a main stage (12) adapted to convert a DC voltage into an intermediate voltage comprising at least two voltage levels and a filter unit stage (14), the main stage (12) being adapted to convert a DC voltage into an intermediate voltage comprising at least two voltage levels, the filter unit stage (14) having a filter unit (30) for each phase of the intermediate voltage, each filter unit (30) being adapted to add or subtract a cell voltage of the filter unit (30) from the intermediate voltage, The method comprises a pattern determination section (44), the pattern determination section (44) comprising the following steps: A main pulse pattern (60) for the main stage (12) with pulse width modulation is determined, wherein the main pulse pattern (60) is derived from a voltage reference signal (V ref,abc ) is determined, and wherein the main pulse pattern (60) includes switching moments for the main stage (12) within a next modulation cycle of the main stage (12); A unit pulse pattern (70) for the filter unit stage (14) with pulse width modulation is determined, wherein the unit pulse pattern (70) is derived from the voltage reference signal (V ref,abc ) and a main voltage signal (62) determined from the main pulse pattern (60), and wherein the unit pulse pattern (70) includes a switching instant of the filter unit (30) in the next modulation period; The unit pulse pattern (70) is adjusted in the pattern determination part (44) of the method, wherein during the adjustment, the switching moments of the unit pulse pattern (70) are shifted so that the average output voltage generated by the unit pulse pattern (70) in the filter unit (30) is directed toward an average output voltage reference (V bal,abc ) shift, the average output voltage reference (V bal,abc ) is determined from measurements in the filter unit; And the method includes a model predictive control portion (46), the model predictive control portion (46) including the following steps performed a plurality of times during the next modulation cycle: modifying the main pulse pattern (60) and the unit pulse pattern (70) by shifting at least one transition time of the switching moments such that a flux error determined from a difference between an estimated flux (84) of the electrical converter (10) and a reference flux trajectory (76) is minimized; At least the next switching instant from the main pulse pattern (60) and the unit pulse pattern (70) is applied to the electrical converter (10).

2. The method according to claim 1, wherein the pattern determination section (44) further comprises: The flux reference trajectory (76) within the next modulation period is determined from the main pulse pattern (60) and the unit pulse pattern (70).

3. The method according to claim 1 or 2, further comprising: Determine the average output voltage reference (V bal,abc ) of the differential mode component (55), the average output voltage reference (V bal,abc ) is determined from the measured value in the filter unit (30); and from the voltage reference signal (V ref,abc ) minus the differential mode component (55).

4. The method according to any one of the preceding claims, The average output voltage reference (V bal,abc ) of each phase corresponding to the filter unit (30) based on the measurement capacitor voltage signal (V afc,abc ) and the difference between the reference capacitor voltage of the filter unit (30).

5. The method according to any one of the preceding claims, The unit pulse pattern (70) is derived from the voltage reference signal (V ref,abc ) and the differential mode signal of the main level voltage signal (62) determined from the main pulse pattern (60).

6. The method according to any one of the preceding claims, wherein said steps in said pattern determination section (44) are performed once during said modulation period.

7. The method according to any one of the preceding claims, wherein the steps in the pattern determination section are performed by a pattern determination controller (44); The steps in the model predictive control section are executed by a model predictive controller (46) having a faster execution speed than the pattern determination controller.

8. The method according to any one of the preceding claims, in, The flux error is determined from a difference between the estimated flux of the electrical converter (10) and a circular flux trajectory (78) when a base flux reference is outside an angular range provided by the reference flux trajectory (76).

9. The method according to any one of the preceding claims, The main pulse pattern (60), the unit pulse pattern (70) and the flux reference trajectory (76) are stored in a lookup table during the pattern determination portion.

10. The method according to any one of the preceding claims, The modulation period is the carrier period (T c ) of at least half.

11. The method according to any one of the preceding claims, wherein the carrier frequency of the filter unit stage (14) for the pulse width modulation is at least 4 times higher than the carrier frequency of the main stage (12) for the pulse width modulation; and / or The pulse width modulation of the main stage (12) and / or the filter unit stage (14) is performed using a mathematical expression of carrier-based pulse width modulation.

12. A computer program for controlling an electric converter (10), said computer program being adapted to perform the steps of the method according to any one of the preceding claims when executed by a processor.

13. A computer-readable medium in which the computer program according to claim 12 is stored.

14. A controller (42) for controlling an electric converter, the electric converter being adapted to perform the method according to any one of claims 1 to 11, the controller comprising: a pattern determination controller (44) for executing said steps in said pattern determination part of said method; A model predictive controller (46) is used to perform the steps in the model predictive control part of the method.

15. An electrical converter (10), comprising: A main stage (12) adapted to convert a DC voltage into an intermediate voltage comprising at least two voltage levels; a filter cell stage (14) having a filter cell (30) for each phase of the intermediate voltage, wherein each filter cell (30) is adapted to add or subtract a cell voltage of the filter cell from the intermediate voltage; A controller (42) according to claim 14.

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