Method for testing power device and test circuit for implementing the test method

Abstract

The present application provides a method for testing a power device and a test circuit for implementing the test method, the method comprising: applying a negative gate voltage to the gate of the device under test, and applying a test voltage to the source and drain of the device under test to perform a body diode bipolar degradation test on the device under test; after the body diode bipolar degradation test of the device under test is completed, applying a gate pre-bias voltage to the gate of the device under test to eliminate the threshold drift of the device under test; after eliminating the threshold drift of the device under test, applying a double pulse voltage to the source and drain of the device under test to perform a double pulse test on the device under test. The method solves the problem of threshold voltage drift of silicon carbide devices that is not fully considered in the prior art by applying a gate pre-bias voltage, and directly performs a double pulse test after the body diode bipolar degradation experiment is completed, thereby avoiding the influence of inconsistent retest time on the test results, and significantly improving the test efficiency.

Description

Technical Field

[0001] The present application relates to the technical field of power semiconductor device testing and evaluation, and in particular to a method for testing a power device and a test circuit for implementing the testing method. Background Art

[0002] In the testing of semiconductor power devices (such as Si MOSFET, IGBT, SiC MOSFET and various fast recovery diodes or Schottky diodes, etc.), the dynamic characteristic parameters of the device are very important, reflecting the recovery performance of the diode (recovery time and recovery loss, etc.) and the switching performance such as the loss of the power device during the switching process, which is achieved by the double pulse test principle.

[0003] Existing device testing equipment is mainly designed and developed for silicon devices, with large parasitic parameters, and cannot meet the needs of dynamic testing of high-voltage power devices.

[0004] At present, dynamic testing of high-voltage power devices is mostly done by connecting capacitors in parallel in multiple stages to increase the test voltage. However, this method will increase the parasitic parameters of the circuit and cannot accurately test silicon carbide devices (silicon carbide devices have a fast switching speed and are very sensitive to parasitic parameters);

[0005] At present, the dynamic testing method of silicon carbide devices follows the dynamic testing method of silicon-based devices, without fully considering the threshold voltage drift problem of silicon carbide devices, and there is no dynamic testing research method for the bipolar degradation reliability problem of the body diode of silicon carbide devices. Summary of the invention

[0006] The main purpose of the present application is to provide a method for testing a power device and a test circuit for implementing the test method, so as to at least solve the problem that the threshold voltage drift problem of silicon carbide devices is not fully considered in the prior art and there is no dynamic test research method for the bipolar degradation reliability problem of the body diode of silicon carbide devices.

[0007] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a method for testing a power device is provided, the method comprising: applying a negative gate voltage to the gate of the device under test, and applying a test voltage to the source and drain of the device under test to perform a body diode bipolar degradation test on the device under test; after the body diode bipolar degradation test of the device under test is completed, applying a gate pre-bias voltage to the gate of the device under test to eliminate the threshold drift of the device under test; after eliminating the threshold drift of the device under test, applying a double pulse voltage to the source and drain of the device under test to perform a double pulse test on the device under test.

[0008] Optionally, before applying a negative gate voltage to the gate of the device under test and applying a test voltage to the source and drain of the device under test to perform a body diode bipolar degradation test on the device under test, the method also includes: performing a first round of prior testing to obtain a preset threshold voltage; performing a second round of prior testing based on the preset threshold voltage to obtain a first test pulse width; performing a third round of prior testing based on the preset threshold voltage and the first test pulse width to obtain a target interval time; performing a fourth round of prior testing based on the first test pulse width and the target interval time to obtain a gate pre-bias voltage.

[0009] Optionally, performing a first round of prior testing to obtain a preset threshold voltage includes: performing a static test on the device under test to obtain the preset threshold voltage.

[0010] Optionally, a second round of prior testing is performed based on the preset threshold voltage to obtain a first test pulse width, including: performing the second round of prior testing on the device under test using the preset threshold voltage, the preset interval time and the test pulse width time applied in each test in the second round of prior testing to obtain device turn-on / off times of multiple devices under test, each of the test pulse width times having a different time length, and the preset interval time being the preset time interval between eliminating the threshold drift of the device under test and performing the double pulse test on the device under test; obtaining a device turn-on / off time curve based on all the device turn-on / off times obtained in the second round of prior testing; and determining the test pulse width time corresponding to a point in the device turn-on / off time curve whose rate of change is less than or equal to the preset rate of change as the first test pulse width.

[0011] Optionally, a third round of prior testing is performed based on the preset threshold voltage and the first test pulse width to obtain a target interval time, including: repeatedly testing the device under test multiple times using the preset threshold voltage, the first test pulse width and the test interval time of each group of test applications in the third round of prior testing to obtain a plurality of turn-on / off time standard deviations of the devices under test, the time lengths of the test intervals being different, each group of tests in the third round of prior testing including a plurality of identical tests, each identical test corresponding to a device turn-on / off time of the device under test, a turn-on / off time standard deviation of the device under test being determined based on the turn-on / off times of all the devices in a group of tests; and the test interval time of a group of test applications corresponding to the smallest turn-on / off time standard deviation is determined as the target interval time.

[0012] Optionally, a fourth round of prior testing is performed based on the first test pulse width and the target interval time to obtain a gate pre-bias voltage, including: repeatedly testing the device under test multiple times using the first test pulse width, the target interval time and the test bias voltage of each group of test applications in the fourth round of prior testing to obtain multiple standard deviations of on / off time of the devices under test, each group of tests in the fourth round of prior testing includes multiple identical tests, each identical test corresponds to a device on / off time of the device under test, and a standard deviation of on / off time of the device under test is determined based on all the device on / off times in a group of tests; and the test bias voltage of a group of test applications corresponding to the smallest standard deviation of on / off time is determined as the gate pre-bias voltage.

[0013] Optionally, after completing the body diode bipolar degradation test on the device under test, applying a gate pre-bias voltage to the gate of the device under test, including: applying the gate pre-bias voltage to the gate of the device under test after completing the body diode bipolar degradation test and after a retest time.

[0014] Optionally, after the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage is applied to the gate of the device under test to eliminate the threshold drift of the device under test, and after the threshold drift of the device under test is eliminated, a double pulse voltage is applied to the source and drain of the device under test to perform a double pulse test on the device under test, including: after the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage with the same length as the first test pulse width is continuously applied to the gate of the device under test to eliminate the threshold drift of the device under test, and after the threshold drift of the device under test is eliminated and after a target interval time has passed, the double pulse test is performed on the device under test.

[0015] Optionally, a double pulse voltage is applied to the source and drain of the device under test to perform a double pulse test on the device under test, including: applying an adjusted voltage to the source and drain of the device under test, and using at least a second test pulse width and a third test pulse width to perform a double pulse test on the device under test, wherein the second test pulse width and the third test pulse width are both determined based on a target relationship and a current value required for the test, and the target relationship is used to characterize the relationship between the current required for the test and the test pulse width time.

[0016] Optionally, an adjusted voltage is applied to the source and drain of the device under test, and a double pulse test is performed on the device under test using at least a second test pulse width and a third test pulse width, including: applying an adjusted voltage to the source and drain of the device under test, and applying a first gate turn-on / off voltage to the gate of the device under test during the second test pulse width, and applying a second gate turn-on / off voltage to the gate of the device under test during the third test pulse width, so as to perform a double pulse test on the device under test, wherein the first gate turn-on / off voltage and the second gate turn-on / off voltage are determined according to device parameters of the device under test.

[0017] Optionally, the method further comprises: while testing the device under test, providing a companion device under test, and applying the same operation as that of the device under test to the companion device under test.

[0018] According to another aspect of the present application, a test circuit for implementing any one of the methods described is provided, comprising a first drive unit, a second drive unit and a body diode aging module electrically connected to each other, wherein the first drive unit is used to apply a voltage to a gate of a device under test; the second drive unit is used to apply a double pulse voltage to a source and a drain of the device under test; and the body diode aging module is used to apply a test voltage to the source and the drain of the device under test.

[0019] Optionally, the test circuit further includes a switch device, and the switch device is used to control the connection or disconnection between the device under test and the second driving unit.

[0020] Optionally, the test circuit further includes a companion test device, which is the same device as the device under test, and is electrically connected to the first driving unit, the second driving unit and the body diode aging module respectively.

[0021] Optionally, the test circuit further includes a third driving unit and a load module, wherein the third driving unit is used to provide a driving signal to the companion test device, and the load module is used to provide a load.

[0022] Applying the technical solution of the present application, the above-mentioned method for testing a power device first applies a negative gate voltage to the gate of the device under test, and applies a test voltage to the source and drain of the device under test to perform a body diode bipolar degradation test on the device under test; then, after the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage is applied to the gate of the device under test to eliminate the threshold drift of the device under test; finally, after the threshold drift of the device under test is eliminated, a double pulse voltage is applied to the source and drain of the device under test to perform a double pulse test on the device under test. In order to avoid the instability of the dynamic performance test results of the device caused by the threshold voltage drift, the method can apply a pre-bias gate voltage for a certain period of time before the double pulse test to eliminate the influence of the threshold drift; in addition, in order to study the influence of the bipolar degradation of the SiC MOSFET body diode on the dynamic performance of the device, the double pulse test is directly carried out after the body diode bipolar degradation experiment is completed, without removing the device from the reliability equipment and rewiring, thereby avoiding the influence of inconsistent retest time on the test results, and significantly improving the test efficiency at the same time, solving the problem that the threshold voltage drift of silicon carbide devices is not fully considered in the prior art, and there is no dynamic test research method for the reliability problem of the bipolar degradation of the body diode of silicon carbide devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0024] Figure 1 A schematic flow chart of a method for testing a power device provided according to an embodiment of the present application is shown;

[0025] Figure 2 A test timing diagram provided according to an embodiment of the present application is shown;

[0026] Figure 3 A structural diagram of a test circuit provided according to an embodiment of the present application is shown.

[0027] The above drawings include the following reference numerals:

[0028] T1, device under test; T2, companion device under test; 10, first drive unit; 20, second drive unit; 21, power module; 22, absorption circuit; 30, body diode aging module; 40, switch device; 50, third drive unit; 60, load module. DETAILED DESCRIPTION

[0029] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0030] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0032] As introduced in the background technology, due to the advantages of silicon carbide material properties, silicon carbide devices are more suitable for high-temperature, high-frequency, and high-power power electronics than silicon devices, and the voltage level of SiC MOSFET will gradually increase, even greater than 10kV. SiC MOSFET is widely used in power electronics, automotive electronics, photovoltaic energy storage, communication power supply, industrial control automation and other fields. In actual use, there are extremely high requirements for the reliability of SiC MOSFET devices, including the threshold voltage drift of SiC devices (the gate oxide in SiC devices usually has relatively more interface states, and the charge capture / release in the interface states will cause the threshold voltage to drift transiently over time, which will cause the threshold voltage to be uncertain during each test) and the bipolar degradation of the body diode (when the forward current continues to flow through the body diode of the MOSFET, the recombination energy of the electron-hole pairs causes the "stacking fault" to spread at the BPD, which will cause the on-resistance and body diode voltage drop of the silicon carbide device to increase). These two problems exist in any type of SiC device and are the main reliability issues of concern to the SiC MOSFET industry.

[0033] In order to solve the problem that the threshold voltage drift problem of silicon carbide devices is not fully considered in the prior art and there is no dynamic test research method for the bipolar degradation reliability problem of the body diode of silicon carbide devices, the embodiments of the present application provide a method for testing a power device and a test circuit for implementing the test method.

[0034] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0035] In this embodiment, a method for testing a power device is provided. It should be noted that although a logical sequence is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than that shown here.

[0036] in, Figure 1 1 is a flow chart of a method for testing a power device according to an embodiment of the present application. The method comprises: Figure 1 As shown, the method comprises the following steps:

[0037] Step S101, applying a negative gate voltage to the gate of the device under test, and applying a test voltage to the source and drain of the device under test, so as to perform a body diode bipolar degradation test on the device under test;

[0038] Specifically, Figure 2 and Figure 3 As shown, according to the test requirements, select a suitable test device T2. First, connect the TI to be tested and the test device T2 to the base interface of the corresponding package form to complete the pre-test preparation. The test device T2 is exactly the same as the test device T1. A certain negative gate voltage u1 is applied to the silicon carbide device (test device T1) through the first drive unit 10, and a certain voltage V is applied to the test device T1 through the body diode aging module 30. SD , the silicon carbide device body diode will be in a continuous current stress state, the test lasts for a period of time t 1 End. Then, by retesting the time t 2 , double pulse test is repeated from 0 to 30 minutes with a step size of 2 minutes, so as to study the change law of device dynamic parameters under different retest times.

[0039] In addition, there is almost no test equipment for high-voltage power devices in the existing technology, especially for devices with voltage levels of 6.5kV and higher, so it is necessary to build a test platform to meet the test research needs. In view of the problem that the switching speed of silicon carbide devices is fast and the dynamic characteristics test is greatly affected by parasitic parameters, an absorption loop module is designed to reduce the total parasitic inductance of the test loop.

[0040] In order to avoid the instability of the dynamic performance test results of the device caused by threshold voltage drift, a method of applying a pre-bias gate voltage for a certain time before the test is given, and the application method and condition selection are given.

[0041] When conducting conventional reliability tests on silicon carbide devices, it was found that the retest time had a significant impact on the device test results. In addition, the process of removing the device from the reliability equipment and rewiring it for dynamic and static parameter testing was relatively complicated (taking about 30 minutes), and the test efficiency was low. Therefore, it was considered to combine the device reliability test circuit with the dual pulse test circuit to improve the test efficiency and facilitate the study of the change law of the device dynamic parameters under short retest time (0-30 minutes).

[0042] Before applying a negative gate voltage to the gate of the device under test and applying a test voltage to the source and drain of the device under test to perform a body diode bipolar degradation test on the device under test, the method further includes the following steps:

[0043] Step S201, performing a first round of prior testing to obtain a preset threshold voltage;

[0044] The first round of prior testing is performed to obtain a preset threshold voltage, including: performing a static test on the device under test to obtain the preset threshold voltage.

[0045] Specifically, in this way, a suitable preset threshold voltage can be accurately determined to determine the voltage application mode, optimal pulse width time, amplitude and interval time of the pre-bias voltage to be applied to the subsequent device before dynamic testing.

[0046] Step S202, performing a second round of prior testing based on the preset threshold voltage to obtain a first test pulse width;

[0047] The second round of prior testing is performed based on the preset threshold voltage to obtain a first test pulse width, including the following steps:

[0048] Step S2021, performing the second round of prior testing on the device under test by using the preset threshold voltage, the preset interval time and the test pulse width time applied in each test in the second round of prior testing, and obtaining device on / off time of a plurality of the devices under test, wherein the lengths of the test pulse width times are different, and the preset interval time is the interval time between eliminating the threshold drift of the device under test and performing the double pulse test on the device under test;

[0049] Step S2022 obtains a device on / off time curve based on the on / off time of all the above devices obtained in the second round of previous testing;

[0050] Step S2023 determines the test pulse width time corresponding to the point in the device on / off time curve where the change rate is less than or equal to the preset change rate as the first test pulse width.

[0051] Specifically, in this way, a suitable first test pulse width can be accurately determined to ensure that the threshold drift problem of the device under test is eliminated, so as not to affect the test accuracy of the subsequent double pulse test.

[0052] In some cases, a lower pre-bias voltage has little effect on eliminating threshold drift, while a higher pre-bias voltage can easily damage the gate oxide layer of the device. Figure 2 and Figure 3 As shown, the threshold voltage Vth (±1V) of the device during static testing is first selected as the starting voltage (ie, the preset threshold voltage), and research is carried out on the duration t3 (ie, the first test pulse width) and the interval time t4 (ie, the target interval time).

[0053] like Figure 2 and Figure 3 As shown, u2=Vth+1V is set, the interval time t4=0s, and the device is dynamically tested after the test pulse width time t3=100ms, 500ms, 1s, 2s, ..., 10s, 20s, ..., 100s, respectively. A curve diagram of the device's turn-on time ton (or turn-off time toff) under different test pulse width times t3 is drawn. It can be seen that with the increase of the test pulse width time t3, the device turn-on time ton (or turn-off time toff) gradually tends to a stable value. Therefore, the shortest time t3 at which the device turn-on time ton (or turn-off time toff) basically does not change can be determined. min On this basis, it is further determined that the first test pulse width can be taken as t3 min ~t3 min +5s.

[0054] Step S203, performing a third round of prior testing based on the preset threshold voltage and the first test pulse width to obtain a target interval time;

[0055] The method of performing a third round of prior testing based on the preset threshold voltage and the first test pulse width to obtain a target interval time includes the following steps:

[0056] Step S2031, repeatedly testing the device under test multiple times using the preset threshold voltage, the first test pulse width, and the test interval time of each group of tests in the third round of prior tests, to obtain a plurality of standard deviations of on / off time of the devices under test, wherein the lengths of the test intervals are different, each group of tests in the third round of prior tests includes a plurality of identical tests, each identical test corresponds to a device on / off time of the device under test, and a standard deviation of on / off time of the device under test is determined based on the on / off time of all the devices in a group of tests;

[0057] Step S2032: determine the test interval time of a group of test applications corresponding to the minimum on / off time standard deviation as the target interval time.

[0058] Specifically, in this way, a suitable target interval time can be accurately determined, which can ensure that the threshold drift problem of the device under test is eliminated, so as not to affect the test accuracy of the subsequent double pulse test.

[0059] In some instances, such as Figure 2 and Figure 3 As shown, set u2=Vth+1V, duration t3=t3 min +5s, and perform repeated dynamic tests on the device after the test detection time t4=100ms, 500ms, 1s, 2s, ..., 10s, 20s, ..., 100s respectively. For different values ​​of the test detection time t4, at least 3 tests are performed for each value. The standard deviation of the turn-on time ton (or turn-off time toff) of the device under different test detection times t4 is calculated to compare the data distribution of repeated tests under different interval times, and the interval time with the best measurement repeatability is selected as the optimal choice. Finally, the optimal interval time (target interval time) is determined to be 5~10s.

[0060] Step S204 , performing a fourth round of prior testing based on the first test pulse width and the target interval time to obtain a gate pre-bias voltage.

[0061] Specifically, the voltage application mode, optimal pulse width time, amplitude and interval time settings of the pre-bias voltage that needs to be applied to the device before dynamic testing can be finally determined by the above method.

[0062] The fourth round of prior testing is performed based on the first test pulse width and the target interval time to obtain the gate pre-bias voltage, including the following steps:

[0063] Step S2041, repeatedly testing the device under test multiple times using the first test pulse width, the target interval time, and the test bias voltage applied in each group of tests in the fourth round of prior tests, to obtain a plurality of standard deviations of on / off time of the devices under test, wherein each group of tests in the fourth round of prior tests includes a plurality of identical tests, each identical test corresponds to a device on / off time of the device under test, and a standard deviation of on / off time of the device under test is determined based on the on / off time of all the devices in a group of tests;

[0064] Step S2042 , determining the test bias voltage of a group of test applications corresponding to the minimum on / off time standard deviation as the gate pre-bias voltage.

[0065] Specifically, in this way, a suitable gate pre-bias voltage can be accurately determined, which can ensure that the threshold drift problem of the device under test is eliminated, so as not to affect the test accuracy of the subsequent double pulse test.

[0066] In some instances, such as Figure 2 and Figure 3 As shown, set the duration t3=t3 min +5s, interval time t4=7.5s, repeat dynamic test on the device under pre-bias voltage (test bias voltage) u2=1V, 2V, 3V, ..., 20V respectively, for different values ​​of test bias voltage u2, at least 3 tests are carried out for one value, calculate the standard deviation of the turn-on time ton (or turn-off time toff) of the device under different test bias voltages u2, and compare the data distribution of repeated tests under different pre-bias voltages, select the pre-bias voltage with the best measurement repeatability as the optimal choice, and determine that the pre-bias voltage has the smallest repeated test error when it is near the threshold voltage Vth, so finally determine the best gate pre-bias voltage u2=Vth+0~3V.

[0067] Step S102, after the body diode bipolar degradation test of the device under test is completed, applying a gate pre-bias voltage to the gate of the device under test to eliminate the threshold drift of the device under test;

[0068] After the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage is applied to the gate of the device under test, including: after the body diode bipolar degradation test is completed and after a retest time has passed, the gate pre-bias voltage is applied to the gate of the device under test.

[0069] Specifically, this can ensure that the threshold drift problem of the device under test is eliminated, so as not to affect the test accuracy of the subsequent double pulse test.

[0070] Among them, Figure 2 and Figure 3 As shown, before the double pulse test of the silicon carbide device is performed, a voltage V with a duration of t3 and a value of u2 needs to be applied to the device under test T1 and the accompanying device T2 (when the silicon carbide device is used as the accompanying device) through the first drive circuit module. GS The pulse voltage serves as the gate pre-bias voltage. The time interval t4 between the pre-bias voltage and the double pulse test signal is also a key parameter that needs to be set to ensure that the threshold drift problem of the device is eliminated so as not to affect the test accuracy of the subsequent double pulse test.

[0071] It should be noted that the interface state density at the SiC / SiO2 interface of silicon carbide devices is two orders of magnitude higher than that of Si-based devices, so there are more numbers and types of interface traps. The interface traps of SiC MOSFET are easy to release and capture charges, which will cause the threshold voltage drift problem.

[0072] Before each dynamic test, it cannot be guaranteed that the state of the captured and released charges in the traps in the device is consistent, which will cause fluctuations in the actual threshold voltage of the device (usually 0.1-0.3V). The change in threshold voltage will affect the gate current required to turn on / off the device, thereby affecting the turn-on / off speed of the device, which is ultimately reflected in the dynamic parameters as changes in the turn-on / off time and energy parameters, resulting in poor repeatability and inaccuracy in dynamic test results.

[0073] Applying a short pre-bias voltage before testing can promote the capture or release of charges by traps in the device, and the final state is consistent, which is manifested as a stable threshold voltage.

[0074] like Figure 2 and Figure 3 As shown, the first driving circuit during the dynamic test of the device is used to apply the pre-bias voltage through the control of different timings to simplify the test device. The difference between the pre-bias voltage and the dynamic test gate pulse voltage is that the pulse width t3 (in ms, s) required for the pre-bias voltage is wider than the dynamic test pulse widths t5 and t6 (in μs).

[0075] Step S103 , after eliminating the threshold drift of the device under test, applying a double pulse voltage to the source and drain of the device under test to perform a double pulse test on the device under test.

[0076] Specifically, after eliminating the threshold drift of the above-mentioned device under test, the above-mentioned switching device is closed to connect the above-mentioned device under test with the above-mentioned second driving unit, and the DC bus voltage in the above-mentioned second driving unit is adjusted to obtain an adjusted voltage, and at least the above-mentioned adjusted voltage is used to perform a double pulse test on the above-mentioned device under test.

[0077] After the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage is applied to the gate of the device under test to eliminate the threshold drift of the device under test, and after the threshold drift of the device under test is eliminated, a double pulse voltage is applied to the source and drain of the device under test to perform a double pulse test on the device under test, including: after the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage with the same length as the first test pulse width is continuously applied to the gate of the device under test to eliminate the threshold drift of the device under test, and after the threshold drift of the device under test is eliminated and after a target interval time has passed, the double pulse test is performed on the device under test.

[0078] Among them, applying a double pulse voltage to the source and drain of the above-mentioned device under test to perform a double pulse test on the above-mentioned device under test, including: applying an adjusted voltage to the source and drain of the above-mentioned device under test, and using at least a second test pulse width and a third test pulse width to perform a double pulse test on the above-mentioned device under test, wherein the above-mentioned second test pulse width and the above-mentioned third test pulse width are both determined based on a target relationship and a current value required for the test, and the above-mentioned target relationship is used to characterize the relationship between the current required for the test and the test pulse width time.

[0079] Specifically, the current value required for the test is determined according to the adjusted voltage, so that the appropriate second test pulse width and the third test pulse width can be accurately determined, and the double pulse test can be accurately performed on the device under test.

[0080] Wherein, applying an adjusted voltage to the source and drain of the above-mentioned device under test, and performing a double pulse test on the above-mentioned device under test using at least a second test pulse width and a third test pulse width, including: applying an adjusted voltage to the source and drain of the above-mentioned device under test, and applying a first gate turn-on / off voltage to the gate of the above-mentioned device under test during the time of the above-mentioned second test pulse width, and applying a second gate turn-on / off voltage to the gate of the above-mentioned device under test during the time of the above-mentioned third test pulse width, so as to perform a double pulse test on the above-mentioned device under test, and the above-mentioned first gate turn-on / off voltage and the above-mentioned second gate turn-on / off voltage are determined according to the device parameters of the above-mentioned device under test.

[0081] Specifically, in this way, the first gate on / off voltage and the second gate on / off voltage can be accurately determined, and a double pulse test can be accurately performed on the device under test.

[0082] Among them, Figure 2 and Figure 3 As shown, after the pre-bias voltage is applied, the control switch device 40 is closed to connect the device under test T1 with the second drive unit 20, and the DC bus voltage V required for the output test is adjusted. DD . Perform a double pulse test on the device, according to the current I required for the testDS Two pulse width times t5 (second test pulse width) and t6 (third test pulse width) are set to values, and gate on / off voltages u3 and u4 are determined according to device parameters of the device under test.

[0083] The method further comprises: while testing the device under test, providing a companion device under test, and applying the same operation as that of the device under test to the companion device under test.

[0084] The above-mentioned method for testing a power device of the present application first applies a negative gate voltage to the gate of the device under test, and applies a test voltage to the source and drain of the device under test to perform a body diode bipolar degradation test on the device under test; then, after the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage is applied to the gate of the device under test to eliminate the threshold drift of the device under test; finally, after the threshold drift of the device under test is eliminated, a double pulse voltage is applied to the source and drain of the device under test to perform a double pulse test on the device under test. In order to avoid the instability of the dynamic performance test results of the device caused by the threshold voltage drift, the method can apply a pre-bias gate voltage for a certain period of time before the double pulse test to eliminate the influence of the threshold drift; in addition, in order to study the influence of the bipolar degradation of the SiC MOSFET body diode on the dynamic performance of the device, the double pulse test is directly carried out after the body diode bipolar degradation experiment is completed, without removing the device from the reliability equipment and rewiring, thereby avoiding the influence of inconsistent retest time on the test results, and significantly improving the test efficiency at the same time, solving the problem that the threshold voltage drift of silicon carbide devices is not fully considered in the prior art, and there is no dynamic test research method for the reliability problem of the bipolar degradation of the body diode of silicon carbide devices.

[0085] Since the dynamic performance parameters of SiC MOSFET devices are affected by the threshold voltage, in order to avoid the instability of the dynamic performance test results of the device caused by the threshold voltage drift, a pre-biased gate voltage can be applied for a certain period of time before the double pulse test to eliminate the influence of the threshold drift; in addition, in order to study the influence of the bipolar degradation of the SiC MOSFET body diode on the dynamic performance of the device, a double pulse test is performed directly after the body diode bipolar degradation experiment is completed. There is no need to remove the device from the reliability equipment and rewire it, which avoids the influence of inconsistent retest time on the test results and significantly improves the test efficiency.

[0086] In order to enable those skilled in the art to more clearly understand the technical solution of the present application, the implementation process of the method for testing a power device of the present application will be described in detail below in conjunction with specific embodiments.

[0087] This embodiment relates to a specific method for testing a power device, wherein the timing diagram is as follows: Figure 2 As shown, the test circuit diagram is as follows Figure 3 As shown, the method comprises the following steps:

[0088] Step S1: Both the device to be tested and the accompanying device to be tested are 6.5kV / 20A SiC MOAFET single-tube devices. According to the data sheet, the dynamic test condition of the device is selected as V DS =3.6kV, I DS =20A, V GS =20V / -5V;

[0089] Step S2: The required bus capacitance is calculated to be ≥6kV / 60μF according to the test conditions. Four standardized 3kV / 60μF capacitor units are selected by switching the capacitor module. Two are connected in series as a group, and then the two groups are connected in parallel to meet the test requirements.

[0090] Step S3: The load inductance L is set to 7.5 mH. The two pulse widths t5 = 42 μs and t6 = 10 μs required for the dynamic test can be obtained by calculation.

[0091] Step S4: Connect the device to be tested / company to be tested to the circuit and set the body diode aging voltage V 2 The current I through the body diode SD =10A, and conduct bipolar degradation experiment with t1=0h~6h;

[0092] Step S5: After the body diode aging test is completed, the retest time t2 is controlled to be 0-30min, and the double pulse test is repeated with a step size of step=2min. The switching time / energy parameters are calculated by the test waveform, and the change curve of the same parameter under different retest times is plotted (comparing the parameter difference before and after the body diode aging), and the law is summarized to determine the optimal retest time for describing the bipolar degradation phenomenon of the body diode.

[0093] Step S6: In order to ensure the accuracy and repeatability of each double pulse test result, the pre-bias voltage related setting parameters are studied in advance. According to the above research method, the pre-bias voltage parameter settings of u2=Vth+1.8V=4V, t3=5s, t4=5s are finally determined.

[0094] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0095] In this embodiment, a test circuit for implementing any of the above methods is also provided. Figure 3As shown, the test circuit includes a first driving unit 10, a second driving unit 20 and a body diode aging module 30 which are electrically connected to each other. The first driving unit 10 is used to apply a voltage to the gate of the device under test T1; the second driving unit 20 is used to apply a double pulse voltage to the source and drain of the device under test T1; and the body diode aging module 30 is used to apply a test voltage to the source and drain of the device under test T1.

[0096] The second driving unit is used to provide a DC bus voltage, and the double-pulse voltage is an adjusted DC bus voltage.

[0097] The above-mentioned test circuit of the present application includes a first drive unit, a second drive unit and a body diode aging module which are electrically connected to each other. The first drive unit is used to apply voltage to the gate of the device under test; the second drive unit is used to apply a double pulse voltage to the source and drain of the device under test; the body diode aging module is used to apply a test voltage to the source and drain of the device under test. This circuit combines the device reliability test circuit with the double pulse test circuit. There is no need to remove the device from the reliability equipment and rewire it, which avoids the influence of inconsistent retest time on the test results. At the same time, it significantly improves the test efficiency and facilitates the study of the change law of the dynamic parameters of the device under short retest time (0-30min). It solves the problem that the threshold voltage drift problem of silicon carbide devices is not fully considered in the prior art, and there is no dynamic test research method for the bipolar degradation reliability problem of the body diode of silicon carbide devices.

[0098] In some instances, such as Figure 3 As shown, the second driving unit 20 includes a power module 21 and an absorption circuit 22. The power module 21 is powered by a high-voltage DC power supply V 1 , multiple capacitors C, multiple resistors R and multiple switches S. From another perspective, the power module 21 is composed of a high-voltage DC power supply V 1 The absorption circuit 22 is composed of a plurality of capacitors C and a plurality of resistors R.

[0099] Specifically, the power module controls the high-voltage DC power supply to charge the bus capacitor module through the charge and discharge circuit. The bus capacitor module provides the required voltage and energy in the double pulse test. In order to broaden the scope of the double pulse test, meet the high-voltage test requirements, and improve the test efficiency, the bus capacitor module is composed of multiple capacitors in series and parallel. The number of bus capacitors in series and parallel is switched by controlling the switch to control the maximum voltage and total capacitance of the bus capacitor module. In order to avoid large parasitic parameters, the main power circuit of the bus capacitor module needs to adopt a laminated busbar structure.

[0100] Specifically, the absorption circuit module is connected in parallel between the bus capacitor module and the device under test and accompanying test device modules, and is composed of multiple absorption capacitors with appropriate capacitance in parallel and absorption resistors with appropriate resistance in series. It can not only suppress the overvoltage caused by part of the parasitic inductance between the bus capacitor and the device under test, and the overcurrent caused by the parasitic capacitance on the freewheeling device and the load inductor, but also reduce the total parasitic inductance of the test structure to a certain extent.

[0101] In some instances, such as Figure 3 As shown, the first driving unit 10 is mainly composed of a pulse signal generator V G1 , drive board, drive power supply and resistor R G1 The driving power supply supplies power to the driving board, and the pulse signal generator controls the driving board to provide a gate voltage with a certain pulse width and amplitude to the gate of the device, wherein the output voltage range of the driving board should be adjustable within ±30V, so as to realize the control of the turn-off gate voltage required for the body diode bipolar degradation test, the pre-bias voltage before the double pulse test, and the test voltage during the double pulse test.

[0102] In some instances, such as Figure 3 As shown, the body diode aging module 30 includes a programmable power supply V 2 and switch S. The body diode aging module is mainly a programmable power supply, which is connected in parallel with the body diodes of the device under test and the accompanying device. Before the double pulse test, a certain output voltage and time can be set to apply continuous current stress to the device to perform a body diode bipolar degradation test.

[0103] In some instances, such as Figure 3 As shown, the test circuit further includes a switch device 40 , and the switch device 40 is used to control the connection or disconnection between the device under test T1 and the second driving unit 20 .

[0104] In some instances, such as Figure 3 As shown, the test circuit further includes a test device T2, which is the same device as the device under test T1, and is electrically connected to the first driving unit 10, the second driving unit 20 and the body diode aging module 30 respectively.

[0105] Specifically, the structure of the device under test and the accompanying device is exactly the same. In order to meet the test requirements of devices with different packaging forms on one test board and improve the test efficiency, the module unit is equipped with multiple device interface channels, which are connected in parallel. It can meet the test requirements of diodes, IGBTs and MOSFET single-tube devices in mainstream packaging forms such as TO-220-2, TO-247-2 / 3 / 4. In addition, new test interfaces can be added according to the test requirements of devices with new packaging forms.

[0106] In some instances, such as Figure 3 As shown, the test circuit further includes a third driving unit 50 and a load module 60. The third driving unit 50 is used to provide a driving signal to the accompanying test device T2, and the load module 60 is used to provide a load.

[0107] In some instances, such as Figure 3 As shown, the third driving unit 50 is mainly composed of a pulse signal generator V G2 , drive board, drive power supply and resistor R G2 The driving power supply supplies power to the driving board, and the pulse signal generator controls the driving board to provide a gate voltage with a certain pulse width and amplitude to the gate of the device. The output voltage range of the driving board should be adjustable within ±30V, so as to realize the control of the turn-off gate voltage required for the body diode bipolar degradation test, the pre-bias voltage before the double pulse test, and the test voltage during the double pulse test.

[0108] In some instances, such as Figure 3 As shown, the load module 60 is composed of an inductor L. The load module generally provides a load for the circuit under test to adjust the current when the device is turned on, which is generally a load inductor. The load is connected in parallel with the accompanying device module, independent of the entire test system, and does not affect the parasitic inductance of the entire system. Therefore, it is directly externally connected and uses a multi-level adjustable inductor (the adjustable inductance range is 0.1mH~50mH) to meet the needs of dynamic testing of devices of different specifications.

[0109] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0110] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0111] 1) The above-mentioned method for testing a power device of the present application first applies a negative gate voltage to the gate of the device under test, and applies a test voltage to the source and drain of the device under test to perform a body diode bipolar degradation test on the device under test; then, after the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage is applied to the gate of the device under test to eliminate the threshold drift of the device under test; finally, after eliminating the threshold drift of the device under test, a double pulse voltage is applied to the source and drain of the device under test to perform a double pulse test on the device under test. In order to avoid the instability of the dynamic performance test results of the device caused by the threshold voltage drift, the method can apply a pre-bias gate voltage for a certain period of time before the double pulse test to eliminate the influence of the threshold drift; in addition, in order to study the influence of the bipolar degradation of the SiC MOSFET body diode on the dynamic performance of the device, the double pulse test is directly carried out after the body diode bipolar degradation experiment is completed, without removing the device from the reliability equipment and rewiring, thereby avoiding the influence of inconsistent retest time on the test results, and significantly improving the test efficiency at the same time, solving the problem that the threshold voltage drift of silicon carbide devices is not fully considered in the prior art, and there is no dynamic test research method for the reliability problem of the bipolar degradation of the body diode of silicon carbide devices.

[0112] 2) The above-mentioned test circuit of the present application includes a first drive unit, a second drive unit and a body diode aging module which are electrically connected to each other. The first drive unit is used to apply voltage to the gate of the device under test; the second drive unit is used to apply a double pulse voltage to the source and drain of the device under test; the body diode aging module is used to apply a test voltage to the source and drain of the device under test. This circuit combines the device reliability test circuit with the double pulse test circuit. There is no need to remove the device from the reliability equipment and rewire it, which avoids the influence of inconsistent retest time on the test results. At the same time, it significantly improves the test efficiency and facilitates the study of the change law of the dynamic parameters of the device under short retest time (0-30min). It solves the problem that the threshold voltage drift of silicon carbide devices is not fully considered in the prior art, and there is no dynamic test research method for the bipolar degradation reliability problem of the body diode of silicon carbide devices.

[0113] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for testing a power device, characterized in that: The method comprises: Applying a negative gate voltage to the gate of the device under test, and applying a test voltage to the source and drain of the device under test, so as to perform a body diode bipolar degradation test on the device under test; After the body diode bipolar degradation test of the device under test is completed, applying a gate pre-bias voltage to the gate of the device under test to eliminate the threshold drift of the device under test; After eliminating the threshold drift of the device under test, applying a double pulse voltage to the source and drain of the device under test to perform a double pulse test on the device under test; Before applying a negative gate voltage to the gate of the device under test and applying a test voltage to the source and drain of the device under test to perform a body diode bipolar degradation test on the device under test, the method further includes: Performing a first round of prior testing to obtain a preset threshold voltage; Performing a second round of prior testing based on the preset threshold voltage to obtain a first test pulse width; Performing a third round of prior testing based on the preset threshold voltage and the first test pulse width to obtain a target interval time; A fourth round of prior testing is performed based on the first test pulse width and the target interval time to obtain a gate pre-bias voltage.

2. The method according to claim 1, characterized in that Performing a first round of prior testing to obtain a preset threshold voltage includes: performing a static test on the device under test to obtain the preset threshold voltage.

3. The method according to claim 1, characterized in that Performing a second round of prior testing based on the preset threshold voltage to obtain a first test pulse width includes: The second round of prior testing is performed on the device under test by using the preset threshold voltage, the preset interval time and the test pulse width time applied in each test in the second round of prior testing to obtain device on / off time of a plurality of the devices under test, wherein the length of each test pulse width time is different, and the preset interval time is the preset interval time between eliminating the threshold drift of the device under test and performing the double pulse test on the device under test; Based on the on / off time of all the devices obtained in the second round of prior testing, a device on / off time curve is obtained; The test pulse width time corresponding to a point in the device on / off time curve whose change rate is less than or equal to a preset change rate is determined as the first test pulse width.

4. The method according to claim 1, characterized in that Performing a third round of prior testing based on the preset threshold voltage and the first test pulse width to obtain a target interval time includes: Repeating multiple tests on the device under test using the preset threshold voltage, the first test pulse width, and the test interval time of each group of tests in the third round of prior tests to obtain multiple standard deviations of on / off time of the devices under test, wherein the lengths of the test intervals are different, each group of tests in the third round of prior tests includes multiple identical tests, each identical test corresponds to a device on / off time of the device under test, and a standard deviation of the on / off time of the device under test is determined based on all the device on / off times in a group of tests; The test interval time of a group of test applications corresponding to the minimum on / off time standard deviation is determined as the target interval time.

5. The method according to claim 1, characterized in that Performing a fourth round of prior testing based on the first test pulse width and the target interval time to obtain a gate pre-bias voltage includes: Repeating multiple tests on the device under test using the first test pulse width, the target interval time, and the test bias voltage applied in each group of tests in the fourth round of prior tests to obtain multiple standard deviations of on / off time of the devices under test, wherein each group of tests in the fourth round of prior tests includes multiple identical tests, each identical test corresponds to a device on / off time of the device under test, and a standard deviation of the on / off time of the device under test is determined based on all the device on / off times in a group of tests; The test bias voltage of a group of test applications corresponding to the minimum on / off time standard deviation is determined as the gate pre-bias voltage.

6. The method according to claim 1, characterized in that After the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage is applied to the gate of the device under test, including: After the body diode bipolar degradation test is finished and after a retest time has passed, the gate pre-bias voltage is applied to the gate of the device under test.

7. The method according to claim 1, characterized in that After the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage is applied to the gate of the device under test to eliminate the threshold drift of the device under test, and after the threshold drift of the device under test is eliminated, a double pulse voltage is applied to the source and drain of the device under test to perform a double pulse test on the device under test, including: After the body diode bipolar degradation test of the device under test is completed, a gate pre-bias voltage having the same duration as the first test pulse width is continuously applied to the gate of the device under test to eliminate the threshold drift of the device under test, and after the threshold drift of the device under test is eliminated and the target interval time has passed, the double pulse test is performed on the device under test.

8. The method according to claim 1, characterized in that Applying a double pulse voltage to the source and drain of the device under test to perform a double pulse test on the device under test, comprising: An regulated voltage is applied to the source and drain of the device under test, and a double pulse test is performed on the device under test using at least a second test pulse width and a third test pulse width, wherein the second test pulse width and the third test pulse width are both determined based on a target relationship and a current value required for the test, and the target relationship is used to characterize the relationship between the current required for the test and the test pulse width time.

9. The method according to claim 8, characterized in that Applying an adjusted voltage to the source and drain of the device under test, and performing a double pulse test on the device under test by at least using a second test pulse width and a third test pulse width, comprising: Applying adjusted voltages to the source and drain of the device under test, and applying a first gate on / off voltage to the gate of the device under test during the second test pulse width, and applying a second gate on / off voltage to the gate of the device under test during the third test pulse width, so as to perform a double pulse test on the device under test, wherein the first gate on / off voltage and the second gate on / off voltage are determined according to device parameters of the device under test.

10. The method according to any one of claims 1 to 9, characterized in that The method further includes: while testing the device under test, providing a companion device under test, and applying the same operation as that of the device under test to the companion device under test.

11. A test circuit for implementing the method according to any one of claims 1 to 10, characterized in that: It includes a first driving unit, a second driving unit and a body diode aging module which are electrically connected to each other, The first driving unit is used to apply a voltage to the gate of the device under test; The second driving unit is used to apply a double pulse voltage to the source and drain of the device under test; The body diode aging module is used to apply a test voltage to the source and drain of the device under test.

12. The test circuit according to claim 11, characterized in that: The test circuit further includes a switch device, and the switch device is used to control the connection or disconnection between the device under test and the second driving unit.

13. The test circuit according to claim 11, characterized in that: The test circuit further includes a companion test device, which is the same device as the device to be tested and is electrically connected to the first driving unit, the second driving unit and the body diode aging module respectively.

14. The test circuit according to claim 11, characterized in that: The test circuit further includes a third driving unit and a load module. The third driving unit is used to provide a driving signal to the device under test, and the load module is used to provide a load.

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