Integrated data analysis methods, equipment and storage media

Abstract

The present invention relates to the field of chip design technology, and in particular to an integrated data analysis method, device and storage medium, which obtains a key signal set by acquiring all key signals used for performance analysis and function analysis in a system to be tested; a hardware acceleration platform samples the signals in the system to be tested according to the key signal set to obtain a key signal data set; the hardware acceleration platform calls a processing function in an analysis module through an interface function, and the processing function is used to receive the key signal data set and save it as a data file; the analysis module performs performance analysis and / or function analysis based on the data file, does not collect and store redundant data, and solves the technical problem of data redundancy.

Description

Technical Field

[0001] The present invention relates to the field of chip design technology, and in particular to an integrated data analysis method, device and storage medium. Background Art

[0002] A hardware acceleration platform is an infrastructure that uses dedicated hardware devices (such as hardware emulators, FPGAs, etc.) to accelerate system design verification. Its main function is to provide an efficient environment that makes the verification and analysis process of SoC systems faster and more accurate. The hardware acceleration platform supports the verification and analysis of SoC systems. In the hardware acceleration platform, the implementation of the SoC system can run at a speed close to that of real hardware, which is faster than pure software simulation.

[0003] Performance analysis and functional analysis of SOC systems are usually performed based on hardware acceleration platforms to evaluate and verify the actual performance and correctness of SoC designs. Among them, performance analysis focuses on the execution efficiency and resource utilization of the system, such as timing, communication delay, etc. Functional analysis focuses on ensuring that the system works as expected and meets all functional requirements, such as input / output data flow, state transition of state machines, etc. Due to the different purposes of performance analysis and functional analysis, the two are usually performed independently, and each samples and analyzes the corresponding key signals. Although the two have different focuses, the same signals or data points may be involved in the actual analysis process. For example: interfaces of general protocols such as AXI and PCIE. That is, there is redundancy in the sampled data during performance analysis and functional analysis, which not only leads to repeated sampling, but also increases storage capacity. Therefore, there is an urgent need for a data analysis method without redundant data. Summary of the invention

[0004] In view of the above technical problems, the technical solution adopted by the present invention is: an integrated data analysis method, the method comprising the following steps:

[0005] S100, acquiring all key signals used for performance analysis and function analysis in the system under test to obtain a key signal set.

[0006] S300, the hardware acceleration platform samples the signal in the system under test according to the key signal set to obtain a key signal data set.

[0007] S500, the hardware acceleration platform calls a processing function in the analysis module through an interface function, and the processing function is used to receive the key signal data set and save it as a data file.

[0008] S700: The analysis module performs performance analysis and / or function analysis based on the data file.

[0009] In addition, the present invention also provides a non-transitory computer-readable storage medium, in which at least one instruction or at least one program is stored, and the at least one instruction or the at least one program is loaded and executed by a processor to implement the above method.

[0010] In addition, the present invention also provides an electronic device, including a processor and the above-mentioned non-transitory computer-readable storage medium.

[0011] The present invention has at least the following beneficial effects:

[0012] The integrated data analysis method, device and storage medium provided by the embodiments of the present invention simultaneously and uniformly obtain the key signals for performance analysis and functional analysis, without the need to repeatedly obtain shared interface signals; the obtained key signals are then saved as data files through interface functions and processing functions, and data is not stored repeatedly during storage, thereby reducing data communication and storage overhead and solving the technical problem of data redundancy. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0014] Figure 1 A flow chart of an integrated data analysis method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0015] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0016] Unless otherwise defined, all technical and scientific terms used in the embodiments of the present invention have the same meanings as commonly understood by those skilled in the art.

[0017] See also Figure 1 , which shows an integrated data analysis method, the method comprising the following steps:

[0018] S100, acquiring all key signals used for performance analysis and function analysis in the system under test to obtain a key signal set.

[0019] The system under test is the system being tested or verified.

[0020] Optionally, the system to be tested is a SOC (System on Chip) system, a microprocessor or a multi-chip module. The SOC system at least includes a processor core, a memory subsystem, an input / output interface, etc. Other types of first systems to be tested also fall within the protection scope of the present invention.

[0021] Optionally, the processor core is a CPU, a GPU, a digital signal processor (DSP) and / or other types of processors. Other types of processor cores also fall within the protection scope of the present invention.

[0022] Among them, the key signals of performance analysis are core indicators that directly reflect system performance and are used to evaluate the system's operating efficiency, response speed, and resource utilization.

[0023] Optionally, the key signals used for performance analysis in the system under test include timing signals and / or communication delay signals collected and recorded through a dedicated interface. For example, timing signal data obtained through a clock synchronization interface, and communication delay signal data obtained through a delay measurement mechanism of a network interface. Other types of key signals used for performance analysis also fall within the scope of protection of the present invention.

[0024] Among them, the key signals of functional analysis are core indicators that directly reflect whether the system functions work as expected, and are used to verify whether the system correctly implements the functional requirements.

[0025] Optionally, the key signals for functional analysis in the system to be tested include input / output data streams transmitted and analyzed through corresponding interfaces, and / or state transition signals of a state machine. For example, input / output data stream signal data collected through a data transmission interface, and state transition signal data of a state machine recorded through a state monitoring interface. Other types of key signals for functional analysis also fall within the scope of protection of the present invention.

[0026] In the system under test, some key signals in performance analysis and functional analysis may be transmitted through shared interface signals. For example, the bandwidth and data flow statistics of the network interface are not only used for bandwidth utilization and delay evaluation in performance analysis, but also for data transmission and status monitoring in functional analysis. Interface signals play a key role in both analysis tasks.

[0027] The key signal set includes all key signals used for performance analysis and function analysis.

[0028] As a preferred embodiment, S100 further includes the step of selecting a key signal: configuring a selection signal for each key signal, and when the value of the selection signal is valid, selecting the current key signal; when the value of the selection signal is invalid, not selecting the current key signal.

[0029] Optionally, the step of selecting the key signal is implemented by conditional branching or macro definition. Other steps of implementing the selection of the key signal also fall within the protection scope of the present invention.

[0030] S300, the hardware acceleration platform samples the signal in the system under test according to the key signal set to obtain a key signal data set.

[0031] Among them, the hardware acceleration platform supports the verification and analysis of the SoC system. The system under test is the analysis object of the hardware acceleration platform. The system under test is usually responsible for performing core computing and processing tasks, and the hardware acceleration platform provides additional hardware resources and functions to enhance analysis capabilities and processing speed.

[0032] Optionally, the hardware acceleration platform includes hardware components such as FPGA, GPU, etc. Hardware acceleration platforms including other hardware components also fall within the protection scope of the present invention.

[0033] Among them, the key signal set is the signal that needs to be monitored and analyzed during the test process.

[0034] Among them, the key signal data is the value or state of the key signal monitored and recorded by the hardware acceleration platform at a specific time point or under conditions.

[0035] It should be noted that, for the shared interface signals of performance analysis and function analysis, the sampling method only needs to collect the signals once, and does not need to obtain them repeatedly, thus reducing the amount of data obtained.

[0036] S500, the hardware acceleration platform calls a processing function in the analysis module through an interface function, and the processing function is used to receive the key signal data set and save it as a data file.

[0037] Among them, the analysis module is the software side, which is used to receive and analyze the performance data and functional data based on the key signal data set.

[0038] The interface function is an interface between the hardware description language and the software side, and is used to transfer the key signal data set sampled by the hardware acceleration platform to the software side.

[0039] Optionally, the interface function is a DPI (Direct Programming Interface) interface, which is an interface in a hardware description language for interacting with a programming language on the software side. Other types of interface functions in a hardware description language for interacting with a programming language on the software side also fall within the protection scope of the present invention.

[0040] The processing function is part of the analysis module and is called by the interface function to receive key signal data sets and save them as data files.

[0041] Optionally, the processing function is a function written in C language. Functions written in other languages ​​also fall within the protection scope of the present invention.

[0042] As a preferred embodiment, S500 further includes the step of selecting a save file type:

[0043] S510: Obtain the values ​​of the specified performance configuration parameters and function configuration parameters, wherein the values ​​of the performance configuration parameters and function configuration parameters can be configured to be valid or invalid.

[0044] S520, according to the values ​​of the performance configuration parameters and the function configuration parameters, select to save the key signal data set as a performance data file and / or an independent function data file. When the performance configuration parameters are valid and the function configuration parameters are invalid, only the key signal data of the performance analysis is saved as the performance data file; when the function configuration parameters are valid and the performance configuration parameters are invalid, only the key signal data of the function analysis is saved as the function data file; when both the performance configuration parameters and the function configuration parameters are valid, all the data in the key signal data set are saved as an integrated file.

[0045] Optionally, the step of saving the file type is implemented by conditional branching or macro definition. Other steps of implementing the saving of the file type also fall within the protection scope of the present invention.

[0046] It should be noted that since the shared signal for performance analysis and functional analysis is collected only once, not only the amount of data collected is reduced, but also the overhead of data communication and storage capacity can be further reduced.

[0047] S700: The analysis module performs performance analysis and / or function analysis based on the data file.

[0048] It should be noted that the performance analysis can be performed based on an independent performance data file or an integrated file. Similarly, the function analysis can be performed based on an independent function data file or an integrated file.

[0049] As a preferred embodiment, S700 further includes parsing and extracting the data file through an extraction module to obtain key signal data for performance analysis and / or key signal data for function analysis.

[0050] It should be noted that the data collection and extraction methods for performance analysis and functional analysis are unified, which reduces the difficulty of use for users and is more convenient for users.

[0051] It should be noted that “and / or” means including only the items before “and / or”, only the items after “and / or”, or both the items before and after “and / or”.

[0052] The embodiment of the present invention performs lightweight processing on the hardware acceleration platform, allowing it to focus on sampling tasks, reduce unnecessary hardware resource consumption and delays, and improve sampling speed and accuracy. Heavy processing is performed on the software side, and performance data and functional data can be accurately extracted after receiving the sampling data, so that subsequent analysis is more accurate and targeted. The combination of software and hardware can not only improve the efficiency and performance of the system, but also provide higher flexibility and scalability, while reducing costs.

[0053] To sum up, the method provided by the embodiment of the present invention simultaneously and uniformly obtains the key signals for performance analysis and functional analysis, without the need to repeatedly obtain shared interface signals; the obtained key signals are then saved as data files through interface functions and processing functions, and data is not stored repeatedly during storage, thereby reducing data communication and storage overhead; when performance analysis and functional analysis are performed based on the data file, the user's difficulty of use is reduced due to the unified data collection and extraction methods adopted.

[0054] An embodiment of the present invention also provides a non-transitory computer-readable storage medium, which can be set in an electronic device to store at least one instruction or at least one program related to implementing a method in a method embodiment. The at least one instruction or the at least one program is loaded and executed by the processor to implement the method provided in the above embodiment.

[0055] An embodiment of the present invention further provides an electronic device, comprising a processor and the aforementioned non-transitory computer-readable storage medium.

[0056] An embodiment of the present invention further provides a computer program product, which includes program code. When the program product is run on an electronic device, the program code is used to enable the electronic device to execute the steps of the method according to various exemplary embodiments of the present invention described above in this specification.

[0057] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0058] Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. An integrated data analysis method, characterized in that: The method comprises the following steps: S100, acquiring all key signals used for performance analysis and function analysis in the system under test to obtain a key signal set; wherein the system under test is a system being tested or verified; S300, the hardware acceleration platform samples the signal in the system under test according to the key signal set to obtain a key signal data set; S500, the hardware acceleration platform calls a processing function in the analysis module through an interface function, and the processing function is used to receive the key signal data set and save it as a data file; S700, the analysis module performs performance analysis and / or function analysis based on the data file; S500 further includes the step of selecting a save file type: S510, obtaining values ​​of specified performance configuration parameters and function configuration parameters; S520, according to the values ​​of the performance configuration parameters and the function configuration parameters, select to save the key signal data set as a performance data file and / or an independent function data file; when the performance configuration parameters are valid and the function configuration parameters are invalid, only the key signal data of the performance analysis are saved as a performance data file; when the function configuration parameters are valid and the performance configuration parameters are invalid, only the key signal data of the function analysis are saved as a function data file; when both the performance configuration parameters and the function configuration parameters are valid, all the data in the key signal data set are saved as an integrated file.

2. The method according to claim 1, characterized in that S100 also includes the steps of selecting key signals: A selection signal is configured for each key signal. When the value of the selection signal is valid, the current key signal is selected; when the value of the selection signal is invalid, the current key signal is not selected.

3. The method according to claim 2, characterized in that The step of selecting the key signal is implemented through conditional branching or macro definition.

4. The method according to claim 1, characterized in that S700 also includes parsing and extracting the data file through an extraction module to obtain key signal data for performance analysis and / or key signal data for function analysis.

5. The method according to claim 1, characterized in that The interface function is a DPI function.

6. The method according to claim 1, characterized in that The system to be tested is a SOC system.

7. A non-transitory computer-readable storage medium, wherein at least one instruction or at least one program is stored in the storage medium, characterized in that: The at least one instruction or the at least one program is loaded and executed by the processor to implement the method according to any one of claims 1 to 6.

8. An electronic device, characterized in that: The invention comprises a processor and the non-transitory computer-readable storage medium as claimed in claim 7.

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