Buffer layer for photovoltaic devices with group V doping

Abstract

The invention relates to a buffer layer for photovoltaic devices with group V doping. In accordance with embodiments provided herein, a photovoltaic device may include a buffer layer adjacent to an absorber layer p-type doped with a group V dopant. The buffer layer may have a plurality of layers compatible with a group V dopant.

Description

This application is a divisional application of the parent application No. 201980086001.3. The application date of the parent application is October 23, 2019; the name of the invention is "Buffer layer for photovoltaic devices with group V doping". Technical Field

[0001] The present disclosure relates generally to photovoltaic devices having a buffer layer compatible with a Group V dopant, and more particularly to photovoltaic devices having a buffer layer compatible with a Group V dopant adjacent to an absorber layer p-doped with the Group V dopant. Background Art

[0002] Photovoltaic devices generate electricity by converting light into direct current using semiconductor materials that exhibit the photovoltaic effect. Certain types of semiconductor materials can be difficult to manufacture. For example, thin film layers provided adjacent to semiconductor materials can result in inoperability or instability of the photovoltaic device. Using group V elements as dopants for p-type semiconductor materials can be particularly difficult.

[0003] Therefore, there is a need for alternative buffer layers for use with absorber layers doped with Group V p-type dopants. Summary of the invention

[0004] Embodiments provided herein relate to photovoltaic devices having a buffer layer compatible with Group V dopants. These and additional features provided by the embodiments described herein will be more fully understood in view of the following detailed description taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] The embodiments illustrated in the drawings are illustrative and exemplary in nature and are not intended to limit the subject matter defined by the claims. The following detailed description of the illustrative embodiments may be understood when read in conjunction with the following drawings, in which like structures are indicated by like reference numerals, and in which: Figure 1 schematically depicts a cross-sectional view of a photovoltaic device according to one or more embodiments shown and described herein; Figure 2 schematically depicts a substrate according to one or more embodiments shown and described herein; Figure 3 schematically depicts a buffer layer according to one or more embodiments shown and described herein; Figure 4 schematically depicts a buffer layer according to one or more embodiments shown and described herein; Figure 5 schematically depicts a method for annealing a layer stack according to one or more embodiments shown and described herein; Figure 6A normalized photoluminescence spectrum is graphically depicted according to one or more embodiments shown and described herein. DETAILED DESCRIPTION

[0006] Embodiments of photovoltaic devices having a buffer layer compatible with a Group V dopant are provided. Various embodiments of photovoltaic devices and methods for forming photovoltaic devices are described in greater detail herein.

[0007] Reference now Figure 1 , schematically depicting an embodiment of a photovoltaic device 100. The photovoltaic device 100 can be configured to receive light and convert the light into an electrical signal, for example, photons can be absorbed from the light and converted into electrical signals via the photovoltaic effect. Therefore, the photovoltaic device 100 can define an energy side 102, which is configured to be exposed to a light source (such as the sun). The photovoltaic device 100 can also define an opposite side 104 that deviates from the energy side 102, for example, by a plurality of material layers. Note that the term "light" can refer to various wavelengths of the electromagnetic spectrum, such as, but not limited to, wavelengths in the ultraviolet (UV), infrared (IR), and visible parts of the electromagnetic spectrum. As used herein, "daylight" refers to light emitted by the sun. The photovoltaic device 100 may include a plurality of layers arranged between the energy side 102 and the opposite side 104. As used herein, the term "layer" refers to a certain thickness of material provided on a surface. Each layer can cover all (i.e., a continuous layer) or any portion (i.e., a discontinuous layer) of the surface. For example, a continuous layer may be substantially uninterrupted, and a discontinuous layer may have one or more voids formed through the layer that are occupied by different materials.

[0008] Common Reference Figure 1 and 2 , the layers of the photovoltaic device 100 may include a substrate 110 configured to facilitate transmission of light into the photovoltaic device 100. The substrate 110 may be disposed on an energy side 102 of the photovoltaic device 100. The substrate 110 may have a first surface 112 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 114 substantially facing the opposite side 104 of the photovoltaic device 100. One or more layers of material may be disposed between the first surface 112 and the second surface 114 of the substrate 110.

[0009] The substrate 110 may include a transparent layer 120 having a first surface 122 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 124 substantially facing the opposite side 104 of the photovoltaic device 100. In some embodiments, the second surface 124 of the transparent layer 120 may form the second surface 114 of the substrate 110. The transparent layer 120 may be formed of a substantially transparent material such as glass. Suitable glass may include soda-lime glass or any glass with reduced iron content. The transparent layer 120 may have any suitable transparency, including in some embodiments from about 250 nm to about 1,300 nm, or in other embodiments, or from about 250 nm to about 950 nm. The transparent layer 120 may also have any suitable transmittance percentage, including, for example, in one embodiment, more than about 50%, in another embodiment, more than about 60%, in yet another embodiment, more than about 70%, in another embodiment, more than about 80%, or in yet another embodiment, more than about 85%. In one embodiment, the transparent layer 120 may be formed of glass having a transmittance of about 90% or more. Optionally, the substrate 110 may include a coating 126 applied to the first surface 122 of the transparent layer 120. The coating 126 may be configured to interact with light or improve the durability of the substrate 110, such as, but not limited to, an anti-reflective coating, an anti-fouling coating, or a combination thereof.

[0010] Reference again Figure 1 , the photovoltaic device 100 may include a barrier layer 130 configured to mitigate diffusion of contaminants (e.g., sodium) from the substrate 110, which may cause degradation or delamination. The barrier layer 130 may have a first surface 132 that is substantially oriented toward the energy side 102 of the photovoltaic device 100 and a second surface 134 that is substantially oriented toward the opposite side 104 of the photovoltaic device 100. In some embodiments, the barrier layer 130 may be provided adjacent to the substrate 110. For example, the first surface 132 of the barrier layer 130 may be provided on the second surface 114 of the substrate 100. As used herein, the phrase "adjacent" refers to two layers being arranged continuously and without any intervening material between at least a portion of the layers.

[0011] In general, the barrier layer 130 can be substantially transparent, thermally stable, have a reduced number of pinholes, and have high sodium-blocking capabilities and good adhesion properties. Alternatively or additionally, the barrier layer 130 can be configured to apply color suppression to the light. The barrier layer 130 can include one or more layers of suitable materials, including but not limited to tin oxide, silicon dioxide, aluminum-doped silicon oxide, silicon oxide, silicon nitride, or aluminum oxide. The barrier layer 130 can have any suitable thickness defined by the first surface 132 and the second surface 134, including, for example, in one embodiment, more than about 100%. In another embodiment, more than about Or in another embodiment, less than about

[0012] Still reference Figure 1 , the photovoltaic device 100 may include a transparent conductive oxide (TCO) layer 140 configured to provide an electrical contact to transport charge carriers generated by the photovoltaic device 100. The TCO layer 140 may have a first surface 142 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 144 substantially facing the opposite side 104 of the photovoltaic device 100. In some embodiments, the TCO layer 140 may be provided adjacent to the barrier layer 130. For example, the first surface 142 of the TCO layer 140 may be provided on the second surface 134 of the barrier layer 130. In general, the TCO layer 140 may be formed of one or more layers of n-type semiconductor material that is substantially transparent and has a wide bandgap. Specifically, the wide bandgap may have an energy value that is larger than the energy of a photon of light, which may mitigate undesirable light absorption. The TCO layer 140 may include one or more layers of suitable materials, including, but not limited to, tin oxide, fluorine-doped tin oxide (e.g., F:SnO, F:SnO2, or F:SnO x ), indium tin oxide or cadmium stannate.

[0013] The photovoltaic device 100 may include a buffer layer 150 configured to provide a less conductive layer between the TCO layer 140 and any adjacent semiconductor layers. The buffer layer 150 may have a first surface 152 that is substantially oriented toward the energy side 102 of the photovoltaic device 100 and a second surface 154 that is substantially oriented toward the opposite side 104 of the photovoltaic device 100. In some embodiments, the buffer layer 150 may be provided adjacent to the TCO layer 140. For example, the first surface 152 of the buffer layer 150 may be provided on the second surface 144 of the TCO layer 140. The buffer layer 150 may include a material having a higher resistivity than the TCO layer 140, including, but not limited to, intrinsic tin oxide (SnO, SnO2, or SnO x), magnesium oxide (MgO), zinc magnesium oxide (e.g., Zn 1- x Mg x O), silicon dioxide (SiO2), manganese oxide (MnO x ), silicon nitride (SiN x ) or any combination thereof. As used herein, manganese oxide (MnO x ) comprises a compound of manganese and oxygen, wherein the manganese is present in any suitable oxidation state. In some embodiments, MnO x The x of MnO may be greater than or equal to about 1, for example but not limited to greater than or equal to about 1 and less than or equal to about 2. x Compounds include, but are not limited to, MnO (corresponding to x=1), MnO2 (corresponding to x=2), Mn2O3 (corresponding to x=1.5), or Mn3O4 (corresponding to x=1.3). Exemplary MnO x The compound may exist as a single phase or as a multiphase mixture, and the multiphases may each exist with or without some amorphous components of Mn and O.

[0014] In some embodiments, the material of buffer layer 150 can be configured to substantially match the band gap of an adjacent semiconductor layer (e.g., an absorber). Buffer layer 150 can have a thickness 156 between first surface 152 and second surface 154. Thickness 156 can span any suitable distance, including, for example, in one embodiment, greater than about 0.5 nanometers (nm), in another embodiment, between about 1 nm and about 200 nm, in another embodiment, between about 1 nm and about 100 nm, or in another embodiment, between about 1 nm and about 10 nm, or in yet another embodiment, between about 1 nm and about 3 nm. In some embodiments, buffer layer 150 or its layers can be discontinuous. For example, buffer layer 150 can include MnO x layer, which is essentially discontinuous. x When the layer is discontinuous, MnO x The layers can be characterized using inductively coupled plasma-optical emission spectroscopy (ICP-OES). Specifically, MnO x The layer may have a content of at least about 0.05 μg / cm 2 The amount of Mn used, for example, in one embodiment, is greater than or equal to about 0.05 μg / cm 2 and less than or equal to about 15 μg / cm 2 , in another embodiment, greater than or equal to about 0.1 μg / cm 2 and less than or equal to about 12 μg / cm 2 , or in another embodiment, greater than or equal to about 0.2 μg / cm2 and less than or equal to about 6 μg / cm 2 .

[0015] Common Reference Figure 1 and 3 , the buffer layer 150 may include a plurality of layers 200. Specifically, the plurality of layers 200 of the buffer layer 150 may include a base layer 210 disposed at a first surface 152 of the buffer layer 150. Thus, the base layer 210 may be provided adjacent to the TCO layer 140. In one embodiment, the first surface 152 of the buffer layer 150 may be a surface of the base layer 210. The base layer 210 may have a second surface 214 that is substantially toward the opposite side 104 of the photovoltaic device 100. The base layer 210 may have a thickness 216 between the first surface 152 and the second surface 214. In some embodiments, the thickness 216 of the base layer 210 may span a majority of the thickness 156 of the buffer layer 150.

[0016] The plurality of layers 200 of the buffer layer 150 may include an interface layer 220 disposed at the second surface 154 of the buffer layer 150. Typically, the interface layer 220 may be positioned further away from the energy side 102 of the photovoltaic device relative to the base layer 210. The interface layer 220 may have a first surface 224 that is substantially oriented toward the energy side 102 of the photovoltaic device 100. In some embodiments, the second surface 154 of the buffer layer 150 may be a surface of the interface layer 220. The interface layer 220 may have a thickness 226 between the first surface 222 and the second surface 154. In some embodiments, the thickness 226 of the interface layer 220 may be less than the thickness 216 of the base layer 210.

[0017] According to the embodiments provided herein, the base layer 210 and the interface layer 220 can be made of different materials. For example, in some embodiments, the base layer 210 can include tin oxide (SnO, SnO2 or SnO x ), and the interface layer 220 may include magnesium oxide (MgO), zinc magnesium oxide (eg, Zn 1-x Mg x O), silicon dioxide (SiO2), manganese oxide (MnO x ) and silicon nitride (SiN x )

[0018] Common Reference Figure 1 and 4, the plurality of layers 200 of the buffer layer 150 may include one or more intermediate layers 230 disposed between the base layer 210 and the interface layer 220. The one or more intermediate layers 230 may have a first surface 232 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 234 substantially facing the opposite side 104 of the photovoltaic device 100. The one or more intermediate layers 230 may be provided adjacent to the base layer 210 and the interface layer 220. Thus, the first surface 232 of the one or more intermediate layers 230 may be provided on the second surface 214 of the base layer 210, and the second surface 234 of the one or more intermediate layers 230 may be provided on the first surface 224 of the interface layer 210. The one or more intermediate layers 230 may have a thickness 236 between the first surface 232 and the second surface 234. In some embodiments, the thickness 236 of the one or more intermediate layers 230 may be less than the thickness 216 of the base layer 210.

[0019] According to embodiments of the present disclosure, one or more intermediate layers 230 may be composed of a different material than base layer 210 and interface layer 220. For example, in some embodiments, one or more intermediate layers 230 may include zinc magnesium oxide (e.g., Zn 1-x Mg x O).

[0020] Reference again Figure 1 , the photovoltaic device 100 may include an absorber layer 160 configured to cooperate with another layer and form a pn junction within the photovoltaic device 100. Thus, absorbed photons of light may release electron-hole pairs and generate a flow of carriers, which may generate electricity. The absorber layer 160 may have a first surface 162 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 164 substantially facing the opposite side 104 of the photovoltaic device 100. The thickness of the absorber layer 160 may be defined between the first surface 162 and the second surface 164. The thickness of the absorber layer 160 may be between about 0.5 μm and about 10 μm, for example, in one embodiment, between about 1 μm and about 7 μm, or in another embodiment, between about 1.5 μm and about 4 μm.

[0021] According to embodiments described herein, the absorber layer 160 may be formed of a p-type semiconductor material having an excess of positive charge carriers (i.e., holes or acceptors). The absorber layer 160 may include any suitable p-type semiconductor material, such as a II-VI semiconductor. Specific examples include, but are not limited to, semiconductor materials comprising cadmium, tellurium, selenium, or any combination thereof. Suitable examples include, but are not limited to, ternary compounds of cadmium, selenium, and tellurium (e.g., CdSe x Te 1-x ), or a compound comprising cadmium, selenium, tellurium and one or more additional elements.

[0022] In embodiments where the absorber layer 160 comprises tellurium and cadmium, the atomic % of tellurium can be greater than or equal to about 25 atomic % and less than or equal to about 50 atomic %, such as, in one embodiment, greater than about 30 atomic % and less than about 50 atomic %, in another embodiment, greater than about 40 atomic % and less than about 50 atomic %, or in yet another embodiment, greater than about 47 atomic % and less than about 50 atomic %. Alternatively or additionally, the atomic % of tellurium in the absorber layer 160 can be greater than about 45 atomic %, such as, in one embodiment, greater than about 49%. Note that the atomic % described herein represents the absorber layer 160 as a whole, and the atomic % of a material at a particular location within the absorber layer 160 can vary with thickness compared to the overall composition of the absorber layer 160.

[0023] In embodiments where absorber layer 160 includes selenium and tellurium, the atomic % of selenium in absorber layer 160 can be greater than about 0 atomic % and less than or equal to about 25 atomic %, such as, in one embodiment, greater than about 1 atomic % and less than about 20 atomic %, in another embodiment, greater than about 1 atomic % and less than about 15 atomic %, or in yet another embodiment, greater than about 1 atomic % and less than about 8 atomic %. Note that the concentration of tellurium, selenium, or both can vary throughout the thickness of absorber layer 160. For example, when absorber layer 160 includes a compound containing x mole fraction of selenium and 1-x mole fraction of tellurium (Se 2 O ) , the concentration of selenium in absorber layer 160 can be greater than about 0 atomic % and less than ... x Te 1-x ), x may vary in the absorption layer 160 with a distance from the first surface 162 of the absorption layer 160 .

[0024] Still reference Figure 1 , the absorber layer 160 can be doped with a dopant configured to manipulate the charge carrier concentration. In some embodiments, the absorber layer 160 can be doped with a Group I or Group V dopant, such as copper, arsenic, phosphorus, antimony, or a combination thereof. The total density of the dopant within the absorber layer 160 can be controlled. In some embodiments, the absorber layer 160 can have a carbon content of at least about 1×10 16 Atom / cm 3 The average concentration of a single Group V dopant is, for example, at least about 5 x 10 16 Atom / cm 3 In another embodiment, about 9 x 10 16 Atom / cm 3 and about 7x 10 18 Atom / cm 3 or in another embodiment, between about 1 x 10 17 Atom / cm 3 and about 4x 10 18 Atom / cm3 Alternatively or additionally, in some embodiments, the peak concentration of the group V dopant in the absorber layer 160 may be at least about 1 x 10 16 Atom / cm 3 Alternatively or additionally, the amount of dopant can vary with distance from the first surface 162 of the absorber layer 160 .

[0025] According to the embodiments provided herein, a pn junction can be formed by providing an absorber layer 160 sufficiently close to a portion of the photovoltaic device 100 having an excess of negative charge carriers (i.e., electrons or donors). In some embodiments, the absorber layer 160 can be provided adjacent to the n-type semiconductor material. Alternatively, one or more intervening layers can be provided between the absorber layer 160 and the n-type semiconductor material. In some embodiments, the absorber layer 160 can be provided adjacent to the buffer layer 150. For example, the first surface 162 of the absorber layer 160 can be provided on the second surface 154 of the buffer layer 150.

[0026] The photovoltaic device 100 may include a back contact layer 180 configured to mitigate undesirable alteration of dopants and provide electrical contact to the absorber layer 160. The back contact layer 180 may have a first surface 182 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 184 substantially facing the opposite side 104 of the photovoltaic device 100. The thickness of the back contact layer 180 may be defined between the first surface 182 and the second surface 184. The thickness of the back contact layer 180 may be between about 5 nm and about 200 nm, for example, between about 10 nm and about 50 nm in one embodiment.

[0027] In some embodiments, the back contact layer 180 can be provided adjacent to the absorber layer 160. For example, the first surface 182 of the back contact layer 180 can be provided on the second surface 164 of the absorber layer 160. In some embodiments, the back contact layer 180 can include a binary or ternary combination of materials from Groups I, II, and VI, for example, including one or more layers of zinc, copper, cadmium, and tellurium in various compositions. Additional exemplary materials include, but are not limited to, zinc telluride doped with copper telluride, or zinc telluride alloyed with copper telluride.

[0028] The photovoltaic device 100 may include a conductive layer 190 configured to provide electrical contact with the absorber layer 160. The conductive layer 190 may have a first surface 192 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 194 substantially facing the opposite side 104 of the photovoltaic device 100. In some embodiments, the conductive layer 190 may be provided adjacent to the back contact layer 180. For example, the first surface 192 of the conductive layer 190 may be provided on the second surface 184 of the back contact layer 180. The conductive layer 190 may include any suitable conductive material, such as one or more layers of nitrogen-containing metals, silver, nickel, copper, aluminum, titanium, palladium, chromium, molybdenum, gold, etc. Suitable examples of nitrogen-containing metal layers may include aluminum nitride, nickel nitride, titanium nitride, tungsten nitride, selenium nitride, tantalum nitride, or vanadium nitride.

[0029] The photovoltaic device 100 may include a back support 196 configured to cooperate with the substrate 110 to form a housing of the photovoltaic device 100. The back support 196 may be disposed at the opposite side 102 of the photovoltaic device 100. For example, the back support 196 may be formed adjacent to the conductive layer 190. The back support 196 may include any suitable material including, for example, glass (e.g., soda-lime glass).

[0030] Common Reference Figure 1 and 5 , the manufacture of the photovoltaic device 100 generally includes sequentially arranging functional layers or layer precursors in a "stack" of layers by one or more thin film deposition processes, including but not limited to sputtering, spraying, evaporation, molecular beam deposition, pyrolysis, closed space sublimation (CSS), pulsed laser deposition (PLD), chemical vapor deposition (CVD), electrochemical deposition (ECD), atomic layer deposition (ALD), or vapor transport deposition (VTD). In some embodiments, the partially formed photovoltaic device 240 can be subjected to an annealing process to improve the functionality of the absorber layer 160. For example, the partially formed photovoltaic device 240 can include the absorber layer 160 adjacent to the layer stack 204. The layer stack 204 can include one or more layers of the photovoltaic device 100 arranged between the absorber layer 160 and the energy side 102.

[0031] The partially formed photovoltaic device 240 can be annealed in a processing chamber 244, which provides a reducing ambient environment 246, i.e., an environment with less than 500 ppm oxygen. During the annealing process, the absorber layer 160 can be in contact with an annealing compound 248 including cadmium chloride (CdCl2). Generally, the annealing process includes heating the absorber layer 160 (e.g., a polycrystalline semiconductor material) for a sufficient time and temperature to promote recrystallization of the absorber layer 160. In addition, the heated, reducing ambient environment 246 and the annealing compound 248 can cooperate to promote grain growth and activation of group V dopants in the absorber layer 160, such as nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), or a combination thereof. In some embodiments, the compound (e.g., MnO2) in the buffer layer 150 is preferably a crystalline semiconductor material. x ) can be changed during the annealing process. Specifically, before annealing, MnO x It may be present, for example, as MnO2 (corresponding to x=2), Mn3O4 (corresponding to x=1.3), or a combination thereof. Alternatively or additionally, prior to annealing, MnO x An amorphous component may include Mn and O. After annealing, at least a portion of the MnO x The oxidation state can be changed by different MnO x to prove the existence of the compound.

[0032] In some cases, the buffer layer 150 may also be doped with a group V dopant. For example, the group V dopant may diffuse into the buffer layer 150. Thus, in some embodiments, the peak concentration of the group V dopant within the buffer layer 150 may be at least about 1 x 10 16 Atom / cm 3 Therefore, MnO x The layers may contain a Group V dopant. In alternative embodiments, one or more layers of the buffer layer 150 may be free of a Group V dopant, ie, diffusion may be mitigated.

[0033] The interface region 158 may include an interface of a first surface 162 of the absorber layer 160 and a second surface 154 of the buffer layer 150. For example, the interface region 158 may start from the first surface 152 of the buffer layer 150 and extend into the absorber layer 160. The interface region 158 may have a thickness of less than or equal to about 500 nm, for example, about 0.5 nm to 500 nm in one embodiment, or about 1 nm to 100 nm in another embodiment. Applicants have discovered that when an annealing process is performed, the buffer layer 150 performs in an unexpected manner. Without being bound by theory, it is believed that the chemistry of the buffer layer 150 and the absorber layer 160 may result in undesirable defects within the interface region 158. Many chemical compositions may be more susceptible to defects, for example, during activation of dopants in a reducing ambient environment 246. Such defects may reduce the efficiency of the photovoltaic device 100.

[0034] The efficiency of the photovoltaic device 100 can be improved by including MnO in the buffer layer 150. x For example, MnO x The layer is adjacent to or sufficiently close to the first surface 162 of the absorber layer 160. That is, one or more of the plurality of layers 200 of the buffer layer may be disposed between the MnO x layer and the first surface 162 of the absorber layer 160. Therefore, MnO x The layer can be within about 200 nm of the first surface 162 of the absorber layer 160, for example, less than about 100 nm in one embodiment, less than about 80 nm in another embodiment, less than about 35 nm in yet another embodiment, and less than about 15 nm in yet another embodiment. Example

[0035] Comparative Example: A film stack was prepared on a glass substrate. The film stack included a TCO layer of fluorine-doped tin oxide formed on the glass substrate, a buffer layer of tin oxide formed on the TCO layer, and an As:CdSeTe absorber layer. The stack was annealed with an annealing compound including cadmium chloride (CdCl2) in a reducing ambient environment.

[0036] Example: Example 1 was formed in the same manner as the comparative example, wherein the buffer layer was changed to have a tin oxide base layer and Zn 1-x Mg x Example 2 was formed in the same manner as the comparative example, wherein the buffer layer was changed to have a tin oxide base layer and a SiO2 interface layer. Example 3 was formed in the same manner as the comparative example, wherein the buffer layer was changed to have a tin oxide base layer, a Zn 1-x Mg xExample 4 was formed in the same manner as the comparative example, wherein the buffer layer was changed to have a tin oxide base layer and a MnO x Example 5 was formed in the same manner as the comparative example, wherein the buffer layer was changed to have Zn 1-x Mg x O base layer and SiO2 interface layer. A number of samples of comparative examples and embodiments were prepared and characterized using secondary ion mass spectrometry (SIMS).

[0037] Table 1 Common Reference Figure 1 and 6 , the photoluminescence spectrum is used to characterize the recombination at the interface of the buffer layer and the absorber layer of the comparative examples and examples 1-4. In general, the higher luminescence intensity ( Figure 1 ) may correspond to less carrier recombination at the interface of the buffer layer and the absorber layer. Thus, a higher intensity may correspond to a higher efficiency of the photovoltaic device 100.

[0038] The photoluminescence intensity (PLI) of the comparative examples and examples 1-4 is plotted on Figure 6 . Specifically, PLI spectrum 250 corresponds to the comparative example, PLI spectrum 252 corresponds to Example 1, PLI spectrum 254 corresponds to Example 2, PLI spectrum 256 corresponds to Example 3, and PLI spectrum 258 corresponds to Example 4. Each spectrum 250, 252, 254, 256, 258 is normalized to the peak value of PLI spectrum 250. PLI spectrum 252, PLI spectrum 254, PLI spectrum 256, and PLI spectrum 258 confirm that the performance of Examples 1-4 is improved relative to the comparative example. Specifically, PLI spectrum 252 corresponds to Example 1 with respect to the comparative example, and the peak intensity is improved by about 700%. PLI spectrum 254 corresponds to Example 2 with respect to the comparative example, and the peak intensity is improved by about 1,000%. PLI spectra 256, 258 correspond to Examples 3 and 4 with respect to the comparative example, and the peak intensity is improved by about 1,500%. Further testing confirms the performance improvement of Example 5 similar to that described for Example 3.

[0039] Various examples of Example 4 were analyzed using X-ray diffraction (XRD) to determine the composition of the buffer layer 150 before and after the annealing process. In one example, the buffer layer 150 includes Mn3O4 before the annealing process, and includes MnO and Mn3O4 after the annealing process. In another example, the buffer layer 150 includes Mn2O3 before the annealing process, and includes Mn3O4 after the annealing process. In another example, the buffer layer 150 includes MnO2 and Mn3O4 before the annealing process, and includes Mn3O4 (without MnO2) after the annealing process. In yet another example, the buffer layer 150 includes MnO2 before the annealing process, and includes MnO2 and Mn3O4 after the annealing process.

[0040] According to embodiments provided herein, a photovoltaic device may include an absorber layer disposed on a buffer layer. The absorber layer may have a first surface and a second surface. The absorber layer may include cadmium and tellurium. The absorber layer may be doped with a group V dopant. The buffer layer may include MnO x layer.

[0041] According to embodiments provided herein, a method for annealing a partially formed photovoltaic device may include contacting an absorber layer with an annealing compound including cadmium chloride. The partially formed photovoltaic device may include an absorber layer disposed on a buffer layer. The absorber layer may include cadmium and tellurium. The buffer layer may include MnO x The method may include heating the absorber layer for a sufficient time and temperature to promote recrystallization of the absorber layer. The method may include diffusing the group V dopant through the absorber layer and into the buffer layer.

[0042] Note that the terms "substantially" and "about" may be used herein to represent the inherent degree of uncertainty that may be attributed to any quantitative comparison, value, measurement, or other expression. These terms are also used herein to represent the degree by which a quantitative expression may vary from a stated referenced value without resulting in a change in the basic function of the subject matter at issue.

[0043] Although specific embodiments have been illustrated and described herein, it will be appreciated that various other changes and modifications may be made without departing from the spirit and scope of the claimed subject matter. In addition, although various aspects of the claimed subject matter have been described herein, such aspects need not be used in combination. Therefore, the appended claims are intended to cover all such changes and modifications within the scope of the claimed subject matter.

Claims

1. A photovoltaic device comprising an absorber layer disposed on a buffer layer, wherein: The absorbent layer has a first surface and a second surface; The absorber layer comprises cadmium and tellurium; The absorption layer is doped with a Group V dopant; and The buffer layer includes MnO x layer.

2. The photovoltaic device of claim 1, wherein the MnO x The layer is adjacent to the first surface of the absorbent layer.

3. The photovoltaic device according to claim 1 or 2, wherein the MnO x The layer has a thickness between 1 nm and 3 nm.

4. The photovoltaic device of any one of claims 1 to 3, wherein the peak concentration of the Group V dopant in the absorber layer is at least 1 x 10 16 Atom / cm 3 .

5. The photovoltaic device according to any one of claims 1 to 4, wherein: The buffer layer has a first surface and a second surface adjacent to the absorbent layer; The buffer layer includes a base layer disposed at a first surface of the buffer layer and an interface layer disposed at a second surface of the buffer layer; The base layer of the buffer layer comprises tin oxide; and The interface layer of the buffer layer is composed of a material different from that of the base layer of the buffer layer. The photovoltaic device of claim 5 , wherein the interfacial layer of the buffer layer comprises magnesium oxide.

7. The photovoltaic device of claim 5, wherein the interfacial layer of the buffer layer comprises zinc magnesium oxide. The photovoltaic device of claim 5 , wherein the interfacial layer of the buffer layer comprises silicon dioxide.

9. The photovoltaic device of claim 5, wherein the interface layer of the buffer layer is the MnO x layer.

10. The photovoltaic device of claim 5, wherein the interfacial layer of the buffer layer comprises silicon nitride.

11. The photovoltaic device of claim 5, wherein a base layer of the buffer layer is thicker than an interface layer of the buffer layer.

12. The photovoltaic device of claim 5, wherein: The buffer layer includes an intermediate layer disposed between a base layer of the buffer layer and an interface layer of the buffer layer; and The intermediate layer of the buffer layer is made of a material different from that of the base layer of the buffer layer and the interface layer of the buffer layer.

13. The photovoltaic device of claim 12, wherein the base layer of the buffer layer is thicker than the middle layer of the buffer layer.

14. The photovoltaic device of claim 12, wherein the intermediate layer of the buffer layer comprises zinc magnesium oxide.

15. The photovoltaic device of claim 14, wherein the interfacial layer of the buffer layer comprises silicon dioxide.

16. The photovoltaic device of any one of claims 1 to 15, wherein the MnO x The layer is within 200 nm of the first surface of the absorbing layer.

17. The photovoltaic device of any one of claims 1 to 16, wherein the MnO x The layers are discontinuous.

18. The photovoltaic device of claim 17, wherein the MnO x The layer has at least 0.05 μg / cm 2 The amount of Mn.

19. The photovoltaic device of any one of claims 1 to 18, wherein the MnO x The layer contains MnO2.

20. The photovoltaic device of any one of claims 1 to 18, wherein the MnO x The layer contains Mn2O3.

21. The photovoltaic device of any one of claims 1 to 18, wherein the MnO x The layer contains Mn3O4.

22. The photovoltaic device of any one of claims 1 to 21, wherein the MnO x The layer has a thickness between 1 nm and 10 nm.

23. The photovoltaic device of any one of claims 1 to 22, wherein the MnO x The x of a layer is greater than or equal to 1 and less than or equal to 2.

24. The photovoltaic device of any one of claims 1-23, wherein the buffer layer is provided adjacent to the transparent conductive oxide layer.

25. The photovoltaic device of claim 24, wherein the transparent conductive oxide layer comprises cadmium stannate, and wherein the MnO x The layer is adjacent to the absorbent layer.

26. The photovoltaic device of claim 24, wherein the transparent conductive oxide layer comprises fluorine-doped tin oxide, and wherein the MnO x The layer is adjacent to the absorbent layer.

27. The photovoltaic device of claim 24, wherein: The transparent conductive oxide layer comprises fluorine-doped tin oxide; The buffer layer has a first surface and a second surface adjacent to the absorbent layer; The buffer layer includes a base layer disposed at a first surface of the buffer layer and an interface layer disposed at a second surface of the buffer layer; The base layer of the buffer layer comprises tin oxide; and The interface layer of the buffer layer is the MnO x layer.

28. The photovoltaic device of claim 24, wherein: The transparent conductive oxide layer comprises fluorine-doped tin oxide; The buffer layer has a first surface and a second surface adjacent to the absorbent layer; The buffer layer includes a base layer disposed at a first surface of the buffer layer and an interface layer disposed at a second surface of the buffer layer; The buffer layer includes an intermediate layer disposed between a base layer of the buffer layer and an interface layer of the buffer layer; The base layer of the buffer layer comprises tin oxide; and The middle layer of the buffer layer is the MnO x layer; and The interface layer of the buffer layer comprises silicon dioxide.

29. The photovoltaic device of claim 24, wherein the transparent conductive oxide layer comprises indium tin oxide, and wherein the MnO x The layer is adjacent to the absorbent layer.

30. The photovoltaic device of claim 29, wherein: The buffer layer has a first surface and a second surface adjacent to the absorbent layer; The buffer layer includes a base layer disposed at a first surface of the buffer layer; and The base layer includes zinc magnesium oxide.

31. A method for annealing a partially formed photovoltaic device, the partially formed photovoltaic device comprising an absorber layer disposed on a buffer layer, wherein the absorber layer comprises cadmium and tellurium, and the buffer layer comprises MnO x layer, the method comprising: contacting the absorber layer with an annealing compound including cadmium chloride; as well as heating the absorber layer for a sufficient time and temperature to promote recrystallization of the absorber layer; and A Group V dopant is diffused through the absorber layer and into the buffer layer.

32. The method of claim 31, comprising changing the MnO x Oxidation state of the layer.

33. The method of any one of claims 31-32, wherein the MnO x The layer is adjacent to the first surface of the absorbent layer.

34. The method of any one of claims 31-33, wherein the MnO x The layer has a thickness between 1 nm and 3 nm.

35. The method of any one of claims 31-34, wherein the peak concentration of the Group V dopant in the absorber layer is at least 1 x 10 16 Atom / cm 3 .

36. The method of any one of claims 31-35, wherein: The buffer layer has a first surface and a second surface adjacent to the absorbent layer; The buffer layer includes a base layer disposed at a first surface of the buffer layer and an interface layer disposed at a second surface of the buffer layer; The base layer of the buffer layer comprises tin oxide; and The interface layer of the buffer layer is composed of a material different from that of the base layer of the buffer layer.

37. The method of claim 36, wherein the interfacial layer of the buffer layer comprises magnesium oxide.

38. The method of claim 36, wherein the interfacial layer of the buffer layer comprises zinc magnesium oxide.

39. The method of claim 36, wherein the interfacial layer of the buffer layer comprises silicon dioxide.

40. The method of claim 36, wherein the interface layer of the buffer layer is the MnO x layer.

41. The method of claim 36, wherein the interfacial layer of the buffer layer comprises silicon nitride.

42. The method of claim 36, wherein a base layer of the buffer layer is thicker than an interface layer of the buffer layer.

43. The method of any one of claims 36-42, wherein: The buffer layer includes an intermediate layer disposed between a base layer of the buffer layer and an interface layer of the buffer layer; and The intermediate layer of the buffer layer is made of a material different from that of the base layer of the buffer layer and the interface layer of the buffer layer.

44. The method of claim 43, wherein a base layer of the buffer layer is thicker than an intermediate layer of the buffer layer.

45. The method of any one of claims 43-44, wherein the intermediate layer of the buffer layer comprises zinc magnesium oxide.

46. ​​The method of any one of claims 31-45, wherein the MnO x The layer is within 200 nm of the first surface of the absorbing layer.

47. The method of any one of claims 31-46, wherein the MnO x The layers are discontinuous.

48. The method of any one of claims 31-47, wherein the MnO x The layer has at least 0.05 μg / cm 2 The amount of Mn.

49. The method of any one of claims 31-48, wherein the MnO x The layer contains MnO.

50. The method of any one of claims 31-48, wherein the MnO x The layer contains MnO2.

51. The method of any one of claims 31-48, wherein the MnO x The layer contains Mn2O3.

52. The method of any one of claims 31-48, wherein the MnO x The layer contains Mn3O4.

53. The method of any one of claims 31-52, wherein the absorber layer comprises selenium.

54. The method of any one of claims 31-33 or 35-53, wherein the MnO x The layer has a thickness between 1 nm and 10 nm.

55. The method of any one of claims 31-48 or 53-54, wherein the MnO x The x of a layer is greater than or equal to 1 and less than or equal to 2.

56. The method of any of claims 31-35 or 46-55, wherein the buffer layer is provided adjacent to a transparent conductive oxide layer.

57. The method of claim 56, wherein the transparent conductive oxide layer comprises cadmium stannate, and wherein the MnO x The layer is adjacent to the absorbent layer.

58. The method of claim 56, wherein the transparent conductive oxide layer comprises fluorine-doped tin oxide, and wherein the MnO x The layer is adjacent to the absorbent layer.

59. The method of claim 56, wherein: The transparent conductive oxide layer comprises fluorine-doped tin oxide; The buffer layer has a first surface and a second surface adjacent to the absorbent layer; The buffer layer includes a base layer disposed at a first surface of the buffer layer and an interface layer disposed at a second surface of the buffer layer; The base layer of the buffer layer comprises tin oxide; and The interface layer of the buffer layer is the MnO x layer.

60. The method of claim 56, wherein: The transparent conductive oxide layer comprises fluorine-doped tin oxide; The buffer layer has a first surface and a second surface adjacent to the absorbent layer; The buffer layer includes a base layer disposed at a first surface of the buffer layer and an interface layer disposed at a second surface of the buffer layer; The buffer layer includes an intermediate layer disposed between a base layer of the buffer layer and an interface layer of the buffer layer; The base layer of the buffer layer comprises tin oxide; and The middle layer of the buffer layer is the MnO x layer; and The interface layer of the buffer layer comprises silicon dioxide.

61. The method of claim 56, wherein the transparent conductive oxide layer comprises fluorine-doped tin oxide, and wherein the MnO x The layer is adjacent to the absorbent layer.

62. The method of claim 56, wherein: The transparent conductive oxide layer comprises fluorine-doped tin oxide; The buffer layer has a first surface and a second surface adjacent to the absorbent layer; The buffer layer includes a base layer disposed at a first surface of the buffer layer and an interface layer disposed at a second surface of the buffer layer; The base layer of the buffer layer comprises tin oxide; and The interface layer of the buffer layer is the MnO x layer.

63. The method of claim 56, wherein the transparent conductive oxide layer comprises indium tin oxide, and wherein the MnO x The layer is adjacent to the absorbent layer.

64. The method of claim 63, wherein: The buffer layer has a first surface and a second surface adjacent to the absorbent layer; The buffer layer includes a base layer disposed at a first surface of the buffer layer; and The base layer includes zinc magnesium oxide.

65. The method of any one of claims 31-64, wherein the MnO x The layer contains the Group V dopant.

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