A semiconductor preform based on shadow mask process and a method for preparing the preform

Abstract

The present invention discloses a semiconductor preform based on a shadow mask process and a method for preparing the preform, which is applied to the field of semiconductor preparation. The preform comprises: a semiconductor device to be processed and a shadow mask arranged in a stacked manner; the semiconductor device to be processed is close to the first surface of the shadow mask, and is provided with a region to be processed, and the shadow mask is formed with a first through hole exposing the region to be processed correspondingly along the stacking direction; the shadow mask is close to the second surface of the semiconductor device to be processed, and is connected to the semiconductor device to be processed through a patterned thermal stripping adhesive; the patterned thermal stripping adhesive is a thermal stripping adhesive with uniform thickness in which a second through hole is formed corresponding to the first through hole. The present invention uses a patterned thermal stripping adhesive with uniform thickness to connect the semiconductor device to be processed and the shadow mask, thereby ensuring the stability of the connection between the two and improving the consistency of the gap between the two. The patterned thermal stripping adhesive will become ineffective after heating, which is convenient for separation from the shadow mask after the semiconductor device is prepared.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor preparation, and in particular to a semiconductor preform based on a shadow mask process and a method for preparing the preform. Background Art

[0002] The shadow mask process is a process that uses the shadow mask as a processing mask. It is generally used as a mask for precision micromachining and is used to deposit materials onto a substrate during evaporation and sputtering in a vacuum chamber. It can be specifically applied in the fields of OLED (organic light-emitting diode) panel manufacturing and high-resolution patterning. Taking the patterning process of MEMS (microelectromechanical system) devices as an example, the shadow mask process does not require photolithography for patterning. The process is simple and low-cost, especially without the use of wet etching or dry etching processes, which can avoid damage to the formed MEMS devices. However, the alignment and fixing method of the shadow mask and the bottom MEMS structure will affect the accuracy of patterning preparation. The existing method uses a fixture or other methods to align and fix the shadow mask and the bottom MEMS structure externally, but this fixing method can only fix the two at the edge of the outer side of the structure, which has poor compatibility and is prone to sliding. In addition, in the process of metal deposition and other process preparation, due to the inconsistency of the gap between the shadow mask and the MEMS structure, it is easy to cause local pressure imbalance during the deposition process, thereby affecting the preparation quality rate.

[0003] Therefore, how to provide a shadow mask process that ensures the stability of the fixation between the semiconductor device to be processed and the shadow mask, while ensuring that the gap between the shadow mask and the semiconductor device to be processed is the same at all locations, is a technical problem that technical personnel in this field urgently need to solve. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a semiconductor preform and a preform preparation method based on a shadow mask process, which solves the problem in the prior art of using a clamp or other means to align and fix the Shadow mask and the bottom MEMS structure externally, but this fixing method can only fix the two at the edge of the outer side of the structure, has poor compatibility, and is prone to sliding; in addition, in the preparation process of metal deposition and other processes, due to the inconsistency of the gap between the shadow mask and the MEMS structure, local pressure imbalance is easily caused during the deposition process, thereby affecting the preparation yield.

[0005] In order to solve the above technical problems, the present invention provides a semiconductor preform based on a shadow mask process, comprising:

[0006] A semiconductor device to be processed and a shadow mask are stacked;

[0007] The semiconductor device to be processed is close to the first surface of the shadow mask, and is provided with a region to be processed. The shadow mask is formed with first through holes corresponding to the stacking direction to expose the region to be processed;

[0008] The shadow mask is close to the second surface of the semiconductor device to be processed and connected to the semiconductor device to be processed via a patterned thermal release adhesive;

[0009] The patterned thermal release adhesive is a thermal release adhesive having a uniform thickness and having a second through hole formed corresponding to the first through hole.

[0010] Optionally, the semiconductor device to be processed is a micro-electromechanical system to be processed, and a hollow structure is formed on the first surface outside the area to be processed;

[0011] The patterned thermal release adhesive is a thermal release adhesive with uniform thickness and the second through holes formed corresponding to the hollow structure and the area to be processed.

[0012] Optionally, a limiting groove is formed on the second surface corresponding to the area where the patterned thermal release adhesive is arranged;

[0013] The patterned thermal release adhesive is arranged in the limiting groove.

[0014] The present invention also provides a method for preparing a semiconductor preform based on a shadow mask process, comprising:

[0015] Providing a shadow mask; the shadow mask is formed with a first through hole along a thickness direction;

[0016] Providing a semiconductor device to be processed; a first surface of the semiconductor device to be processed is provided with a region to be processed;

[0017] A patterned thermal release adhesive is prepared on the second surface of the shadow mask; the patterned thermal release adhesive is a thermal release adhesive with uniform thickness and a second through hole formed corresponding to the first through hole; the second surface is the surface of the shadow mask close to the semiconductor device to be processed;

[0018] The shadow mask is aligned and connected to the semiconductor device to be processed by using the patterned thermal release adhesive, so that the area to be processed is exposed at the first through hole, thereby completing the preparation of the semiconductor preform based on the shadow mask process.

[0019] Optionally, after the preparation of the semiconductor preform based on the shadow mask process is completed, the method further includes:

[0020] The area to be processed is processed, and the processed semiconductor preform based on the shadow mask process is heated to make the patterned thermal peeling adhesive fail and separate the shadow mask.

[0021] Optionally, the semiconductor device to be processed is a micro-electromechanical system to be processed which is located at the first surface and has a hollow structure formed outside the area to be processed;

[0022] Accordingly, a patterned thermal release adhesive is prepared on the second surface of the shadow mask, comprising:

[0023] preparing a thermal release adhesive on all of the second surface of the shadow mask;

[0024] The thermal release adhesive in the area corresponding to the hollow structure at the second surface of the shadow mask is removed to obtain the patterned thermal release adhesive.

[0025] Optionally, the thermal release adhesive in the area corresponding to the hollow structure on the second surface of the shadow mask is removed by a mechanical cutting process or a laser cutting process to obtain the patterned thermal release adhesive.

[0026] Optionally, before preparing the patterned thermal release adhesive on the second surface of the shadow mask, the method further includes:

[0027] Preparing a limiting groove on the second surface of the shadow mask corresponding to the area where the patterned thermal release adhesive is prepared;

[0028] Accordingly, a patterned thermal release adhesive is prepared on the second surface of the shadow mask, comprising:

[0029] The patterned thermal release adhesive is prepared at the limiting groove.

[0030] Optionally, providing a shadow mask comprises:

[0031] Providing a shadow mask preform, wherein a patterned mask layer is disposed on one side surface of the shadow mask preform along the thickness direction;

[0032] The shadow mask preform exposed by the patterned mask layer is dry-etched to form the shadow mask.

[0033] It can be seen that the semiconductor preform based on the shadow mask process provided by the present invention includes a semiconductor device to be processed and a shadow mask that are stacked, the semiconductor device to be processed is close to the first surface of the shadow mask, and a to-be-processed area is provided, the shadow mask is formed with a first through hole exposing the to-be-processed area correspondingly along the stacking direction, the shadow mask is close to the second surface of the semiconductor device to be processed, and is connected to the semiconductor device to be processed through a patterned thermal release adhesive, and the patterned thermal release adhesive is a thermal release adhesive with uniform thickness in which a second through hole is formed corresponding to the first through hole. The present invention utilizes a patterned thermal release adhesive with uniform thickness and a second through hole to connect the semiconductor device to be processed and the shadow mask. Without blocking the processing area, an adhesive bond is formed between the semiconductor device to be processed and the stacked surface of the shadow mask, thereby ensuring the stability of the connection between the semiconductor device to be processed and the shadow mask and avoiding offset. At the same time, the consistency of the gap between the semiconductor device to be processed and the shadow mask can be improved, thereby avoiding the phenomenon of local pressure imbalance when processing the processing area, improving the yield of device preparation, and the patterned thermal release adhesive can be heated to make the adhesiveness of the patterned thermal release adhesive invalid after the semiconductor device is prepared, so as to facilitate the separation of the prepared semiconductor device from the shadow mask and improve the efficiency of semiconductor device preparation.

[0034] In addition, the present invention also provides a method for preparing a semiconductor preform based on a shadow mask process, which also has the above-mentioned beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0036] Figure 1 A schematic structural diagram of a semiconductor preform based on a shadow mask process provided by an embodiment of the present invention;

[0037] Figure 2 A schematic structural diagram of another semiconductor preform based on a shadow mask process provided by an embodiment of the present invention;

[0038] Figure 3 A schematic structural diagram of another micro-electromechanical system to be processed in a semiconductor preform based on a shadow mask process provided by an embodiment of the present invention;

[0039] Figure 4 A schematic top view of another semiconductor preform based on a shadow mask process provided by an embodiment of the present invention;

[0040] Figure 5 A flowchart of a method for preparing a semiconductor preform based on a shadow mask process provided by an embodiment of the present invention;

[0041] Figure 6 An exemplary flow chart of a method for preparing a semiconductor preform based on a shadow mask process provided by an embodiment of the present invention;

[0042] in, Figure 6 (a) is a schematic structural diagram of a silicon mask provided in an embodiment of the present invention;

[0043] Figure 6 (b) is a schematic structural diagram of a silicon mask with a patterned thermal release adhesive prepared on its surface provided by an embodiment of the present invention;

[0044] Figure 6 (c) is a schematic diagram of a structure in which a silicon mask and a MEMS wafer are aligned and connected via a patterned thermal release adhesive, provided in an embodiment of the present invention;

[0045] Figure 6 (d) is a semiconductor preform prepared based on a shadow mask process provided by an embodiment of the present invention;

[0046] The following are the descriptions of the reference numerals:

[0047] 1-gap, 10-semiconductor device to be processed, 11-microelectromechanical system to be processed, 111-MEMS wafer, 12-area to be processed, 13-hollow structure, 14-gold metal film, 20-shadow mask, 21-first through hole, 22-silicon mask, 30-patterned thermal release adhesive, 31-second through hole. DETAILED DESCRIPTION

[0048] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0049] Please refer to Figure 1 , Figure 1 A schematic structural diagram of a semiconductor preform based on a shadow mask process provided by an embodiment of the present invention. The preform may include:

[0050] A semiconductor device 10 to be processed and a shadow mask 20 are stacked;

[0051] The semiconductor device 10 to be processed is close to the first surface of the shadow mask 20, and is provided with a region to be processed. The shadow mask 20 is formed with first through holes 21 exposing the region to be processed correspondingly along the stacking direction;

[0052] The shadow mask 20 is close to the second surface of the semiconductor device 10 to be processed, and is connected to the semiconductor device 10 to be processed through the patterned thermal release adhesive 30;

[0053] The patterned thermal release adhesive 30 is a thermal release adhesive having a uniform thickness and having second through holes formed corresponding to the first through holes 21 .

[0054] It should be noted that in this embodiment, the semiconductor device to be processed and the shadow mask 20 are stacked, wherein the shadow mask 20 is generally arranged on the upper side of the semiconductor device to be processed 10. The shadow mask 20 prepared in this embodiment is used to process the area to be processed at the first surface of the semiconductor device to be processed 10, and does not affect other positions of the semiconductor device to be processed 10, that is, the shadow mask 20 is used to protect other areas of the semiconductor device to be processed 10 when processing the area to be processed of the semiconductor device to be processed 10, and the first through hole 21 formed along the stacking direction of the shadow mask 20 is used to expose the area to be processed of the semiconductor device to be processed 10, so as to facilitate processing of the area to be processed. In this embodiment, the colloid for fixing the shadow mask 20 and the semiconductor device to be processed 10 is arranged between the shadow mask 20 and the semiconductor device to be processed 10, which can facilitate fixing the shadow mask 20 and the semiconductor device to be processed 10, improve the stability of the connection between the shadow mask 20 and the semiconductor device to be processed 10, and thus ensure the yield rate of processing the semiconductor device to be processed 10. The present embodiment does not limit the specific material of the shadow mask 20 , and for example, the shadow mask 20 may be a silicon mask, a metal mask, or a quartz glass mask.

[0055] In addition, in this embodiment, the colloid connecting the shadow mask 20 and the semiconductor device 10 to be processed is set as a patterned thermal release adhesive 30, and the patterned thermal release adhesive 30 is a thermal release adhesive with uniform thickness formed with a second through hole corresponding to the first through hole 21. The patterned thermal release adhesive 30 is a pressure-sensitive adhesive that foams and loses its viscosity after heating, so after heating, the patterned thermal release adhesive 30 can be smoothly and easily peeled off from the adhered object. This embodiment does not limit the specific type of the patterned thermal release adhesive 30. For example, a heat release tape can be used, which has viscosity at low temperatures and loses viscosity after heating; or a heat release pressure-sensitive tape can be used, which becomes sticky after pressure is applied and loses viscosity after heating. The specific material of the patterned thermal release adhesive 30 is not limited in this embodiment. For example, it can be composed of high molecular weight polymethacrylate, organic solvent, curing agent and thermal expansion additive. Under the joint action of the above components, the patterned thermal release adhesive 30 is sticky at room temperature, and the viscosity is greatly reduced after being heated to a certain temperature, and it softens and loses its adhesive force, thereby facilitating the separation of the shadow mask 20 from the processed semiconductor device without leaving residual adhesive and damage on the surface of the adhered object. In the present embodiment, the patterned thermal release adhesive 30 is configured to form a second through hole corresponding to the first through hole 21 to avoid blocking the processing area of ​​the semiconductor device 10 to be processed. At the same time, the patterned thermal release adhesive 30 is configured to be a thermal release adhesive with uniform thickness, which can ensure that the spacing between the shadow mask 20 and the semiconductor device 10 to be processed in the stacking direction is the same. In the present embodiment, the patterned thermal release adhesive 30 is configured between the shadow mask 20 and the semiconductor device 10 to be processed, which can improve the stability of the bonding between the shadow mask 20 and the semiconductor device 10 to be processed, avoid the shadow mask 20 and the semiconductor device 10 to be processed from offset in the lateral direction, and ensure the consistency between the shadow mask 20 and the semiconductor device 10 to be processed in the lateral direction. At the same time, the patterned thermal release adhesive 30 is configured to be a thermal release adhesive with uniform thickness, which ensures the consistency of the spacing between the shadow mask 20 and the semiconductor device 10 to be processed along the stacking direction, thereby ensuring that the gap between the shadow mask 20 and the semiconductor device 10 to be processed is the same at all locations, thereby improving the quality rate of processing the processing area.

[0056] In the present embodiment, the patterned thermal release adhesive 30 arranged between the shadow mask 20 and the semiconductor device 10 to be processed can be set as a patterned thermal release adhesive 30 prepared by integral molding, or can also be set to be composed of multiple sub-patterned thermal release adhesives 30. In order to ensure the stability of the connection between the shadow mask 20 and the semiconductor device 10 to be processed and to improve the convenience of preparation, the patterned thermal release adhesive 30 can be set as a patterned thermal release adhesive 30 prepared by integral molding.

[0057] Further, in order to avoid damaging the semiconductor device 10 to be processed and improve the adaptability of the preform, reference may be made to Figure 2 , Figure 2 A schematic structural diagram of another semiconductor preform based on a shadow mask process provided by an embodiment of the present invention. The semiconductor device 10 to be processed can be set as a micro-electromechanical system 11 to be processed, and a hollow structure 13 is formed on the first surface outside the area 12 to be processed;

[0058] The patterned thermal release adhesive 30 is a thermal release adhesive with uniform thickness and having second through holes formed therein corresponding to the hollow structure 13 and the area to be processed 12 .

[0059] It should be noted that in the present embodiment, the semiconductor device 10 to be processed is set as a micro-electromechanical system 11 to be processed, and a hollow structure 13 is formed on the first surface of the micro-electromechanical system, located beside the area 12 to be processed. The hollow structure 13 is a suspended structure that has no contact with the adjacent area. In order to avoid the patterned thermal release adhesive 30 from contacting the hollow structure 13 and driving the hollow structure 13 to move and damage the micro-electromechanical system during separation, a patterned thermal release adhesive 30 is set in the present embodiment. The thermal release adhesive is a thermal release adhesive with uniform thickness and a second through hole formed corresponding to the hollow structure 13 and the area 12 to be processed. The patterned thermal release adhesive 30 can avoid contacting the hollow structure 13 in the micro-electromechanical system 11 to be processed, thereby improving the yield rate of semiconductor device preparation. The present embodiment can be applied to the preparation of metal electrodes and micro-mirror structures of piezoelectric micro-electromechanical systems and amorphous silicon micro-electromechanical systems. The present embodiment can also refer to Figure 3 and Figure 4 , Figure 3 A schematic diagram of the structure of another micro-electromechanical system to be processed in a semiconductor preform based on a shadow mask process provided by an embodiment of the present invention, Figure 4 Another schematic diagram of the top view structure of a semiconductor preform based on a shadow mask process provided by an embodiment of the present invention. Figure 3 as shown in .

[0060] Furthermore, in order to improve the convenience of preparing the patterned thermal release adhesive 30 and the accuracy of position setting, and to prevent the patterned thermal release adhesive 30 from shifting, a limited groove may be formed in the area of ​​the second surface corresponding to the area where the patterned thermal release adhesive 30 is set;

[0061] The patterned thermal release adhesive 30 is disposed in the limiting groove.

[0062] It should be noted that in this embodiment, a limiting groove is prepared on the surface of the shadow mask 20 close to the micro-electromechanical system 11 to be processed. On the one hand, it is convenient for the preparation of the patterned thermal release adhesive 30. On the other hand, it can prevent the patterned thermal release adhesive 30 from flowing to the area in contact with the hollow structure 13 in the micro-electromechanical system 11 to be processed when softened, thereby improving the convenience of preparation.

[0063] A semiconductor preform based on a shadow mask process provided by an embodiment of the present invention comprises a semiconductor device to be processed 10 and a shadow mask 20 which are stacked, wherein the semiconductor device to be processed 10 is close to a first surface of the shadow mask 20, and a region to be processed 12 is provided, and the shadow mask 20 has first through holes 21 correspondingly formed along the stacking direction to expose the region to be processed 12, and the shadow mask 20 is close to a second surface of the semiconductor device to be processed 10, and is connected to the semiconductor device to be processed 10 via a patterned thermal release adhesive 30, wherein the patterned thermal release adhesive 30 is a thermal release adhesive having a uniform thickness and having a second through hole formed corresponding to the first through hole 21. The present invention uses a patterned thermal release adhesive 30 with uniform thickness and a second through hole to connect the semiconductor device 10 to be processed and the shadow mask 20. Without blocking the processing area 12, a bond is formed between the stacked surfaces of the semiconductor device 10 to be processed and the shadow mask 20, thereby ensuring the stability of the connection between the semiconductor device 10 to be processed and the shadow mask 20 and avoiding displacement. At the same time, the consistency of the gap between the semiconductor device 10 to be processed and the shadow mask 20 can be improved, thereby avoiding the phenomenon of local pressure imbalance when processing the processing area 12, thereby improving the yield of device preparation, and the patterned thermal release adhesive 30 can be set to make the viscosity of the patterned thermal release adhesive 30 invalid by heating after the semiconductor device is prepared, so as to facilitate the separation of the prepared semiconductor device from the shadow mask 20 and improve the efficiency of semiconductor device preparation.

[0064] In addition, the embodiment of the present invention sets a patterned thermal release adhesive 30, which is a thermal release adhesive with uniform thickness and a second through hole formed corresponding to the hollow structure 13 and the area to be processed 12, so that the patterned thermal release adhesive 30 can be prevented from contacting the hollow structure 13 in the micro-electromechanical system 11 to be processed, thereby improving the yield rate of semiconductor device preparation; by preparing a limiting groove on the surface of the shadow mask 20 close to the micro-electromechanical system 11 to be processed, on the one hand, it is convenient to prepare the patterned thermal release adhesive 30, and on the other hand, it can prevent the patterned thermal release adhesive 30 from flowing to the area in contact with the hollow structure 13 in the micro-electromechanical system 11 to be processed when softened, thereby improving the convenience of preparation.

[0065] A method for preparing a semiconductor preform based on a shadow mask process provided in an embodiment of the present invention is introduced below. The method for preparing a semiconductor preform based on a shadow mask process described below and the semiconductor preform based on a shadow mask process described above can refer to each other.

[0066] Please refer to Figure 5 , Figure 5 A flowchart of a method for preparing a semiconductor preform based on a shadow mask process is provided in an embodiment of the present invention. The method may include:

[0067] S101: providing a shadow mask; the shadow mask is formed with a first through hole along a thickness direction.

[0068] The first through hole formed along the thickness direction in this embodiment is a structure for exposing the processing area of ​​the first surface of the semiconductor device to be processed when stacked with the semiconductor device to be processed. The first through hole in the shadow mask in this embodiment can be prepared by laser drilling.

[0069] Furthermore, in order to ensure that the shadow mask is successfully prepared, the above-mentioned provision of the shadow mask may include the following steps:

[0070] Step S11: providing a shadow mask preform, wherein a patterned mask layer is disposed on one side surface of the shadow mask preform along the thickness direction;

[0071] Step S12: dry-etching the shadow mask preform exposed by the patterned mask layer to form a shadow mask.

[0072] In this embodiment, a patterned mask layer is used in combination with dry etching to prepare a shadow mask having a first through hole formed along the thickness direction, thereby improving the convenience of preparation.

[0073] S102: providing a semiconductor device to be processed; a first surface of the semiconductor device to be processed is provided with a region to be processed.

[0074] S103: preparing a patterned thermal release adhesive on the second surface of the shadow mask; the patterned thermal release adhesive is a thermal release adhesive with uniform thickness and second through holes formed corresponding to the first through holes, and the second surface is the surface of the shadow mask facing the semiconductor device to be processed.

[0075] In this embodiment, after the shadow mask and the semiconductor device to be processed are stacked, a patterned thermal release adhesive is prepared close to the surface of the semiconductor device to be processed, and the shadow mask and the semiconductor device to be processed are connected by the patterned thermal release adhesive. The patterned thermal release adhesive corresponds to the first through hole in the shadow mask, and a second through hole is formed to avoid blocking the processing area of ​​the semiconductor device to be processed. In this embodiment, the patterned thermal release adhesive can be prepared by a paper cutter or laser cutting.

[0076] S104: using a patterned thermal release adhesive to align and connect the shadow mask with the semiconductor device to be processed, so that the first through hole exposes the area to be processed, thereby completing the preparation of the semiconductor preform based on the shadow mask process.

[0077] In this embodiment, a patterned thermal stripping adhesive is used to align and connect the shadow mask to the semiconductor device to be processed to ensure that the first through hole in the shadow mask corresponds to the area to be processed on the first surface of the semiconductor device to be processed, so as to expose the area to be processed and facilitate the processing of the semiconductor device to be processed. It is also necessary to ensure that the second through hole of the patterned thermal stripping adhesive is aligned with the first through hole in the shadow mask and the area to be processed on the first surface of the semiconductor device to be processed.

[0078] Furthermore, in order to ensure that the semiconductor device is successfully manufactured, after the semiconductor preform based on the shadow mask process is manufactured, the following steps may be further included:

[0079] The processing area is processed, and the processed semiconductor preform based on the shadow mask process is heated to separate the shadow mask.

[0080] It should be noted that in this embodiment, the processing area to be processed is set. After the processing of the semiconductor device to be processed is completed, the processed semiconductor device can be separated from the shadow mask. At this time, the processed semiconductor preform based on the shadow mask process is heated. After heating, the patterned thermal stripping adhesive can be smoothly and easily peeled off from the shadow mask and the semiconductor device, thereby facilitating the separation of the shadow mask and the semiconductor device. In this embodiment, the processing area to be processed can be specifically prepared by physical vapor deposition in the processing area. For example, a gold metal film, an aluminum metal film, or a composite anti-reflection film can be prepared by a magnetron sputtering process or an electron beam evaporation process. In this embodiment, the gold metal layer can be deposited using an electron beam evaporation table deposition process.

[0081] Further, in order to improve the adaptability of the method, the semiconductor device to be processed is a micro-electromechanical system to be processed which is located at the first surface and has a hollow structure formed outside the area to be processed;

[0082] Accordingly, preparing a patterned thermal release adhesive on the second surface of the shadow mask may include:

[0083] preparing a thermal release adhesive on the entire second surface of the shadow mask;

[0084] The thermal release adhesive in the area corresponding to the hollow structure on the second surface of the shadow mask is removed to obtain a patterned thermal release adhesive.

[0085] It should be noted that in this embodiment, the thermal stripping adhesive in the area corresponding to the hollow structure at the second surface of the shadow mask is removed, so that the prepared graphic thermal stripping adhesive can avoid contact with the above-mentioned hollow structure to ensure the yield rate of semiconductor device preparation. It should be further noted that in this embodiment, when the graphic thermal stripping adhesive in the area corresponding to the hollow structure at the second surface of the shadow mask is removed, the graphic thermal stripping adhesive corresponding to the area to be processed will be removed together. In this embodiment, at the first surface of the semiconductor device to be processed, the hollow structure formed outside the area to be processed, wherein the area outside the area to be processed is at the first surface of the semiconductor device to be processed, on the side of the area to be processed away from the center of the area to be processed, which is the outside of the area to be processed, that is, at the first surface of the semiconductor device to be processed, the area where the hollow structure is formed surrounds the area where the area to be processed is formed.

[0086] Furthermore, in order to improve the convenience of preparing the patterned thermal release adhesive, a mechanical cutting process or a laser cutting process can be used to remove the thermal release adhesive in the area corresponding to the hollow structure on the second surface of the shadow mask to obtain the patterned thermal release adhesive.

[0087] In this embodiment, the patterned thermal release adhesive is prepared by a mechanical cutting process or a laser cutting process, which can improve the convenience of preparation.

[0088] Furthermore, in order to improve the position accuracy of preparing the patterned thermal release adhesive on the second surface of the shadow mask and avoid softening and deviation of the patterned thermal release adhesive, before preparing the patterned thermal release adhesive on the second surface of the shadow mask, the following steps may be further included:

[0089] Preparing a limiting groove on the second surface of the shadow mask corresponding to the area where the patterned thermal release adhesive is prepared;

[0090] Accordingly, preparing a patterned thermal release adhesive on the second surface of the shadow mask may include:

[0091] A patterned thermal release adhesive is prepared at the limiting groove.

[0092] It should be noted that in this embodiment, a limiting groove is prepared in the corresponding area of ​​the second surface of the shadow mask, and the patterned thermal release adhesive is arranged in the limiting groove, which can improve the convenience of preparing the patterned thermal release adhesive, while avoiding the softening and flow of the prepared patterned thermal release adhesive, thereby ensuring the accuracy of the preparation position of the patterned thermal release adhesive.

[0093] The method for preparing a semiconductor preform based on a shadow mask process provided by an embodiment of the present invention includes S101: providing a shadow mask; the shadow mask is formed with a first through hole along the thickness direction; S102: providing a semiconductor device to be processed; the first surface of the semiconductor device to be processed is provided with a region to be processed; S103: preparing a patterned thermal release adhesive on the second surface of the shadow mask; the patterned thermal release adhesive is a thermal release adhesive with uniform thickness and a second through hole formed corresponding to the first through hole; the second surface is the surface of the shadow mask facing the semiconductor device to be processed; S104: using the patterned thermal release adhesive to align and connect the shadow mask with the semiconductor device to be processed so that the region to be processed is exposed at the first through hole, thereby completing the preparation of the semiconductor preform based on the shadow mask process. The present invention utilizes a patterned thermal release adhesive with uniform thickness and a second through hole to connect the semiconductor device to be processed and the shadow mask. Without blocking the processing area, an adhesive bond is formed between the semiconductor device to be processed and the stacked surface of the shadow mask, thereby ensuring the stability of the connection between the semiconductor device to be processed and the shadow mask and avoiding offset. At the same time, the consistency of the gap between the semiconductor device to be processed and the shadow mask can be improved, thereby avoiding the phenomenon of local pressure imbalance when processing the processing area, improving the yield of device preparation, and the patterned thermal release adhesive can be heated to make the adhesiveness of the patterned thermal release adhesive invalid after the semiconductor device is prepared, so as to facilitate the separation of the prepared semiconductor device from the shadow mask and improve the efficiency of semiconductor device preparation.

[0094] In addition, the embodiment of the present invention utilizes a patterned mask layer and combines dry etching to prepare a shadow mask having a first through hole formed along the thickness direction, thereby improving the convenience of preparation; by heating the processed semiconductor preform based on the shadow mask process, after heating, the patterned thermal stripping adhesive can be smoothly and easily stripped from the shadow mask and the semiconductor device, thereby facilitating the separation of the shadow mask and the semiconductor device; removing the thermal stripping adhesive in the area corresponding to the hollow structure on the second surface of the shadow mask can avoid contact between the patterned thermal stripping adhesive and the above-mentioned hollow structure to ensure the yield rate of semiconductor device preparation; preparing the above-mentioned patterned thermal stripping adhesive using a mechanical cutting process or a laser cutting process can improve the convenience of preparation; preparing a limiting groove in the corresponding area of ​​the second surface of the shadow mask, and setting the patterned thermal stripping adhesive in the limiting groove can improve the convenience of preparing the patterned thermal stripping adhesive, while avoiding the softening and flow of the prepared patterned thermal stripping adhesive, thereby ensuring the accuracy of the preparation position of the patterned thermal stripping adhesive.

[0095] In a feasible embodiment, the above-mentioned method for preparing a semiconductor preform based on a shadow mask process may specifically include the following steps:

[0096] Step S21: providing a silicon mask 22. The silicon mask 22 is formed with a first through hole 21 along the thickness direction.

[0097] In this embodiment, the first through hole 21 is formed by dry etching along the thickness direction and penetrates the silicon mask 22. Figure 6 , Figure 6 This is a flowchart of a method for preparing a semiconductor preform based on a shadow mask process according to an embodiment of the present invention. Figure 6 (a) in the figure.

[0098] Step S22: preparing a limiting groove on one side surface of the silicon mask 22, and preparing a patterned thermal release adhesive 30 prepared by mechanical cutting or laser cutting in the limiting groove.

[0099] In this embodiment, the patterned thermal release adhesive 30 is viscous at room temperature, and foams and loses its viscosity after being heated to a certain temperature, thereby separating from the silicon mask 22 without any residue. In this embodiment, the patterned thermal release adhesive 30 needs to avoid the area corresponding to the hollow structure 13 in the MEMS wafer 111, and the patterned thermal release adhesive 30 can be patterned by mechanical cutting or laser cutting. Figure 6 (b) in which the patterned thermal release adhesive 30 forms a second through hole 31 corresponding to the first through hole 21 and the hollow structure 13, as shown in FIG. Figure 6 As shown in (b) in .

[0100] Step S23 : aligning the silicon mask 22 and the MEMS wafer 111 by a wafer alignment device, and connecting the silicon mask 22 and the MEMS wafer 111 by a patterned thermal release adhesive 30 .

[0101] In this embodiment, by selecting different thicknesses of the patterned thermal release adhesive 30, the gap 1 between the silicon mask 22 and the MEMS wafer 111 can be controlled. After the alignment is completed, the MEMS wafer 111 and the silicon mask 22 are pressed together from top to bottom, so that the MEMS wafer 111, the patterned thermal release adhesive 30 and the silicon mask 22 are bonded and fixed. Then, an electron beam evaporation table deposition process is performed to prepare a gold metal film 14 in the exposed area to be processed of the MEMS wafer 111. The specific details of this step S23 can be referred to Figure 6 (c) in.

[0102] Step S24 : heat the MEMS wafer 111 and the silicon mask 22 to make the patterned thermal release adhesive 30 foam at high temperature and reduce its viscosity so that it can be peeled off from the surface of the MEMS wafer 111 without damage, thereby separating the MEMS wafer 111 from the silicon mask 22 .

[0103] For details of step S24, please refer to Figure 6 (d) in the figure. In this embodiment, the silicon mask 22 and the MEMS wafer 111 are fixedly adhered by the patterned thermal release adhesive 30, and the gap 1 between the silicon mask 22 and the MEMS wafer 111 can be precisely controlled. In this embodiment, the MEMS wafer 111 and the silicon mask 22 are attached and fixed by an aligner without the aid of a clamp, and overall and partial fixation can be achieved to avoid the offset between the silicon mask 22 and the MEMS wafer 111, and the problem of abnormal metal film rate prepared in the area to be processed due to the inconsistent gap 1. This embodiment can be directly compatible with a standard front-end PVD (physical vapor deposition) machine, and low-stress detachment can be achieved by heating later.

[0104] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0105] In addition, it should be noted that, in this article, relationships such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variations are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0106] The semiconductor preform and the method for preparing the preform based on the shadow mask process provided by the present invention are introduced in detail above. The principle and implementation mode of the present invention are explained by using specific examples herein. The description of the above embodiments is only used to help understand the method and the core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation mode and the scope of application. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A semiconductor preform based on a shadow mask process, characterized in that: include: A semiconductor device to be processed (10) and a shadow mask (20) which are stacked; The semiconductor device (10) to be processed is close to the first surface of the shadow mask (20), and is provided with a region to be processed (12); the shadow mask (20) is formed with a first through hole (21) exposing the region to be processed (12) along a stacking direction; The shadow mask (20) is close to the second surface of the semiconductor device (10) to be processed, and is connected to the semiconductor device (10) to be processed via a patterned thermal release adhesive (30); The patterned thermal release adhesive (30) is a thermal release adhesive having a uniform thickness and having a second through hole (31) formed corresponding to the first through hole (21); The semiconductor device to be processed (10) is a micro-electromechanical system (11) to be processed, and a hollow structure (13) is formed on the first surface outside the area to be processed (12); The patterned thermal release adhesive (30) is a thermal release adhesive having a uniform thickness and having the second through hole (31) formed corresponding to the hollow structure (13) and the area to be processed (12); The second surface forms a limited groove corresponding to the area where the patterned thermal release adhesive (30) is arranged; The patterned thermal release adhesive (30) is arranged in the limiting groove; A metal layer prepared by a physical vapor deposition process is formed at the area to be processed (12); The patterned thermal release adhesive (30) is a pressure-sensitive adhesive that foams and loses its stickiness after being heated; The patterned thermal release adhesive (30) is a patterned thermal release adhesive prepared by integral molding; After completing the preparation of the semiconductor preform based on the shadow mask process, it also includes: Heating the semiconductor preform based on the shadow mask process that has been processed by the physical vapor deposition process to render the patterned thermal release adhesive (30) ineffective and separate the shadow mask (20); The patterned thermal release adhesive (30) is obtained by removing the thermal release adhesive in the area corresponding to the hollow structure (13) at the second surface of the shadow mask (20) using a mechanical cutting process or a laser cutting process; The shadow mask (20) is obtained by providing a shadow mask preform, wherein a patterned mask layer is arranged on one side surface of the shadow mask preform along the thickness direction; and dry etching is performed on the shadow mask preform with the patterned mask layer exposed.

2. A method for preparing a semiconductor preform based on a shadow mask process, characterized in that: include: Provide shadow mask; The shadow mask (20) is formed with a first through hole (21) along the thickness direction; A semiconductor device (10) to be processed is provided; a first surface of the semiconductor device (10) to be processed is provided with a region (12) to be processed; A patterned thermal release adhesive (30) is prepared on the second surface of the shadow mask (20); the patterned thermal release adhesive (30) is a thermal release adhesive with uniform thickness and formed with a second through hole (31) corresponding to the first through hole (21); the second surface is the surface of the shadow mask (20) facing the semiconductor device (10) to be processed; Using the patterned thermal release adhesive (30) to align and connect the shadow mask (20) and the semiconductor device (10) to be processed, so that the first through hole (21) exposes the area (12) to be processed, thereby completing the preparation of the semiconductor preform based on the shadow mask process; The semiconductor device (10) to be processed is a micro-electromechanical system (11) to be processed, which is located at the first surface and has a hollow structure (13) formed outside the area (12) to be processed; Accordingly, a patterned thermal release adhesive (30) is prepared on the second surface of the shadow mask (20), comprising: Preparing a limiting groove on the second surface of the shadow mask (20) corresponding to the area where the patterned thermal release adhesive (30) is prepared; Preparing a thermal release adhesive on all of the second surface of the shadow mask (20); The thermal stripping adhesive in the area corresponding to the hollow structure (13) on the second surface of the shadow mask (20) is removed to obtain the patterned thermal stripping adhesive (30) prepared at the limiting groove; a metal layer prepared by a physical vapor deposition process is formed at the area to be processed (12); The patterned thermal release adhesive (30) is a pressure-sensitive adhesive that foams and loses its stickiness after being heated; the patterned thermal release adhesive (30) is a patterned thermal release adhesive prepared by integral molding; After completing the preparation of the semiconductor preform based on the shadow mask process, it also includes: Heating the semiconductor preform based on the shadow mask process that has been processed by the physical vapor deposition process to render the patterned thermal release adhesive (30) ineffective and separate the shadow mask (20); Using a mechanical cutting process or a laser cutting process, the thermal release adhesive in the area corresponding to the hollow structure (13) on the second surface of the shadow mask (20) is removed to obtain the patterned thermal release adhesive (30); The providing of a shadow mask comprises: Providing a shadow mask preform, wherein a patterned mask layer is disposed on one side surface of the shadow mask preform along the thickness direction; The shadow mask preform with the patterned mask layer exposed is dry-etched to form the shadow mask (20).

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