Random storage method and system for simulating EEPROM (electrically erasable programmable read-only memory) through Flash memory

Abstract

The invention relates to a random storage method and system for simulating EEPROM through a Flash memory. The method mainly comprises the following steps of: pre-defining an EEPROM (Electrically Erasable Programmable Read-Only Memory) data structure for simulating data storage of an actual EEPROM; the method comprises the following steps: dividing a Flash memory into a plurality of Flash blocks, dividing each Flash block into a plurality of EEPROM (Electrically Erasable Programmable Read-Only Memory) storage spaces, and carrying an EEPROM data structure in each EEPROM storage space; in the current Flash block, when the data in the EEPROM storage space is modified every time, the modified data is written into the next EEPROM storage space of the current EEPROM storage space; when the current Flash block is fully written, the modified data are written into the first EEPROM storage space of the next Flash block; when the last Flash block is fully written, the modified data is written into the first EEPROM storage space of the first Flash block; and during each writing, adding 1 to the data number of the current data. Under the scene that the Flash memory and the EEPROM need to be arranged at the same time, the EEPROM can be omitted, and cost is saved for products; meanwhile, it is guaranteed that the Flash memory is not prone to damage.

Description

Technical Field

[0001] The present invention relates to the technical field of software design, and in particular to a random storage method and system for simulating EEPROM through Flash memory. Background Art

[0002] Among all kinds of electronic devices nowadays, Electrically Erasable Programmable Read Only Memory (EEPROM) is a relatively common non-volatile memory and a relatively common data storage device. Its advantages are easy operation, no need to erase, and direct reading and writing in bytes. After power failure, data will not be lost. It is a common device for storing small amounts of configuration data. However, it also has disadvantages. First, there is little storage space, most of which only have a few tens of KBytes of space. Another disadvantage is that the number of writes is limited, generally 100,000 times. Exceeding this number will cause memory damage and data loss.

[0003] Flash memory is also a common memory in electronic devices. It is generally used to store firmware programs, log files, or large file data, etc. in electronic devices. It is basically an indispensable device in electronic devices. Its advantage is that it has a large storage space, generally with storage space ranging from several MBytes, tens of MBytes to hundreds of MBytes. The price is relatively cheap, and it is widely used in electronic devices. Its disadvantage is that the operation is a bit cumbersome. It needs to be erased before writing. The erase size is also fixed. It is suitable for block operation mode and is not so friendly to random storage. It needs to be erased before each writing, and the number of erases is also limited, which is basically around 100,000 times. Frequent erasing actions can easily cause memory damage.

[0004] Based on the basic functions of the above-mentioned Flash memory and EEPROM, existing electronic devices are basically equipped with Flash memory to store firmware programs, log files or large file data during use, and in order to better achieve random access storage, EEPROM is usually set to meet the needs, which will increase the cost. If EEPROM is not set, the Flash memory alone cannot guarantee a good random access storage function and is also prone to damage to the Flash memory.

[0005] In view of this, how to overcome the defects of the existing technology and how to solve the problem that setting up Flash memory and EEPROM at the same time will increase costs, while setting up Flash memory alone cannot guarantee good random storage function and easily cause Flash memory damage, has become an important technical problem that the industry needs to solve urgently. Summary of the invention

[0006] In view of the defects or improvement requirements in the prior art: setting up a Flash memory and an EEPROM at the same time will increase the cost, and setting up a Flash memory alone cannot guarantee a good random storage function and easily causes the Flash memory to be damaged. The present invention provides a random storage method and system for simulating EEPROM through a Flash memory, using a Flash memory to simulate the random storage of EEPROM, in the scenario where the Flash memory and the EEPROM need to be set up at the same time, the EEPROM can be omitted, saving the cost of the product; at the same time, in the case of only setting up the Flash memory, a good random storage function is guaranteed, and the Flash memory is not easily damaged.

[0007] The present invention adopts the following technical solution:

[0008] In a first aspect, the present invention provides a random storage method for simulating EEPROM by Flash memory, comprising:

[0009] Predefine an EEPROM data structure to simulate the data storage of the actual EEPROM;

[0010] A plurality of Flash blocks are divided in the Flash memory, a plurality of EEPROM storage spaces are divided in each Flash block, and each EEPROM storage space carries an EEPROM data structure;

[0011] Each time the data in the EEPROM storage space in the current Flash block is modified, the modified data is written to the next EEPROM storage space of the current EEPROM storage space; when the current Flash block is full, the modified data is written to the first EEPROM storage space of the next Flash block; when the last Flash block is full, the modified data is written to the first EEPROM storage space of the first Flash block; each time the data is written, the data number of the current data is increased by 1.

[0012] In some embodiments, before writing the modified data to the first EEPROM storage space of the Flash block each time, if there is data in the Flash block to be written, all data in the Flash block to be written is first erased, and then the modified data is written to the first EEPROM storage space of the Flash block to be written.

[0013] In some embodiments, a Flash backup block is also divided in the Flash memory; before erasing all data in the Flash block to be written, the modified data is first written to the Flash backup block, then all data in the Flash block to be written is erased, and finally the modified data is written to the first EEPROM storage space of the Flash block to be written.

[0014] In some embodiments, the EEPROM data structure includes an EEPROM data area, a current number area and a CRC area; wherein the EEPROM data area is used to simulate the storage of EEPROM data; the current number area is used to store the data number of the current data written to the EEPROM data area; and the CRC area is used to simulate the CRC check of the actual EEPROM.

[0015] In some embodiments, each time data is written to the EEPROM data area of ​​the EEPROM storage space, a CRC check is performed on the data written to the EEPROM data area.

[0016] In some embodiments, each time the device is powered on, the EEPROM storage space where the last EEPROM data before power failure is stored is found in order, and the current EEPROM data is saved to the next EEPROM storage space of the EEPROM storage space.

[0017] In some embodiments, the method of sequentially finding the EEPROM storage space where the last EEPROM data before power failure is stored specifically includes: for the front and rear two Flash blocks, comparing the data number in the first EEPROM storage space of the front Flash block with the data number in the first EEPROM storage space of the rear Flash block, if the difference between the two data numbers is not a preset difference, then the front Flash block is the Flash block where the last EEPROM data before power failure is stored; sequentially finding the EEPROM storage space where the data was last written in the Flash block, which is the EEPROM storage space where the last EEPROM data before power failure is stored.

[0018] In some embodiments, the amount of EEPROM storage space in each Flash block is consistent, and the preset difference is the amount of EEPROM storage space in each Flash block.

[0019] In a second aspect, the present invention provides a random access storage system for simulating EEPROM by means of a Flash memory, and applies the random access storage method for simulating EEPROM by means of a Flash memory as described in the first aspect, wherein the system comprises a data structure definition module, a storage space allocation module, and a data modification and writing module, wherein:

[0020] The data structure definition module is used to: predefine an EEPROM data structure for simulating actual EEPROM data storage;

[0021] The storage space allocation module is used to: divide a plurality of Flash blocks in the Flash memory, divide a plurality of EEPROM storage spaces in each Flash block, and each EEPROM storage space carries an EEPROM data structure;

[0022] The data modification and writing module is used for: in the current Flash block, each time the data in the EEPROM storage space is modified, writing the modified data into the next EEPROM storage space of the current EEPROM storage space; when the current Flash block is full, writing the modified data into the first EEPROM storage space of the next Flash block; when the last Flash block is full, writing the modified data into the first EEPROM storage space of the first Flash block; each time writing, adding 1 to the data number of the current data.

[0023] In a third aspect, the present invention provides a non-volatile computer storage medium, wherein the computer storage medium stores computer executable instructions, which are executed by one or more processors to complete the random storage method of simulating EEPROM by Flash memory as described in the first aspect.

[0024] Compared with the prior art, the present invention provides a random storage method and system for simulating EEPROM through Flash memory, and its beneficial effects are: using Flash memory to simulate the random storage of EEPROM, in the scenario where Flash memory and EEPROM need to be set at the same time, EEPROM can be omitted, saving cost for the product; at the same time, when only Flash memory is set, good random storage function is guaranteed, and Flash memory is ensured not to be easily damaged. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the figures required for use in the embodiments of the present invention. Obviously, the figures described below are only some embodiments of the present invention, and for those skilled in the art, other figures can be obtained based on these figures without creative work.

[0026] Figure 1 A flowchart of a random storage method for simulating EEPROM by Flash memory provided in Embodiment 1 of the present invention;

[0027] Figure 2 A schematic diagram of an EEPROM data structure provided in Example 1 of the present invention;

[0028] Figure 3 A schematic diagram of Flash block division in a Flash memory provided in Embodiment 1 of the present invention;

[0029] Figure 4 A schematic diagram of the division of the EEPROM storage space in the Flash block provided in Embodiment 1 of the present invention;

[0030] Figure 5 A module diagram of a random access memory system for simulating EEPROM through a Flash memory provided in Embodiment 1 of the present invention;

[0031] Figure 6 A flowchart of initializing the EEPROM data area provided in Embodiment 2 of the present invention;

[0032] Figure 7 A flow chart of writing operation to the EEPROM data area provided in Embodiment 2 of the present invention;

[0033] Figure 8 A flow chart of a read operation on an EEPROM data area provided in Embodiment 2 of the present invention;

[0034] Fig. 9 This is a schematic diagram of the structure of a storage device provided in Example 3 of the present invention. DETAILED DESCRIPTION

[0035] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but do not limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, without departing from the concept of the present invention, several variations and improvements can also be made. These all belong to the protection scope of the present invention. It should be noted that, if there is no conflict, the various features in the embodiments of the present invention can be combined with each other, all within the protection scope of this application. In addition, although the functional module division may be performed in the device schematic diagram, and the logical order may be shown in the flow chart, in some cases, it may be different from the module division in the device, or the steps shown or described in the order in the flow chart may be performed.

[0036] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in this specification and in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. In addition, the technical features involved in each embodiment of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0037] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as open inclusion, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples", "specific examples" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner, that is, although they may be carried in the embodiments or examples of the above terms due to reasons such as the order and position of appearance, it is not limited to that they can be carried in combination by one embodiment or example.

[0038] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application is further described in detail below in conjunction with the figures and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. The present invention is described in detail below with reference to the figures and embodiments.

[0039] Embodiment 1:

[0040] like Figure 1 As shown, an embodiment of the present invention provides a random storage method for simulating EEPROM through a Flash memory, and the method includes the following steps.

[0041] Step 101: Predefine an EEPROM data structure to simulate the data storage of an actual EEPROM. Figure 2As shown, in some embodiments, the EEPROM data structure includes an EEPROM data area, a current number area, and a CRC area. The EEPROM data area is used to simulate the storage of EEPROM data, such as a small amount of configuration data; the current number area is used to store the data number of the current data written to the EEPROM data area; and the CRC area is used to simulate the CRC check of the actual EEPROM. In some embodiments, each time data is written to the EEPROM data area of ​​the EEPROM storage space, a CRC check is required for the data written to the EEPROM data area. Cyclic redundancy check (CRC for short) is an algorithm used to detect or check errors that may occur in data transmission or storage, using the principles of division and remainder to generate a short fixed-bit check code.

[0042] Step 102: divide the Flash memory into several Flash blocks, divide each Flash block into several EEPROM storage spaces, and each EEPROM storage space carries an EEPROM data structure. It should be noted that the storage space of the Flash memory is relatively large, and only a part of the storage space needs to be used to divide several Flash blocks to store EEPROM data; the other space can still handle other storage tasks. Figure 3 and Figure 4 As shown, in this embodiment, the size of each Flash block is consistent, the number of EEPROM storage spaces divided by each Flash block is also consistent, and each EEPROM storage space can store a certain amount of EEPROM data; in addition, the size of the Flash block designed in this embodiment is consistent with the size of a single erase of the Flash memory, that is, each time erasing is performed, data is erased in units of Flash blocks. Based on the above settings, the number of EEPROM storage spaces = Flash block size / EEPROM data size.

[0043] Step 103: Each time the data in the EEPROM storage space of the current Flash block is modified, the modified data is written into the next EEPROM storage space of the current EEPROM storage space; when the current Flash block is full, the modified data is written into the first EEPROM storage space of the next Flash block; when the last Flash block is full, the modified data is written into the first EEPROM storage space of the first Flash block; each time the data is written, the data number of the current data is increased by 1. In some embodiments, before each time the modified data is written into the first EEPROM storage space of the Flash block, if there is data in the Flash block to be written, all the data in the Flash block to be written is erased first, and then the modified data is written into the first EEPROM storage space of the Flash block to be written. Based on the above settings, the number of times the EEPROM data can be written = Flash block size / EEPROM data size*Flash erasable times*Number of Flash blocks.

[0044] The embodiment of the present invention uses the Flash memory to simulate the random storage of the EEPROM through the above settings. In the scenario where the Flash memory and the EEPROM need to be set at the same time, the EEPROM can be omitted, thereby saving the cost of the product. At the same time, in the case where only the Flash memory is set, a plurality of Flash blocks are divided in the Flash memory, and the Flash blocks are divided into a plurality of EEPROM storage spaces. After all the Flash blocks are full, data is erased and rewritten one by one in the Flash blocks from the beginning. If the original erasable number of the Flash memory is n, each Flash block in the embodiment of the present invention can be erased n times, and the overall erasable number is greatly improved. Accordingly, the number of times the EEPROM data can be written is also greatly improved, which can ensure a good random storage function, ensure that the Flash memory is not easily damaged, and improve the service life of the Flash memory.

[0045] refer to Figure 3As shown, in some embodiments, a Flash backup block is also divided in the Flash memory; before erasing all the data to be written in the Flash block, the modified data is first written to the Flash backup block, then all the data to be written in the Flash block is erased, and finally the modified data is written to the first EEPROM storage space to be written in the Flash block. The Flash backup block is set to solve the problem of sudden power failure during data erasing; if the Flash backup block is not set, when the power is suddenly lost during data erasing, the original data has been erased or partially erased, and the newly modified data has not been written, which will cause the final data to be lost. After setting the Flash backup block, the newly modified data is written to the Flash backup block before erasing the data. In this way, even if the power is suddenly lost during data erasing, there is no need to worry about data loss. After powering on again, it can be directly retrieved from the Flash backup block.

[0046] In some embodiments, each time the device is powered on, the EEPROM storage space where the last EEPROM data before power failure is stored is found in order, and the current EEPROM data is saved to the next EEPROM storage space of the EEPROM storage space. For example, if the EEPROM storage space where the last modified EEPROM data before power failure is stored is EEPROM storage space 2 in Flash block 2, then after power is turned on again, the newly modified current EEPROM data is saved to EEPROM storage space 3 in Flash block 2.

[0047] In some embodiments, the method of sequentially finding the EEPROM storage space where the last EEPROM data before power failure is stored specifically includes: for the two front and rear Flash blocks, comparing the data number in the first EEPROM storage space of the front Flash block with the data number in the first EEPROM storage space of the rear Flash block, if the difference between the two data numbers is not a preset difference, then the front Flash block is the Flash block where the last EEPROM data before power failure is stored; sequentially finding the EEPROM storage space where the last data is written in the Flash block, which is the EEPROM storage space where the last EEPROM data before power failure is stored. In the above process, the number of EEPROM storage spaces in each Flash block is the same, and the preset difference is the number of EEPROM storage spaces in each Flash block.

[0048] Still taking the example that the EEPROM storage space where the EEPROM data last modified before power failure is stored is the EEPROM storage space 2 in Flash block 2, when specifically positioning, the comparison is started from Flash block 1 and Flash block 2, assuming that the number of EEPROM storage spaces in each Flash block is 10, according to the rule that the data number is accumulated by 1 each time it is written, the preset difference is also 10. First, compare Flash block 1 and Flash block 2. If the data number of EEPROM storage space 1 of Flash block 1 is 101, and the data number of EEPROM storage space 1 of Flash block 2 is 111, the difference between the two is 10; continue to compare Flash block 2 and Flash block 3. The data number of EEPROM storage space 1 of Flash block 2 is 111, and the data number of EEPROM storage space 1 of Flash block 3 is 21. The difference between the two is not 10, and it can be determined that Flash block 2 is the Flash block where the last EEPROM data before power failure is stored. After determining Flash block 2, the EEPROM storage space where the data was last written is found in order in Flash block 2, that is, EEPROM storage space 2 in Flash block 2. Therefore, after power is turned on again, the newly modified current EEPROM data is saved in EEPROM storage space 3 in Flash block 2.

[0049] Based on the above random storage method of simulating EEPROM through Flash memory, the embodiment of the present invention also provides a random storage system of simulating EEPROM through Flash memory, referring to Figure 5 As shown, the system includes a data structure definition module, a storage space allocation module and a data modification and writing module, wherein: the data structure definition module is used to predefine an EEPROM data structure for simulating data storage of an actual EEPROM; the storage space allocation module is used to divide a number of Flash blocks in the Flash memory, divide a number of EEPROM storage spaces in each Flash block, and each EEPROM storage space carries an EEPROM data structure; the data modification and writing module is used to write the modified data to the next EEPROM storage space of the current EEPROM storage space each time the data in the EEPROM storage space is modified in the current Flash block; when the current Flash block is full, the modified data is written to the first EEPROM storage space of the next Flash block; when the last Flash block is full, the modified data is written to the first EEPROM storage space of the first Flash block; each time the data is written, the data number of the current data is increased by 1. The functions implemented by each module of the above system are consistent with the description of the method, and will not be repeated here.

[0050] In summary, this embodiment proposes a random storage method and system for simulating EEPROM through Flash memory, using Flash memory to simulate the random storage of EEPROM. In the scenario where Flash memory and EEPROM need to be set at the same time, EEPROM can be omitted, saving cost for the product; at the same time, when only Flash memory is set, good random storage function is guaranteed, Flash memory is not easily damaged, and the service life of Flash memory is extended.

[0051] Embodiment 2:

[0052] Based on the first embodiment, the second embodiment describes the initialization, write operation and read operation of the EEPROM data area in the EEPROM data structure.

[0053] First of all, it should be explained that the EEPROM data structure includes the EEPROM data area, the current number area and the CRC area. The EEPROM data area is used to simulate the storage of EEPROM data. Users can access this area in the same way as the EEPROM access method, in byte mode. This area can be regarded as an array and can be directly accessed according to the array index. The current number is used to manage the entire Flash area, and CRC is used to ensure the reliability of the data in the entire data area. The Flash backup block is used to ensure the reliability of data during erasing and writing, and no data loss occurs.

[0054] Each modification of the data in the EEPROM data area triggers a Flash write operation. Before writing, the data in the data area will be CRC-checked to ensure that the data written to the Flash is reliable. Before each write, the number will be accumulated to ensure that the number written to the Flash is unique. The position of each write to the Flash is also accumulated backward until the last EEPROM storage space of the last Flash block is written. When writing next time, the data will first be written to the Flash backup block, and then it will turn around and write to the first EEPROM storage space of the first Flash block. This can ensure that the device is powered off at this time and the integrity of the data can be guaranteed.

[0055] Each time the device is powered on, the data written to the Flash last time must first be found in the Flash, which ensures that the data read out is the latest and determines the address to be written to the Flash next time. To find the latest storage space data, the search is based on the size of the Flash block. Each Flash space can store EEPROM data of a fixed size. During initialization, only the first storage space of the Flash block needs to be read each time. The difference in data numbers of the storage spaces of adjacent Flash blocks can be used to determine whether the last write was in the Flash block. This can greatly reduce the scanning time and improve the efficiency of initialization. After finding the latest Flash block storage space data, the next write address can be found according to the storage space number and data number, which ensures the continuity and correctness of the data.

[0056] For user interface design, users can directly update the data in the EEPROM data area according to the EEPROM access method through parameters such as EEPROM address, data, and data length. Each time the data in the EEPROM data area is updated, a Flash write operation will be triggered, so that each updated data will not be lost.

[0057] Based on the above description, this embodiment describes the initialization, write operation and read operation of the EEPROM data area.

[0058] refer to Figure 6 As shown, the initialization of the EEPROM data area includes: allocating random access memory (RAM) to EEPROM data; reading the first EEPROM storage space of the first Flash block and verifying CRC; reading the first EEPROM storage space of the next Flash block and verifying CRC; comparing whether the data number difference is correct; if correct, returning to the step of reading the first EEPROM storage space of the first Flash block and verifying CRC, the first Flash block of each cycle is the next Flash block of the first Flash block of the previous cycle; if incorrect, finding the last EEPROM data in the first Flash block of this cycle in order; finally, saving the current EEPROM data to RAM.

[0059] refer to Figure 7As shown, the write operation to the EEPROM data area includes: updating the EEPROM data in the RAM; adding 1 to the EEPROM data number; calculating the CRC of the current EEPROM data; judging whether the EEPROM storage space of the current Flash block is the last one; if not, writing the EEPROM data to the next EEPROM storage space and updating the data number; if yes, writing the EEPROM data to the Flash backup block, and then writing the EEPROM data to the first EEPROM storage space of the next Flash block and updating the data number.

[0060] refer to Figure 8 As shown, the read operation on the EEPROM data area includes: finding the data corresponding to the index in the EEPROM storage space according to the address, and returning the found data to complete the reading.

[0061] In summary, this embodiment uses Flash memory to simulate the random storage of EEPROM. In the scenario where Flash memory and EEPROM need to be set at the same time, EEPROM can be omitted, saving cost for the product; at the same time, when only Flash memory is set, good random storage function is guaranteed to ensure that the Flash memory is not easily damaged.

[0062] Embodiment 3:

[0063] Based on the random storage method of simulating EEPROM by Flash memory provided in the above embodiment 1, the present invention also provides a storage device that can be used to implement the above method and system, such as Fig. 9 , which is a schematic diagram of the device architecture of an embodiment of the present invention. The storage device of this embodiment includes one or more processors 21 and a memory 22. The memory 22 may be an instruction memory for storing instructions alone, or may be a certain area in a Flash memory to realize the function of storing instructions. Fig. 9 A processor 21 is taken as an example. The processor 21 and the memory 22 may be connected via a bus or other means. Fig. 9 The example of connecting through bus is taken in the following.

[0064] The memory 22, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs and modules, such as the random storage method of simulating EEPROM through Flash memory in Example 1. The processor 21 executes various functional applications and data processing of the random storage device of simulating EEPROM through Flash memory by running the non-volatile software programs, instructions and modules stored in the memory 22, that is, the random storage method of simulating EEPROM through Flash memory in Example 1 is realized.

[0065] The memory 22 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 22 may optionally include a memory remotely arranged relative to the processor 21, and these remote memories may be connected to the processor 21 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0066] The program instructions / modules are stored in the memory 22. When executed by one or more processors 21, the random storage method of simulating EEPROM by Flash memory in the above embodiment 1 is executed. For example, the random storage method described above is executed. Figure 1 The steps shown.

[0067] The above-mentioned product can execute the method provided in the embodiment of the present application, and has the functional modules and beneficial effects corresponding to the execution method. For technical details not fully described in this embodiment, please refer to the method provided in the embodiment of the present application.

[0068] It should be noted that the device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0069] Through the description of the above implementation methods, ordinary technicians in this field can clearly understand that each implementation method can be implemented by means of software plus a general hardware platform, and of course, it can also be implemented by hardware. Ordinary technicians in this field can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing related hardware through a computer program, and the program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, the storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0070] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them. Under the concept of the present invention, the technical features in the above embodiments or different embodiments may also be combined, the steps may be implemented in any order, and there are many other changes in different aspects of the present invention as described above, which are not provided in detail for the sake of simplicity. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A random storage method for simulating EEPROM by Flash memory, characterized in that: include: Predefine an EEPROM data structure to simulate the data storage of the actual EEPROM; A plurality of Flash blocks are divided in the Flash memory, a plurality of EEPROM storage spaces are divided in each Flash block, and each EEPROM storage space carries an EEPROM data structure; Each time the data in the EEPROM storage space in the current Flash block is modified, the modified data is written into the next EEPROM storage space of the current EEPROM storage space; When the current Flash block is full, the modified data is written to the first EEPROM storage space of the next Flash block; when the last Flash block is full, the modified data is written to the first EEPROM storage space of the first Flash block; Each time you write, increase the data number of the current data by 1.

2. The random storage method of simulating EEPROM by Flash memory according to claim 1, characterized in that: Each time before writing the modified data to the first EEPROM storage space of the Flash block, if there is data in the Flash block to be written, all the data in the Flash block to be written are erased first, and then the modified data is written to the first EEPROM storage space of the Flash block to be written.

3. The random storage method of simulating EEPROM by Flash memory according to claim 2, characterized in that: A Flash backup block is also divided in the Flash memory; before erasing all data to be written in the Flash block, the modified data is first written into the Flash backup block, then all data to be written in the Flash block is erased, and finally the modified data is written into the first EEPROM storage space of the Flash block to be written.

4. The random storage method of simulating EEPROM by Flash memory according to claim 1, characterized in that: The EEPROM data structure includes an EEPROM data area, a current number area and a CRC area; wherein the EEPROM data area is used to simulate the storage of EEPROM data; the current number area is used to store the data number of the current data written into the EEPROM data area; and the CRC area is used to simulate the CRC check of the actual EEPROM.

5. The random storage method of simulating EEPROM by Flash memory according to claim 4, characterized in that: Each time data is written to the EEPROM data area of ​​the EEPROM storage space, a CRC check is required for the data written to the EEPROM data area.

6. The random storage method of simulating EEPROM by Flash memory according to claim 1, characterized in that: Each time the device is powered on, the EEPROM storage space where the last EEPROM data before power failure is stored is found in order, and the current EEPROM data is saved to the next EEPROM storage space of the EEPROM storage space.

7. The random storage method of simulating EEPROM by Flash memory according to claim 6, characterized in that: The method of sequentially finding the EEPROM storage space where the last EEPROM data before power failure is stored specifically includes: for the front and rear two Flash blocks, comparing the data number in the first EEPROM storage space of the front Flash block with the data number in the first EEPROM storage space of the rear Flash block, if the difference between the two data numbers is not a preset difference, then the front Flash block is the Flash block where the last EEPROM data before power failure is stored; and sequentially finding the EEPROM storage space where the data was last written in the Flash block, which is the EEPROM storage space where the last EEPROM data before power failure is stored.

8. The random storage method of simulating EEPROM by Flash memory according to claim 7, characterized in that: The amount of EEPROM storage space in each Flash block is consistent, and the preset difference is the amount of EEPROM storage space in each Flash block.

9. A random access memory system for simulating EEPROM by means of a Flash memory, using the random access memory method for simulating EEPROM by means of a Flash memory as claimed in any one of claims 1 to 8, characterized in that: The system includes a data structure definition module, a storage space allocation module and a data modification and writing module, wherein: The data structure definition module is used to: predefine an EEPROM data structure for simulating actual EEPROM data storage; The storage space allocation module is used to: divide a plurality of Flash blocks in the Flash memory, divide a plurality of EEPROM storage spaces in each Flash block, and each EEPROM storage space carries an EEPROM data structure; The data modification and writing module is used for: in the current Flash block, each time the data in the EEPROM storage space is modified, writing the modified data into the next EEPROM storage space of the current EEPROM storage space; when the current Flash block is full, writing the modified data into the first EEPROM storage space of the next Flash block; when the last Flash block is full, writing the modified data into the first EEPROM storage space of the first Flash block; each time writing, adding 1 to the data number of the current data.

10. A non-volatile computer storage medium, characterized in that: The computer storage medium stores computer executable instructions, which are executed by one or more processors to complete the random storage method of simulating EEPROM through Flash memory as described in any one of claims 1-8.

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